xref: /aosp_15_r20/external/coreboot/src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-pcie.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 #ifndef __CB_BDK_PCIE_H__
2 #define __CB_BDK_PCIE_H__
3 /***********************license start***********************************
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41 
42 #include <libbdk-arch/bdk-numa.h>
43 #include <libbdk-arch/bdk-require.h>
44 
45 /**
46  * @file
47  *
48  * Interface to PCIe as a host(RC) or target(EP)
49  *
50  * <hr>$Revision: 51109 $<hr>
51  *
52  * @addtogroup hal
53  * @{
54  */
55 
56 typedef enum
57 {
58     BDK_PCIE_MEM_CONFIG,    /* Config space */
59     BDK_PCIE_MEM_NORMAL,    /* Memory, not prefetchable */
60     BDK_PCIE_MEM_PREFETCH,  /* Memory, prefetchable */
61     BDK_PCIE_MEM_IO,        /* IO */
62 } bdk_pcie_mem_t;
63 
64 /**
65  * Return the number of possible PCIe ports on a node. The actual number
66  * of configured ports may be less and may also be disjoint.
67  *
68  * @param node   Node to query
69  *
70  * @return Number of PCIe ports that are possible
71  */
72 int bdk_pcie_get_num_ports(bdk_node_t node);
73 
74 /**
75  * Initialize a PCIe port for use in host(RC) mode. It doesn't enumerate the bus.
76  *
77  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
78  *                  value.
79  * @param pcie_port PCIe port to initialize
80  *
81  * @return Zero on success
82  */
83 int bdk_pcie_rc_initialize(bdk_node_t node, int pcie_port);
84 
85 /**
86  * Return PCIe state
87  *
88  * @param pcie_port PCIe port to query
89  *
90  * @return True if port is up and running
91  */
92 int bdk_pcie_is_running(bdk_node_t node, int pcie_port);
93 
94 /**
95  * Shutdown a PCIe port and put it in reset
96  *
97  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
98  *                  value.
99  * @param pcie_port PCIe port to shutdown
100  *
101  * @return Zero on success
102  */
103 int bdk_pcie_rc_shutdown(bdk_node_t node, int pcie_port);
104 
105 /**
106  * Return the Core physical base address for PCIe MEM access. Memory is
107  * read/written as an offset from this address.
108  *
109  * @param node      Node to use in a Numa setup
110  * @param pcie_port PCIe port the memory is on
111  * @param mem_type  Type of memory
112  *
113  * @return 64bit physical address for read/write
114  */
115 uint64_t bdk_pcie_get_base_address(bdk_node_t node, int pcie_port, bdk_pcie_mem_t mem_type);
116 
117 /**
118  * Size of the Mem address region returned at address
119  * bdk_pcie_get_base_address()
120  *
121  * @param node      Node to use in a Numa setup
122  * @param pcie_port PCIe port the IO is for
123  * @param mem_type  Type of memory
124  *
125  * @return Size of the Mem window
126  */
127 uint64_t bdk_pcie_get_base_size(bdk_node_t node, int pcie_port, bdk_pcie_mem_t mem_type);
128 
129 /**
130  * Read 8bits from a Device's config space
131  *
132  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
133  *                  value.
134  * @param pcie_port PCIe port the device is on
135  * @param bus       Sub bus
136  * @param dev       Device ID
137  * @param fn        Device sub function
138  * @param reg       Register to access
139  *
140  * @return Result of the read
141  */
142 uint8_t bdk_pcie_config_read8(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg);
143 
144 /**
145  * Read 16bits from a Device's config space
146  *
147  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
148  *                  value.
149  * @param pcie_port PCIe port the device is on
150  * @param bus       Sub bus
151  * @param dev       Device ID
152  * @param fn        Device sub function
153  * @param reg       Register to access
154  *
155  * @return Result of the read
156  */
157 uint16_t bdk_pcie_config_read16(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg);
158 
159 /**
160  * Read 32bits from a Device's config space
161  *
162  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
163  *                  value.
164  * @param pcie_port PCIe port the device is on
165  * @param bus       Sub bus
166  * @param dev       Device ID
167  * @param fn        Device sub function
168  * @param reg       Register to access
169  *
170  * @return Result of the read
171  */
172 uint32_t bdk_pcie_config_read32(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg) BDK_WEAK;
173 
174 /**
175  * Write 8bits to a Device's config space
176  *
177  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
178  *                  value.
179  * @param pcie_port PCIe port the device is on
180  * @param bus       Sub bus
181  * @param dev       Device ID
182  * @param fn        Device sub function
183  * @param reg       Register to access
184  * @param val       Value to write
185  */
186 void bdk_pcie_config_write8(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg, uint8_t val);
187 
188 /**
189  * Write 16bits to a Device's config space
190  *
191  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
192  *                  value.
193  * @param pcie_port PCIe port the device is on
194  * @param bus       Sub bus
195  * @param dev       Device ID
196  * @param fn        Device sub function
197  * @param reg       Register to access
198  * @param val       Value to write
199  */
200 void bdk_pcie_config_write16(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg, uint16_t val);
201 
202 /**
203  * Write 32bits to a Device's config space
204  *
205  * @param node      Node to use in a Numa setup. Can be an exact ID or a special
206  *                  value.
207  * @param pcie_port PCIe port the device is on
208  * @param bus       Sub bus
209  * @param dev       Device ID
210  * @param fn        Device sub function
211  * @param reg       Register to access
212  * @param val       Value to write
213  */
214 void bdk_pcie_config_write32(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg, uint32_t val) BDK_WEAK;
215 
216 /**
217  * Read 64bits from PCIe using a memory transaction
218  *
219  * @param node      Node to read from
220  * @param pcie_port PCIe port to read
221  * @param address   PCIe address to read
222  *
223  * @return Result of the read
224  */
225 uint64_t bdk_pcie_mem_read64(bdk_node_t node, int pcie_port, uint64_t address);
226 
227 /**
228  * Write 64bits to PCIe memory
229  *
230  * @param node      Node to write to
231  * @param pcie_port PCIe port to use
232  * @param address   Address to write
233  * @param data      Data to write
234  */
235 void bdk_pcie_mem_write64(bdk_node_t node, int pcie_port, uint64_t address, uint64_t data);
236 
237 /**
238  * @INTERNAL
239  * Build a PCIe config space request address for a device
240  *
241  * @param pcie_port PCIe port to access
242  * @param bus       Sub bus
243  * @param dev       Device ID
244  * @param fn        Device sub function
245  * @param reg       Register to access
246  *
247  * @return 64bit IO address
248  */
249 uint64_t pcie_build_config_addr(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg);
250 
251 #endif /* __CB_BDK_PCIE_H__ */
252 /** @} */
253