1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 /* Driver for BayHub Technology LV2 PCIe to SD bridge */ 4 5 #include <types.h> 6 7 enum { 8 LV2_PROTECT = 0xD0, 9 LV2_PROTECT_LOCK_OFF = 0, 10 LV2_PROTECT_LOCK_ON = BIT(0), 11 LV2_PROTECT_OFF = 0, 12 LV2_PROTECT_ON = BIT(31), 13 LV2_PCR_HEX_FC = 0xFC, 14 LV2_PCIE_PHY_P1_ENABLE = BIT(25), 15 LV2_ASPM_L1_TIMER = 0x000E0000, 16 LV2_ASPM_L1_TIMER_MASK = 0xFFF0FFFF, 17 LV2_PCR_HEX_A8 = 0xA8, 18 LV2_LTR_ENABLE = BIT(10), 19 LV2_PCR_HEX_E0 = 0xE0, 20 LV2_PCI_PM_L1_TIMER = 0x30000000, 21 LV2_PCI_PM_L1_TIMER_MASK = 0x0FFFFFFF, 22 LV2_PCR_HEX_234 = 0x234, 23 LV2_MAX_LATENCY_SETTING = 0x10011001, 24 LV2_PCR_HEX_3F4 = 0x3F4, 25 LV2_L1_SUBSTATE_OPTIMISE = 0x0000000A, 26 LV2_L1_SUBSTATE_OPTIMISE_MASK = 0xFFFFFFF0, 27 LV2_PCR_HEX_300 = 0x300, 28 LV2_TUNING_WINDOW = 0x00006055, 29 LV2_TUNING_WINDOW_MASK = 0xFFFF0F00, 30 LV2_PCR_HEX_304 = 0x304, 31 LV2_DRIVER_STRENGTH = 0x0000224B, 32 LV2_DRIVER_STRENGTH_MASK = 0xFFFF0000, 33 LV2_PCR_HEX_308 = 0x308, 34 LV2_RESET_DMA_DISABLE = 0x00C00000, 35 LV2_RESET_DMA_DISABLE_MASK = 0xFF3FFFFF, 36 }; 37