1 /*
2 * Copyright (c) 2011-2020, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encode_avc_g11.cpp
24 //! \brief This file implements the C++ class/interface for Gen11 platform's AVC
25 //! DualPipe encoding to be used across CODECHAL components.
26 //!
27
28 #include "codechal_encode_avc.h"
29 #include "codechal_encode_avc_g11.h"
30 #include "codechal_encode_wp_g11.h"
31 #include "codechal_kernel_header_g11.h"
32 #include "codechal_kernel_hme_g11.h"
33 #include "hal_oca_interface.h"
34 #ifndef _FULL_OPEN_SOURCE
35 #include "igcodeckrn_g11.h"
36 #endif
37 #if USE_CODECHAL_DEBUG_TOOL
38 #include "codechal_debug_encode_par_g11.h"
39 #include "mhw_vdbox_mfx_hwcmd_g11_X.h"
40 #include "mos_util_user_interface.h"
41 #endif
42
43 static const uint32_t sfdOutputBufferSizeCommon = 128;
44 static const uint32_t sfdCostTableBufferSizeCommon = 52;
45 static const uint32_t seiBufferSIZE = 10240; // 10K is just = estimation;
46 static const uint32_t refThreshold = 400;
47 static const uint32_t brcConstantsurfaceEarlySkipTableSize = 128;
48 static const uint32_t brcConstantsurfaceModeMvCostSize = 1664;
49 static const uint32_t brcConstantsurfaceRefcostSize = 128;
50 static const uint32_t brcConstantsurfaceQpList0 = 32;
51 static const uint32_t brcConstantsurfaceQpList0Reserved = 32;
52 static const uint32_t brcConstantsurfaceQpList1 = 32;
53 static const uint32_t brcConstantsurfaceQpList1Reserved = 160;
54 static const uint32_t brcConstantsurfaceIntracostScalingFactor = 64;
55 static const uint32_t brcHistoryBufferSize = 880;
56 static const uint32_t brcConstantsurfaceWidth = 64;
57 static const uint32_t brcConstantsurfaceHeight = 53;
58 static const uint32_t brcConstantsurfaceLambdaSize = 512;;
59 static const uint32_t brcConstantsurfaceFtq25Size = 64;
60 static const uint32_t defaultTrellisQuantIntraRounding = 5;
61 static const uint32_t maxLambda = 0xEFFF;
62 static const uint32_t mbencCurbeSizeInDword = 89;
63 static const uint32_t mbencNumTargetUsages = 3;
64 static const uint32_t mbencBrcBufferSize = 128;
65 static const uint32_t mbTextureThreshold = 1024;
66 static const uint32_t adaptiveTxDecisionThreshold = 128;
67 static const uint32_t brcHistoryBufferOffsetSceneChanged = 0x2FC;
68 static const uint32_t ocaMvDataBufferMaxSize = 0x70000; // MV buffer size for 1280x704 stream
69
70 static const uint32_t trellisQuantizationRounding[NUM_TARGET_USAGE_MODES] =
71 {
72 0, 3, 0, 0, 0, 0, 0, 0
73 };
74
75 enum MbencBindingTableOffset
76 {
77 mbencMfcAvcPakObj = 0,
78 mbencIndMvData = 1,
79 mbencBrcDistortion = 2, // For BRC distortion for I
80 mbencCurrY = 3,
81 mbencCurrUv = 4,
82 mbencMbSpecificData = 5,
83 mbencAuxVmeOut = 6,
84 mbencRefpicselectL0 = 7,
85 mbencMvDataFromMe = 8,
86 mbenc4xMeDistortion = 9,
87 mbencSlicemapData = 10,
88 mbencFwdMbData = 11,
89 mbencFwdMvData = 12,
90 mbencMbqp = 13,
91 mbencMbbrcConstData = 14,
92 mbencVmeInterPredCurrPicIdx0 = 15,
93 mbencVmeInterPredFwdPicIDX0 = 16,
94 mbencVmeInterPredBwdPicIDX00 = 17,
95 mbencVmeInterPredFwdPicIDX1 = 18,
96 mbencVmeInterPredBwdPicIDX10 = 19,
97 mbencVmeInterPredFwdPicIDX2 = 20,
98 mbencReserved0 = 21,
99 mbencVmeInterPredFwdPicIDX3 = 22,
100 mbencReserved1 = 23,
101 mbencVmeInterPredFwdPicIDX4 = 24,
102 mbencReserved2 = 25,
103 mbencVmeInterPredFwdPicIDX5 = 26,
104 mbencReserved3 = 27,
105 mbencVmeInterPredFwdPicIDX6 = 28,
106 mbencReserved4 = 29,
107 mbencVmeInterPredFwdPicIDX7 = 30,
108 mbencReserved5 = 31,
109 mbencVmeInterPredCurrPicIdx1 = 32,
110 mbencVmeInterPredBwdPicIDX01 = 33,
111 mbencReserved6 = 34,
112 mbencVmeInterPredBwdPicIDX11 = 35,
113 mbencReserved7 = 36,
114 mbencMbStats = 37,
115 mbencMadData = 38,
116 mbencBrcCurbeData = 39,
117 mbencForceNonskipMbMap = 40,
118 mbEncAdv = 41,
119 mbencSfdCostTable = 42,
120 mbencSwScoreboard = 43,
121 mbencNumSurfaces = 44
122 };
123
124 enum MbBrcUpdateBindingTableOffset
125 {
126 mbBrcUpdateHistory = 0,
127 mbBrcUpdateMbQp = 1,
128 mbBrcUpdateRoi = 2,
129 mbBrcUpdateMbStat = 3,
130 mbBrcUpdateNumSurfaces = 4
131 };
132
133 enum WpBindingTableOffset
134 {
135 wpInputRefSurface = 0,
136 wpOutputScaledSurface = 1,
137 wpNumSurfaces = 2
138 };
139
140 enum MbencIdOffset
141 {
142 mbencIOffset = 0,
143 mbencPOffset = 1,
144 mbencBOffset = 2,
145 mbencFrameTypeNum = 3
146 };
147
148 enum BrcUpdateBindingTableOffset
149 {
150 frameBrcUpdateHistory = 0,
151 frameBrcUpdatePakStatisticsOutput = 1,
152 frameBrcUpdateImageStateRead = 2,
153 frameBrcUpdateImageStateWrite = 3,
154 frameBrcUpdateMbencCurbeWrite = 4,
155 frameBrcUpdateDistortion = 5,
156 frameBrcUpdateConstantData = 6,
157 frameBrcUpdateMbStat = 7,
158 frameBrcUpdateMvStat = 8,
159 frameBrcUpdateNumSurfaces = 9
160 };
161
162 enum SfdBindingTableOffset
163 {
164 sfdVdencInputImageState = 0,
165 sfdMvDataSurface = 1,
166 sfdInterDistortionSurface = 2,
167 sfdOutputDataSurface = 3,
168 sfdVdencOutputImageState = 4,
169 sfdNumSurfaces = 5
170 };
171
172 // CURBE for Static Frame Detection kernel
173 class SfdCurbe
174 {
175 public:
176 union
177 {
178 struct
179 {
180 uint32_t VDEncModeDisable : MOS_BITFIELD_BIT(0);
181 uint32_t BRCModeEnable : MOS_BITFIELD_BIT(1);
182 uint32_t SliceType : MOS_BITFIELD_RANGE(2, 3);
183 uint32_t: MOS_BITFIELD_BIT(4);
184 uint32_t StreamInType : MOS_BITFIELD_RANGE(5, 8);
185 uint32_t EnableAdaptiveMvStreamIn : MOS_BITFIELD_BIT(9);
186 uint32_t: MOS_BITFIELD_BIT(10);
187 uint32_t EnableIntraCostScalingForStaticFrame : MOS_BITFIELD_BIT(11);
188 uint32_t Reserved : MOS_BITFIELD_RANGE(12, 31);
189 };
190 struct
191 {
192 uint32_t Value;
193 };
194 } m_dw0;
195
196 union
197 {
198 struct
199 {
200 uint32_t QPValue : MOS_BITFIELD_RANGE(0, 7);
201 uint32_t NumOfRefs : MOS_BITFIELD_RANGE(8, 15);
202 uint32_t HMEStreamInRefCost : MOS_BITFIELD_RANGE(16, 23);
203 uint32_t Reserved : MOS_BITFIELD_RANGE(24, 31);
204 };
205 struct
206 {
207 uint32_t Value;
208 };
209 } m_dw1;
210
211 union
212 {
213 struct
214 {
215 uint32_t FrameWidthInMBs : MOS_BITFIELD_RANGE(0, 15); // round-up to 4-MB aligned
216 uint32_t FrameHeightInMBs : MOS_BITFIELD_RANGE(16, 31); // round-up to 4-MB aligned
217 };
218 struct
219 {
220 uint32_t Value;
221 };
222 } m_dw2;
223
224 union
225 {
226 struct
227 {
228 uint32_t LargeMvThresh;
229 };
230 struct
231 {
232 uint32_t Value;
233 };
234 } m_dw3;
235
236 union
237 {
238 struct
239 {
240 uint32_t TotalLargeMvThreshold;
241 };
242 struct
243 {
244 uint32_t Value;
245 };
246 } m_dw4;
247
248 union
249 {
250 struct
251 {
252 uint32_t ZMVThreshold;
253 };
254 struct
255 {
256 uint32_t Value;
257 };
258 } m_dw5;
259
260 union
261 {
262 struct
263 {
264 uint32_t TotalZMVThreshold;
265 };
266 struct
267 {
268 uint32_t Value;
269 };
270 } m_dw6;
271
272 union
273 {
274 struct
275 {
276 uint32_t MinDistThreshold;
277 };
278 struct
279 {
280 uint32_t Value;
281 };
282 } m_dw7;
283
284 uint8_t m_costTable[52];
285
286 union
287 {
288 struct
289 {
290 uint32_t ActualWidthInMB : MOS_BITFIELD_RANGE(0, 15);
291 uint32_t ActualHeightInMB : MOS_BITFIELD_RANGE(16, 31);
292 };
293 struct
294 {
295 uint32_t Value;
296 };
297 } m_dw21;
298
299 union
300 {
301 struct
302 {
303 uint32_t Reserved;
304 };
305 struct
306 {
307 uint32_t Value;
308 };
309 } m_dw22;
310
311 union
312 {
313 struct
314 {
315 uint32_t Reserved;
316 };
317 struct
318 {
319 uint32_t Value;
320 };
321 } m_dw23;
322
323 union
324 {
325 struct
326 {
327 uint32_t VDEncInputImagStateIndex; // used in VDEnc CQP mode
328 };
329 struct
330 {
331 uint32_t Value;
332 };
333 } m_dw24;
334
335 union
336 {
337 struct
338 {
339 uint32_t Reserved;
340 };
341 struct
342 {
343 uint32_t Value;
344 };
345 } m_dw25;
346
347 union
348 {
349 struct
350 {
351 uint32_t MVDataSurfaceIndex; // contains HME MV Data generated by HME kernel
352 };
353 struct
354 {
355 uint32_t Value;
356 };
357 } m_dw26;
358
359 union
360 {
361 struct
362 {
363 uint32_t InterDistortionSurfaceIndex; // contains HME Inter Distortion generated by HME kernel
364 };
365 struct
366 {
367 uint32_t Value;
368 };
369 } m_dw27;
370
371 union
372 {
373 struct
374 {
375 uint32_t OutputDataSurfaceIndex;
376 };
377 struct
378 {
379 uint32_t Value;
380 };
381 } m_dw28;
382
383 union
384 {
385 struct
386 {
387 uint32_t VDEncOutputImagStateIndex;
388 };
389 struct
390 {
391 uint32_t Value;
392 };
393 } m_dw29;
394
SfdCurbe()395 SfdCurbe()
396 {
397 m_dw0.Value = 0;
398 m_dw1.Value = 0;
399 m_dw2.Value = 0;
400 m_dw3.Value = 0;
401 m_dw4.Value = 0;
402 m_dw5.Value = 0;
403 m_dw6.Value = 0;
404 m_dw21.Value = 0;
405 m_dw22.Value = 0;
406 m_dw23.Value = 0;
407 m_dw24.Value = 0;
408 m_dw25.Value = 0;
409 m_dw26.Value = 0;
410 m_dw27.Value = 0;
411 m_dw28.Value = 0;
412 m_dw29.Value = 0;
413
414 for (uint8_t i = 0; i < 52; i++)
415 m_costTable[i] = 0;
416 };
417 };
418
419 class MbencCurbe
420 {
421 public:
422 // DW0
423 union
424 {
425 struct
426 {
427 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
428 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
429 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
430 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
431 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
432 uint32_t : MOS_BITFIELD_BIT( 6 );
433 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
434 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
435 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
436 };
437 struct
438 {
439 uint32_t Value;
440 };
441 } m_dw0;
442
443 // DW1
444 union
445 {
446 struct
447 {
448 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 );
449 uint32_t ExtendedMvCostRange : MOS_BITFIELD_BIT( 6 );
450 uint32_t : MOS_BITFIELD_RANGE( 7,15 );
451 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 );
452 uint32_t : MOS_BITFIELD_RANGE( 22,27 );
453 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 );
454 uint32_t : MOS_BITFIELD_RANGE( 29,31 );
455 };
456 struct
457 {
458 uint32_t Value;
459 };
460 } m_dw1;
461
462 // DW2
463 union
464 {
465 struct
466 {
467 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
468 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
469 uint32_t PicWidth : MOS_BITFIELD_RANGE( 16,31 );
470 };
471 struct
472 {
473 uint32_t Value;
474 };
475 } m_dw2;
476
477 // DW3
478 union
479 {
480 struct
481 {
482 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 );
483 uint32_t : MOS_BITFIELD_RANGE( 2, 3 );
484 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 );
485 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 );
486 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 );
487 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 );
488 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 );
489 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 );
490 uint32_t SkipType : MOS_BITFIELD_BIT( 14 );
491 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 );
492 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 );
493 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 );
494 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 );
495 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 );
496 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 );
497 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 );
498 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 );
499 uint32_t : MOS_BITFIELD_BIT( 31 );
500 };
501 struct
502 {
503 uint32_t Value;
504 };
505 } m_dw3;
506
507 // DW4
508 union
509 {
510 struct
511 {
512 uint32_t PicHeightMinus1 : MOS_BITFIELD_RANGE( 0,15 );
513 uint32_t MvRestrictionInSliceEnable : MOS_BITFIELD_BIT( 16 );
514 uint32_t DeltaMvEnable : MOS_BITFIELD_BIT( 17 );
515 uint32_t TrueDistortionEnable : MOS_BITFIELD_BIT( 18 );
516 uint32_t EnableWavefrontOptimization : MOS_BITFIELD_BIT( 19 );
517 uint32_t EnableFBRBypass : MOS_BITFIELD_BIT( 20 );
518 uint32_t EnableIntraCostScalingForStaticFrame: MOS_BITFIELD_BIT( 21 );
519 uint32_t EnableIntraRefresh : MOS_BITFIELD_BIT( 22 );
520 uint32_t Reserved : MOS_BITFIELD_BIT( 23 );
521 uint32_t EnableDirtyRect : MOS_BITFIELD_BIT( 24 );
522 uint32_t bCurFldIDR : MOS_BITFIELD_BIT( 25 );
523 uint32_t ConstrainedIntraPredFlag : MOS_BITFIELD_BIT( 26 );
524 uint32_t FieldParityFlag : MOS_BITFIELD_BIT( 27 );
525 uint32_t HMEEnable : MOS_BITFIELD_BIT( 28 );
526 uint32_t PictureType : MOS_BITFIELD_RANGE( 29,30 );
527 uint32_t UseActualRefQPValue : MOS_BITFIELD_BIT( 31 );
528 };
529 struct
530 {
531 uint32_t Value;
532 };
533 } m_dw4;
534
535 // DW5
536 union
537 {
538 struct
539 {
540 uint32_t SliceMbHeight : MOS_BITFIELD_RANGE( 0,15 );
541 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
542 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
543 };
544 struct
545 {
546 uint32_t Value;
547 };
548 } m_dw5;
549
550 // DW6
551 union
552 {
553 struct
554 {
555 uint32_t BatchBufferEnd;
556 };
557 struct
558 {
559 uint32_t Value;
560 };
561 } m_dw6;
562
563 // DW7
564 union
565 {
566 struct
567 {
568 uint32_t IntraPartMask : MOS_BITFIELD_RANGE( 0, 4 );
569 uint32_t NonSkipZMvAdded : MOS_BITFIELD_BIT( 5 );
570 uint32_t NonSkipModeAdded : MOS_BITFIELD_BIT( 6 );
571 uint32_t LumaIntraSrcCornerSwap : MOS_BITFIELD_BIT( 7 );
572 uint32_t : MOS_BITFIELD_RANGE( 8,15 );
573 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 );
574 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 );
575 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 );
576 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 );
577 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 );
578 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 );
579 uint32_t : MOS_BITFIELD_BIT( 23 );
580 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 );
581 };
582 struct
583 {
584 uint32_t Value;
585 };
586 } m_dw7;
587
588 struct
589 {
590 // DW8
591 union
592 {
593 struct
594 {
595 uint32_t Mode0Cost : MOS_BITFIELD_RANGE(0, 7);
596 uint32_t Mode1Cost : MOS_BITFIELD_RANGE(8, 15);
597 uint32_t Mode2Cost : MOS_BITFIELD_RANGE(16, 23);
598 uint32_t Mode3Cost : MOS_BITFIELD_RANGE(24, 31);
599 };
600 struct
601 {
602 uint32_t Value;
603 };
604 } DW8;
605
606 // DW9
607 union
608 {
609 struct
610 {
611 uint32_t Mode4Cost : MOS_BITFIELD_RANGE(0, 7);
612 uint32_t Mode5Cost : MOS_BITFIELD_RANGE(8, 15);
613 uint32_t Mode6Cost : MOS_BITFIELD_RANGE(16, 23);
614 uint32_t Mode7Cost : MOS_BITFIELD_RANGE(24, 31);
615 };
616 struct
617 {
618 uint32_t Value;
619 };
620 } DW9;
621
622 // DW10
623 union
624 {
625 struct
626 {
627 uint32_t Mode8Cost : MOS_BITFIELD_RANGE(0, 7);
628 uint32_t Mode9Cost : MOS_BITFIELD_RANGE(8, 15);
629 uint32_t RefIDCost : MOS_BITFIELD_RANGE(16, 23);
630 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE(24, 31);
631 };
632 struct
633 {
634 uint32_t Value;
635 };
636 } DW10;
637
638 // DW11
639 union
640 {
641 struct
642 {
643 uint32_t MV0Cost : MOS_BITFIELD_RANGE(0, 7);
644 uint32_t MV1Cost : MOS_BITFIELD_RANGE(8, 15);
645 uint32_t MV2Cost : MOS_BITFIELD_RANGE(16, 23);
646 uint32_t MV3Cost : MOS_BITFIELD_RANGE(24, 31);
647 };
648 struct
649 {
650 uint32_t Value;
651 };
652 } DW11;
653
654 // DW12
655 union
656 {
657 struct
658 {
659 uint32_t MV4Cost : MOS_BITFIELD_RANGE(0, 7);
660 uint32_t MV5Cost : MOS_BITFIELD_RANGE(8, 15);
661 uint32_t MV6Cost : MOS_BITFIELD_RANGE(16, 23);
662 uint32_t MV7Cost : MOS_BITFIELD_RANGE(24, 31);
663 };
664 struct
665 {
666 uint32_t Value;
667 };
668 } DW12;
669
670 // DW13
671 union
672 {
673 struct
674 {
675 uint32_t QpPrimeY : MOS_BITFIELD_RANGE(0, 7);
676 uint32_t QpPrimeCb : MOS_BITFIELD_RANGE(8, 15);
677 uint32_t QpPrimeCr : MOS_BITFIELD_RANGE(16, 23);
678 uint32_t TargetSizeInWord : MOS_BITFIELD_RANGE(24, 31);
679 };
680 struct
681 {
682 uint32_t Value;
683 };
684 } DW13;
685
686 // DW14
687 union
688 {
689 struct
690 {
691 uint32_t SICFwdTransCoeffThreshold_0 : MOS_BITFIELD_RANGE(0, 15);
692 uint32_t SICFwdTransCoeffThreshold_1 : MOS_BITFIELD_RANGE(16, 23);
693 uint32_t SICFwdTransCoeffThreshold_2 : MOS_BITFIELD_RANGE(24, 31);
694 };
695 struct
696 {
697 uint32_t Value;
698 };
699 } DW14;
700
701 // DW15
702 union
703 {
704 struct
705 {
706 uint32_t SICFwdTransCoeffThreshold_3 : MOS_BITFIELD_RANGE(0, 7);
707 uint32_t SICFwdTransCoeffThreshold_4 : MOS_BITFIELD_RANGE(8, 15);
708 uint32_t SICFwdTransCoeffThreshold_5 : MOS_BITFIELD_RANGE(16, 23);
709 uint32_t SICFwdTransCoeffThreshold_6 : MOS_BITFIELD_RANGE(24, 31); // Highest Freq
710 };
711 struct
712 {
713 uint32_t Value;
714 };
715 } DW15;
716 } m_modeMvCost;
717
718 struct
719 {
720 // DW16
721 union
722 {
723 struct
724 {
725 SearchPathDelta SPDelta_0;
726 SearchPathDelta SPDelta_1;
727 SearchPathDelta SPDelta_2;
728 SearchPathDelta SPDelta_3;
729 };
730 struct
731 {
732 uint32_t Value;
733 };
734 } DW16;
735
736 // DW17
737 union
738 {
739 struct
740 {
741 SearchPathDelta SPDelta_4;
742 SearchPathDelta SPDelta_5;
743 SearchPathDelta SPDelta_6;
744 SearchPathDelta SPDelta_7;
745 };
746 struct
747 {
748 uint32_t Value;
749 };
750 } DW17;
751
752 // DW18
753 union
754 {
755 struct
756 {
757 SearchPathDelta SPDelta_8;
758 SearchPathDelta SPDelta_9;
759 SearchPathDelta SPDelta_10;
760 SearchPathDelta SPDelta_11;
761 };
762 struct
763 {
764 uint32_t Value;
765 };
766 } DW18;
767
768 // DW19
769 union
770 {
771 struct
772 {
773 SearchPathDelta SPDelta_12;
774 SearchPathDelta SPDelta_13;
775 SearchPathDelta SPDelta_14;
776 SearchPathDelta SPDelta_15;
777 };
778 struct
779 {
780 uint32_t Value;
781 };
782 } DW19;
783
784 // DW20
785 union
786 {
787 struct
788 {
789 SearchPathDelta SPDelta_16;
790 SearchPathDelta SPDelta_17;
791 SearchPathDelta SPDelta_18;
792 SearchPathDelta SPDelta_19;
793 };
794 struct
795 {
796 uint32_t Value;
797 };
798 } DW20;
799
800 // DW21
801 union
802 {
803 struct
804 {
805 SearchPathDelta SPDelta_20;
806 SearchPathDelta SPDelta_21;
807 SearchPathDelta SPDelta_22;
808 SearchPathDelta SPDelta_23;
809 };
810 struct
811 {
812 uint32_t Value;
813 };
814 } DW21;
815
816 // DW22
817 union
818 {
819 struct
820 {
821 SearchPathDelta SPDelta_24;
822 SearchPathDelta SPDelta_25;
823 SearchPathDelta SPDelta_26;
824 SearchPathDelta SPDelta_27;
825 };
826 struct
827 {
828 uint32_t Value;
829 };
830 } DW22;
831
832 // DW23
833 union
834 {
835 struct
836 {
837 SearchPathDelta SPDelta_28;
838 SearchPathDelta SPDelta_29;
839 SearchPathDelta SPDelta_30;
840 SearchPathDelta SPDelta_31;
841 };
842 struct
843 {
844 uint32_t Value;
845 };
846 } DW23;
847
848 // DW24
849 union
850 {
851 struct
852 {
853 SearchPathDelta SPDelta_32;
854 SearchPathDelta SPDelta_33;
855 SearchPathDelta SPDelta_34;
856 SearchPathDelta SPDelta_35;
857 };
858 struct
859 {
860 uint32_t Value;
861 };
862 } DW24;
863
864 // DW25
865 union
866 {
867 struct
868 {
869 SearchPathDelta SPDelta_36;
870 SearchPathDelta SPDelta_37;
871 SearchPathDelta SPDelta_38;
872 SearchPathDelta SPDelta_39;
873 };
874 struct
875 {
876 uint32_t Value;
877 };
878 } DW25;
879
880 // DW26
881 union
882 {
883 struct
884 {
885 SearchPathDelta SPDelta_40;
886 SearchPathDelta SPDelta_41;
887 SearchPathDelta SPDelta_42;
888 SearchPathDelta SPDelta_43;
889 };
890 struct
891 {
892 uint32_t Value;
893 };
894 } DW26;
895
896 // DW27
897 union
898 {
899 struct
900 {
901 SearchPathDelta SPDelta_44;
902 SearchPathDelta SPDelta_45;
903 SearchPathDelta SPDelta_46;
904 SearchPathDelta SPDelta_47;
905 };
906 struct
907 {
908 uint32_t Value;
909 };
910 } DW27;
911
912 // DW28
913 union
914 {
915 struct
916 {
917 SearchPathDelta SPDelta_48;
918 SearchPathDelta SPDelta_49;
919 SearchPathDelta SPDelta_50;
920 SearchPathDelta SPDelta_51;
921 };
922 struct
923 {
924 uint32_t Value;
925 };
926 } DW28;
927
928 // DW29
929 union
930 {
931 struct
932 {
933 SearchPathDelta SPDelta_52;
934 SearchPathDelta SPDelta_53;
935 SearchPathDelta SPDelta_54;
936 SearchPathDelta SPDelta_55;
937 };
938 struct
939 {
940 uint32_t Value;
941 };
942 } DW29;
943
944 // DW30
945 union
946 {
947 struct
948 {
949 uint32_t Intra4x4ModeMask : MOS_BITFIELD_RANGE(0, 8);
950 uint32_t: MOS_BITFIELD_RANGE(9, 15);
951 uint32_t Intra8x8ModeMask : MOS_BITFIELD_RANGE(16, 24);
952 uint32_t: MOS_BITFIELD_RANGE(25, 31);
953 };
954 struct
955 {
956 uint32_t Value;
957 };
958 } DW30;
959
960 // DW31
961 union
962 {
963 struct
964 {
965 uint32_t Intra16x16ModeMask : MOS_BITFIELD_RANGE(0, 3);
966 uint32_t IntraChromaModeMask : MOS_BITFIELD_RANGE(4, 7);
967 uint32_t IntraComputeType : MOS_BITFIELD_RANGE(8, 9);
968 uint32_t: MOS_BITFIELD_RANGE(10, 31);
969 };
970 struct
971 {
972 uint32_t Value;
973 };
974 } DW31;
975 } m_spDelta;
976
977 // DW32
978 union
979 {
980 struct
981 {
982 uint32_t SkipVal : MOS_BITFIELD_RANGE( 0,15 );
983 uint32_t MultiPredL0Disable : MOS_BITFIELD_RANGE( 16,23 );
984 uint32_t MultiPredL1Disable : MOS_BITFIELD_RANGE( 24,31 );
985 };
986 struct
987 {
988 uint32_t Value;
989 };
990 } m_dw32;
991
992 // DW33
993 union
994 {
995 struct
996 {
997 uint32_t Intra16x16NonDCPredPenalty : MOS_BITFIELD_RANGE( 0, 7 );
998 uint32_t Intra8x8NonDCPredPenalty : MOS_BITFIELD_RANGE( 8,15 );
999 uint32_t Intra4x4NonDCPredPenalty : MOS_BITFIELD_RANGE( 16,23 );
1000 uint32_t : MOS_BITFIELD_RANGE( 24,31 );
1001 };
1002 struct
1003 {
1004 uint32_t Value;
1005 };
1006 } m_dw33;
1007
1008 // DW34
1009 union
1010 {
1011 struct
1012 {
1013 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT( 0 );
1014 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT( 1 );
1015 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT( 2 );
1016 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT( 3 );
1017 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT( 4 );
1018 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT( 5 );
1019 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT( 6 );
1020 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT( 7 );
1021 uint32_t List1RefID0FrameFieldFlag : MOS_BITFIELD_BIT( 8 );
1022 uint32_t List1RefID1FrameFieldFlag : MOS_BITFIELD_BIT( 9 );
1023 uint32_t IntraRefreshEn : MOS_BITFIELD_RANGE( 10,11 );
1024 uint32_t ArbitraryNumMbsPerSlice : MOS_BITFIELD_BIT( 12 );
1025 uint32_t TQEnable : MOS_BITFIELD_BIT( 13 );
1026 uint32_t ForceNonSkipMbEnable : MOS_BITFIELD_BIT( 14 );
1027 uint32_t DisableEncSkipCheck : MOS_BITFIELD_BIT( 15 );
1028 uint32_t EnableDirectBiasAdjustment : MOS_BITFIELD_BIT( 16 );
1029 uint32_t bForceToSkip : MOS_BITFIELD_BIT( 17 );
1030 uint32_t EnableGlobalMotionBiasAdjustment : MOS_BITFIELD_BIT( 18 );
1031 uint32_t EnableAdaptiveTxDecision : MOS_BITFIELD_BIT( 19 );
1032 uint32_t EnablePerMBStaticCheck : MOS_BITFIELD_BIT( 20 );
1033 uint32_t EnableAdaptiveSearchWindowSize : MOS_BITFIELD_BIT( 21 );
1034 uint32_t RemoveIntraRefreshOverlap : MOS_BITFIELD_BIT( 22 );
1035 uint32_t CQPFlag : MOS_BITFIELD_BIT( 23 );
1036 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT( 24 );
1037 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT( 25 );
1038 uint32_t MADEnableFlag : MOS_BITFIELD_BIT( 26 );
1039 uint32_t ROIEnableFlag : MOS_BITFIELD_BIT( 27 );
1040 uint32_t EnableMBFlatnessChkOptimization : MOS_BITFIELD_BIT( 28 );
1041 uint32_t bDirectMode : MOS_BITFIELD_BIT( 29 );
1042 uint32_t MBBrcEnable : MOS_BITFIELD_BIT( 30 );
1043 uint32_t bOriginalBff : MOS_BITFIELD_BIT( 31 );
1044 };
1045 struct
1046 {
1047 uint32_t Value;
1048 };
1049 } m_dw34;
1050
1051 // DW35
1052 union
1053 {
1054 struct
1055 {
1056 uint32_t PanicModeMBThreshold : MOS_BITFIELD_RANGE( 0,15 );
1057 uint32_t SmallMbSizeInWord : MOS_BITFIELD_RANGE( 16,23 );
1058 uint32_t LargeMbSizeInWord : MOS_BITFIELD_RANGE( 24,31 );
1059 };
1060 struct
1061 {
1062 uint32_t Value;
1063 };
1064 } m_dw35;
1065
1066 // DW36
1067 union
1068 {
1069 struct
1070 {
1071 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE( 0, 7 );
1072 uint32_t HMECombinedExtraSUs : MOS_BITFIELD_RANGE( 8,15 );
1073 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE( 16,23 );
1074 uint32_t : MOS_BITFIELD_RANGE( 24,26 );
1075 uint32_t MBInputEnable : MOS_BITFIELD_BIT( 27 );
1076 uint32_t IsFwdFrameShortTermRef : MOS_BITFIELD_BIT( 28 );
1077 uint32_t CheckAllFractionalEnable : MOS_BITFIELD_BIT( 29 );
1078 uint32_t HMECombineOverlap : MOS_BITFIELD_RANGE( 30,31 );
1079 };
1080 struct
1081 {
1082 uint32_t Value;
1083 };
1084 } m_dw36;
1085
1086 // DW37
1087 union
1088 {
1089 struct
1090 {
1091 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
1092 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
1093 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
1094 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
1095 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
1096 uint32_t : MOS_BITFIELD_BIT( 6 );
1097 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
1098 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
1099 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
1100 };
1101 struct
1102 {
1103 uint32_t Value;
1104 };
1105 } m_dw37;
1106
1107 // DW38
1108 union
1109 {
1110 struct
1111 {
1112 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
1113 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
1114 uint32_t RefThreshold : MOS_BITFIELD_RANGE( 16,31 );
1115 };
1116 struct
1117 {
1118 uint32_t Value;
1119 };
1120 } m_dw38;
1121
1122 // DW39
1123 union
1124 {
1125 struct
1126 {
1127 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
1128 uint32_t HMERefWindowsCombThreshold : MOS_BITFIELD_RANGE( 8,15 );
1129 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
1130 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
1131 };
1132 struct
1133 {
1134 uint32_t Value;
1135 };
1136 } m_dw39;
1137
1138 // DW40
1139 union
1140 {
1141 struct
1142 {
1143 uint32_t DistScaleFactorRefID0List0 : MOS_BITFIELD_RANGE( 0,15 );
1144 uint32_t DistScaleFactorRefID1List0 : MOS_BITFIELD_RANGE( 16,31 );
1145 };
1146 struct
1147 {
1148 uint32_t Value;
1149 };
1150 } m_dw40;
1151
1152 // DW41
1153 union
1154 {
1155 struct
1156 {
1157 uint32_t DistScaleFactorRefID2List0 : MOS_BITFIELD_RANGE( 0,15 );
1158 uint32_t DistScaleFactorRefID3List0 : MOS_BITFIELD_RANGE( 16,31 );
1159 };
1160 struct
1161 {
1162 uint32_t Value;
1163 };
1164 } m_dw41;
1165
1166 // DW42
1167 union
1168 {
1169 struct
1170 {
1171 uint32_t DistScaleFactorRefID4List0 : MOS_BITFIELD_RANGE( 0,15 );
1172 uint32_t DistScaleFactorRefID5List0 : MOS_BITFIELD_RANGE( 16,31 );
1173 };
1174 struct
1175 {
1176 uint32_t Value;
1177 };
1178 } m_dw42;
1179
1180 // DW43
1181 union
1182 {
1183 struct
1184 {
1185 uint32_t DistScaleFactorRefID6List0 : MOS_BITFIELD_RANGE( 0,15 );
1186 uint32_t DistScaleFactorRefID7List0 : MOS_BITFIELD_RANGE( 16,31 );
1187 };
1188 struct
1189 {
1190 uint32_t Value;
1191 };
1192 } m_dw43;
1193
1194 // DW44
1195 union
1196 {
1197 struct
1198 {
1199 uint32_t ActualQPValueForRefID0List0 : MOS_BITFIELD_RANGE( 0, 7 );
1200 uint32_t ActualQPValueForRefID1List0 : MOS_BITFIELD_RANGE( 8,15 );
1201 uint32_t ActualQPValueForRefID2List0 : MOS_BITFIELD_RANGE( 16,23 );
1202 uint32_t ActualQPValueForRefID3List0 : MOS_BITFIELD_RANGE( 24,31 );
1203 };
1204 struct
1205 {
1206 uint32_t Value;
1207 };
1208 } m_dw44;
1209
1210 // DW45
1211 union
1212 {
1213 struct
1214 {
1215 uint32_t ActualQPValueForRefID4List0 : MOS_BITFIELD_RANGE( 0, 7 );
1216 uint32_t ActualQPValueForRefID5List0 : MOS_BITFIELD_RANGE( 8,15 );
1217 uint32_t ActualQPValueForRefID6List0 : MOS_BITFIELD_RANGE( 16,23 );
1218 uint32_t ActualQPValueForRefID7List0 : MOS_BITFIELD_RANGE( 24,31 );
1219 };
1220 struct
1221 {
1222 uint32_t Value;
1223 };
1224 } m_dw45;
1225
1226 // DW46
1227 union
1228 {
1229 struct
1230 {
1231 uint32_t ActualQPValueForRefID0List1 : MOS_BITFIELD_RANGE( 0, 7 );
1232 uint32_t ActualQPValueForRefID1List1 : MOS_BITFIELD_RANGE( 8,15 );
1233 uint32_t RefCost : MOS_BITFIELD_RANGE( 16,31 );
1234 };
1235 struct
1236 {
1237 uint32_t Value;
1238 };
1239 } m_dw46;
1240
1241 // DW47
1242 union
1243 {
1244 struct
1245 {
1246 uint32_t MbQpReadFactor : MOS_BITFIELD_RANGE( 0, 7 );
1247 uint32_t IntraCostSF : MOS_BITFIELD_RANGE( 8,15 );
1248 uint32_t MaxVmvR : MOS_BITFIELD_RANGE( 16,31 );
1249 };
1250 struct
1251 {
1252 uint32_t Value;
1253 };
1254 } m_dw47;
1255
1256 //DW48
1257 union
1258 {
1259 struct
1260 {
1261 uint32_t IntraRefreshMBx : MOS_BITFIELD_RANGE( 0,15 );
1262 uint32_t IntraRefreshUnitInMBMinus1 : MOS_BITFIELD_RANGE( 16,23 );
1263 uint32_t IntraRefreshQPDelta : MOS_BITFIELD_RANGE( 24,31 );
1264 };
1265 struct
1266 {
1267 uint32_t Value;
1268 };
1269 } m_dw48;
1270
1271 // DW49
1272 union
1273 {
1274 struct
1275 {
1276 uint32_t ROI1_X_left : MOS_BITFIELD_RANGE( 0,15 );
1277 uint32_t ROI1_Y_top : MOS_BITFIELD_RANGE( 16,31 );
1278 };
1279 struct
1280 {
1281 uint32_t Value;
1282 };
1283 } m_dw49;
1284
1285 // DW50
1286 union
1287 {
1288 struct
1289 {
1290 uint32_t ROI1_X_right : MOS_BITFIELD_RANGE( 0,15 );
1291 uint32_t ROI1_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
1292 };
1293 struct
1294 {
1295 uint32_t Value;
1296 };
1297 } m_dw50;
1298
1299 // DW51
1300 union
1301 {
1302 struct
1303 {
1304 uint32_t ROI2_X_left : MOS_BITFIELD_RANGE( 0,15 );
1305 uint32_t ROI2_Y_top : MOS_BITFIELD_RANGE( 16,31 );
1306 };
1307 struct
1308 {
1309 uint32_t Value;
1310 };
1311 } m_dw51;
1312
1313 // DW52
1314 union
1315 {
1316 struct
1317 {
1318 uint32_t ROI2_X_right : MOS_BITFIELD_RANGE( 0,15 );
1319 uint32_t ROI2_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
1320 };
1321 struct
1322 {
1323 uint32_t Value;
1324 };
1325 } m_dw52;
1326
1327 // DW53
1328 union
1329 {
1330 struct
1331 {
1332 uint32_t ROI3_X_left : MOS_BITFIELD_RANGE( 0,15 );
1333 uint32_t ROI3_Y_top : MOS_BITFIELD_RANGE( 16,31 );
1334 };
1335 struct
1336 {
1337 uint32_t Value;
1338 };
1339 } m_dw53;
1340
1341 // DW54
1342 union
1343 {
1344 struct
1345 {
1346 uint32_t ROI3_X_right : MOS_BITFIELD_RANGE( 0,15 );
1347 uint32_t ROI3_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
1348 };
1349 struct
1350 {
1351 uint32_t Value;
1352 };
1353 } m_dw54;
1354
1355 // DW55
1356 union
1357 {
1358 struct
1359 {
1360 uint32_t ROI4_X_left : MOS_BITFIELD_RANGE( 0,15 );
1361 uint32_t ROI4_Y_top : MOS_BITFIELD_RANGE( 16,31 );
1362 };
1363 struct
1364 {
1365 uint32_t Value;
1366 };
1367 } m_dw55;
1368
1369 // DW56
1370 union
1371 {
1372 struct
1373 {
1374 uint32_t ROI4_X_right : MOS_BITFIELD_RANGE( 0,15 );
1375 uint32_t ROI4_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
1376 };
1377 struct
1378 {
1379 uint32_t Value;
1380 };
1381 } m_dw56;
1382
1383 // DW57
1384 union
1385 {
1386 struct
1387 {
1388 uint32_t ROI1_dQpPrimeY : MOS_BITFIELD_RANGE( 0, 7 );
1389 uint32_t ROI2_dQpPrimeY : MOS_BITFIELD_RANGE( 8,15 );
1390 uint32_t ROI3_dQpPrimeY : MOS_BITFIELD_RANGE( 16,23 );
1391 uint32_t ROI4_dQpPrimeY : MOS_BITFIELD_RANGE( 24,31 );
1392 };
1393 struct
1394 {
1395 uint32_t Value;
1396 };
1397 } m_dw57;
1398
1399 // DW58
1400 union
1401 {
1402 struct
1403 {
1404 uint32_t Lambda_8x8Inter : MOS_BITFIELD_RANGE( 0,15 );
1405 uint32_t Lambda_8x8Intra : MOS_BITFIELD_RANGE( 16,31 );
1406 };
1407 struct
1408 {
1409 uint32_t Value;
1410 };
1411 } m_dw58;
1412
1413 // DW59
1414 union
1415 {
1416 struct
1417 {
1418 uint32_t Lambda_Inter : MOS_BITFIELD_RANGE( 0,15 );
1419 uint32_t Lambda_Intra : MOS_BITFIELD_RANGE( 16,31 );
1420 };
1421 struct
1422 {
1423 uint32_t Value;
1424 };
1425 } m_dw59;
1426
1427 // DW60
1428 union
1429 {
1430 struct
1431 {
1432 uint32_t MBTextureThreshold : MOS_BITFIELD_RANGE( 0,15 );
1433 uint32_t TxDecisonThreshold : MOS_BITFIELD_RANGE( 16,31 );
1434 };
1435 struct
1436 {
1437 uint32_t Value;
1438 };
1439 } m_dw60;
1440
1441 // DW61
1442 union
1443 {
1444 struct
1445 {
1446 uint32_t HMEMVCostScalingFactor : MOS_BITFIELD_RANGE( 0, 7 );
1447 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,15 );
1448 uint32_t IntraRefreshMBy : MOS_BITFIELD_RANGE( 16,31 );
1449 };
1450 struct
1451 {
1452 uint32_t Value;
1453 };
1454 } m_dw61;
1455
1456 // DW62
1457 union
1458 {
1459 struct
1460 {
1461 uint32_t IPCM_QP0 : MOS_BITFIELD_RANGE( 0, 7 );
1462 uint32_t IPCM_QP1 : MOS_BITFIELD_RANGE( 8,15 );
1463 uint32_t IPCM_QP2 : MOS_BITFIELD_RANGE( 16,23 );
1464 uint32_t IPCM_QP3 : MOS_BITFIELD_RANGE( 24,31 );
1465 };
1466 struct
1467 {
1468 uint32_t Value;
1469 };
1470 } m_dw62;
1471
1472 // DW63
1473 union
1474 {
1475 struct
1476 {
1477 uint32_t IPCM_QP4 : MOS_BITFIELD_RANGE( 0, 7 );
1478 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,15 );
1479 uint32_t IPCM_Thresh0 : MOS_BITFIELD_RANGE( 16,31 );
1480 };
1481 struct
1482 {
1483 uint32_t Value;
1484 };
1485 } m_dw63;
1486
1487 // DW64
1488 union
1489 {
1490 struct
1491 {
1492 uint32_t IPCM_Thresh1 : MOS_BITFIELD_RANGE( 0,15 );
1493 uint32_t IPCM_Thresh2 : MOS_BITFIELD_RANGE( 16,31 );
1494 };
1495 struct
1496 {
1497 uint32_t Value;
1498 };
1499 } m_dw64;
1500
1501 // DW65
1502 union
1503 {
1504 struct
1505 {
1506 uint32_t IPCM_Thresh3 : MOS_BITFIELD_RANGE( 0,15 );
1507 uint32_t IPCM_Thresh4 : MOS_BITFIELD_RANGE( 16,31 );
1508 };
1509 struct
1510 {
1511 uint32_t Value;
1512 };
1513 } m_dw65;
1514
1515 // DW66
1516 union
1517 {
1518 struct
1519 {
1520 uint32_t MBDataSurfIndex;
1521 };
1522 struct
1523 {
1524 uint32_t Value;
1525 };
1526 } m_dw66;
1527
1528 // DW67
1529 union
1530 {
1531 struct
1532 {
1533 uint32_t MVDataSurfIndex;
1534 };
1535 struct
1536 {
1537 uint32_t Value;
1538 };
1539 } m_dw67;
1540
1541 // DW68
1542 union
1543 {
1544 struct
1545 {
1546 uint32_t IDistSurfIndex;
1547 };
1548 struct
1549 {
1550 uint32_t Value;
1551 };
1552 } m_dw68;
1553
1554 // DW69
1555 union
1556 {
1557 struct
1558 {
1559 uint32_t SrcYSurfIndex;
1560 };
1561 struct
1562 {
1563 uint32_t Value;
1564 };
1565 } m_dw69;
1566
1567 // DW70
1568 union
1569 {
1570 struct
1571 {
1572 uint32_t MBSpecificDataSurfIndex;
1573 };
1574 struct
1575 {
1576 uint32_t Value;
1577 };
1578 } m_dw70;
1579
1580 // DW71
1581 union
1582 {
1583 struct
1584 {
1585 uint32_t AuxVmeOutSurfIndex;
1586 };
1587 struct
1588 {
1589 uint32_t Value;
1590 };
1591 } m_dw71;
1592
1593 // DW72
1594 union
1595 {
1596 struct
1597 {
1598 uint32_t CurrRefPicSelSurfIndex;
1599 };
1600 struct
1601 {
1602 uint32_t Value;
1603 };
1604 } m_dw72;
1605
1606 // DW73
1607 union
1608 {
1609 struct
1610 {
1611 uint32_t HMEMVPredFwdBwdSurfIndex;
1612 };
1613 struct
1614 {
1615 uint32_t Value;
1616 };
1617 } m_dw73;
1618
1619 // DW74
1620 union
1621 {
1622 struct
1623 {
1624 uint32_t HMEDistSurfIndex;
1625 };
1626 struct
1627 {
1628 uint32_t Value;
1629 };
1630 } m_dw74;
1631
1632 // DW75
1633 union
1634 {
1635 struct
1636 {
1637 uint32_t SliceMapSurfIndex;
1638 };
1639 struct
1640 {
1641 uint32_t Value;
1642 };
1643 } m_dw75;
1644
1645 // DW76
1646 union
1647 {
1648 struct
1649 {
1650 uint32_t FwdFrmMBDataSurfIndex;
1651 };
1652 struct
1653 {
1654 uint32_t Value;
1655 };
1656 } m_dw76;
1657
1658 // DW77
1659 union
1660 {
1661 struct
1662 {
1663 uint32_t FwdFrmMVSurfIndex;
1664 };
1665 struct
1666 {
1667 uint32_t Value;
1668 };
1669 } m_dw77;
1670
1671 // DW78
1672 union
1673 {
1674 struct
1675 {
1676 uint32_t MBQPBuffer;
1677 };
1678 struct
1679 {
1680 uint32_t Value;
1681 };
1682 } m_dw78;
1683
1684 // DW79
1685 union
1686 {
1687 struct
1688 {
1689 uint32_t MBBRCLut;
1690 };
1691 struct
1692 {
1693 uint32_t Value;
1694 };
1695 } m_dw79;
1696
1697 // DW80
1698 union
1699 {
1700 struct
1701 {
1702 uint32_t VMEInterPredictionSurfIndex;
1703 };
1704 struct
1705 {
1706 uint32_t Value;
1707 };
1708 } m_dw80;
1709
1710 // DW81
1711 union
1712 {
1713 struct
1714 {
1715 uint32_t VMEInterPredictionMRSurfIndex;
1716 };
1717 struct
1718 {
1719 uint32_t Value;
1720 };
1721 } m_dw81;
1722
1723 // DW82
1724 union
1725 {
1726 struct
1727 {
1728 uint32_t MbStatsSurfIndex;
1729 };
1730 struct
1731 {
1732 uint32_t Value;
1733 };
1734 } m_dw82;
1735
1736 // DW83
1737 union
1738 {
1739 struct
1740 {
1741 uint32_t MADSurfIndex;
1742 };
1743 struct
1744 {
1745 uint32_t Value;
1746 };
1747 } m_dw83;
1748
1749 // DW84
1750 union
1751 {
1752 struct
1753 {
1754 uint32_t BRCCurbeSurfIndex;
1755 };
1756 struct
1757 {
1758 uint32_t Value;
1759 };
1760 } m_dw84;
1761
1762 // DW85
1763 union
1764 {
1765 struct
1766 {
1767 uint32_t ForceNonSkipMBmapSurface;
1768 };
1769 struct
1770 {
1771 uint32_t Value;
1772 };
1773 } m_dw85;
1774
1775 // DW86
1776 union
1777 {
1778 struct
1779 {
1780 uint32_t ReservedIndex;
1781 };
1782 struct
1783 {
1784 uint32_t Value;
1785 };
1786 } m_dw86;
1787
1788 // DW87
1789 union
1790 {
1791 struct
1792 {
1793 uint32_t StaticDetectionCostTableIndex;
1794 };
1795 struct
1796 {
1797 uint32_t Value;
1798 };
1799 } m_dw87;
1800
1801 // DW88
1802 union
1803 {
1804 struct
1805 {
1806 uint32_t SWScoreboardIndex;
1807 };
1808 struct
1809 {
1810 uint32_t Value;
1811 };
1812 } m_dw88;
1813
1814 enum MBEncCurbeInitType
1815 {
1816 IDist,
1817 IFrame,
1818 IField,
1819 PFrame,
1820 PField,
1821 BFrame,
1822 BField
1823 };
1824
MbencCurbe(MBEncCurbeInitType initType)1825 MbencCurbe(MBEncCurbeInitType initType)
1826 {
1827 switch (initType)
1828 {
1829 case IDist:
1830 m_dw0.Value = 0x00000082;
1831 m_dw1.Value = 0x00200008;
1832 m_dw2.Value = 0x001e3910;
1833 m_dw3.Value = 0x00a83000;
1834 m_dw4.Value = 0x90000000;
1835 m_dw5.Value = 0x28300000;
1836 m_dw6.Value = 0x00000000;
1837 m_dw7.Value = 0x00000000;
1838 m_modeMvCost.DW8.Value = 0x00000000;
1839 m_modeMvCost.DW9.Value = 0x00000000;
1840 m_modeMvCost.DW10.Value = 0x00000000;
1841 m_modeMvCost.DW11.Value = 0x00000000;
1842 m_modeMvCost.DW12.Value = 0x00000000;
1843 m_modeMvCost.DW13.Value = 0xff000000;
1844 m_modeMvCost.DW14.Value = 0x00000000;
1845 m_modeMvCost.DW15.Value = 0x00000000;
1846 m_spDelta.DW16.Value = 0x00000000;
1847 m_spDelta.DW17.Value = 0x00000000;
1848 m_spDelta.DW18.Value = 0x00000000;
1849 m_spDelta.DW19.Value = 0x00000000;
1850 m_spDelta.DW20.Value = 0x00000000;
1851 m_spDelta.DW21.Value = 0x00000000;
1852 m_spDelta.DW22.Value = 0x00000000;
1853 m_spDelta.DW23.Value = 0x00000000;
1854 m_spDelta.DW24.Value = 0x00000000;
1855 m_spDelta.DW25.Value = 0x00000000;
1856 m_spDelta.DW26.Value = 0x00000000;
1857 m_spDelta.DW27.Value = 0x00000000;
1858 m_spDelta.DW28.Value = 0x00000000;
1859 m_spDelta.DW29.Value = 0x00000000;
1860 m_spDelta.DW30.Value = 0x00000000;
1861 m_spDelta.DW31.Value = 0x00000100;
1862 m_dw32.Value = 0x80800000;
1863 m_dw33.Value = 0x00000000;
1864 m_dw34.Value = 0x00000800;
1865 m_dw35.Value = 0xffff00ff;
1866 m_dw36.Value = 0x40000000;
1867 m_dw37.Value = 0x00000080;
1868 m_dw38.Value = 0x00003900;
1869 m_dw39.Value = 0x28300000;
1870 m_dw40.Value = 0x00000000;
1871 m_dw41.Value = 0x00000000;
1872 m_dw42.Value = 0x00000000;
1873 m_dw43.Value = 0x00000000;
1874 m_dw44.Value = 0x00000000;
1875 m_dw45.Value = 0x00000000;
1876 m_dw46.Value = 0x00000000;
1877 m_dw47.Value = 0x00000000;
1878 m_dw48.Value = 0x00000000;
1879 m_dw49.Value = 0x00000000;
1880 m_dw50.Value = 0x00000000;
1881 m_dw51.Value = 0x00000000;
1882 m_dw52.Value = 0x00000000;
1883 m_dw53.Value = 0x00000000;
1884 m_dw54.Value = 0x00000000;
1885 m_dw55.Value = 0x00000000;
1886 m_dw56.Value = 0x00000000;
1887 m_dw57.Value = 0x00000000;
1888 m_dw58.Value = 0x00000000;
1889 m_dw59.Value = 0x00000000;
1890 m_dw60.Value = 0x00000000;
1891 m_dw61.Value = 0xffffffff;
1892 m_dw62.Value = 0xffffffff;
1893 m_dw63.Value = 0xffffffff;
1894 m_dw64.Value = 0xffffffff;
1895 m_dw65.Value = 0xffffffff;
1896 m_dw66.Value = 0xffffffff;
1897 m_dw67.Value = 0xffffffff;
1898 m_dw68.Value = 0xffffffff;
1899 m_dw69.Value = 0xffffffff;
1900 m_dw70.Value = 0xffffffff;
1901 m_dw71.Value = 0xffffffff;
1902 m_dw72.Value = 0xffffffff;
1903 m_dw73.Value = 0xffffffff;
1904 m_dw74.Value = 0xffffffff;
1905 m_dw75.Value = 0xffffffff;
1906 m_dw76.Value = 0xffffffff;
1907 m_dw77.Value = 0xffffffff;
1908 m_dw78.Value = 0xffffffff;
1909 m_dw79.Value = 0xffffffff;
1910 m_dw80.Value = 0x00000000;
1911 m_dw81.Value = 0x00000000;
1912 m_dw82.Value = 0x00000000;
1913 m_dw83.Value = 0x00000000;
1914 m_dw84.Value = 0x00000000;
1915 m_dw85.Value = 0x00000000;
1916 m_dw86.Value = 0x00000000;
1917 m_dw87.Value = 0x00000000;
1918 m_dw88.Value = 0xffffffff;
1919 break;
1920 case IFrame:
1921 m_dw0.Value = 0x00000082;
1922 m_dw1.Value = 0x00000000;
1923 m_dw2.Value = 0x00003910;
1924 m_dw3.Value = 0x00a83000;
1925 m_dw4.Value = 0x00000000;
1926 m_dw5.Value = 0x28300000;
1927 m_dw6.Value = 0x05000000;
1928 m_dw7.Value = 0x00000000;
1929 m_modeMvCost.DW8.Value = 0x00000000;
1930 m_modeMvCost.DW9.Value = 0x00000000;
1931 m_modeMvCost.DW10.Value = 0x00000000;
1932 m_modeMvCost.DW11.Value = 0x00000000;
1933 m_modeMvCost.DW12.Value = 0x00000000;
1934 m_modeMvCost.DW13.Value = 0x00000000;
1935 m_modeMvCost.DW14.Value = 0x00000000;
1936 m_modeMvCost.DW15.Value = 0x00000000;
1937 m_spDelta.DW16.Value = 0x00000000;
1938 m_spDelta.DW17.Value = 0x00000000;
1939 m_spDelta.DW18.Value = 0x00000000;
1940 m_spDelta.DW19.Value = 0x00000000;
1941 m_spDelta.DW20.Value = 0x00000000;
1942 m_spDelta.DW21.Value = 0x00000000;
1943 m_spDelta.DW22.Value = 0x00000000;
1944 m_spDelta.DW23.Value = 0x00000000;
1945 m_spDelta.DW24.Value = 0x00000000;
1946 m_spDelta.DW25.Value = 0x00000000;
1947 m_spDelta.DW26.Value = 0x00000000;
1948 m_spDelta.DW27.Value = 0x00000000;
1949 m_spDelta.DW28.Value = 0x00000000;
1950 m_spDelta.DW29.Value = 0x00000000;
1951 m_spDelta.DW30.Value = 0x00000000;
1952 m_spDelta.DW31.Value = 0x00000000;
1953 m_dw32.Value = 0x80800000;
1954 m_dw33.Value = 0x00040c24;
1955 m_dw34.Value = 0x00000000;
1956 m_dw35.Value = 0xffff00ff;
1957 m_dw36.Value = 0x40000000;
1958 m_dw37.Value = 0x00000080;
1959 m_dw38.Value = 0x00003900;
1960 m_dw39.Value = 0x28300000;
1961 m_dw40.Value = 0x00000000;
1962 m_dw41.Value = 0x00000000;
1963 m_dw42.Value = 0x00000000;
1964 m_dw43.Value = 0x00000000;
1965 m_dw44.Value = 0x00000000;
1966 m_dw45.Value = 0x00000000;
1967 m_dw46.Value = 0x00000000;
1968 m_dw47.Value = 0x00000002;
1969 m_dw48.Value = 0x00000000;
1970 m_dw49.Value = 0x00000000;
1971 m_dw50.Value = 0x00000000;
1972 m_dw51.Value = 0x00000000;
1973 m_dw52.Value = 0x00000000;
1974 m_dw53.Value = 0x00000000;
1975 m_dw54.Value = 0x00000000;
1976 m_dw55.Value = 0x00000000;
1977 m_dw56.Value = 0x00000000;
1978 m_dw57.Value = 0x00000000;
1979 m_dw58.Value = 0x00000000;
1980 m_dw59.Value = 0x00000000;
1981 m_dw60.Value = 0x00000000;
1982 m_dw61.Value = 0x00000000;
1983 m_dw62.Value = 0x00000000;
1984 m_dw63.Value = 0x00000000;
1985 m_dw64.Value = 0x00000000;
1986 m_dw65.Value = 0x00000000;
1987 m_dw66.Value = 0xffffffff;
1988 m_dw67.Value = 0xffffffff;
1989 m_dw68.Value = 0xffffffff;
1990 m_dw69.Value = 0xffffffff;
1991 m_dw70.Value = 0xffffffff;
1992 m_dw71.Value = 0xffffffff;
1993 m_dw72.Value = 0x00000000;
1994 m_dw73.Value = 0x00000000;
1995 m_dw74.Value = 0x00000000;
1996 m_dw75.Value = 0xffffffff;
1997 m_dw76.Value = 0x00000000;
1998 m_dw77.Value = 0x00000000;
1999 m_dw78.Value = 0xffffffff;
2000 m_dw79.Value = 0xffffffff;
2001 m_dw80.Value = 0xffffffff;
2002 m_dw81.Value = 0xffffffff;
2003 m_dw82.Value = 0xffffffff;
2004 m_dw83.Value = 0xffffffff;
2005 m_dw84.Value = 0xffffffff;
2006 m_dw85.Value = 0x00000000;
2007 m_dw86.Value = 0x00000000;
2008 m_dw87.Value = 0x00000000;
2009 m_dw88.Value = 0xffffffff;
2010 break;
2011 case IField:
2012 m_dw0.Value = 0x00000082;
2013 m_dw1.Value = 0x00000000;
2014 m_dw2.Value = 0x00003910;
2015 m_dw3.Value = 0x00a830c0;
2016 m_dw4.Value = 0x02000000;
2017 m_dw5.Value = 0x28300000;
2018 m_dw6.Value = 0x05000000;
2019 m_dw7.Value = 0x00000000;
2020 m_modeMvCost.DW8.Value = 0x00000000;
2021 m_modeMvCost.DW9.Value = 0x00000000;
2022 m_modeMvCost.DW10.Value = 0x00000000;
2023 m_modeMvCost.DW11.Value = 0x00000000;
2024 m_modeMvCost.DW12.Value = 0x00000000;
2025 m_modeMvCost.DW13.Value = 0x00000000;
2026 m_modeMvCost.DW14.Value = 0x00000000;
2027 m_modeMvCost.DW15.Value = 0x00000000;
2028 m_spDelta.DW16.Value = 0x00000000;
2029 m_spDelta.DW17.Value = 0x00000000;
2030 m_spDelta.DW18.Value = 0x00000000;
2031 m_spDelta.DW19.Value = 0x00000000;
2032 m_spDelta.DW20.Value = 0x00000000;
2033 m_spDelta.DW21.Value = 0x00000000;
2034 m_spDelta.DW22.Value = 0x00000000;
2035 m_spDelta.DW23.Value = 0x00000000;
2036 m_spDelta.DW24.Value = 0x00000000;
2037 m_spDelta.DW25.Value = 0x00000000;
2038 m_spDelta.DW26.Value = 0x00000000;
2039 m_spDelta.DW27.Value = 0x00000000;
2040 m_spDelta.DW28.Value = 0x00000000;
2041 m_spDelta.DW29.Value = 0x00000000;
2042 m_spDelta.DW30.Value = 0x00000000;
2043 m_spDelta.DW31.Value = 0x00000000;
2044 m_dw32.Value = 0x80800000;
2045 m_dw33.Value = 0x00040c24;
2046 m_dw34.Value = 0x00000000;
2047 m_dw35.Value = 0xffff00ff;
2048 m_dw36.Value = 0x40000000;
2049 m_dw37.Value = 0x00000080;
2050 m_dw38.Value = 0x00003900;
2051 m_dw39.Value = 0x28300000;
2052 m_dw40.Value = 0x00000000;
2053 m_dw41.Value = 0x00000000;
2054 m_dw42.Value = 0x00000000;
2055 m_dw43.Value = 0x00000000;
2056 m_dw44.Value = 0x00000000;
2057 m_dw45.Value = 0x00000000;
2058 m_dw46.Value = 0x00000000;
2059 m_dw47.Value = 0x00000002;
2060 m_dw48.Value = 0x00000000;
2061 m_dw49.Value = 0x00000000;
2062 m_dw50.Value = 0x00000000;
2063 m_dw51.Value = 0x00000000;
2064 m_dw52.Value = 0x00000000;
2065 m_dw53.Value = 0x00000000;
2066 m_dw54.Value = 0x00000000;
2067 m_dw55.Value = 0x00000000;
2068 m_dw56.Value = 0x00000000;
2069 m_dw57.Value = 0x00000000;
2070 m_dw58.Value = 0x00000000;
2071 m_dw59.Value = 0x00000000;
2072 m_dw60.Value = 0x00000000;
2073 m_dw61.Value = 0x00000000;
2074 m_dw62.Value = 0x00000000;
2075 m_dw63.Value = 0x00000000;
2076 m_dw64.Value = 0x00000000;
2077 m_dw65.Value = 0x00000000;
2078 m_dw66.Value = 0xffffffff;
2079 m_dw67.Value = 0xffffffff;
2080 m_dw68.Value = 0xffffffff;
2081 m_dw69.Value = 0xffffffff;
2082 m_dw70.Value = 0xffffffff;
2083 m_dw71.Value = 0xffffffff;
2084 m_dw72.Value = 0x00000000;
2085 m_dw73.Value = 0x00000000;
2086 m_dw74.Value = 0x00000000;
2087 m_dw75.Value = 0xffffffff;
2088 m_dw76.Value = 0x00000000;
2089 m_dw77.Value = 0x00000000;
2090 m_dw78.Value = 0xffffffff;
2091 m_dw79.Value = 0xffffffff;
2092 m_dw80.Value = 0xffffffff;
2093 m_dw81.Value = 0xffffffff;
2094 m_dw82.Value = 0xffffffff;
2095 m_dw83.Value = 0xffffffff;
2096 m_dw84.Value = 0xffffffff;
2097 m_dw85.Value = 0x00000000;
2098 m_dw86.Value = 0x00000000;
2099 m_dw87.Value = 0x00000000;
2100 m_dw88.Value = 0xffffffff;
2101 break;
2102 case PFrame:
2103 m_dw0.Value = 0x000000a3;
2104 m_dw1.Value = 0x00000008;
2105 m_dw2.Value = 0x00003910;
2106 m_dw3.Value = 0x00ae3000;
2107 m_dw4.Value = 0x30000000;
2108 m_dw5.Value = 0x28300000;
2109 m_dw6.Value = 0x05000000;
2110 m_dw7.Value = 0x01400060;
2111 m_modeMvCost.DW8.Value = 0x00000000;
2112 m_modeMvCost.DW9.Value = 0x00000000;
2113 m_modeMvCost.DW10.Value = 0x00000000;
2114 m_modeMvCost.DW11.Value = 0x00000000;
2115 m_modeMvCost.DW12.Value = 0x00000000;
2116 m_modeMvCost.DW13.Value = 0x00000000;
2117 m_modeMvCost.DW14.Value = 0x00000000;
2118 m_modeMvCost.DW15.Value = 0x00000000;
2119 m_spDelta.DW16.Value = 0x00000000;
2120 m_spDelta.DW17.Value = 0x00000000;
2121 m_spDelta.DW18.Value = 0x00000000;
2122 m_spDelta.DW19.Value = 0x00000000;
2123 m_spDelta.DW20.Value = 0x00000000;
2124 m_spDelta.DW21.Value = 0x00000000;
2125 m_spDelta.DW22.Value = 0x00000000;
2126 m_spDelta.DW23.Value = 0x00000000;
2127 m_spDelta.DW24.Value = 0x00000000;
2128 m_spDelta.DW25.Value = 0x00000000;
2129 m_spDelta.DW26.Value = 0x00000000;
2130 m_spDelta.DW27.Value = 0x00000000;
2131 m_spDelta.DW28.Value = 0x00000000;
2132 m_spDelta.DW29.Value = 0x00000000;
2133 m_spDelta.DW30.Value = 0x00000000;
2134 m_spDelta.DW31.Value = 0x00000000;
2135 m_dw32.Value = 0x80010000;
2136 m_dw33.Value = 0x00040c24;
2137 m_dw34.Value = 0x00000000;
2138 m_dw35.Value = 0xffff00ff;
2139 m_dw36.Value = 0x60000000;
2140 m_dw37.Value = 0x000000a1;
2141 m_dw38.Value = 0x00003900;
2142 m_dw39.Value = 0x28300000;
2143 m_dw40.Value = 0x00000000;
2144 m_dw41.Value = 0x00000000;
2145 m_dw42.Value = 0x00000000;
2146 m_dw43.Value = 0x00000000;
2147 m_dw44.Value = 0x00000000;
2148 m_dw45.Value = 0x00000000;
2149 m_dw46.Value = 0x00000000;
2150 m_dw47.Value = 0x08000002;
2151 m_dw48.Value = 0x00000000;
2152 m_dw49.Value = 0x00000000;
2153 m_dw50.Value = 0x00000000;
2154 m_dw51.Value = 0x00000000;
2155 m_dw52.Value = 0x00000000;
2156 m_dw53.Value = 0x00000000;
2157 m_dw54.Value = 0x00000000;
2158 m_dw55.Value = 0x00000000;
2159 m_dw56.Value = 0x00000000;
2160 m_dw57.Value = 0x00000000;
2161 m_dw58.Value = 0x00000000;
2162 m_dw59.Value = 0x00000000;
2163 m_dw60.Value = 0x00000000;
2164 m_dw61.Value = 0x00000000;
2165 m_dw62.Value = 0x00000000;
2166 m_dw63.Value = 0x00000000;
2167 m_dw64.Value = 0x00000000;
2168 m_dw65.Value = 0x00000000;
2169 m_dw66.Value = 0xffffffff;
2170 m_dw67.Value = 0xffffffff;
2171 m_dw68.Value = 0xffffffff;
2172 m_dw69.Value = 0xffffffff;
2173 m_dw70.Value = 0xffffffff;
2174 m_dw71.Value = 0xffffffff;
2175 m_dw72.Value = 0x00000000;
2176 m_dw73.Value = 0x00000000;
2177 m_dw74.Value = 0x00000000;
2178 m_dw75.Value = 0xffffffff;
2179 m_dw76.Value = 0x00000000;
2180 m_dw77.Value = 0x00000000;
2181 m_dw78.Value = 0xffffffff;
2182 m_dw79.Value = 0xffffffff;
2183 m_dw80.Value = 0xffffffff;
2184 m_dw81.Value = 0xffffffff;
2185 m_dw82.Value = 0xffffffff;
2186 m_dw83.Value = 0xffffffff;
2187 m_dw84.Value = 0xffffffff;
2188 m_dw85.Value = 0x00000000;
2189 m_dw86.Value = 0x00000000;
2190 m_dw87.Value = 0x00000000;
2191 m_dw88.Value = 0xffffffff;
2192 break;
2193 case PField:
2194 m_dw0.Value = 0x000000a3;
2195 m_dw1.Value = 0x00000008;
2196 m_dw2.Value = 0x00003910;
2197 m_dw3.Value = 0x00ae30c0;
2198 m_dw4.Value = 0x30000000;
2199 m_dw5.Value = 0x28300000;
2200 m_dw6.Value = 0x05000000;
2201 m_dw7.Value = 0x01400060;
2202 m_modeMvCost.DW8.Value = 0x00000000;
2203 m_modeMvCost.DW9.Value = 0x00000000;
2204 m_modeMvCost.DW10.Value = 0x00000000;
2205 m_modeMvCost.DW11.Value = 0x00000000;
2206 m_modeMvCost.DW12.Value = 0x00000000;
2207 m_modeMvCost.DW13.Value = 0x00000000;
2208 m_modeMvCost.DW14.Value = 0x00000000;
2209 m_modeMvCost.DW15.Value = 0x00000000;
2210 m_spDelta.DW16.Value = 0x00000000;
2211 m_spDelta.DW17.Value = 0x00000000;
2212 m_spDelta.DW18.Value = 0x00000000;
2213 m_spDelta.DW19.Value = 0x00000000;
2214 m_spDelta.DW20.Value = 0x00000000;
2215 m_spDelta.DW21.Value = 0x00000000;
2216 m_spDelta.DW22.Value = 0x00000000;
2217 m_spDelta.DW23.Value = 0x00000000;
2218 m_spDelta.DW24.Value = 0x00000000;
2219 m_spDelta.DW25.Value = 0x00000000;
2220 m_spDelta.DW26.Value = 0x00000000;
2221 m_spDelta.DW27.Value = 0x00000000;
2222 m_spDelta.DW28.Value = 0x00000000;
2223 m_spDelta.DW29.Value = 0x00000000;
2224 m_spDelta.DW30.Value = 0x00000000;
2225 m_spDelta.DW31.Value = 0x00000000;
2226 m_dw32.Value = 0x80010000;
2227 m_dw33.Value = 0x00040c24;
2228 m_dw34.Value = 0x00000000;
2229 m_dw35.Value = 0xffff00ff;
2230 m_dw36.Value = 0x40000000;
2231 m_dw37.Value = 0x000000a1;
2232 m_dw38.Value = 0x00003900;
2233 m_dw39.Value = 0x28300000;
2234 m_dw40.Value = 0x00000000;
2235 m_dw41.Value = 0x00000000;
2236 m_dw42.Value = 0x00000000;
2237 m_dw43.Value = 0x00000000;
2238 m_dw44.Value = 0x00000000;
2239 m_dw45.Value = 0x00000000;
2240 m_dw46.Value = 0x00000000;
2241 m_dw47.Value = 0x04000002;
2242 m_dw48.Value = 0x00000000;
2243 m_dw49.Value = 0x00000000;
2244 m_dw50.Value = 0x00000000;
2245 m_dw51.Value = 0x00000000;
2246 m_dw52.Value = 0x00000000;
2247 m_dw53.Value = 0x00000000;
2248 m_dw54.Value = 0x00000000;
2249 m_dw55.Value = 0x00000000;
2250 m_dw56.Value = 0x00000000;
2251 m_dw57.Value = 0x00000000;
2252 m_dw58.Value = 0x00000000;
2253 m_dw59.Value = 0x00000000;
2254 m_dw60.Value = 0x00000000;
2255 m_dw61.Value = 0x00000000;
2256 m_dw62.Value = 0x00000000;
2257 m_dw63.Value = 0x00000000;
2258 m_dw64.Value = 0x00000000;
2259 m_dw65.Value = 0x00000000;
2260 m_dw66.Value = 0xffffffff;
2261 m_dw67.Value = 0xffffffff;
2262 m_dw68.Value = 0xffffffff;
2263 m_dw69.Value = 0xffffffff;
2264 m_dw70.Value = 0xffffffff;
2265 m_dw71.Value = 0xffffffff;
2266 m_dw72.Value = 0x00000000;
2267 m_dw73.Value = 0x00000000;
2268 m_dw74.Value = 0x00000000;
2269 m_dw75.Value = 0xffffffff;
2270 m_dw76.Value = 0x00000000;
2271 m_dw77.Value = 0x00000000;
2272 m_dw78.Value = 0xffffffff;
2273 m_dw79.Value = 0xffffffff;
2274 m_dw80.Value = 0xffffffff;
2275 m_dw81.Value = 0xffffffff;
2276 m_dw82.Value = 0xffffffff;
2277 m_dw83.Value = 0xffffffff;
2278 m_dw84.Value = 0xffffffff;
2279 m_dw85.Value = 0x00000000;
2280 m_dw86.Value = 0x00000000;
2281 m_dw87.Value = 0x00000000;
2282 m_dw88.Value = 0xffffffff;
2283 break;
2284 case BFrame:
2285 m_dw0.Value = 0x000000a3;
2286 m_dw1.Value = 0x00200008;
2287 m_dw2.Value = 0x00003910;
2288 m_dw3.Value = 0x00aa7700;
2289 m_dw4.Value = 0x50020000;
2290 m_dw5.Value = 0x20200000;
2291 m_dw6.Value = 0x05000000;
2292 m_dw7.Value = 0xff400000;
2293 m_modeMvCost.DW8.Value = 0x00000000;
2294 m_modeMvCost.DW9.Value = 0x00000000;
2295 m_modeMvCost.DW10.Value = 0x00000000;
2296 m_modeMvCost.DW11.Value = 0x00000000;
2297 m_modeMvCost.DW12.Value = 0x00000000;
2298 m_modeMvCost.DW13.Value = 0x00000000;
2299 m_modeMvCost.DW14.Value = 0x00000000;
2300 m_modeMvCost.DW15.Value = 0x00000000;
2301 m_spDelta.DW16.Value = 0x00000000;
2302 m_spDelta.DW17.Value = 0x00000000;
2303 m_spDelta.DW18.Value = 0x00000000;
2304 m_spDelta.DW19.Value = 0x00000000;
2305 m_spDelta.DW20.Value = 0x00000000;
2306 m_spDelta.DW21.Value = 0x00000000;
2307 m_spDelta.DW22.Value = 0x00000000;
2308 m_spDelta.DW23.Value = 0x00000000;
2309 m_spDelta.DW24.Value = 0x00000000;
2310 m_spDelta.DW25.Value = 0x00000000;
2311 m_spDelta.DW26.Value = 0x00000000;
2312 m_spDelta.DW27.Value = 0x00000000;
2313 m_spDelta.DW28.Value = 0x00000000;
2314 m_spDelta.DW29.Value = 0x00000000;
2315 m_spDelta.DW30.Value = 0x00000000;
2316 m_spDelta.DW31.Value = 0x00000000;
2317 m_dw32.Value = 0x01010000;
2318 m_dw33.Value = 0x00040c24;
2319 m_dw34.Value = 0x00000000;
2320 m_dw35.Value = 0xffff00ff;
2321 m_dw36.Value = 0x60000000;
2322 m_dw37.Value = 0x000000a1;
2323 m_dw38.Value = 0x00003900;
2324 m_dw39.Value = 0x28300000;
2325 m_dw40.Value = 0x00000000;
2326 m_dw41.Value = 0x00000000;
2327 m_dw42.Value = 0x00000000;
2328 m_dw43.Value = 0x00000000;
2329 m_dw44.Value = 0x00000000;
2330 m_dw45.Value = 0x00000000;
2331 m_dw46.Value = 0x00000000;
2332 m_dw47.Value = 0x08000002;
2333 m_dw48.Value = 0x00000000;
2334 m_dw49.Value = 0x00000000;
2335 m_dw50.Value = 0x00000000;
2336 m_dw51.Value = 0x00000000;
2337 m_dw52.Value = 0x00000000;
2338 m_dw53.Value = 0x00000000;
2339 m_dw54.Value = 0x00000000;
2340 m_dw55.Value = 0x00000000;
2341 m_dw56.Value = 0x00000000;
2342 m_dw57.Value = 0x00000000;
2343 m_dw58.Value = 0x00000000;
2344 m_dw59.Value = 0x00000000;
2345 m_dw60.Value = 0x00000000;
2346 m_dw61.Value = 0x00000000;
2347 m_dw62.Value = 0x00000000;
2348 m_dw63.Value = 0x00000000;
2349 m_dw64.Value = 0x00000000;
2350 m_dw65.Value = 0x00000000;
2351 m_dw66.Value = 0xffffffff;
2352 m_dw67.Value = 0xffffffff;
2353 m_dw68.Value = 0xffffffff;
2354 m_dw69.Value = 0xffffffff;
2355 m_dw70.Value = 0xffffffff;
2356 m_dw71.Value = 0xffffffff;
2357 m_dw72.Value = 0x00000000;
2358 m_dw73.Value = 0x00000000;
2359 m_dw74.Value = 0x00000000;
2360 m_dw75.Value = 0xffffffff;
2361 m_dw76.Value = 0x00000000;
2362 m_dw77.Value = 0x00000000;
2363 m_dw78.Value = 0xffffffff;
2364 m_dw79.Value = 0xffffffff;
2365 m_dw80.Value = 0xffffffff;
2366 m_dw81.Value = 0xffffffff;
2367 m_dw82.Value = 0xffffffff;
2368 m_dw83.Value = 0xffffffff;
2369 m_dw84.Value = 0xffffffff;
2370 m_dw85.Value = 0x00000000;
2371 m_dw86.Value = 0x00000000;
2372 m_dw87.Value = 0x00000000;
2373 m_dw88.Value = 0xffffffff;
2374 break;
2375 case BField:
2376 m_dw0.Value = 0x000000a3;
2377 m_dw1.Value = 0x00200008;
2378 m_dw2.Value = 0x00003919;
2379 m_dw3.Value = 0x00aa77c0;
2380 m_dw4.Value = 0x50020000;
2381 m_dw5.Value = 0x20200000;
2382 m_dw6.Value = 0x05000000;
2383 m_dw7.Value = 0xff400000;
2384 m_modeMvCost.DW8.Value = 0x00000000;
2385 m_modeMvCost.DW9.Value = 0x00000000;
2386 m_modeMvCost.DW10.Value = 0x00000000;
2387 m_modeMvCost.DW11.Value = 0x00000000;
2388 m_modeMvCost.DW12.Value = 0x00000000;
2389 m_modeMvCost.DW13.Value = 0x00000000;
2390 m_modeMvCost.DW14.Value = 0x00000000;
2391 m_modeMvCost.DW15.Value = 0x00000000;
2392 m_spDelta.DW16.Value = 0x00000000;
2393 m_spDelta.DW17.Value = 0x00000000;
2394 m_spDelta.DW18.Value = 0x00000000;
2395 m_spDelta.DW19.Value = 0x00000000;
2396 m_spDelta.DW20.Value = 0x00000000;
2397 m_spDelta.DW21.Value = 0x00000000;
2398 m_spDelta.DW22.Value = 0x00000000;
2399 m_spDelta.DW23.Value = 0x00000000;
2400 m_spDelta.DW24.Value = 0x00000000;
2401 m_spDelta.DW25.Value = 0x00000000;
2402 m_spDelta.DW26.Value = 0x00000000;
2403 m_spDelta.DW27.Value = 0x00000000;
2404 m_spDelta.DW28.Value = 0x00000000;
2405 m_spDelta.DW29.Value = 0x00000000;
2406 m_spDelta.DW30.Value = 0x00000000;
2407 m_spDelta.DW31.Value = 0x00000000;
2408 m_dw32.Value = 0x01010000;
2409 m_dw33.Value = 0x00040c24;
2410 m_dw34.Value = 0x00000000;
2411 m_dw35.Value = 0xffff00ff;
2412 m_dw36.Value = 0x40000000;
2413 m_dw37.Value = 0x000000a1;
2414 m_dw38.Value = 0x00003900;
2415 m_dw39.Value = 0x28300000;
2416 m_dw40.Value = 0x00000000;
2417 m_dw41.Value = 0x00000000;
2418 m_dw42.Value = 0x00000000;
2419 m_dw43.Value = 0x00000000;
2420 m_dw44.Value = 0x00000000;
2421 m_dw45.Value = 0x00000000;
2422 m_dw46.Value = 0x00000000;
2423 m_dw47.Value = 0x04000002;
2424 m_dw48.Value = 0x00000000;
2425 m_dw49.Value = 0x00000000;
2426 m_dw50.Value = 0x00000000;
2427 m_dw51.Value = 0x00000000;
2428 m_dw52.Value = 0x00000000;
2429 m_dw53.Value = 0x00000000;
2430 m_dw54.Value = 0x00000000;
2431 m_dw55.Value = 0x00000000;
2432 m_dw56.Value = 0x00000000;
2433 m_dw57.Value = 0x00000000;
2434 m_dw58.Value = 0x00000000;
2435 m_dw59.Value = 0x00000000;
2436 m_dw60.Value = 0x00000000;
2437 m_dw61.Value = 0x00000000;
2438 m_dw62.Value = 0x00000000;
2439 m_dw63.Value = 0x00000000;
2440 m_dw64.Value = 0x00000000;
2441 m_dw65.Value = 0x00000000;
2442 m_dw66.Value = 0xffffffff;
2443 m_dw67.Value = 0xffffffff;
2444 m_dw68.Value = 0xffffffff;
2445 m_dw69.Value = 0xffffffff;
2446 m_dw70.Value = 0xffffffff;
2447 m_dw71.Value = 0xffffffff;
2448 m_dw72.Value = 0x00000000;
2449 m_dw73.Value = 0x00000000;
2450 m_dw74.Value = 0x00000000;
2451 m_dw75.Value = 0xffffffff;
2452 m_dw76.Value = 0x00000000;
2453 m_dw77.Value = 0x00000000;
2454 m_dw78.Value = 0xffffffff;
2455 m_dw79.Value = 0xffffffff;
2456 m_dw80.Value = 0xffffffff;
2457 m_dw81.Value = 0xffffffff;
2458 m_dw82.Value = 0xffffffff;
2459 m_dw83.Value = 0xffffffff;
2460 m_dw84.Value = 0xffffffff;
2461 m_dw85.Value = 0x00000000;
2462 m_dw86.Value = 0x00000000;
2463 m_dw87.Value = 0x00000000;
2464 m_dw88.Value = 0xffffffff;
2465 break;
2466 default:
2467 break;
2468 }
2469 };
2470 };
2471
2472 class BrcBlockCopyCurbe
2473 {
2474 public:
2475 // DWORD 0
2476 union
2477 {
2478 struct
2479 {
2480 uint32_t BlockHeight : 16;
2481 uint32_t BufferOffset : 16;
2482 };
2483 struct
2484 {
2485 uint32_t Value;
2486 };
2487 } m_dw0;
2488
2489 // DWORD 1
2490 union
2491 {
2492 struct
2493 {
2494 uint32_t SrcSurfaceIndex;
2495 };
2496 struct
2497 {
2498 uint32_t Value;
2499 };
2500 } m_dw1;
2501
2502 // DWORD 2
2503 union
2504 {
2505 struct
2506 {
2507 uint32_t DstSurfaceIndex;
2508 };
2509 struct
2510 {
2511 uint32_t Value;
2512 };
2513 } m_dw2;
2514
2515 // QWORD PADDING
2516 struct
2517 {
2518 uint32_t Reserved;
2519 } m_padding;
2520
BrcBlockCopyCurbe()2521 BrcBlockCopyCurbe()
2522 {
2523 m_dw0.Value = 0;
2524 m_dw1.Value = 0;
2525 m_dw2.Value = 0;
2526 m_padding.Reserved = 0;
2527 }
2528 };
2529
2530 class BrcInitResetCurbeG11
2531 {
2532 public:
2533 union
2534 {
2535 struct
2536 {
2537 uint32_t ProfileLevelMaxFrame;
2538 };
2539 struct
2540 {
2541 uint32_t Value;
2542 };
2543 } m_dw0;
2544
2545 union
2546 {
2547 struct
2548 {
2549 uint32_t InitBufFullInBits;
2550 };
2551 struct
2552 {
2553 uint32_t Value;
2554 };
2555 } m_dw1;
2556
2557 union
2558 {
2559 struct
2560 {
2561 uint32_t BufSizeInBits;
2562 };
2563 struct
2564 {
2565 uint32_t Value;
2566 };
2567 } m_dw2;
2568
2569 union
2570 {
2571 struct
2572 {
2573 uint32_t AverageBitRate;
2574 };
2575 struct
2576 {
2577 uint32_t Value;
2578 };
2579 } m_dw3;
2580
2581 union
2582 {
2583 struct
2584 {
2585 uint32_t MaxBitRate;
2586 };
2587 struct
2588 {
2589 uint32_t Value;
2590 };
2591 } m_dw4;
2592
2593 union
2594 {
2595 struct
2596 {
2597 uint32_t MinBitRate;
2598 };
2599 struct
2600 {
2601 uint32_t Value;
2602 };
2603 } m_dw5;
2604
2605 union
2606 {
2607 struct
2608 {
2609 uint32_t FrameRateM;
2610 };
2611 struct
2612 {
2613 uint32_t Value;
2614 };
2615 } m_dw6;
2616
2617 union
2618 {
2619 struct
2620 {
2621 uint32_t FrameRateD;
2622 };
2623 struct
2624 {
2625 uint32_t Value;
2626 };
2627 } m_dw7;
2628
2629 union
2630 {
2631 struct
2632 {
2633 uint32_t BRCFlag : MOS_BITFIELD_RANGE(0, 15);
2634 uint32_t GopP : MOS_BITFIELD_RANGE(16, 31);
2635 };
2636 struct
2637 {
2638 uint32_t Value;
2639 };
2640 } m_dw8;
2641
2642 union
2643 {
2644 struct
2645 {
2646 uint32_t GopB : MOS_BITFIELD_RANGE(0, 15);
2647 uint32_t FrameWidthInBytes : MOS_BITFIELD_RANGE(16, 31);
2648 };
2649 struct
2650 {
2651 uint32_t Value;
2652 };
2653 } m_dw9;
2654
2655 union
2656 {
2657 struct
2658 {
2659 uint32_t FrameHeightInBytes : MOS_BITFIELD_RANGE(0, 15);
2660 uint32_t AVBRAccuracy : MOS_BITFIELD_RANGE(16, 31);
2661 };
2662 struct
2663 {
2664 uint32_t Value;
2665 };
2666 } m_dw10;
2667
2668 union
2669 {
2670 struct
2671 {
2672 uint32_t AVBRConvergence : MOS_BITFIELD_RANGE(0, 15);
2673 uint32_t MinQP : MOS_BITFIELD_RANGE(16, 31);
2674 };
2675 struct
2676 {
2677 uint32_t Value;
2678 };
2679 } m_dw11;
2680
2681 union
2682 {
2683 struct
2684 {
2685 uint32_t MaxQP : MOS_BITFIELD_RANGE(0, 15);
2686 uint32_t NoSlices : MOS_BITFIELD_RANGE(16, 31);
2687 };
2688 struct
2689 {
2690 uint32_t Value;
2691 };
2692 } m_dw12;
2693
2694 union
2695 {
2696 struct
2697 {
2698 uint32_t InstantRateThreshold0ForP : MOS_BITFIELD_RANGE(0, 7);
2699 uint32_t InstantRateThreshold1ForP : MOS_BITFIELD_RANGE(8, 15);
2700 uint32_t InstantRateThreshold2ForP : MOS_BITFIELD_RANGE(16, 23);
2701 uint32_t InstantRateThreshold3ForP : MOS_BITFIELD_RANGE(24, 31);
2702 };
2703 struct
2704 {
2705 uint32_t Value;
2706 };
2707 } m_dw13;
2708
2709 union
2710 {
2711 struct
2712 {
2713 uint32_t InstantRateThreshold0ForB : MOS_BITFIELD_RANGE(0, 7);
2714 uint32_t InstantRateThreshold1ForB : MOS_BITFIELD_RANGE(8, 15);
2715 uint32_t InstantRateThreshold2ForB : MOS_BITFIELD_RANGE(16, 23);
2716 uint32_t InstantRateThreshold3ForB : MOS_BITFIELD_RANGE(24, 31);
2717 };
2718 struct
2719 {
2720 uint32_t Value;
2721 };
2722 } m_dw14;
2723
2724 union
2725 {
2726 struct
2727 {
2728 uint32_t InstantRateThreshold0ForI : MOS_BITFIELD_RANGE(0, 7);
2729 uint32_t InstantRateThreshold1ForI : MOS_BITFIELD_RANGE(8, 15);
2730 uint32_t InstantRateThreshold2ForI : MOS_BITFIELD_RANGE(16, 23);
2731 uint32_t InstantRateThreshold3ForI : MOS_BITFIELD_RANGE(24, 31);
2732 };
2733 struct
2734 {
2735 uint32_t Value;
2736 };
2737 } m_dw15;
2738
2739 union
2740 {
2741 struct
2742 {
2743 uint32_t DeviationThreshold0ForPandB : MOS_BITFIELD_RANGE(0, 7); // Signed byte
2744 uint32_t DeviationThreshold1ForPandB : MOS_BITFIELD_RANGE(8, 15); // Signed byte
2745 uint32_t DeviationThreshold2ForPandB : MOS_BITFIELD_RANGE(16, 23); // Signed byte
2746 uint32_t DeviationThreshold3ForPandB : MOS_BITFIELD_RANGE(24, 31); // Signed byte
2747 };
2748 struct
2749 {
2750 uint32_t Value;
2751 };
2752 } m_dw16;
2753
2754 union
2755 {
2756 struct
2757 {
2758 uint32_t DeviationThreshold4ForPandB : MOS_BITFIELD_RANGE(0, 7); // Signed byte
2759 uint32_t DeviationThreshold5ForPandB : MOS_BITFIELD_RANGE(8, 15); // Signed byte
2760 uint32_t DeviationThreshold6ForPandB : MOS_BITFIELD_RANGE(16, 23); // Signed byte
2761 uint32_t DeviationThreshold7ForPandB : MOS_BITFIELD_RANGE(24, 31); // Signed byte
2762 };
2763 struct
2764 {
2765 uint32_t Value;
2766 };
2767 } m_dw17;
2768
2769 union
2770 {
2771 struct
2772 {
2773 uint32_t DeviationThreshold0ForVBR : MOS_BITFIELD_RANGE(0, 7); // Signed byte
2774 uint32_t DeviationThreshold1ForVBR : MOS_BITFIELD_RANGE(8, 15); // Signed byte
2775 uint32_t DeviationThreshold2ForVBR : MOS_BITFIELD_RANGE(16, 23); // Signed byte
2776 uint32_t DeviationThreshold3ForVBR : MOS_BITFIELD_RANGE(24, 31); // Signed byte
2777 };
2778 struct
2779 {
2780 uint32_t Value;
2781 };
2782 } m_dw18;
2783
2784 union
2785 {
2786 struct
2787 {
2788 uint32_t DeviationThreshold4ForVBR : MOS_BITFIELD_RANGE(0, 7); // Signed byte
2789 uint32_t DeviationThreshold5ForVBR : MOS_BITFIELD_RANGE(8, 15); // Signed byte
2790 uint32_t DeviationThreshold6ForVBR : MOS_BITFIELD_RANGE(16, 23); // Signed byte
2791 uint32_t DeviationThreshold7ForVBR : MOS_BITFIELD_RANGE(24, 31); // Signed byte
2792 };
2793 struct
2794 {
2795 uint32_t Value;
2796 };
2797 } m_dw19;
2798
2799 union
2800 {
2801 struct
2802 {
2803 uint32_t DeviationThreshold0ForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte
2804 uint32_t DeviationThreshold1ForI : MOS_BITFIELD_RANGE(8, 15); // Signed byte
2805 uint32_t DeviationThreshold2ForI : MOS_BITFIELD_RANGE(16, 23); // Signed byte
2806 uint32_t DeviationThreshold3ForI : MOS_BITFIELD_RANGE(24, 31); // Signed byte
2807 };
2808 struct
2809 {
2810 uint32_t Value;
2811 };
2812 } m_dw20;
2813
2814 union
2815 {
2816 struct
2817 {
2818 uint32_t DeviationThreshold4ForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte
2819 uint32_t DeviationThreshold5ForI : MOS_BITFIELD_RANGE(8, 15); // Signed byte
2820 uint32_t DeviationThreshold6ForI : MOS_BITFIELD_RANGE(16, 23); // Signed byte
2821 uint32_t DeviationThreshold7ForI : MOS_BITFIELD_RANGE(24, 31); // Signed byte
2822 };
2823 struct
2824 {
2825 uint32_t Value;
2826 };
2827 } m_dw21;
2828
2829 union
2830 {
2831 struct
2832 {
2833 uint32_t InitialQPForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte
2834 uint32_t InitialQPForP : MOS_BITFIELD_RANGE(8, 15); // Signed byte
2835 uint32_t InitialQPForB : MOS_BITFIELD_RANGE(16, 23); // Signed byte
2836 uint32_t SlidingWindowSize : MOS_BITFIELD_RANGE(24, 31); // unsigned byte
2837 };
2838 struct
2839 {
2840 uint32_t Value;
2841 };
2842 } m_dw22;
2843
2844 union
2845 {
2846 struct
2847 {
2848 uint32_t ACQP;
2849 };
2850 struct
2851 {
2852 uint32_t Value;
2853 };
2854 } m_dw23;
2855
2856 union
2857 {
2858 struct
2859 {
2860 uint32_t LongTermInterval : MOS_BITFIELD_RANGE(0, 15);
2861 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 31);
2862 };
2863 struct
2864 {
2865 uint32_t Value;
2866 };
2867 } m_dw24;
2868
2869 union
2870 {
2871 struct
2872 {
2873 uint32_t Reserved;
2874 };
2875 struct
2876 {
2877 uint32_t Value;
2878 };
2879 } m_dw25;
2880
2881 union
2882 {
2883 struct
2884 {
2885 uint32_t Reserved;
2886 };
2887 struct
2888 {
2889 uint32_t Value;
2890 };
2891 } m_dw26;
2892
2893 union
2894 {
2895 struct
2896 {
2897 uint32_t Reserved;
2898 };
2899 struct
2900 {
2901 uint32_t Value;
2902 };
2903 } m_dw27;
2904
2905 union
2906 {
2907 struct
2908 {
2909 uint32_t Reserved;
2910 };
2911 struct
2912 {
2913 uint32_t Value;
2914 };
2915 } m_dw28;
2916
2917 union
2918 {
2919 struct
2920 {
2921 uint32_t Reserved;
2922 };
2923 struct
2924 {
2925 uint32_t Value;
2926 };
2927 } m_dw29;
2928
2929 union
2930 {
2931 struct
2932 {
2933 uint32_t Reserved;
2934 };
2935 struct
2936 {
2937 uint32_t Value;
2938 };
2939 } m_dw30;
2940
2941 union
2942 {
2943 struct
2944 {
2945 uint32_t Reserved;
2946 };
2947 struct
2948 {
2949 uint32_t Value;
2950 };
2951 } m_dw31;
2952
2953 union
2954 {
2955 struct
2956 {
2957 uint32_t SurfaceIndexhistorybuffer;
2958 };
2959 struct
2960 {
2961 uint32_t Value;
2962 };
2963 } m_dw32;
2964
2965 union
2966 {
2967 struct
2968 {
2969 uint32_t SurfaceIndexdistortionbuffer;
2970 };
2971 struct
2972 {
2973 uint32_t Value;
2974 };
2975 } m_dw33;
2976
BrcInitResetCurbeG11()2977 BrcInitResetCurbeG11()
2978 {
2979 m_dw0.Value = 0;
2980 m_dw1.Value = 0;
2981 m_dw2.Value = 0;
2982 m_dw3.Value = 0;
2983 m_dw4.Value = 0;
2984 m_dw5.Value = 0;
2985 m_dw6.Value = 0;
2986 m_dw7.Value = 0;
2987 m_dw8.Value = 0;
2988 m_dw9.Value = 0;
2989 m_dw10.Value = 0;
2990 m_dw11.AVBRConvergence = 0;
2991 m_dw11.MinQP = 1;
2992 m_dw12.MaxQP = 51;
2993 m_dw12.NoSlices = 0;
2994 m_dw13.InstantRateThreshold0ForP = 40;
2995 m_dw13.InstantRateThreshold1ForP = 60;
2996 m_dw13.InstantRateThreshold2ForP = 80;
2997 m_dw13.InstantRateThreshold3ForP = 120;
2998 m_dw14.InstantRateThreshold0ForB = 35;
2999 m_dw14.InstantRateThreshold1ForB = 60;
3000 m_dw14.InstantRateThreshold2ForB = 80;
3001 m_dw14.InstantRateThreshold3ForB = 120;
3002 m_dw15.InstantRateThreshold0ForI = 40;
3003 m_dw15.InstantRateThreshold1ForI = 60;
3004 m_dw15.InstantRateThreshold2ForI = 90;
3005 m_dw15.InstantRateThreshold3ForI = 115;
3006 m_dw16.Value = 0;
3007 m_dw17.Value = 0;
3008 m_dw18.Value = 0;
3009 m_dw19.Value = 0;
3010 m_dw20.Value = 0;
3011 m_dw21.Value = 0;
3012 m_dw22.Value = 0;
3013 m_dw23.Value = 0;
3014 m_dw24.Value = 0;
3015 m_dw25.Value = 0;
3016 m_dw26.Value = 0;
3017 m_dw27.Value = 0;
3018 m_dw28.Value = 0;
3019 m_dw29.Value = 0;
3020 m_dw30.Value = 0;
3021 m_dw31.Value = 0;
3022 m_dw32.Value = 0;
3023 m_dw33.Value = 0;
3024 }
3025 };
3026
3027 class MbBrcUpdateCurbe
3028 {
3029 public:
3030 union
3031 {
3032 struct
3033 {
3034 uint32_t CurrFrameType : MOS_BITFIELD_RANGE( 0, 7 );
3035 uint32_t EnableROI : MOS_BITFIELD_RANGE( 8,15 );
3036 uint32_t ROIRatio : MOS_BITFIELD_RANGE( 16,23 );
3037 uint32_t CQP_QPValue : MOS_BITFIELD_RANGE( 24,31 );
3038 };
3039 struct
3040 {
3041 uint32_t Value;
3042 };
3043 } m_dw0;
3044
3045 union
3046 {
3047 struct
3048 {
3049 uint32_t EnableCQPMode : MOS_BITFIELD_RANGE( 0, 7 );
3050 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,31 );
3051 };
3052 struct
3053 {
3054 uint32_t Value;
3055 };
3056 } m_dw1;
3057
3058 union
3059 {
3060 struct
3061 {
3062 uint32_t Reserved;
3063 };
3064 struct
3065 {
3066 uint32_t Value;
3067 };
3068 } m_dw2;
3069
3070 union
3071 {
3072 struct
3073 {
3074 uint32_t Reserved;
3075 };
3076 struct
3077 {
3078 uint32_t Value;
3079 };
3080 } m_dw3;
3081
3082 union
3083 {
3084 struct
3085 {
3086 uint32_t Reserved;
3087 };
3088 struct
3089 {
3090 uint32_t Value;
3091 };
3092 } m_dw4;
3093
3094 union
3095 {
3096 struct
3097 {
3098 uint32_t Reserved;
3099 };
3100 struct
3101 {
3102 uint32_t Value;
3103 };
3104 } m_dw5;
3105
3106 union
3107 {
3108 struct
3109 {
3110 uint32_t Reserved;
3111 };
3112 struct
3113 {
3114 uint32_t Value;
3115 };
3116 } m_dw6;
3117
3118 union
3119 {
3120 struct
3121 {
3122 uint32_t Reserved;;
3123 };
3124 struct
3125 {
3126 uint32_t Value;
3127 };
3128 } m_dw7;
3129
3130 union
3131 {
3132 struct
3133 {
3134 uint32_t HistorybufferIndex;
3135 };
3136 struct
3137 {
3138 uint32_t Value;
3139 };
3140 } m_dw8;
3141
3142 union
3143 {
3144 struct
3145 {
3146 uint32_t MBQPbufferIndex;
3147 };
3148 struct
3149 {
3150 uint32_t Value;
3151 };
3152 } m_dw9;
3153
3154 union
3155 {
3156 struct
3157 {
3158 uint32_t ROIbufferIndex;
3159 };
3160 struct
3161 {
3162 uint32_t Value;
3163 };
3164 } m_dw10;
3165
3166 union
3167 {
3168 struct
3169 {
3170 uint32_t MBstatisticalbufferIndex;
3171 };
3172 struct
3173 {
3174 uint32_t Value;
3175 };
3176 } m_dw11;
3177
MbBrcUpdateCurbe()3178 MbBrcUpdateCurbe()
3179 {
3180 m_dw0.Value = 0;
3181 m_dw1.Value = 0;
3182 m_dw2.Value = 0;
3183 m_dw3.Value = 0;
3184 m_dw4.Value = 0;
3185 m_dw5.Value = 0;
3186 m_dw6.Value = 0;
3187 m_dw7.Value = 0;
3188 m_dw8.Value = 0;
3189 m_dw9.Value = 0;
3190 m_dw10.Value = 0;
3191 m_dw11.Value = 0;
3192 }
3193 };
3194
3195 class FrameBrcUpdateCurbe
3196 {
3197 public:
3198 union
3199 {
3200 struct
3201 {
3202 uint32_t TargetSize;
3203 };
3204 struct
3205 {
3206 uint32_t Value;
3207 };
3208 } m_dw0;
3209
3210 union
3211 {
3212 struct
3213 {
3214 uint32_t FrameNumber;
3215 };
3216 struct
3217 {
3218 uint32_t Value;
3219 };
3220 } m_dw1;
3221
3222 union
3223 {
3224 struct
3225 {
3226 uint32_t SizeofPicHeaders;
3227 };
3228 struct
3229 {
3230 uint32_t Value;
3231 };
3232 } m_dw2;
3233
3234 union
3235 {
3236 struct
3237 {
3238 uint32_t startGAdjFrame0 : MOS_BITFIELD_RANGE( 0,15 );
3239 uint32_t startGAdjFrame1 : MOS_BITFIELD_RANGE( 16,31 );
3240 };
3241 struct
3242 {
3243 uint32_t Value;
3244 };
3245 } m_dw3;
3246
3247 union
3248 {
3249 struct
3250 {
3251 uint32_t startGAdjFrame2 : MOS_BITFIELD_RANGE( 0,15 );
3252 uint32_t startGAdjFrame3 : MOS_BITFIELD_RANGE( 16,31 );
3253 };
3254 struct
3255 {
3256 uint32_t Value;
3257 };
3258 } m_dw4;
3259
3260 union
3261 {
3262 struct
3263 {
3264 uint32_t TargetSizeFlag : MOS_BITFIELD_RANGE( 0, 7 );
3265 uint32_t BRCFlag : MOS_BITFIELD_RANGE( 8,15 );
3266 uint32_t MaxNumPAKs : MOS_BITFIELD_RANGE( 16,23 );
3267 uint32_t CurrFrameType : MOS_BITFIELD_RANGE( 24,31 );
3268 };
3269 struct
3270 {
3271 uint32_t Value;
3272 };
3273 } m_dw5;
3274
3275 union
3276 {
3277 struct
3278 {
3279 uint32_t NumSkipFrames : MOS_BITFIELD_RANGE( 0, 7 );
3280 uint32_t MinimumQP : MOS_BITFIELD_RANGE( 8,15 );
3281 uint32_t MaximumQP : MOS_BITFIELD_RANGE( 16,23 );
3282 uint32_t EnableForceToSkip : MOS_BITFIELD_BIT( 24 );
3283 uint32_t EnableSlidingWindow : MOS_BITFIELD_BIT( 25 );
3284 uint32_t EnableExtremLowDelay : MOS_BITFIELD_BIT( 26 );
3285 uint32_t DisableVarCompute : MOS_BITFIELD_BIT( 27 );
3286 uint32_t Reserved : MOS_BITFIELD_RANGE( 28,31 );
3287 };
3288 struct
3289 {
3290 uint32_t Value;
3291 };
3292 } m_dw6;
3293
3294 union
3295 {
3296 struct
3297 {
3298 uint32_t SizeSkipFrames;
3299 };
3300 struct
3301 {
3302 uint32_t Value;
3303 };
3304 } m_dw7;
3305
3306 union
3307 {
3308 struct
3309 {
3310 uint32_t StartGlobalAdjustMult0 : MOS_BITFIELD_RANGE( 0, 7 );
3311 uint32_t StartGlobalAdjustMult1 : MOS_BITFIELD_RANGE( 8,15 );
3312 uint32_t StartGlobalAdjustMult2 : MOS_BITFIELD_RANGE( 16,23 );
3313 uint32_t StartGlobalAdjustMult3 : MOS_BITFIELD_RANGE( 24,31 );
3314 };
3315 struct
3316 {
3317 uint32_t Value;
3318 };
3319 } m_dw8;
3320
3321 union
3322 {
3323 struct
3324 {
3325 uint32_t StartGlobalAdjustMult4 : MOS_BITFIELD_RANGE( 0, 7 );
3326 uint32_t StartGlobalAdjustDiv0 : MOS_BITFIELD_RANGE( 8,15 );
3327 uint32_t StartGlobalAdjustDiv1 : MOS_BITFIELD_RANGE( 16,23 );
3328 uint32_t StartGlobalAdjustDiv2 : MOS_BITFIELD_RANGE( 24,31 );
3329 };
3330 struct
3331 {
3332 uint32_t Value;
3333 };
3334 } m_dw9;
3335
3336 union
3337 {
3338 struct
3339 {
3340 uint32_t StartGlobalAdjustDiv3 : MOS_BITFIELD_RANGE( 0, 7 );
3341 uint32_t StartGlobalAdjustDiv4 : MOS_BITFIELD_RANGE( 8,15 );
3342 uint32_t QPThreshold0 : MOS_BITFIELD_RANGE( 16,23 );
3343 uint32_t QPThreshold1 : MOS_BITFIELD_RANGE( 24,31 );
3344 };
3345 struct
3346 {
3347 uint32_t Value;
3348 };
3349 } m_dw10;
3350
3351 union
3352 {
3353 struct
3354 {
3355 uint32_t QPThreshold2 : MOS_BITFIELD_RANGE( 0, 7 );
3356 uint32_t QPThreshold3 : MOS_BITFIELD_RANGE( 8,15 );
3357 uint32_t gRateRatioThreshold0 : MOS_BITFIELD_RANGE( 16,23 );
3358 uint32_t gRateRatioThreshold1 : MOS_BITFIELD_RANGE( 24,31 );
3359 };
3360 struct
3361 {
3362 uint32_t Value;
3363 };
3364 } m_dw11;
3365
3366 union
3367 {
3368 struct
3369 {
3370 uint32_t gRateRatioThreshold2 : MOS_BITFIELD_RANGE( 0, 7 );
3371 uint32_t gRateRatioThreshold3 : MOS_BITFIELD_RANGE( 8,15 );
3372 uint32_t gRateRatioThreshold4 : MOS_BITFIELD_RANGE( 16,23 );
3373 uint32_t gRateRatioThreshold5 : MOS_BITFIELD_RANGE( 24,31 );
3374 };
3375 struct
3376 {
3377 uint32_t Value;
3378 };
3379 } m_dw12;
3380
3381 union
3382 {
3383 struct
3384 {
3385 uint32_t gRateRatioThresholdQP0 : MOS_BITFIELD_RANGE( 0, 7 );
3386 uint32_t gRateRatioThresholdQP1 : MOS_BITFIELD_RANGE( 8,15 );
3387 uint32_t gRateRatioThresholdQP2 : MOS_BITFIELD_RANGE( 16,23 );
3388 uint32_t gRateRatioThresholdQP3 : MOS_BITFIELD_RANGE( 24,31 );
3389 };
3390 struct
3391 {
3392 uint32_t Value;
3393 };
3394 } m_dw13;
3395
3396 union
3397 {
3398 struct
3399 {
3400 uint32_t gRateRatioThresholdQP4 : MOS_BITFIELD_RANGE( 0, 7 );
3401 uint32_t gRateRatioThresholdQP5 : MOS_BITFIELD_RANGE( 8,15 );
3402 uint32_t gRateRatioThresholdQP6 : MOS_BITFIELD_RANGE( 16,23 );
3403 uint32_t QPIndexOfCurPic : MOS_BITFIELD_RANGE( 24,31 );
3404 };
3405 struct
3406 {
3407 uint32_t Value;
3408 };
3409 } m_dw14;
3410
3411 union
3412 {
3413 struct
3414 {
3415 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,7 );
3416 uint32_t EnableROI : MOS_BITFIELD_RANGE( 8,15 );
3417 uint32_t RoundingIntra : MOS_BITFIELD_RANGE( 16,23 );
3418 uint32_t RoundingInter : MOS_BITFIELD_RANGE( 24,31 );
3419 };
3420 struct
3421 {
3422 uint32_t Value;
3423 };
3424 } m_dw15;
3425
3426 union
3427 {
3428 struct
3429 {
3430 uint32_t Reserved;
3431 };
3432 struct
3433 {
3434 uint32_t Value;
3435 };
3436 } m_dw16;
3437
3438 union
3439 {
3440 struct
3441 {
3442 uint32_t Reserved;
3443 };
3444 struct
3445 {
3446 uint32_t Value;
3447 };
3448 } m_dw17;
3449
3450 union
3451 {
3452 struct
3453 {
3454 uint32_t Reserved;
3455 };
3456 struct
3457 {
3458 uint32_t Value;
3459 };
3460 } m_dw18;
3461
3462 union
3463 {
3464 struct
3465 {
3466 uint32_t UserMaxFrame;
3467 };
3468 struct
3469 {
3470 uint32_t Value;
3471 };
3472 } m_dw19;
3473
3474 union
3475 {
3476 struct
3477 {
3478 uint32_t Reserved;
3479 };
3480 struct
3481 {
3482 uint32_t Value;
3483 };
3484 } m_dw20;
3485
3486 union
3487 {
3488 struct
3489 {
3490 uint32_t Reserved;
3491 };
3492 struct
3493 {
3494 uint32_t Value;
3495 };
3496 } m_dw21;
3497
3498 union
3499 {
3500 struct
3501 {
3502 uint32_t Reserved;
3503 };
3504 struct
3505 {
3506 uint32_t Value;
3507 };
3508 } m_dw22;
3509
3510 union
3511 {
3512 struct
3513 {
3514 uint32_t Reserved;
3515 };
3516 struct
3517 {
3518 uint32_t Value;
3519 };
3520 } m_dw23;
3521
3522 union
3523 {
3524 struct
3525 {
3526 uint32_t SurfaceIndexBRChistorybuffer;
3527 };
3528 struct
3529 {
3530 uint32_t Value;
3531 };
3532 } m_dw24;
3533
3534 union
3535 {
3536 struct
3537 {
3538 uint32_t SurfaceIndexPreciousPAKstatisticsoutputbuffer;
3539 };
3540 struct
3541 {
3542 uint32_t Value;
3543 };
3544 } m_dw25;
3545
3546 union
3547 {
3548 struct
3549 {
3550 uint32_t SurfaceIndexAVCIMGstateinputbuffer;
3551 };
3552 struct
3553 {
3554 uint32_t Value;
3555 };
3556 } m_dw26;
3557
3558 union
3559 {
3560 struct
3561 {
3562 uint32_t SurfaceIndexAVCIMGstateoutputbuffer;
3563 };
3564 struct
3565 {
3566 uint32_t Value;
3567 };
3568 } m_dw27;
3569
3570 union
3571 {
3572 struct
3573 {
3574 uint32_t SurfaceIndexAVC_Encbuffer;
3575 };
3576 struct
3577 {
3578 uint32_t Value;
3579 };
3580 } m_dw28;
3581
3582 union
3583 {
3584 struct
3585 {
3586 uint32_t SurfaceIndexAVCDISTORTIONbuffer;
3587 };
3588 struct
3589 {
3590 uint32_t Value;
3591 };
3592 } m_dw29;
3593
3594 union
3595 {
3596 struct
3597 {
3598 uint32_t SurfaceIndexBRCconstdatabuffer;
3599 };
3600 struct
3601 {
3602 uint32_t Value;
3603 };
3604 } m_dw30;
3605
3606 union
3607 {
3608 struct
3609 {
3610 uint32_t SurfaceIndexMBStatsBuffer;
3611 };
3612 struct
3613 {
3614 uint32_t Value;
3615 };
3616 } m_dw31;
3617
3618 union
3619 {
3620 struct
3621 {
3622 uint32_t SurfaceIndexMotionvectorbuffer;
3623 };
3624 struct
3625 {
3626 uint32_t Value;
3627 };
3628 } m_dw32;
3629
FrameBrcUpdateCurbe()3630 FrameBrcUpdateCurbe()
3631 {
3632 m_dw0.Value = 0;
3633 m_dw1.Value = 0;
3634 m_dw2.Value = 0;
3635 m_dw3.startGAdjFrame0 = 10;
3636 m_dw3.startGAdjFrame1 = 50;
3637 m_dw4.startGAdjFrame2 = 100;
3638 m_dw4.startGAdjFrame3 = 150;
3639 m_dw5.Value = 0;
3640 m_dw6.Value = 0;
3641 m_dw7.Value = 0;
3642
3643 m_dw8.StartGlobalAdjustMult0 = 1;
3644 m_dw8.StartGlobalAdjustMult1 = 1;
3645 m_dw8.StartGlobalAdjustMult2 = 3;
3646 m_dw8.StartGlobalAdjustMult3 = 2;
3647
3648 m_dw9.StartGlobalAdjustMult4 = 1;
3649 m_dw9.StartGlobalAdjustDiv0 = 40;
3650 m_dw9.StartGlobalAdjustDiv1 = 5;
3651 m_dw9.StartGlobalAdjustDiv2 = 5;
3652
3653 m_dw10.StartGlobalAdjustDiv3 = 3;
3654 m_dw10.StartGlobalAdjustDiv4 = 1;
3655 m_dw10.QPThreshold0 = 7;
3656 m_dw10.QPThreshold1 = 18;
3657
3658 m_dw11.QPThreshold2 = 25;
3659 m_dw11.QPThreshold3 = 37;
3660 m_dw11.gRateRatioThreshold0 = 40;
3661 m_dw11.gRateRatioThreshold1 = 75;
3662
3663 m_dw12.gRateRatioThreshold2 = 97;
3664 m_dw12.gRateRatioThreshold3 = 103;
3665 m_dw12.gRateRatioThreshold4 = 125;
3666 m_dw12.gRateRatioThreshold5 = 160;
3667
3668 m_dw13.gRateRatioThresholdQP0 = MOS_BITFIELD_VALUE((uint32_t)-3, 8);
3669 m_dw13.gRateRatioThresholdQP1 = MOS_BITFIELD_VALUE((uint32_t)-2, 8);
3670 m_dw13.gRateRatioThresholdQP2 = MOS_BITFIELD_VALUE((uint32_t)-1, 8);
3671 m_dw13.gRateRatioThresholdQP3 = 0;
3672
3673 m_dw14.gRateRatioThresholdQP4 = 1;
3674 m_dw14.gRateRatioThresholdQP5 = 2;
3675 m_dw14.gRateRatioThresholdQP6 = 3;
3676 m_dw14.QPIndexOfCurPic = 0xff;
3677
3678 m_dw15.Value = 0;
3679 m_dw16.Value = 0;
3680 m_dw17.Value = 0;
3681 m_dw18.Value = 0;
3682 m_dw19.Value = 0;
3683 m_dw20.Value = 0;
3684 m_dw21.Value = 0;
3685 m_dw22.Value = 0;
3686 m_dw23.Value = 0;
3687 m_dw24.Value = 0;
3688 m_dw25.Value = 0;
3689 m_dw26.Value = 0;
3690 m_dw27.Value = 0;
3691 m_dw28.Value = 0;
3692 m_dw29.Value = 0;
3693 m_dw30.Value = 0;
3694 m_dw31.Value = 0;
3695 m_dw32.Value = 0;
3696 };
3697 };
3698
3699 class KernelHeaderAvcG11
3700 {
3701 public:
3702 int m_kernelCount;
3703
3704 // Quality mode for Frame/Field
3705 CODECHAL_KERNEL_HEADER m_avcmbEncQltyI;
3706 CODECHAL_KERNEL_HEADER m_avcmbEncQltyP;
3707 CODECHAL_KERNEL_HEADER m_avcmbEncQltyB;
3708 // Normal mode for Frame/Field
3709 CODECHAL_KERNEL_HEADER m_avcmbEncNormI;
3710 CODECHAL_KERNEL_HEADER m_avcmbEncNormP;
3711 CODECHAL_KERNEL_HEADER m_avcmbEncNormB;
3712 // Performance modes for Frame/Field
3713 CODECHAL_KERNEL_HEADER m_avcmbEncPerfI;
3714 CODECHAL_KERNEL_HEADER m_avcmbEncPerfP;
3715 CODECHAL_KERNEL_HEADER m_avcmbEncPerfB;
3716 // Modes for Frame/Field
3717 CODECHAL_KERNEL_HEADER m_avcmbEncAdvI;
3718 CODECHAL_KERNEL_HEADER m_avcmbEncAdvP;
3719 CODECHAL_KERNEL_HEADER m_avcmbEncAdvB;
3720
3721 // BRC Init frame
3722 CODECHAL_KERNEL_HEADER m_initFrameBrc;
3723
3724 // FrameBRC Update
3725 CODECHAL_KERNEL_HEADER m_frameEncUpdate;
3726
3727 // BRC Reset frame
3728 CODECHAL_KERNEL_HEADER m_brcResetFrame;
3729
3730 // BRC I Frame Distortion
3731 CODECHAL_KERNEL_HEADER m_brcIFrameDist;
3732
3733 // BRCBlockCopy
3734 CODECHAL_KERNEL_HEADER m_brcBlockCopy;
3735
3736 // MbBRC Update
3737 CODECHAL_KERNEL_HEADER m_mbBrcUpdate;
3738
3739 //Weighted Prediction Kernel
3740 CODECHAL_KERNEL_HEADER m_avcWeightedPrediction;
3741
3742 // SW scoreboard initialization kernel
3743 CODECHAL_KERNEL_HEADER m_avcInitSwScoreboard;
3744 };
3745
3746 // QP is from 0 - 51, pad it to 64 since BRC needs array size to be 64 bytes
3747 const uint8_t CodechalEncodeAvcEncG11::m_QPAdjustmentDistThresholdMaxFrameThresholdIPB[576] =
3748 {
3749 0x01, 0x02, 0x03, 0x05, 0x06, 0x01, 0x01, 0x02, 0x03, 0x05, 0x00, 0x00, 0x01, 0x02, 0x03, 0xff,
3750 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfe, 0xfe, 0xff, 0x00, 0x01, 0xfd, 0xfd,
3751 0xff, 0xff, 0x00, 0xfb, 0xfd, 0xfe, 0xff, 0xff, 0xfa, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0x04, 0x1e,
3752 0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
3753 0x01, 0x02, 0x03, 0x05, 0x06, 0x01, 0x01, 0x02, 0x03, 0x05, 0x00, 0x01, 0x01, 0x02, 0x03, 0xff,
3754 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xff, 0xff, 0xff, 0x00, 0x01, 0xfe, 0xff,
3755 0xff, 0xff, 0x00, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0xfb, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x04, 0x1e,
3756 0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x04, 0x05, 0x06, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
3757 0x01, 0x01, 0x02, 0x04, 0x05, 0x01, 0x01, 0x01, 0x02, 0x04, 0x00, 0x00, 0x01, 0x01, 0x02, 0xff,
3758 0x00, 0x00, 0x01, 0x01, 0xff, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0x01, 0xfe, 0xff,
3759 0xff, 0xff, 0x00, 0xfd, 0xfe, 0xff, 0xff, 0x00, 0xfb, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x02, 0x14,
3760 0x28, 0x46, 0x82, 0xa0, 0xc8, 0xff, 0x04, 0x04, 0x05, 0x05, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
3761 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x03, 0x03, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x03,
3762 0x03, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, 0x03, 0x03, 0xff, 0xff, 0x00, 0x00, 0x00,
3763 0x01, 0x02, 0x02, 0x02, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x02, 0x02, 0xfe, 0xff, 0xff,
3764 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0xfe, 0xff, 0xff, 0xff, 0x00, 0x00, 0x01, 0x01, 0x02, 0xfe,
3765 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x01, 0xfe, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01,
3766 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3767 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3768 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3769 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x03, 0x03, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x03,
3770 0x03, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, 0x03, 0x03, 0xff, 0xff, 0x00, 0x00, 0x00,
3771 0x01, 0x02, 0x02, 0x02, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x02, 0x02, 0xfe, 0xff, 0xff,
3772 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0xfe, 0xff, 0xff, 0xff, 0x00, 0x00, 0x01, 0x01, 0x02, 0xfe,
3773 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x01, 0xfe, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01,
3774 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3775 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3776 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3777 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x03, 0x03, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x03,
3778 0x03, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, 0x03, 0x03, 0xff, 0xff, 0x00, 0x00, 0x00,
3779 0x01, 0x02, 0x02, 0x02, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x02, 0x02, 0xfe, 0xff, 0xff,
3780 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0xfe, 0xff, 0xff, 0xff, 0x00, 0x00, 0x01, 0x01, 0x02, 0xfe,
3781 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x01, 0xfe, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01,
3782 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3783 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3784 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
3785 };
3786
3787 const CODECHAL_ENCODE_AVC_IPCM_THRESHOLD CodechalEncodeAvcEncG11::m_IPCMThresholdTable[5] =
3788 {
3789 { 2, 3000 },
3790 { 4, 3600 },
3791 { 6, 5000 },
3792 { 10, 7500 },
3793 { 18, 9000 },
3794 };
3795
3796 const uint32_t CodechalEncodeAvcEncG11::m_IntraModeCostForHighTextureMB[CODEC_AVC_NUM_QP]
3797 {
3798 0x00000303, 0x00000304, 0x00000404, 0x00000405, 0x00000505, 0x00000506, 0x00000607, 0x00000708,
3799 0x00000809, 0x0000090a, 0x00000a0b, 0x00000b0c, 0x00000c0e, 0x00000e18, 0x00001819, 0x00001918,
3800 0x00001a19, 0x00001b19, 0x00001d19, 0x00001e18, 0x00002818, 0x00002918, 0x00002a18, 0x00002b19,
3801 0x00002d18, 0x00002e18, 0x00003818, 0x00003918, 0x00003a18, 0x00003b0f, 0x00003d0e, 0x00003e0e,
3802 0x0000480e, 0x0000490e, 0x00004a0e, 0x00004b0d, 0x00004d0d, 0x00004e0d, 0x0000580e, 0x0000590e,
3803 0x00005a0e, 0x00005b0d, 0x00005d0c, 0x00005e0b, 0x0000680a, 0x00006908, 0x00006a09, 0x00006b0a,
3804 0x00006d0b, 0x00006e0d, 0x0000780e, 0x00007918
3805 };
3806
3807 const int32_t CodechalEncodeAvcEncG11::m_brcBTCounts[CODECHAL_ENCODE_BRC_IDX_NUM] = {
3808 CODECHAL_ENCODE_AVC_BRC_INIT_RESET_NUM_SURFACES,
3809 frameBrcUpdateNumSurfaces,
3810 CODECHAL_ENCODE_AVC_BRC_INIT_RESET_NUM_SURFACES,
3811 mbencNumSurfaces,
3812 CODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_NUM_SURFACES,
3813 mbBrcUpdateNumSurfaces // MbBRCUpdate kernel starting GEN9
3814 };
3815
3816 const int32_t CodechalEncodeAvcEncG11::m_brcCurbeSize[CODECHAL_ENCODE_BRC_IDX_NUM] = {
3817 (sizeof(BrcInitResetCurbeG11)),
3818 (sizeof(FrameBrcUpdateCurbe)),
3819 (sizeof(BrcInitResetCurbeG11)),
3820 (sizeof(MbencCurbe)),
3821 0,
3822 (sizeof(MbBrcUpdateCurbe)) // MbBRCUpdate kernel starting GEN9
3823 };
3824
3825 const uint16_t CodechalEncodeAvcEncG11::m_LambdaData[256] = {
3826 9, 7, 9, 6, 12, 8, 12, 8, 15, 10, 15, 9, 19, 13, 19, 12, 24,
3827 17, 24, 15, 30, 21, 30, 19, 38, 27, 38, 24, 48, 34, 48, 31, 60, 43,
3828 60, 39, 76, 54, 76, 49, 96, 68, 96, 62, 121, 85, 121, 78, 153, 108, 153,
3829 99, 193, 135, 193, 125, 243, 171, 243, 157, 306, 215, 307, 199, 385, 271, 387, 251,
3830 485, 342, 488, 317, 612, 431, 616, 400, 771, 543, 777, 505, 971, 684, 981, 638, 1224,
3831 862, 1237, 806, 1542, 1086, 1562, 1018, 1991, 1402, 1971, 1287, 2534, 1785, 2488, 1626, 3077, 2167,
3832 3141, 2054, 3982, 2805, 3966, 2596, 4887, 3442, 5007, 3281, 6154, 4335, 6322, 4148, 7783, 5482, 7984,
3833 5243, 9774, 6885, 10082, 6629, 12489, 8797, 12733, 8382, 15566, 10965, 16082, 10599, 19729, 13897, 20313, 13404,
3834 24797, 17467, 25660, 16954, 31313, 22057, 32415, 21445, 39458, 27795, 40953, 27129, 49594, 34935, 51742, 34323, 61440,
3835 43987, 61440, 43428, 61440, 55462, 61440, 54954, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440,
3836 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440,
3837 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440, 61440,
3838 61440, 61440, 61440, 61440, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3839 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3840 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3841 0,
3842 };
3843
3844 const uint8_t CodechalEncodeAvcEncG11::m_FTQ25[64] = //27 value 4 dummy
3845 {
3846 0, //qp=0
3847 0, 0, 0, 0, 0, 0, //qp=1,2;3,4;5,6;
3848 1, 1, 3, 3, 6, 6, 8, 8, 11, 11, //qp=7,8;9,10;11,12;13,14;15;16
3849 13, 13, 16, 16, 19, 19, 22, 22, 26, 26, //qp=17,18;19,20;21,22;23,24;25,26
3850 30, 30, 34, 34, 39, 39, 44, 44, 50, 50, //qp=27,28;29,30;31,32;33,34;35,36
3851 56, 56, 62, 62, 69, 69, 77, 77, 85, 85, //qp=37,38;39,40;41,42;43,44;45,46
3852 94, 94, 104, 104, 115, 115, //qp=47,48;49,50;51
3853 0, 0, 0, 0, 0, 0, 0, 0 //dummy
3854 };
3855
3856 // AVC MBEnc RefCost tables, index [CodingType][QP]
3857 // QP is from 0 - 51, pad it to 64 since BRC needs each subarray size to be 128bytes
3858 const uint16_t CodechalEncodeAvcEncG11::m_refCostMultiRefQp[NUM_PIC_TYPES][64] =
3859 {
3860 // I-frame
3861 {
3862 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3863 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3864 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3865 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3866 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3867 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3868 0x0000, 0x0000, 0x0000, 0x0000
3869 },
3870 // P-slice
3871 {
3872 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3873 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3874 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3875 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3876 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3877 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3878 0x0000, 0x0000, 0x0000, 0x0000
3879 },
3880 //B-slice
3881 {
3882 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3883 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3884 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3885 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3886 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3887 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
3888 0x0000, 0x0000, 0x0000, 0x0000
3889 }
3890 };
3891
3892 const uint32_t CodechalEncodeAvcEncG11::m_multiPred[NUM_TARGET_USAGE_MODES] =
3893 {
3894 0, 3, 3, 0, 0, 0, 0, 0
3895 };
3896
3897 const uint32_t CodechalEncodeAvcEncG11::m_MRDisableQPCheck[NUM_TARGET_USAGE_MODES] =
3898 {
3899 0, 1, 0, 0, 0, 0, 0, 0
3900 };
3901
GetKernelHeaderAndSize(void * binary,EncOperation operation,uint32_t krnStateIdx,void * krnHeader,uint32_t * krnSize)3902 MOS_STATUS CodechalEncodeAvcEncG11::GetKernelHeaderAndSize(void *binary, EncOperation operation, uint32_t krnStateIdx, void *krnHeader, uint32_t *krnSize)
3903 {
3904 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3905
3906 CODECHAL_ENCODE_CHK_NULL_RETURN(binary);
3907 CODECHAL_ENCODE_CHK_NULL_RETURN(krnHeader);
3908 CODECHAL_ENCODE_CHK_NULL_RETURN(krnSize);
3909
3910 auto kernelHeaderTable = (KernelHeaderAvcG11 *)binary;
3911 auto invalidEntry = &(kernelHeaderTable->m_avcWeightedPrediction) + 1;
3912 auto nextKrnOffset = *krnSize;
3913 PCODECHAL_KERNEL_HEADER currKrnHeader = nullptr;
3914
3915 if (operation == ENC_BRC)
3916 {
3917 currKrnHeader = &kernelHeaderTable->m_initFrameBrc;
3918 }
3919 else if (operation == ENC_MBENC)
3920 {
3921 currKrnHeader = &kernelHeaderTable->m_avcmbEncQltyI;
3922 }
3923 else if (operation == ENC_MBENC_ADV)
3924 {
3925 currKrnHeader = &kernelHeaderTable->m_avcmbEncAdvI;
3926 }
3927 else if (operation == ENC_WP)
3928 {
3929 currKrnHeader = &kernelHeaderTable->m_avcWeightedPrediction;
3930 }
3931 else
3932 {
3933 CODECHAL_ENCODE_ASSERTMESSAGE("Unsupported ENC mode requested");
3934 eStatus = MOS_STATUS_INVALID_PARAMETER;
3935 return eStatus;
3936 }
3937
3938 currKrnHeader += krnStateIdx;
3939 *((PCODECHAL_KERNEL_HEADER)krnHeader) = *currKrnHeader;
3940
3941 auto pNextKrnHeader = (currKrnHeader + 1);
3942 if (pNextKrnHeader < invalidEntry)
3943 {
3944 nextKrnOffset = pNextKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT;
3945 }
3946 *krnSize = nextKrnOffset - (currKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
3947
3948 return eStatus;
3949 }
3950
CodechalEncodeAvcEncG11(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)3951 CodechalEncodeAvcEncG11::CodechalEncodeAvcEncG11(
3952 CodechalHwInterface * hwInterface,
3953 CodechalDebugInterface *debugInterface,
3954 PCODECHAL_STANDARD_INFO standardInfo) : CodechalEncodeAvcEnc(hwInterface, debugInterface, standardInfo),
3955 m_sinlgePipeVeState(nullptr)
3956 {
3957 CODECHAL_ENCODE_FUNCTION_ENTER;
3958
3959 CODECHAL_ENCODE_CHK_NULL_NO_STATUS_RETURN(m_osInterface);
3960
3961 // Virtual Engine is enabled in default.
3962 Mos_SetVirtualEngineSupported(m_osInterface, true);
3963
3964 m_cmKernelEnable = true;
3965 m_mbStatsSupported = true;
3966 m_useCommonKernel = true;
3967 bKernelTrellis = true;
3968 bExtendedMvCostRange = true;
3969 bBrcSplitEnable = true;
3970 bDecoupleMbEncCurbeFromBRC = true;
3971 bHighTextureModeCostEnable = true;
3972 bMvDataNeededByBRC = false;
3973
3974 #ifndef _FULL_OPEN_SOURCE
3975 //ICLHP currently uses LP kernel
3976 m_kernelBase = (uint8_t*)IGCODECKRN_G11;
3977 #else
3978 m_kernelBase = nullptr;
3979 #endif
3980
3981 this->pfnGetKernelHeaderAndSize = this->GetKernelHeaderAndSize;
3982
3983 m_vdboxOneDefaultUsed = true;
3984
3985 m_osInterface->pfnVirtualEngineSupported(m_osInterface, false, true);
3986
3987 CODECHAL_DEBUG_TOOL(
3988 CODECHAL_ENCODE_CHK_NULL_NO_STATUS_RETURN(m_encodeParState = MOS_New(CodechalDebugEncodeParG11, this));
3989 CreateAvcPar();
3990 )
3991 }
3992
~CodechalEncodeAvcEncG11()3993 CodechalEncodeAvcEncG11::~CodechalEncodeAvcEncG11()
3994 {
3995 CODECHAL_ENCODE_FUNCTION_ENTER;
3996
3997 if (m_wpState)
3998 {
3999 MOS_Delete(m_wpState);
4000 m_wpState = nullptr;
4001 }
4002 MOS_Delete(m_intraDistKernel);
4003
4004 if (m_swScoreboardState)
4005 {
4006 MOS_Delete(m_swScoreboardState);
4007 m_swScoreboardState = nullptr;
4008 }
4009
4010 if (m_sinlgePipeVeState)
4011 {
4012 MOS_FreeMemAndSetNull(m_sinlgePipeVeState);
4013 }
4014
4015 CODECHAL_DEBUG_TOOL(
4016 DestroyAvcPar();
4017 MOS_Delete(m_encodeParState);
4018 )
4019 }
4020
MbEncKernel(bool mbEncIFrameDistInUse)4021 MOS_STATUS CodechalEncodeAvcEncG11::MbEncKernel(bool mbEncIFrameDistInUse)
4022 {
4023 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4024
4025 CODECHAL_ENCODE_FUNCTION_ENTER;
4026
4027 uint8_t ppsIdx = m_avcSliceParams->pic_parameter_set_id;
4028 uint8_t spsIdx = m_avcPicParams[ppsIdx]->seq_parameter_set_id;
4029 auto refList = &m_refList[0];
4030 auto currRefList = m_refList[m_currReconstructedPic.FrameIdx];
4031 bool use45DegreePattern = false;
4032 bool roiEnabled = (m_avcPicParams[ppsIdx]->NumROI > 0) ? true : false;
4033 uint8_t refPicListIdx = m_avcSliceParams[ppsIdx].RefPicList[0][0].FrameIdx;
4034 uint8_t refFrameListIdx = m_avcPicParam[ppsIdx].RefFrameList[refPicListIdx].FrameIdx;
4035 bool dirtyRoiEnabled = (m_pictureCodingType == P_TYPE
4036 && m_avcPicParams[ppsIdx]->NumDirtyROI > 0
4037 && m_prevReconFrameIdx == refFrameListIdx);
4038
4039 // Two flags(bMbConstDataBufferNeeded, bMbQpBufferNeeded)
4040 // would be used as there are two buffers and not all cases need both the buffers
4041 // Constant Data buffer needed for MBBRC, MBQP, ROI, RollingIntraRefresh
4042 // Please note that this surface needs to be programmed for
4043 // all usage cases(including CQP cases) because DWord13 includes mode cost for high texture MB?s cost.
4044 bool mbConstDataBufferInUse = bMbBrcEnabled || bMbQpDataEnabled || roiEnabled || dirtyRoiEnabled ||
4045 m_avcPicParam->EnableRollingIntraRefresh || bHighTextureModeCostEnable;
4046
4047 bool mbQpBufferInUse = bMbBrcEnabled || bBrcRoiEnabled || bMbQpDataEnabled;
4048
4049 if (m_feiEnable)
4050 {
4051 CODECHAL_ENCODE_CHK_NULL_RETURN(m_avcFeiPicParams);
4052 mbConstDataBufferInUse |= m_avcFeiPicParams->bMBQp;
4053 mbQpBufferInUse |= m_avcFeiPicParams->bMBQp;
4054 }
4055
4056 // MFE MBEnc kernel handles several frames from different streams in one submission.
4057 // All the streams use the same HW/OS/StateHeap interfaces during this submssion.
4058 // All the streams use the kernel state from the first stream.
4059 // The first stream allocates the DSH and SSH, send the binding table.
4060 // The last stream sets mfe curbe, prepare and submit the command buffer.
4061 // All the streams set their own curbe surfaces and surface states.
4062 CODECHAL_ENCODE_AVC_BINDING_TABLE_MBENC origMbEncBindingTable;
4063 if (IsMfeMbEncEnabled(mbEncIFrameDistInUse))
4064 {
4065 auto mfeEncodeSharedState = m_mfeEncodeSharedState;
4066 if (m_mfeFirstStream)
4067 {
4068 mfeEncodeSharedState->pHwInterface = m_hwInterface;
4069 mfeEncodeSharedState->pOsInterface = m_osInterface;
4070 m_hwInterface->GetRenderInterface()->m_stateHeapInterface = m_stateHeapInterface;
4071 m_osInterface->pfnResetOsStates(m_osInterface);
4072 }
4073 else
4074 {
4075 m_hwInterface = mfeEncodeSharedState->pHwInterface;
4076 m_osInterface = mfeEncodeSharedState->pOsInterface;
4077 m_stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
4078
4079 }
4080 // Set maximum width/height, it is used for initializing media walker parameters
4081 // during submitting the command buffer at the last stream.
4082 if (m_picWidthInMb > mfeEncodeSharedState->dwPicWidthInMB)
4083 {
4084 mfeEncodeSharedState->dwPicWidthInMB = m_picWidthInMb;
4085 }
4086 if (m_frameFieldHeightInMb > mfeEncodeSharedState->dwPicHeightInMB)
4087 {
4088 mfeEncodeSharedState->dwPicHeightInMB = m_frameFieldHeightInMb;
4089 }
4090 if (m_sliceHeight > mfeEncodeSharedState->sliceHeight)
4091 {
4092 mfeEncodeSharedState->sliceHeight = m_sliceHeight;
4093 }
4094
4095 m_osInterface->pfnSetGpuContext(m_osInterface, m_renderContext);
4096 CODECHAL_DEBUG_TOOL(
4097 m_debugInterface->m_osInterface = m_osInterface;)
4098 // bookkeeping the original binding table
4099 origMbEncBindingTable = MbEncBindingTable;
4100 }
4101
4102 PerfTagSetting perfTag;
4103 perfTag.Value = 0;
4104 perfTag.Mode = (uint16_t)m_mode & CODECHAL_ENCODE_MODE_BIT_MASK;
4105 perfTag.CallType = (mbEncIFrameDistInUse && !m_singleTaskPhaseSupported) ?
4106 CODECHAL_ENCODE_PERFTAG_CALL_INTRA_DIST : CODECHAL_ENCODE_PERFTAG_CALL_MBENC_KERNEL;
4107 perfTag.PictureCodingType = m_pictureCodingType;
4108 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
4109
4110 CODECHAL_MEDIA_STATE_TYPE encFunctionType;
4111 if (mbEncIFrameDistInUse)
4112 {
4113 encFunctionType = CODECHAL_MEDIA_STATE_ENC_I_FRAME_DIST;
4114 }
4115 else if (bUseMbEncAdvKernel)
4116 {
4117 encFunctionType = CODECHAL_MEDIA_STATE_ENC_ADV;
4118 }
4119 else if (m_kernelMode == encodeNormalMode)
4120 {
4121 encFunctionType = CODECHAL_MEDIA_STATE_ENC_NORMAL;
4122 }
4123 else if (m_kernelMode == encodePerformanceMode)
4124 {
4125 encFunctionType = CODECHAL_MEDIA_STATE_ENC_PERFORMANCE;
4126 }
4127 else
4128 {
4129 encFunctionType = CODECHAL_MEDIA_STATE_ENC_QUALITY;
4130 }
4131
4132 // Initialize DSH kernel region
4133 PMHW_KERNEL_STATE kernelState;
4134 if (mbEncIFrameDistInUse)
4135 {
4136 kernelState = &BrcKernelStates[CODECHAL_ENCODE_BRC_IDX_IFRAMEDIST];
4137 }
4138 else if (IsMfeMbEncEnabled(mbEncIFrameDistInUse))
4139 {
4140 kernelState = &mfeMbEncKernelState;
4141 }
4142 else
4143 {
4144 CodechalEncodeIdOffsetParams idOffsetParams;
4145 MOS_ZeroMemory(&idOffsetParams, sizeof(idOffsetParams));
4146 idOffsetParams.Standard = m_standard;
4147 idOffsetParams.EncFunctionType = encFunctionType;
4148 idOffsetParams.wPictureCodingType = m_pictureCodingType;
4149 idOffsetParams.ucDmvPredFlag = m_avcSliceParams->direct_spatial_mv_pred_flag;
4150 idOffsetParams.interlacedField = CodecHal_PictureIsField(m_currOriginalPic);
4151
4152 uint32_t krnStateIdx;
4153 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetMbEncKernelStateIdx(
4154 &idOffsetParams,
4155 &krnStateIdx));
4156 kernelState = &pMbEncKernelStates[krnStateIdx];
4157 }
4158
4159 // All the streams use the kernel state from the first stream.
4160 if (IsMfeMbEncEnabled(mbEncIFrameDistInUse))
4161 {
4162 if (m_mfeFirstStream)
4163 {
4164 m_mfeEncodeSharedState->pMfeMbEncKernelState = kernelState;
4165 }
4166 else
4167 {
4168 kernelState = m_mfeEncodeSharedState->pMfeMbEncKernelState;
4169 }
4170 }
4171
4172 // If Single Task Phase is not enabled, use BT count for the kernel state.
4173 if (m_firstTaskInPhase == true || !m_singleTaskPhaseSupported ||
4174 (IsMfeMbEncEnabled(mbEncIFrameDistInUse) && m_mfeFirstStream))
4175 {
4176 uint32_t maxBtCount = m_singleTaskPhaseSupported ?
4177 m_maxBtCount : kernelState->KernelParams.iBTCount;
4178 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
4179 m_stateHeapInterface,
4180 maxBtCount));
4181 m_vmeStatesSize = m_hwInterface->GetKernelLoadCommandSize(maxBtCount);
4182 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
4183 }
4184
4185 // Allocate DSH and SSH for the first stream, which will be passed to other streams through the shared kernel state.
4186 if ((IsMfeMbEncEnabled(mbEncIFrameDistInUse) && m_mfeFirstStream) ||
4187 (!IsMfeMbEncEnabled(mbEncIFrameDistInUse) && !bMbEncCurbeSetInBrcUpdate))
4188 {
4189 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
4190 m_stateHeapInterface,
4191 kernelState,
4192 false,
4193 0,
4194 false,
4195 m_storeData));
4196
4197 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
4198 MOS_ZeroMemory(&idParams, sizeof(idParams));
4199 idParams.pKernelState = kernelState;
4200 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnSetInterfaceDescriptor(
4201 m_stateHeapInterface,
4202 1,
4203 &idParams));
4204 }
4205
4206 if (bMbEncCurbeSetInBrcUpdate)
4207 {
4208 if (!IsMfeMbEncEnabled(mbEncIFrameDistInUse))
4209 {
4210 // If BRC update was used to set up the DSH & SSH, SSH only needs to
4211 // be obtained if single task phase is enabled because the same SSH
4212 // could not be shared between BRC update and MbEnc
4213 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
4214 m_stateHeapInterface,
4215 kernelState,
4216 true,
4217 0,
4218 m_singleTaskPhaseSupported,
4219 m_storeData));
4220 }
4221 }
4222 else
4223 {
4224 // Setup AVC Curbe
4225 CODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS mbEncCurbeParams;
4226 MOS_ZeroMemory(&mbEncCurbeParams, sizeof(mbEncCurbeParams));
4227 mbEncCurbeParams.pPicParams = m_avcPicParams[ppsIdx];
4228 mbEncCurbeParams.pSeqParams = m_avcSeqParams[spsIdx];
4229 mbEncCurbeParams.pSlcParams = m_avcSliceParams;
4230 mbEncCurbeParams.ppRefList = &(m_refList[0]);
4231 mbEncCurbeParams.pPicIdx = &(m_picIdx[0]);
4232 mbEncCurbeParams.bRoiEnabled = roiEnabled;
4233 mbEncCurbeParams.bDirtyRoiEnabled = dirtyRoiEnabled;
4234 mbEncCurbeParams.bMbEncIFrameDistEnabled = mbEncIFrameDistInUse;
4235 mbEncCurbeParams.pdwBlockBasedSkipEn = &dwMbEncBlockBasedSkipEn;
4236 if (mbEncIFrameDistInUse)
4237 {
4238 mbEncCurbeParams.bBrcEnabled = false;
4239 mbEncCurbeParams.wPicWidthInMb = (uint16_t)m_downscaledWidthInMb4x;
4240 mbEncCurbeParams.wFieldFrameHeightInMb = (uint16_t)m_downscaledFrameFieldHeightInMb4x;
4241 mbEncCurbeParams.usSliceHeight = (m_sliceHeight + SCALE_FACTOR_4x - 1) / SCALE_FACTOR_4x;
4242 }
4243 else
4244 {
4245 mbEncCurbeParams.bBrcEnabled = bBrcEnabled;
4246 mbEncCurbeParams.wPicWidthInMb = m_picWidthInMb;
4247 mbEncCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
4248 mbEncCurbeParams.usSliceHeight = (m_arbitraryNumMbsInSlice) ?
4249 m_frameFieldHeightInMb : m_sliceHeight;
4250 mbEncCurbeParams.bUseMbEncAdvKernel = bUseMbEncAdvKernel;
4251 }
4252 mbEncCurbeParams.pKernelState = kernelState;
4253 mbEncCurbeParams.pAvcQCParams = m_avcQCParams;
4254 mbEncCurbeParams.bMbDisableSkipMapEnabled = bMbDisableSkipMapEnabled;
4255 mbEncCurbeParams.bStaticFrameDetectionEnabled = bStaticFrameDetectionEnable && m_hmeEnabled;
4256 mbEncCurbeParams.bApdatvieSearchWindowSizeEnabled = bApdatvieSearchWindowEnable;
4257 mbEncCurbeParams.bSquareRollingIEnabled = bSquareRollingIEnabled;
4258 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetCurbeAvcMbEnc(
4259 &mbEncCurbeParams));
4260 }
4261
4262 if (IsMfeMbEncEnabled(mbEncIFrameDistInUse))
4263 {
4264 // Set MFE specific curbe in the last stream
4265 // MFE MBEnc specific curbe is different from the normal MBEnc curbe which is passed
4266 // to MFE MBEnc kernel as a surface.
4267 if (m_mfeLastStream)
4268 {
4269 CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_PARAMS mfeMbEncCurbeParams;
4270 MOS_ZeroMemory(&mfeMbEncCurbeParams, sizeof(mfeMbEncCurbeParams));
4271 mfeMbEncCurbeParams.submitNumber = m_mfeEncodeParams.submitNumber;
4272 mfeMbEncCurbeParams.pKernelState = kernelState;
4273 mfeMbEncCurbeParams.pBindingTable = &MbEncBindingTable;
4274 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetCurbeAvcMfeMbEnc(&mfeMbEncCurbeParams));
4275 }
4276 // Change the binding table according to the index during this submission
4277 UpdateMfeMbEncBindingTable(m_mfeEncodeParams.submitIndex);
4278 }
4279
4280 CODECHAL_DEBUG_TOOL(
4281 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
4282 encFunctionType,
4283 MHW_DSH_TYPE,
4284 kernelState));
4285 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
4286 encFunctionType,
4287 kernelState));
4288 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
4289 encFunctionType,
4290 MHW_ISH_TYPE,
4291 kernelState));
4292 )
4293
4294 for (uint8_t i = 0; i < CODEC_AVC_MAX_NUM_REF_FRAME; i++)
4295 {
4296 if (m_picIdx[i].bValid)
4297 {
4298 uint8_t index = m_picIdx[i].ucPicIdx;
4299 refList[index]->sRefBuffer = m_userFlags.bUseRawPicForRef ?
4300 refList[index]->sRefRawBuffer : refList[index]->sRefReconBuffer;
4301
4302 CodecHalGetResourceInfo(m_osInterface, &refList[index]->sRefBuffer);
4303 }
4304 }
4305
4306 MOS_COMMAND_BUFFER cmdBuffer;
4307 MOS_ZeroMemory(&cmdBuffer, sizeof(cmdBuffer));
4308 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
4309
4310 // For MFE, All the commands are sent in the last stream and can not be sent in different streams
4311 // since CmdBuffer is zeroed for each stream and cmd buffer pointer is reset.
4312 if (!IsMfeMbEncEnabled(mbEncIFrameDistInUse) || m_mfeLastStream)
4313 {
4314 SendKernelCmdsParams sendKernelCmdsParams = SendKernelCmdsParams();
4315 sendKernelCmdsParams.EncFunctionType = encFunctionType;
4316 sendKernelCmdsParams.ucDmvPredFlag =
4317 m_avcSliceParams->direct_spatial_mv_pred_flag;
4318 sendKernelCmdsParams.pKernelState = kernelState;
4319 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
4320 }
4321
4322 // Set up MB BRC Constant Data Buffer if there is QP change within a frame
4323 if (mbConstDataBufferInUse)
4324 {
4325 CODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS initMbBrcConstantDataBufferParams;
4326
4327 MOS_ZeroMemory(&initMbBrcConstantDataBufferParams, sizeof(initMbBrcConstantDataBufferParams));
4328 initMbBrcConstantDataBufferParams.pOsInterface = m_osInterface;
4329 initMbBrcConstantDataBufferParams.presBrcConstantDataBuffer =
4330 &BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx];
4331 initMbBrcConstantDataBufferParams.dwMbEncBlockBasedSkipEn = dwMbEncBlockBasedSkipEn;
4332 initMbBrcConstantDataBufferParams.pPicParams = m_avcPicParams[ppsIdx];
4333 initMbBrcConstantDataBufferParams.wPictureCodingType = m_pictureCodingType;
4334 initMbBrcConstantDataBufferParams.bSkipBiasAdjustmentEnable = m_skipBiasAdjustmentEnable;
4335 initMbBrcConstantDataBufferParams.bAdaptiveIntraScalingEnable = bAdaptiveIntraScalingEnable;
4336 initMbBrcConstantDataBufferParams.bOldModeCostEnable = bOldModeCostEnable;
4337 initMbBrcConstantDataBufferParams.pAvcQCParams = m_avcQCParams;
4338 initMbBrcConstantDataBufferParams.bEnableKernelTrellis = bKernelTrellis && m_trellisQuantParams.dwTqEnabled;
4339
4340 // Kernel controlled Trellis Quantization
4341 if (bKernelTrellis && m_trellisQuantParams.dwTqEnabled)
4342 {
4343 CODECHAL_ENCODE_CHK_STATUS_RETURN(CalcLambdaTable(
4344 m_pictureCodingType,
4345 &initMbBrcConstantDataBufferParams.Lambda[0][0]));
4346 }
4347
4348 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitMbBrcConstantDataBuffer(&initMbBrcConstantDataBufferParams));
4349
4350 // dump MbBrcLut
4351 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
4352 initMbBrcConstantDataBufferParams.presBrcConstantDataBuffer,
4353 CodechalDbgAttr::attrOutput,
4354 "MbBrcLut",
4355 16 * (CODEC_AVC_NUM_QP) * sizeof(uint32_t),
4356 0,
4357 CODECHAL_MEDIA_STATE_ENC_QUALITY)));
4358 }
4359
4360 // Add binding table
4361 // For MFE first stream sends binding table since the function zeros the whole SSH.
4362 // If last stream sends binding table it will clean the surface states from other streams.
4363 if (!IsMfeMbEncEnabled(mbEncIFrameDistInUse) || m_mfeFirstStream)
4364 {
4365 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnSetBindingTable(
4366 m_stateHeapInterface,
4367 kernelState));
4368 }
4369
4370 //Add surface states
4371 CODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS mbEncSurfaceParams;
4372 MOS_ZeroMemory(&mbEncSurfaceParams, sizeof(mbEncSurfaceParams));
4373 mbEncSurfaceParams.MediaStateType = encFunctionType;
4374 mbEncSurfaceParams.pAvcSlcParams = m_avcSliceParams;
4375 mbEncSurfaceParams.ppRefList = &m_refList[0];
4376 mbEncSurfaceParams.pAvcPicIdx = &m_picIdx[0];
4377 mbEncSurfaceParams.pCurrOriginalPic = &m_currOriginalPic;
4378 mbEncSurfaceParams.pCurrReconstructedPic = &m_currReconstructedPic;
4379 mbEncSurfaceParams.wPictureCodingType = m_pictureCodingType;
4380 mbEncSurfaceParams.psCurrPicSurface = mbEncIFrameDistInUse ? m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER) : m_rawSurfaceToEnc;
4381 if (mbEncIFrameDistInUse && CodecHal_PictureIsBottomField(m_currOriginalPic))
4382 {
4383 mbEncSurfaceParams.dwCurrPicSurfaceOffset = m_scaledBottomFieldOffset;
4384 }
4385 mbEncSurfaceParams.dwMbCodeBottomFieldOffset = (uint32_t)m_mbcodeBottomFieldOffset;
4386 mbEncSurfaceParams.dwMvBottomFieldOffset = (uint32_t)m_mvBottomFieldOffset;
4387 mbEncSurfaceParams.ps4xMeMvDataBuffer = m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me4xMvDataBuffer);
4388 mbEncSurfaceParams.ps4xMeDistortionBuffer = m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me4xDistortionBuffer);
4389 mbEncSurfaceParams.dwMeMvBottomFieldOffset = m_hmeKernel->Get4xMeMvBottomFieldOffset();
4390 mbEncSurfaceParams.dwMeDistortionBottomFieldOffset = m_hmeKernel->GetDistortionBottomFieldOffset();
4391 mbEncSurfaceParams.psMeBrcDistortionBuffer = &BrcBuffers.sMeBrcDistortionBuffer;
4392 mbEncSurfaceParams.dwMeBrcDistortionBottomFieldOffset = BrcBuffers.dwMeBrcDistortionBottomFieldOffset;
4393 mbEncSurfaceParams.dwRefPicSelectBottomFieldOffset = (uint32_t)ulRefPicSelectBottomFieldOffset;
4394 mbEncSurfaceParams.dwFrameWidthInMb = (uint32_t)m_picWidthInMb;
4395 mbEncSurfaceParams.dwFrameFieldHeightInMb = (uint32_t)m_frameFieldHeightInMb;
4396 mbEncSurfaceParams.dwFrameHeightInMb = (uint32_t)m_picHeightInMb;
4397 // Interleaved input surfaces
4398 mbEncSurfaceParams.dwVerticalLineStride = m_verticalLineStride;
4399 mbEncSurfaceParams.dwVerticalLineStrideOffset = m_verticalLineStrideOffset;
4400 // Vertical line stride is not used for the case of scaled surfaces saved as separate fields
4401 if (!m_fieldScalingOutputInterleaved && mbEncIFrameDistInUse)
4402 {
4403 mbEncSurfaceParams.dwVerticalLineStride = 0;
4404 mbEncSurfaceParams.dwVerticalLineStrideOffset = 0;
4405 }
4406 mbEncSurfaceParams.bHmeEnabled = m_hmeSupported;
4407 mbEncSurfaceParams.bMbEncIFrameDistInUse = mbEncIFrameDistInUse;
4408 mbEncSurfaceParams.presMbBrcConstDataBuffer = &BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx];
4409 mbEncSurfaceParams.psMbQpBuffer =
4410 bMbQpDataEnabled ? &sMbQpDataSurface : &BrcBuffers.sBrcMbQpBuffer;
4411 mbEncSurfaceParams.dwMbQpBottomFieldOffset = bMbQpDataEnabled ? 0 : BrcBuffers.dwBrcMbQpBottomFieldOffset;
4412 mbEncSurfaceParams.bUsedAsRef =
4413 m_refList[m_currReconstructedPic.FrameIdx]->bUsedAsRef;
4414 mbEncSurfaceParams.presMADDataBuffer = &m_resMadDataBuffer[m_currMadBufferIdx];
4415 mbEncSurfaceParams.bMbQpBufferInUse = mbQpBufferInUse;
4416 mbEncSurfaceParams.bMbSpecificDataEnabled = bMbSpecificDataEnabled;
4417 mbEncSurfaceParams.presMbSpecificDataBuffer = &resMbSpecificDataBuffer[m_currRecycledBufIdx];
4418 mbEncSurfaceParams.bMbConstDataBufferInUse = mbConstDataBufferInUse;
4419 mbEncSurfaceParams.bMADEnabled = mbEncIFrameDistInUse ? false : m_madEnabled;
4420 mbEncSurfaceParams.bUseMbEncAdvKernel = mbEncIFrameDistInUse ? false : bUseMbEncAdvKernel;
4421 mbEncSurfaceParams.presMbEncCurbeBuffer =
4422 (mbEncIFrameDistInUse && bUseMbEncAdvKernel) ? nullptr : &BrcBuffers.resMbEncAdvancedDsh;
4423 mbEncSurfaceParams.presMbEncBRCBuffer = &BrcBuffers.resMbEncBrcBuffer;
4424
4425 if (IsMfeMbEncEnabled(mbEncIFrameDistInUse) || bDecoupleMbEncCurbeFromBRC)
4426 {
4427 mbEncSurfaceParams.dwMbEncBRCBufferSize = m_mbencBrcBufferSize;
4428 }
4429
4430 mbEncSurfaceParams.bUseAdvancedDsh = bAdvancedDshInUse;
4431 mbEncSurfaceParams.bBrcEnabled = bBrcEnabled;
4432 mbEncSurfaceParams.bArbitraryNumMbsInSlice = m_arbitraryNumMbsInSlice;
4433 mbEncSurfaceParams.psSliceMapSurface = &m_sliceMapSurface[m_currRecycledBufIdx];
4434 mbEncSurfaceParams.dwSliceMapBottomFieldOffset = (uint32_t)m_sliceMapBottomFieldOffset;
4435 mbEncSurfaceParams.pMbEncBindingTable = &MbEncBindingTable;
4436 mbEncSurfaceParams.pKernelState = kernelState;
4437
4438 if (m_mbStatsSupported)
4439 {
4440 mbEncSurfaceParams.bMBVProcStatsEnabled = m_flatnessCheckEnabled ||
4441 m_adaptiveTransformDecisionEnabled ||
4442 bMbBrcEnabled ||
4443 bMbQpDataEnabled;
4444 mbEncSurfaceParams.presMBVProcStatsBuffer = &m_resMbStatsBuffer;
4445 mbEncSurfaceParams.dwMBVProcStatsBottomFieldOffset = m_mbStatsBottomFieldOffset;
4446 }
4447 else
4448 {
4449 mbEncSurfaceParams.bFlatnessCheckEnabled = m_flatnessCheckEnabled;
4450 mbEncSurfaceParams.psFlatnessCheckSurface = &m_flatnessCheckSurface;
4451 mbEncSurfaceParams.dwFlatnessCheckBottomFieldOffset = (uint32_t)m_flatnessCheckBottomFieldOffset;
4452 }
4453
4454 // Set up pFeiPicParams
4455 mbEncSurfaceParams.pFeiPicParams = m_avcFeiPicParams;
4456
4457 mbEncSurfaceParams.bMbDisableSkipMapEnabled = bMbDisableSkipMapEnabled;
4458 mbEncSurfaceParams.psMbDisableSkipMapSurface = psMbDisableSkipMapSurface;
4459
4460 if (bUseWeightedSurfaceForL0 || bUseWeightedSurfaceForL1)
4461 {
4462 if (!m_wpUseCommonKernel)
4463 {
4464 mbEncSurfaceParams.pWeightedPredOutputPicSelectList = &WeightedPredOutputPicSelectList[0];
4465 }
4466 mbEncSurfaceParams.bUseWeightedSurfaceForL0 = bUseWeightedSurfaceForL0;
4467 mbEncSurfaceParams.bUseWeightedSurfaceForL1 = bUseWeightedSurfaceForL1;
4468 }
4469
4470 // Clear the MAD buffer -- the kernel requires it to be 0 as it accumulates the result
4471 if (mbEncSurfaceParams.bMADEnabled)
4472 {
4473 // set lock flag to WRITE_ONLY
4474 MOS_LOCK_PARAMS lockFlags;
4475 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
4476 lockFlags.WriteOnly = 1;
4477
4478 uint8_t* data = (uint8_t*)m_osInterface->pfnLockResource(
4479 m_osInterface,
4480 mbEncSurfaceParams.presMADDataBuffer,
4481 &lockFlags);
4482
4483 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
4484
4485 MOS_ZeroMemory(data, CODECHAL_MAD_BUFFER_SIZE);
4486
4487 m_osInterface->pfnUnlockResource(
4488 m_osInterface,
4489 mbEncSurfaceParams.presMADDataBuffer);
4490
4491 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
4492 &m_resMadDataBuffer[m_currMadBufferIdx],
4493 CodechalDbgAttr::attrOutput,
4494 "MADRead",
4495 CODECHAL_MAD_BUFFER_SIZE,
4496 0,
4497 encFunctionType)));
4498 }
4499
4500 // static frame detection buffer
4501 mbEncSurfaceParams.bStaticFrameDetectionEnabled = bStaticFrameDetectionEnable && m_hmeEnabled;
4502 mbEncSurfaceParams.presSFDOutputBuffer = &resSFDOutputBuffer[0];
4503 if (m_pictureCodingType == P_TYPE)
4504 {
4505 mbEncSurfaceParams.presSFDCostTableBuffer = &resSFDCostTablePFrameBuffer;
4506 }
4507 else if (m_pictureCodingType == B_TYPE)
4508 {
4509 mbEncSurfaceParams.presSFDCostTableBuffer = &resSFDCostTableBFrameBuffer;
4510 }
4511
4512 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendAvcMbEncSurfaces(&cmdBuffer, &mbEncSurfaceParams));
4513
4514 // For MFE, only one walker processes frame in parallel through color bits.
4515 if (!IsMfeMbEncEnabled(mbEncIFrameDistInUse) || m_mfeLastStream)
4516 {
4517 uint32_t resolutionX = mbEncIFrameDistInUse ?
4518 m_downscaledWidthInMb4x : (uint32_t)m_picWidthInMb;
4519 uint32_t resolutionY = mbEncIFrameDistInUse ?
4520 m_downscaledFrameFieldHeightInMb4x : (uint32_t)m_frameFieldHeightInMb;
4521
4522 CODECHAL_WALKER_CODEC_PARAMS walkerCodecParams;
4523 MOS_ZeroMemory(&walkerCodecParams, sizeof(walkerCodecParams));
4524 walkerCodecParams.WalkerMode = m_walkerMode;
4525 walkerCodecParams.bUseScoreboard = m_useHwScoreboard;
4526 walkerCodecParams.wPictureCodingType = m_pictureCodingType;
4527 walkerCodecParams.bMbEncIFrameDistInUse = mbEncIFrameDistInUse;
4528 walkerCodecParams.bMbaff = m_mbaffEnabled;
4529 walkerCodecParams.bDirectSpatialMVPredFlag = m_avcSliceParams->direct_spatial_mv_pred_flag;
4530 walkerCodecParams.bColorbitSupported = (m_colorbitSupported && !m_arbitraryNumMbsInSlice) ? m_cmKernelEnable : false;
4531
4532 if (IsMfeMbEncEnabled(mbEncIFrameDistInUse))
4533 {
4534 walkerCodecParams.dwNumSlices = m_mfeEncodeParams.submitNumber; // MFE use color bit to handle frames in parallel
4535 walkerCodecParams.WalkerDegree = CODECHAL_26_DEGREE; // MFE use 26 degree dependency
4536 walkerCodecParams.dwResolutionX = m_mfeEncodeSharedState->dwPicWidthInMB;
4537 walkerCodecParams.dwResolutionY = m_mfeEncodeSharedState->dwPicHeightInMB;
4538 walkerCodecParams.usSliceHeight = m_mfeEncodeSharedState->sliceHeight;
4539 }
4540 else
4541 {
4542 walkerCodecParams.dwResolutionX = resolutionX;
4543 walkerCodecParams.dwResolutionY = resolutionY;
4544 walkerCodecParams.dwNumSlices = m_numSlices;
4545 walkerCodecParams.usSliceHeight = m_sliceHeight;
4546 }
4547 walkerCodecParams.bGroupIdSelectSupported = m_groupIdSelectSupported;
4548 walkerCodecParams.ucGroupId = m_groupId;
4549
4550 MHW_WALKER_PARAMS walkerParams;
4551 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalInitMediaObjectWalkerParams(
4552 m_hwInterface,
4553 &walkerParams,
4554 &walkerCodecParams));
4555
4556 HalOcaInterface::TraceMessage(cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, __FUNCTION__, sizeof(__FUNCTION__));
4557 HalOcaInterface::OnDispatch(cmdBuffer, *m_osInterface, *m_miInterface, *m_renderEngineInterface->GetMmioRegisters());
4558
4559 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_renderEngineInterface->AddMediaObjectWalkerCmd(
4560 &cmdBuffer,
4561 &walkerParams));
4562
4563 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, encFunctionType));
4564
4565 // Add dump for MBEnc surface state heap here
4566 CODECHAL_DEBUG_TOOL(
4567 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
4568 encFunctionType,
4569 MHW_SSH_TYPE,
4570 kernelState));
4571 )
4572
4573 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnSubmitBlocks(
4574 m_stateHeapInterface,
4575 kernelState));
4576 if (!m_singleTaskPhaseSupported || m_lastTaskInPhase)
4577 {
4578 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnUpdateGlobalCmdBufId(
4579 m_stateHeapInterface));
4580 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_miInterface->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
4581 }
4582
4583 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
4584 &cmdBuffer,
4585 encFunctionType,
4586 nullptr)));
4587 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
4588 &cmdBuffer,
4589 encFunctionType,
4590 nullptr)));
4591
4592 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
4593
4594 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
4595
4596 if ((!m_singleTaskPhaseSupported || m_lastTaskInPhase))
4597 {
4598 HalOcaInterface::On1stLevelBBEnd(cmdBuffer, *m_osInterface);
4599 m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw);
4600 m_lastTaskInPhase = false;
4601 }
4602 }
4603
4604 currRefList->ucMADBufferIdx = m_currMadBufferIdx;
4605 currRefList->bMADEnabled = m_madEnabled;
4606
4607 if (IsMfeMbEncEnabled(mbEncIFrameDistInUse))
4608 {
4609 m_stateHeapInterface = m_origStateHeapInterface;
4610 m_hwInterface = m_origHwInterface;
4611 m_osInterface = m_origOsInterface;
4612
4613 MbEncBindingTable = origMbEncBindingTable;
4614
4615 CODECHAL_DEBUG_TOOL(
4616 m_debugInterface->m_osInterface = m_osInterface;)
4617 }
4618
4619 return eStatus;
4620 }
4621
SetAndPopulateVEHintParams(PMOS_COMMAND_BUFFER cmdBuffer)4622 MOS_STATUS CodechalEncodeAvcEncG11::SetAndPopulateVEHintParams(
4623 PMOS_COMMAND_BUFFER cmdBuffer)
4624 {
4625 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4626
4627 CODECHAL_ENCODE_FUNCTION_ENTER;
4628
4629 if (!MOS_VE_SUPPORTED(m_osInterface))
4630 {
4631 return eStatus;
4632 }
4633
4634 if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(m_osInterface))
4635 {
4636 MOS_VIRTUALENGINE_SET_PARAMS vesetParams;
4637 MOS_ZeroMemory(&vesetParams, sizeof(vesetParams));
4638 vesetParams.bNeedSyncWithPrevious = true;
4639 vesetParams.bSFCInUse = false;
4640 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_SetHintParams(m_sinlgePipeVeState, &vesetParams));
4641 }
4642 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_PopulateHintParams(m_sinlgePipeVeState, cmdBuffer, true));
4643
4644 return eStatus;
4645 }
4646
ExecuteSliceLevel()4647 MOS_STATUS CodechalEncodeAvcEncG11::ExecuteSliceLevel()
4648 {
4649 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4650
4651 CODECHAL_ENCODE_FUNCTION_ENTER;
4652
4653 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface->osCpInterface);
4654
4655 auto cpInterface = m_hwInterface->GetCpInterface();
4656 auto avcSlcParams = m_avcSliceParams;
4657 auto avcPicParams = m_avcPicParams[avcSlcParams->pic_parameter_set_id];
4658 auto avcSeqParams = m_avcSeqParams[avcPicParams->seq_parameter_set_id];
4659 auto slcData = m_slcData;
4660
4661 // For use with the single task phase implementation
4662 if (m_sliceStructCaps != CODECHAL_SLICE_STRUCT_ARBITRARYMBSLICE)
4663 {
4664 uint32_t numSlc = (m_frameFieldHeightInMb + m_sliceHeight - 1) / m_sliceHeight;
4665
4666 if (numSlc != m_numSlices)
4667 {
4668 return MOS_STATUS_INVALID_PARAMETER;
4669 }
4670 }
4671
4672 bool useBatchBufferForPakSlices = false;
4673 if (m_singleTaskPhaseSupported && m_singleTaskPhaseSupportedInPak)
4674 {
4675 if (m_currPass == 0)
4676 {
4677 // The same buffer is used for all slices for all passes.
4678 uint32_t batchBufferForPakSlicesSize =
4679 (m_numPasses + 1) * m_numSlices * m_pakSliceSize;
4680 if (batchBufferForPakSlicesSize >
4681 (uint32_t)m_batchBufferForPakSlices[m_currRecycledBufIdx].iSize)
4682 {
4683 if (m_batchBufferForPakSlices[m_currRecycledBufIdx].iSize)
4684 {
4685 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReleaseBatchBufferForPakSlices(m_currRecycledBufIdx));
4686 }
4687
4688 CODECHAL_ENCODE_CHK_STATUS_RETURN(AllocateBatchBufferForPakSlices(
4689 m_numSlices,
4690 m_numPasses,
4691 m_currRecycledBufIdx));
4692 }
4693 }
4694 CODECHAL_ENCODE_CHK_STATUS_RETURN(Mhw_LockBb(
4695 m_osInterface,
4696 &m_batchBufferForPakSlices[m_currRecycledBufIdx]));
4697 useBatchBufferForPakSlices = true;
4698 }
4699
4700 MOS_COMMAND_BUFFER cmdBuffer;
4701 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
4702
4703 if (m_osInterface->osCpInterface->IsCpEnabled())
4704 {
4705 MHW_CP_SLICE_INFO_PARAMS sliceInfoParam;
4706 sliceInfoParam.bLastPass = (m_currPass == m_numPasses) ? true : false;
4707 CODECHAL_ENCODE_CHK_STATUS_RETURN(cpInterface->SetMfxProtectionState(false, &cmdBuffer, nullptr, &sliceInfoParam));
4708 CODECHAL_ENCODE_CHK_STATUS_RETURN(cpInterface->UpdateParams(false));
4709 }
4710
4711 avcSlcParams = m_avcSliceParams;
4712
4713 CODECHAL_ENCODE_AVC_PACK_SLC_HEADER_PARAMS packSlcHeaderParams;
4714 packSlcHeaderParams.pBsBuffer = &m_bsBuffer;
4715 packSlcHeaderParams.pPicParams = avcPicParams;
4716 packSlcHeaderParams.pSeqParams = m_avcSeqParam;
4717 packSlcHeaderParams.ppRefList = &(m_refList[0]);
4718 packSlcHeaderParams.CurrPic = m_currOriginalPic;
4719 packSlcHeaderParams.CurrReconPic = m_currReconstructedPic;
4720 packSlcHeaderParams.UserFlags = m_userFlags;
4721 packSlcHeaderParams.NalUnitType = m_nalUnitType;
4722 packSlcHeaderParams.wPictureCodingType = m_pictureCodingType;
4723 packSlcHeaderParams.bVdencEnabled = false;
4724
4725 MHW_VDBOX_AVC_SLICE_STATE sliceState;
4726 MOS_ZeroMemory(&sliceState, sizeof(sliceState));
4727 sliceState.presDataBuffer = &m_resMbCodeSurface;
4728 sliceState.pAvcPicIdx = &(m_picIdx[0]);
4729 sliceState.pEncodeAvcSeqParams = m_avcSeqParam;
4730 sliceState.pEncodeAvcPicParams = avcPicParams;
4731 sliceState.pBsBuffer = &m_bsBuffer;
4732 sliceState.ppNalUnitParams = m_nalUnitParams;
4733 sliceState.bBrcEnabled = bBrcEnabled;
4734 // Disable Panic mode when min/max QP control is on. kernel may disable it, but disable in driver also.
4735 if (avcSeqParams->bForcePanicModeControl == 1) {
4736 sliceState.bRCPanicEnable = (!avcSeqParams->bPanicModeDisable) && (!bMinMaxQPControlEnabled);
4737 }
4738 else {
4739 sliceState.bRCPanicEnable = m_panicEnable && (!bMinMaxQPControlEnabled);
4740 }
4741 sliceState.bAcceleratorHeaderPackingCaps = m_encodeParams.bAcceleratorHeaderPackingCaps;
4742 sliceState.wFrameFieldHeightInMB = m_frameFieldHeightInMb;
4743
4744 MHW_VDBOX_VD_PIPE_FLUSH_PARAMS vdPipelineFlushParams;
4745 for (uint16_t slcCount = 0; slcCount < m_numSlices; slcCount++)
4746 {
4747 if (m_currPass == 0)
4748 {
4749 packSlcHeaderParams.pAvcSliceParams = &avcSlcParams[slcCount];
4750 if (bAcceleratorHeaderPackingCaps)
4751 {
4752 slcData[slcCount].SliceOffset = m_bsBuffer.SliceOffset;
4753 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalAvcEncode_PackSliceHeader(&packSlcHeaderParams));
4754 slcData[slcCount].BitSize = m_bsBuffer.BitSize;
4755 }
4756 if (m_sliceStructCaps != CODECHAL_SLICE_STRUCT_ARBITRARYMBSLICE)
4757 {
4758 slcData[slcCount].CmdOffset = slcCount * m_sliceHeight * m_picWidthInMb * 16 * 4;
4759 }
4760 else
4761 {
4762 slcData[slcCount].CmdOffset = packSlcHeaderParams.pAvcSliceParams->first_mb_in_slice * 16 * 4;
4763 }
4764 }
4765
4766 sliceState.pEncodeAvcSliceParams = &avcSlcParams[slcCount];
4767 sliceState.dwDataBufferOffset =
4768 m_slcData[slcCount].CmdOffset + m_mbcodeBottomFieldOffset;
4769 sliceState.dwOffset = slcData[slcCount].SliceOffset;
4770 sliceState.dwLength = slcData[slcCount].BitSize;
4771 sliceState.uiSkipEmulationCheckCount = slcData[slcCount].SkipEmulationByteCount;
4772 sliceState.dwSliceIndex = (uint32_t)slcCount;
4773 sliceState.bFirstPass = (m_currPass == 0);
4774 sliceState.bLastPass = (m_currPass == m_numPasses);
4775 sliceState.bInsertBeforeSliceHeaders = (slcCount == 0);
4776 sliceState.bVdencInUse = false;
4777 // App handles tail insertion for VDEnc dynamic slice in non-cp case
4778 sliceState.bVdencNoTailInsertion = false;
4779
4780 uint32_t batchBufferForPakSlicesStartOffset =
4781 (uint32_t)m_batchBufferForPakSlices[m_currRecycledBufIdx].iCurrent;
4782
4783 if (useBatchBufferForPakSlices)
4784 {
4785 sliceState.pBatchBufferForPakSlices =
4786 &m_batchBufferForPakSlices[m_currRecycledBufIdx];
4787 sliceState.bSingleTaskPhaseSupported = true;
4788 sliceState.dwBatchBufferForPakSlicesStartOffset = batchBufferForPakSlicesStartOffset;
4789 }
4790
4791 if (m_avcRoundingParams != nullptr && m_avcRoundingParams->bEnableCustomRoudingIntra)
4792 {
4793 sliceState.dwRoundingIntraValue = m_avcRoundingParams->dwRoundingIntra;
4794 }
4795 else
4796 {
4797 sliceState.dwRoundingIntraValue = 5;
4798 }
4799 if (m_avcRoundingParams != nullptr && m_avcRoundingParams->bEnableCustomRoudingInter)
4800 {
4801 sliceState.bRoundingInterEnable = true;
4802 sliceState.dwRoundingValue = m_avcRoundingParams->dwRoundingInter;
4803 }
4804 else
4805 {
4806 sliceState.bRoundingInterEnable = bRoundingInterEnable;
4807 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetInterRounding(&sliceState));
4808 }
4809
4810 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendSlice(&cmdBuffer, &sliceState));
4811
4812 // Add dumps for 2nd level batch buffer
4813 if (sliceState.bSingleTaskPhaseSupported)
4814 {
4815 CODECHAL_ENCODE_CHK_NULL_RETURN(sliceState.pBatchBufferForPakSlices);
4816
4817 CODECHAL_DEBUG_TOOL(
4818 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->Dump2ndLvlBatch(
4819 sliceState.pBatchBufferForPakSlices,
4820 CODECHAL_MEDIA_STATE_ENC_NORMAL,
4821 nullptr));
4822 )
4823 }
4824 }
4825
4826 if (useBatchBufferForPakSlices)
4827 {
4828 CODECHAL_ENCODE_CHK_STATUS_RETURN(Mhw_UnlockBb(
4829 m_osInterface,
4830 &m_batchBufferForPakSlices[m_currRecycledBufIdx],
4831 m_lastTaskInPhase));
4832 }
4833
4834 // Insert end of sequence/stream if set
4835 if (m_lastPicInStream || m_lastPicInSeq)
4836 {
4837 MHW_VDBOX_PAK_INSERT_PARAMS pakInsertObjectParams;
4838 MOS_ZeroMemory(&pakInsertObjectParams, sizeof(pakInsertObjectParams));
4839 pakInsertObjectParams.bLastPicInSeq = m_lastPicInSeq;
4840 pakInsertObjectParams.bLastPicInStream = m_lastPicInStream;
4841 pakInsertObjectParams.dwBitSize = 32; // use dwBitSize for SrcDataEndingBitInclusion
4842 if (m_lastPicInSeq)
4843 {
4844 pakInsertObjectParams.dwLastPicInSeqData = (uint32_t)((1 << 16) | CODECHAL_ENCODE_AVC_NAL_UT_EOSEQ << 24);
4845 }
4846 if (m_lastPicInStream)
4847 {
4848 pakInsertObjectParams.dwLastPicInStreamData = (uint32_t)((1 << 16) | CODECHAL_ENCODE_AVC_NAL_UT_EOSTREAM << 24);
4849 }
4850 pakInsertObjectParams.bHeaderLengthExcludeFrmSize = true;
4851 if (pakInsertObjectParams.bEmulationByteBitsInsert)
4852 {
4853 //Does not matter here, but keeping for consistency
4854 CODECHAL_ENCODE_ASSERTMESSAGE("The emulation prevention bytes are not inserted by the app and are requested to be inserted by HW.");
4855 }
4856 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mfxInterface->AddMfxPakInsertObject(&cmdBuffer, nullptr, &pakInsertObjectParams));
4857 }
4858
4859 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReadMfcStatus(&cmdBuffer));
4860
4861 // BRC PAK statistics different for each pass
4862 if (bBrcEnabled)
4863 {
4864 uint32_t offset =
4865 (m_encodeStatusBuf.wCurrIndex * m_encodeStatusBuf.dwReportSize) +
4866 m_encodeStatusBuf.dwNumPassesOffset + // Num passes offset
4867 sizeof(uint32_t) * 2; // pEncodeStatus is offset by 2 DWs in the resource
4868
4869 EncodeReadBrcPakStatsParams readBrcPakStatsParams;
4870 readBrcPakStatsParams.pHwInterface = m_hwInterface;
4871 readBrcPakStatsParams.presBrcPakStatisticBuffer = &BrcBuffers.resBrcPakStatisticBuffer[0];
4872 readBrcPakStatsParams.presStatusBuffer = &m_encodeStatusBuf.resStatusBuffer;
4873 readBrcPakStatsParams.dwStatusBufNumPassesOffset = offset;
4874 readBrcPakStatsParams.ucPass = m_currPass;
4875 readBrcPakStatsParams.VideoContext = m_videoContext;
4876
4877 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReadBrcPakStatistics(&cmdBuffer, &readBrcPakStatsParams));
4878 }
4879
4880 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, CODECHAL_NUM_MEDIA_STATES));
4881
4882 if (!m_singleTaskPhaseSupported || m_lastTaskInPhase)
4883 {
4884 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_miInterface->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
4885 }
4886
4887 std::string pakPassName = "PAK_PASS" + std::to_string(static_cast<uint32_t>(m_currPass));
4888 CODECHAL_DEBUG_TOOL(
4889 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
4890 &cmdBuffer,
4891 CODECHAL_NUM_MEDIA_STATES,
4892 pakPassName.data()));
4893 //CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHal_DbgReplaceAllCommands(
4894 // m_debugInterface,
4895 // &cmdBuffer));
4896 )
4897
4898 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
4899
4900 // For VDEnc SHME and CSC need to wait workload finish on render engine
4901 if ((m_currPass == 0) && !Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
4902 {
4903 auto syncParams = g_cInitSyncParams;
4904 syncParams.GpuContext = m_videoContext;
4905 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
4906
4907 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
4908 }
4909
4910 bool renderingFlags = m_videoContextUsesNullHw;
4911
4912 if (!m_singleTaskPhaseSupported || m_lastTaskInPhase)
4913 {
4914 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetAndPopulateVEHintParams(&cmdBuffer));
4915
4916 HalOcaInterface::On1stLevelBBEnd(cmdBuffer, *m_osInterface);
4917 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, renderingFlags));
4918
4919 CODECHAL_DEBUG_TOOL(
4920 if (!m_mmcUserFeatureUpdated) {
4921 CODECHAL_UPDATE_ENCODE_MMC_USER_FEATURE(m_reconSurface, m_osInterface->pOsContext);
4922 m_mmcUserFeatureUpdated = true;
4923 })
4924
4925 if (m_sliceSizeStreamoutSupported)
4926 {
4927 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
4928 &m_pakSliceSizeStreamoutBuffer,
4929 CodechalDbgAttr::attrOutput,
4930 "SliceSizeStreamout",
4931 CODECHAL_ENCODE_SLICESIZE_BUF_SIZE,
4932 0,
4933 CODECHAL_NUM_MEDIA_STATES)));
4934 }
4935
4936 if ((m_currPass == m_numPasses) &&
4937 m_signalEnc &&
4938 !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
4939 {
4940 // Check if the signal obj count exceeds max value
4941 if (m_semaphoreObjCount == MOS_MIN(m_semaphoreMaxCount, MOS_MAX_OBJECT_SIGNALED))
4942 {
4943 auto syncParams = g_cInitSyncParams;
4944 syncParams.GpuContext = m_renderContext;
4945 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
4946
4947 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
4948 m_semaphoreObjCount--;
4949 }
4950
4951 // signal semaphore
4952 auto syncParams = g_cInitSyncParams;
4953 syncParams.GpuContext = m_videoContext;
4954 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
4955
4956 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
4957 m_semaphoreObjCount++;
4958 }
4959 }
4960
4961 // Reset parameters for next PAK execution
4962 if (m_currPass == m_numPasses)
4963 {
4964 if (!m_singleTaskPhaseSupported)
4965 {
4966 m_osInterface->pfnResetPerfBufferID(m_osInterface);
4967 }
4968
4969 m_newPpsHeader = 0;
4970 m_newSeqHeader = 0;
4971 }
4972
4973 CODECHAL_DEBUG_TOOL(
4974 CODECHAL_ENCODE_CHK_STATUS_RETURN(PopulateSliceStateParam(
4975 bAdaptiveRoundingInterEnable,
4976 &sliceState));
4977
4978 CODECHAL_ENCODE_CHK_STATUS_RETURN(DumpFrameParFile());
4979 )
4980
4981 return eStatus;
4982 }
4983
ExecuteKernelFunctions()4984 MOS_STATUS CodechalEncodeAvcEncG11::ExecuteKernelFunctions()
4985 {
4986 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4987
4988 CODECHAL_ENCODE_FUNCTION_ENTER;
4989 auto slcParams = m_avcSliceParams;
4990 auto sliceType = Slice_Type[slcParams->slice_type];
4991
4992 CODECHAL_DEBUG_TOOL(
4993 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
4994 m_rawSurfaceToEnc,
4995 CodechalDbgAttr::attrEncodeRawInputSurface,
4996 "SrcSurf"));
4997 )
4998
4999 CODECHAL_ENCODE_CHK_NULL_RETURN(m_cscDsState);
5000
5001 // Scaling, BRC Init/Reset, HME and SWSB Init are included in the same task phase
5002 m_lastEncPhase = false;
5003 m_firstTaskInPhase = true;
5004
5005 // Check if SW scoreboard init is needed
5006 auto swScoreboardInitNeeded = true;
5007 CodechalEncodeSwScoreboard::KernelParams swScoreboardKernelParames;
5008 MOS_ZeroMemory(&swScoreboardKernelParames, sizeof(swScoreboardKernelParames));
5009
5010 // Decide dependency pattern
5011 if (m_pictureCodingType == I_TYPE ||
5012 (m_pictureCodingType == B_TYPE && !m_avcSliceParams->direct_spatial_mv_pred_flag)) // I or B-temporal
5013 {
5014 swScoreboardKernelParames.surfaceIndex = dependencyWavefront45Degree;
5015 m_swScoreboardState->SetDependencyPattern(dependencyWavefront45Degree);
5016 }
5017 else //P or B-spatial
5018 {
5019 swScoreboardKernelParames.surfaceIndex = dependencyWavefront26Degree;
5020 m_swScoreboardState->SetDependencyPattern(dependencyWavefront26Degree);
5021 }
5022
5023 m_swScoreboardState->SetCurSwScoreboardSurfaceIndex(swScoreboardKernelParames.surfaceIndex);
5024
5025 // Only called if current pattern was not initialized before
5026 if (Mos_ResourceIsNull(&m_swScoreboardState->GetCurSwScoreboardSurface()->OsResource))
5027 {
5028 swScoreboardInitNeeded = true;
5029 }
5030
5031 // BRC init/reset needs to be called before HME since it will reset the Brc Distortion surface
5032 if ((bBrcEnabled || m_avcPicParam->bEnableQpAdjustment) && (bBrcInit || bBrcReset))
5033 {
5034 bool cscEnabled = m_cscDsState->RequireCsc() && m_firstField;
5035 m_lastTaskInPhase = !(cscEnabled || m_scalingEnabled || m_16xMeSupported || m_hmeEnabled || swScoreboardInitNeeded);
5036 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcInitResetKernel());
5037 }
5038
5039 UpdateSSDSliceCount();
5040
5041 if (m_firstField)
5042 {
5043 // Csc, Downscaling, and/or 10-bit to 8-bit conversion
5044 CodechalEncodeCscDs::KernelParams cscScalingKernelParams;
5045 MOS_ZeroMemory(&cscScalingKernelParams, sizeof(cscScalingKernelParams));
5046 cscScalingKernelParams.bLastTaskInPhaseCSC =
5047 cscScalingKernelParams.bLastTaskInPhase4xDS = !(m_16xMeSupported || m_hmeEnabled);
5048 cscScalingKernelParams.bLastTaskInPhase16xDS = !(m_32xMeSupported || m_hmeEnabled);
5049 cscScalingKernelParams.bLastTaskInPhase32xDS = !m_hmeEnabled;
5050 cscScalingKernelParams.inputColorSpace = m_avcSeqParam->InputColorSpace;
5051
5052 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cscDsState->KernelFunctions(&cscScalingKernelParams));
5053 }
5054
5055 // SFD should be called only when HME enabled
5056 auto staticFrameDetectionInUse = bStaticFrameDetectionEnable && m_hmeEnabled;
5057
5058 // temp for SKL, once perMB pulled-in to BDW/HSW this can be removed
5059 staticFrameDetectionInUse = !bPerMbSFD && staticFrameDetectionInUse;
5060
5061 if (m_hmeKernel && m_hmeKernel->Is4xMeEnabled())
5062 {
5063 CodechalKernelHme::CurbeParam curbeParam = {};
5064 curbeParam.subPelMode = 3;
5065 curbeParam.currOriginalPic = m_avcPicParam->CurrOriginalPic;
5066 curbeParam.qpPrimeY = m_avcPicParam->pic_init_qp_minus26 + 26 + m_avcSliceParams->slice_qp_delta;
5067 curbeParam.targetUsage = m_avcSeqParam->TargetUsage;
5068 curbeParam.maxMvLen = CodecHalAvcEncode_GetMaxMvLen(m_avcSeqParam->Level);
5069 curbeParam.numRefIdxL0Minus1 = m_avcSliceParams->num_ref_idx_l0_active_minus1;
5070 curbeParam.numRefIdxL1Minus1 = m_avcSliceParams->num_ref_idx_l1_active_minus1;
5071
5072 auto slcParams = m_avcSliceParams;
5073 curbeParam.list0RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_0);
5074 curbeParam.list0RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_1);
5075 curbeParam.list0RefID2FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_2);
5076 curbeParam.list0RefID3FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_3);
5077 curbeParam.list0RefID4FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_4);
5078 curbeParam.list0RefID5FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_5);
5079 curbeParam.list0RefID6FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_6);
5080 curbeParam.list0RefID7FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_7);
5081 curbeParam.list1RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_0);
5082 curbeParam.list1RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_1);
5083
5084 CodechalKernelHme::SurfaceParams surfaceParam = {};
5085 surfaceParam.mbaffEnabled = m_mbaffEnabled;
5086 surfaceParam.numRefIdxL0ActiveMinus1 = m_avcSliceParams->num_ref_idx_l0_active_minus1;
5087 surfaceParam.numRefIdxL1ActiveMinus1 = m_avcSliceParams->num_ref_idx_l1_active_minus1;
5088 surfaceParam.verticalLineStride = m_verticalLineStride;
5089 surfaceParam.verticalLineStrideOffset = m_verticalLineStrideOffset;
5090 surfaceParam.meBrcDistortionBottomFieldOffset = BrcBuffers.dwMeBrcDistortionBottomFieldOffset;
5091 surfaceParam.refList = &m_refList[0];
5092 surfaceParam.picIdx = &m_picIdx[0];
5093 surfaceParam.currOriginalPic = &m_currOriginalPic;
5094 surfaceParam.refL0List = &(m_avcSliceParams->RefPicList[LIST_0][0]);
5095 surfaceParam.refL1List = &(m_avcSliceParams->RefPicList[LIST_1][0]);
5096 surfaceParam.meBrcDistortionBuffer = &BrcBuffers.sMeBrcDistortionBuffer;
5097
5098 if (m_hmeKernel->Is16xMeEnabled())
5099 {
5100 m_lastTaskInPhase = false;
5101 if (m_hmeKernel->Is32xMeEnabled())
5102 {
5103 surfaceParam.downScaledWidthInMb = m_downscaledWidthInMb32x;
5104 surfaceParam.downScaledHeightInMb = m_downscaledFrameFieldHeightInMb32x;
5105 surfaceParam.downScaledBottomFieldOffset = m_scaled32xBottomFieldOffset;
5106
5107 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hmeKernel->Execute(curbeParam, surfaceParam, CodechalKernelHme::HmeLevel::hmeLevel32x));
5108 }
5109 surfaceParam.downScaledWidthInMb = m_downscaledWidthInMb16x;
5110 surfaceParam.downScaledHeightInMb = m_downscaledFrameFieldHeightInMb16x;
5111 surfaceParam.downScaledBottomFieldOffset = m_scaled16xBottomFieldOffset;
5112
5113 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hmeKernel->Execute(curbeParam, surfaceParam, CodechalKernelHme::HmeLevel::hmeLevel16x));
5114 }
5115 surfaceParam.downScaledWidthInMb = m_downscaledWidthInMb4x;
5116 surfaceParam.downScaledHeightInMb = m_downscaledFrameFieldHeightInMb4x;
5117 surfaceParam.downScaledBottomFieldOffset = m_scaledBottomFieldOffset;
5118
5119 m_lastTaskInPhase = !(staticFrameDetectionInUse || swScoreboardInitNeeded);
5120 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hmeKernel->Execute(curbeParam, surfaceParam, CodechalKernelHme::HmeLevel::hmeLevel4x));
5121 }
5122
5123 // Initialize software scoreboard used by MBEnc kernel
5124 if (swScoreboardInitNeeded)
5125 {
5126 // Call SW scoreboard Init kernel
5127 m_lastTaskInPhase = true;
5128 swScoreboardKernelParames.scoreboardWidth = m_picWidthInMb;
5129 swScoreboardKernelParames.scoreboardHeight = m_frameFieldHeightInMb;
5130 swScoreboardKernelParames.swScoreboardSurfaceWidth = swScoreboardKernelParames.scoreboardWidth * 4;
5131 swScoreboardKernelParames.swScoreboardSurfaceHeight = swScoreboardKernelParames.scoreboardHeight;
5132
5133 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_swScoreboardState->Execute(&swScoreboardKernelParames));
5134 }
5135
5136 // Scaling and HME are not dependent on the output from PAK
5137 if (m_waitForPak && m_semaphoreObjCount && !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
5138 {
5139 // Wait on PAK
5140 auto syncParams = g_cInitSyncParams;
5141 syncParams.GpuContext = m_renderContext;
5142 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
5143 syncParams.uiSemaphoreCount = m_semaphoreObjCount;
5144
5145 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
5146 m_semaphoreObjCount = 0; //reset
5147 }
5148
5149 // Dump BrcDist 4X_ME buffer here because it will be overwritten in BrcFrameUpdateKernel
5150 CODECHAL_DEBUG_TOOL(
5151 if (m_hmeEnabled && bBrcDistortionBufferSupported)
5152 {
5153 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5154 &BrcBuffers.sMeBrcDistortionBuffer.OsResource,
5155 CodechalDbgAttr::attrOutput,
5156 "BrcDist",
5157 BrcBuffers.sMeBrcDistortionBuffer.dwPitch * BrcBuffers.sMeBrcDistortionBuffer.dwHeight,
5158 BrcBuffers.dwMeBrcDistortionBottomFieldOffset,
5159 CODECHAL_MEDIA_STATE_4X_ME));
5160 })
5161
5162 // BRC and MbEnc are included in the same task phase
5163 m_lastEncPhase = true;
5164 m_firstTaskInPhase = true;
5165
5166 if (bBrcEnabled)
5167 {
5168 if (bMbEncIFrameDistEnabled)
5169 {
5170 CodechalKernelIntraDist::CurbeParam curbeParam;
5171 curbeParam.downScaledWidthInMb4x = m_downscaledWidthInMb4x;
5172 curbeParam.downScaledHeightInMb4x = m_downscaledFrameFieldHeightInMb4x;
5173 CodechalKernelIntraDist::SurfaceParams surfaceParam;
5174 surfaceParam.input4xDsSurface =
5175 surfaceParam.input4xDsVmeSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
5176 surfaceParam.intraDistSurface = &BrcBuffers.sMeBrcDistortionBuffer;
5177 surfaceParam.intraDistBottomFieldOffset = BrcBuffers.dwMeBrcDistortionBottomFieldOffset;
5178 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_intraDistKernel->Execute(curbeParam, surfaceParam));
5179 }
5180
5181 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcFrameUpdateKernel());
5182 if (bBrcSplitEnable && bMbBrcEnabled)
5183 {
5184 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcMbUpdateKernel());
5185 }
5186
5187 // Reset buffer ID used for BRC kernel performance reports
5188 m_osInterface->pfnResetPerfBufferID(m_osInterface);
5189 }
5190 else if (bMbBrcEnabled)
5191 {
5192 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcMbUpdateKernel());
5193
5194 // Reset buffer ID used for BRC kernel performance reports
5195 m_osInterface->pfnResetPerfBufferID(m_osInterface);
5196 }
5197
5198 bUseWeightedSurfaceForL0 = false;
5199 bUseWeightedSurfaceForL1 = false;
5200
5201 if (bWeightedPredictionSupported &&
5202 ((((sliceType == SLICE_P) || (sliceType == SLICE_SP)) && (m_avcPicParam->weighted_pred_flag)) ||
5203 (((sliceType == SLICE_B)) && (m_avcPicParam->weighted_bipred_idc == EXPLICIT_WEIGHTED_INTER_PRED_MODE))))
5204 {
5205 CodechalEncodeWP::SliceParams sliceWPParams;
5206 memset((void *)&sliceWPParams,0, sizeof(sliceWPParams));
5207 MOS_SecureMemcpy(&sliceWPParams.weights, sizeof(m_avcSliceParams->Weights), &m_avcSliceParams->Weights, sizeof(m_avcSliceParams->Weights));
5208 sliceWPParams.luma_log2_weight_denom = m_avcSliceParams->luma_log2_weight_denom;
5209
5210 CodechalEncodeWP::KernelParams wpkernelParams;
5211 memset((void *)&wpkernelParams, 0, sizeof(wpkernelParams));
5212 wpkernelParams.useWeightedSurfaceForL0 = &bUseWeightedSurfaceForL0;
5213 wpkernelParams.useWeightedSurfaceForL1 = &bUseWeightedSurfaceForL1;
5214 wpkernelParams.slcWPParams = &sliceWPParams;
5215
5216 // Weighted Prediction to be applied for L0
5217 for (auto i = 0; i < (slcParams->num_ref_idx_l0_active_minus1 + 1); i++)
5218 {
5219 if((slcParams->luma_weight_flag[LIST_0] & (1 << i)) && (i < CODEC_AVC_MAX_FORWARD_WP_FRAME))
5220 {
5221 CODEC_PICTURE refPic = slcParams->RefPicList[LIST_0][i];
5222 if (!CodecHal_PictureIsInvalid(refPic) && m_picIdx[refPic.FrameIdx].bValid)
5223 {
5224 uint8_t frameIndex = m_picIdx[refPic.FrameIdx].ucPicIdx;
5225 MOS_SURFACE refFrameInput = m_userFlags.bUseRawPicForRef?
5226 m_refList[frameIndex]->sRefRawBuffer : m_refList[frameIndex]->sRefReconBuffer;
5227
5228 //Weighted Prediction for ith forward reference frame
5229 wpkernelParams.useRefPicList1 = false;
5230 wpkernelParams.wpIndex = i;
5231 wpkernelParams.refFrameInput = &refFrameInput;
5232 wpkernelParams.refIsBottomField = CodecHal_PictureIsBottomField(refPic);
5233 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_wpState->Execute(&wpkernelParams));
5234 }
5235 }
5236 }
5237
5238 // Weighted Pred to be applied for L1
5239 if (((sliceType == SLICE_B)) &&
5240 (m_avcPicParam->weighted_bipred_idc == EXPLICIT_WEIGHTED_INTER_PRED_MODE))
5241 {
5242 for (auto i = 0; i < (slcParams->num_ref_idx_l1_active_minus1 + 1); i++)
5243 {
5244 if((slcParams->luma_weight_flag[LIST_1] & 1 << i) && (i < CODEC_AVC_MAX_BACKWARD_WP_FRAME))
5245 {
5246 CODEC_PICTURE refPic = slcParams->RefPicList[LIST_1][i];
5247 if (!CodecHal_PictureIsInvalid(refPic) && m_picIdx[refPic.FrameIdx].bValid)
5248 {
5249 uint8_t frameIndex = m_picIdx[refPic.FrameIdx].ucPicIdx;
5250 MOS_SURFACE refFrameInput = m_userFlags.bUseRawPicForRef?
5251 m_refList[frameIndex]->sRefRawBuffer : m_refList[frameIndex]->sRefReconBuffer;
5252
5253 //Weighted Prediction for ith backward reference frame
5254 wpkernelParams.useRefPicList1 = true;
5255 wpkernelParams.wpIndex = i;
5256 wpkernelParams.refFrameInput = &refFrameInput;
5257 wpkernelParams.refIsBottomField = CodecHal_PictureIsBottomField(refPic);
5258 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_wpState->Execute(&wpkernelParams));
5259 }
5260 }
5261 }
5262 }
5263 }
5264
5265 #if (_DEBUG || _RELEASE_INTERNAL)
5266 MOS_USER_FEATURE_VALUE_WRITE_DATA userFeatureWriteData;
5267 // Weighted prediction for L0 Reporting
5268 userFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;
5269 userFeatureWriteData.Value.i32Data = bUseWeightedSurfaceForL0;
5270 userFeatureWriteData.ValueID = __MEDIA_USER_FEATURE_VALUE_WEIGHTED_PREDICTION_L0_IN_USE_ID;
5271 MOS_UserFeature_WriteValues_ID(nullptr, &userFeatureWriteData, 1, m_osInterface->pOsContext);
5272 // Weighted prediction for L1 Reporting
5273 userFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;
5274 userFeatureWriteData.Value.i32Data = bUseWeightedSurfaceForL1;
5275 userFeatureWriteData.ValueID = __MEDIA_USER_FEATURE_VALUE_WEIGHTED_PREDICTION_L1_IN_USE_ID;
5276 MOS_UserFeature_WriteValues_ID(nullptr, &userFeatureWriteData, 1, m_osInterface->pOsContext);
5277 #endif // _DEBUG || _RELEASE_INTERNAL
5278
5279 m_lastTaskInPhase = true;
5280 CODECHAL_ENCODE_CHK_STATUS_RETURN(MbEncKernel(false));
5281
5282 // Reset buffer ID used for MbEnc kernel performance reports
5283 m_osInterface->pfnResetPerfBufferID(m_osInterface);
5284
5285 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
5286 {
5287 auto syncParams = g_cInitSyncParams;
5288 syncParams.GpuContext = m_renderContext;
5289 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
5290
5291 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
5292 }
5293
5294 if (m_madEnabled)
5295 {
5296 m_currMadBufferIdx = (m_currMadBufferIdx + 1) % CODECHAL_ENCODE_MAX_NUM_MAD_BUFFERS;
5297 }
5298
5299 // Reset after BRC Init has been processed
5300 bBrcInit = false;
5301
5302 m_setRequestedEUSlices = false;
5303
5304 CODECHAL_DEBUG_TOOL(
5305 if (m_hmeEnabled)
5306 {
5307 CODECHAL_ME_OUTPUT_PARAMS MeOutputParams;
5308
5309 MOS_ZeroMemory(&MeOutputParams, sizeof(MeOutputParams));
5310 MeOutputParams.psMeMvBuffer = m_hmeKernel ? m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me4xMvDataBuffer) : &m_4xMeMvDataBuffer;
5311 MeOutputParams.psMeDistortionBuffer =
5312 m_4xMeDistortionBufferSupported ?
5313 (m_hmeKernel ? m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me4xDistortionBuffer) : &m_4xMeDistortionBuffer) : nullptr;
5314 MeOutputParams.b16xMeInUse = false;
5315 MeOutputParams.b32xMeInUse = false;
5316 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5317 &MeOutputParams.psMeMvBuffer->OsResource,
5318 CodechalDbgAttr::attrOutput,
5319 "MvData",
5320 MeOutputParams.psMeMvBuffer->dwHeight *MeOutputParams.psMeMvBuffer->dwPitch,
5321 m_hmeKernel ? m_hmeKernel->Get4xMeMvBottomFieldOffset() : (uint32_t)m_meMvBottomFieldOffset,
5322 CODECHAL_MEDIA_STATE_4X_ME));
5323
5324 if (MeOutputParams.psMeDistortionBuffer)
5325 {
5326 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5327 &MeOutputParams.psMeDistortionBuffer->OsResource,
5328 CodechalDbgAttr::attrOutput,
5329 "MeDist",
5330 MeOutputParams.psMeDistortionBuffer->dwHeight *MeOutputParams.psMeDistortionBuffer->dwPitch,
5331 m_hmeKernel ? m_hmeKernel->GetDistortionBottomFieldOffset() : (uint32_t)m_meDistortionBottomFieldOffset,
5332 CODECHAL_MEDIA_STATE_4X_ME));
5333 }
5334
5335 if (m_16xMeEnabled)
5336 {
5337 MeOutputParams.psMeMvBuffer = m_hmeKernel ? m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me16xMvDataBuffer) : &m_16xMeMvDataBuffer;
5338 MeOutputParams.psMeBrcDistortionBuffer = nullptr;
5339 MeOutputParams.psMeDistortionBuffer = nullptr;
5340 MeOutputParams.b16xMeInUse = true;
5341 MeOutputParams.b32xMeInUse = false;
5342 CODECHAL_ENCODE_CHK_STATUS_RETURN(
5343 m_debugInterface->DumpBuffer(
5344 &MeOutputParams.psMeMvBuffer->OsResource,
5345 CodechalDbgAttr::attrOutput,
5346 "MvData",
5347 MeOutputParams.psMeMvBuffer->dwHeight *MeOutputParams.psMeMvBuffer->dwPitch,
5348 m_hmeKernel ? m_hmeKernel->Get16xMeMvBottomFieldOffset() : (uint32_t)m_meMv16xBottomFieldOffset,
5349 CODECHAL_MEDIA_STATE_16X_ME));
5350
5351 if (m_32xMeEnabled)
5352 {
5353 MeOutputParams.psMeMvBuffer = m_hmeKernel ? m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me32xMvDataBuffer) : &m_32xMeMvDataBuffer;
5354 MeOutputParams.psMeBrcDistortionBuffer = nullptr;
5355 MeOutputParams.psMeDistortionBuffer = nullptr;
5356 MeOutputParams.b16xMeInUse = false;
5357 MeOutputParams.b32xMeInUse = true;
5358 CODECHAL_ENCODE_CHK_STATUS_RETURN(
5359 m_debugInterface->DumpBuffer(
5360 &MeOutputParams.psMeMvBuffer->OsResource,
5361 CodechalDbgAttr::attrOutput,
5362 "MvData",
5363 MeOutputParams.psMeMvBuffer->dwHeight *MeOutputParams.psMeMvBuffer->dwPitch,
5364 m_hmeKernel ? m_hmeKernel->Get32xMeMvBottomFieldOffset() : (uint32_t)m_meMv32xBottomFieldOffset,
5365 CODECHAL_MEDIA_STATE_32X_ME));
5366 }
5367 }
5368 }
5369
5370 if (bBrcEnabled)
5371 {
5372 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5373 &BrcBuffers.resBrcImageStatesWriteBuffer,
5374 CodechalDbgAttr::attrOutput,
5375 "ImgStateWrite",
5376 BRC_IMG_STATE_SIZE_PER_PASS * m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses(),
5377 0,
5378 CODECHAL_MEDIA_STATE_BRC_UPDATE));
5379
5380 if (!Mos_ResourceIsNull(&BrcBuffers.sBrcMbQpBuffer.OsResource))
5381 {
5382 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5383 &BrcBuffers.sBrcMbQpBuffer.OsResource,
5384 CodechalDbgAttr::attrOutput,
5385 "MbQp",
5386 BrcBuffers.sBrcMbQpBuffer.dwPitch*BrcBuffers.sBrcMbQpBuffer.dwHeight,
5387 BrcBuffers.dwBrcMbQpBottomFieldOffset,
5388 CODECHAL_MEDIA_STATE_MB_BRC_UPDATE));
5389 }
5390 if (bMbBrcEnabled)
5391 {
5392 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5393 &BrcBuffers.resBrcHistoryBuffer,
5394 CodechalDbgAttr::attrOutput,
5395 "HistoryWrite",
5396 m_brcHistoryBufferSize,
5397 0,
5398 CODECHAL_MEDIA_STATE_MB_BRC_UPDATE));
5399 }
5400 if (BrcBuffers.pMbEncKernelStateInUse)
5401 {
5402 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
5403 CODECHAL_MEDIA_STATE_BRC_UPDATE,
5404 BrcBuffers.pMbEncKernelStateInUse));
5405 }
5406 if (m_mbencBrcBufferSize > 0)
5407 {
5408 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5409 &BrcBuffers.resMbEncBrcBuffer,
5410 CodechalDbgAttr::attrOutput,
5411 "MbEncBRCWrite",
5412 m_mbencBrcBufferSize,
5413 0,
5414 CODECHAL_MEDIA_STATE_BRC_UPDATE));
5415 }
5416
5417 if (m_mbStatsSupported)
5418 {
5419 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5420 &m_resMbStatsBuffer,
5421 CodechalDbgAttr::attrOutput,
5422 "MBStatsSurf",
5423 m_picWidthInMb * m_frameFieldHeightInMb * 16 * sizeof(uint32_t),
5424 CodecHal_PictureIsBottomField(m_currOriginalPic) ? m_mbStatsBottomFieldOffset : 0,
5425 CODECHAL_MEDIA_STATE_4X_SCALING));
5426 }
5427 else if (m_flatnessCheckEnabled) {
5428 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5429 &m_flatnessCheckSurface.OsResource,
5430 CodechalDbgAttr::attrOutput,
5431 "FlatnessChkSurf",
5432 ((CodecHal_PictureIsField(m_currOriginalPic)) ? m_flatnessCheckSurface.dwHeight / 2 : m_flatnessCheckSurface.dwHeight) * m_flatnessCheckSurface.dwPitch,
5433 CodecHal_PictureIsBottomField(m_currOriginalPic) ? (m_flatnessCheckSurface.dwPitch * m_flatnessCheckSurface.dwHeight >> 1) : 0,
5434 CODECHAL_MEDIA_STATE_4X_SCALING));
5435 }
5436 if (bMbQpDataEnabled) {
5437 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5438 &sMbQpDataSurface.OsResource,
5439 CodechalDbgAttr::attrInput,
5440 "MbQp",
5441 sMbQpDataSurface.dwHeight*sMbQpDataSurface.dwPitch,
5442 0,
5443 CODECHAL_MEDIA_STATE_ENC_QUALITY));
5444 }
5445 }
5446 if (bMbSpecificDataEnabled)
5447 {
5448 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5449 &resMbSpecificDataBuffer[m_currRecycledBufIdx],
5450 CodechalDbgAttr::attrInput,
5451 "MbSpecificData",
5452 m_picWidthInMb*m_frameFieldHeightInMb*16,
5453 0,
5454 CODECHAL_MEDIA_STATE_ENC_QUALITY));
5455 }
5456
5457 uint8_t index;
5458 CODEC_PICTURE refPic;
5459 if (bUseWeightedSurfaceForL0)
5460 {
5461 refPic = m_avcSliceParams->RefPicList[LIST_0][0];
5462 index = m_picIdx[refPic.FrameIdx].ucPicIdx;
5463
5464 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
5465 &m_refList[index]->sRefBuffer,
5466 CodechalDbgAttr::attrReferenceSurfaces,
5467 "WP_In_L0")));
5468
5469 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
5470 m_wpState->GetWPOutputPicList(CODEC_WP_OUTPUT_L0_START + 0),
5471 CodechalDbgAttr::attrReferenceSurfaces,
5472 "WP_Out_L0")));
5473 }
5474 if (bUseWeightedSurfaceForL1)
5475 {
5476 refPic = m_avcSliceParams->RefPicList[LIST_1][0];
5477 index = m_picIdx[refPic.FrameIdx].ucPicIdx;
5478
5479 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
5480 &m_refList[index]->sRefBuffer,
5481 CodechalDbgAttr::attrReferenceSurfaces,
5482 "WP_In_L1")));
5483
5484 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
5485 m_wpState->GetWPOutputPicList(CODEC_WP_OUTPUT_L1_START + 0),
5486 CodechalDbgAttr::attrReferenceSurfaces,
5487 "WP_Out_L1")));
5488 }
5489
5490 if (m_feiEnable)
5491 {
5492 if(m_avcFeiPicParams->bMBQp){
5493 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5494 &m_avcFeiPicParams->resMBQp,
5495 CodechalDbgAttr::attrInput,
5496 "MbQp",
5497 m_picWidthInMb * m_frameFieldHeightInMb + 3,
5498 0,
5499 CODECHAL_MEDIA_STATE_ENC_QUALITY));
5500 }
5501 if (m_avcFeiPicParams->MVPredictorEnable){
5502 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5503 &m_avcFeiPicParams->resMVPredictor,
5504 CodechalDbgAttr::attrInput,
5505 "MvPredictor",
5506 m_picWidthInMb * m_frameFieldHeightInMb *40,
5507 0,
5508 CODECHAL_MEDIA_STATE_ENC_QUALITY));
5509 }
5510 }
5511
5512 if (m_arbitraryNumMbsInSlice)
5513 {
5514 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5515 &m_sliceMapSurface[m_currRecycledBufIdx].OsResource,
5516 CodechalDbgAttr::attrInput,
5517 "SliceMapSurf",
5518 m_sliceMapSurface[m_currRecycledBufIdx].dwPitch * m_frameFieldHeightInMb,
5519 0,
5520 CODECHAL_MEDIA_STATE_ENC_QUALITY));
5521 }
5522
5523 // Dump SW scoreboard surface
5524 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5525 &(m_swScoreboardState->GetCurSwScoreboardSurface())->OsResource,
5526 CodechalDbgAttr::attrOutput,
5527 "Out",
5528 (m_swScoreboardState->GetCurSwScoreboardSurface())->dwHeight * (m_swScoreboardState->GetCurSwScoreboardSurface())->dwPitch,
5529 0,
5530 CODECHAL_MEDIA_STATE_SW_SCOREBOARD_INIT));
5531 )
5532
5533 if (bBrcEnabled)
5534 {
5535 bMbEncCurbeSetInBrcUpdate = false;
5536 }
5537
5538 return eStatus;
5539 }
5540
SceneChangeReport(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params)5541 MOS_STATUS CodechalEncodeAvcEncG11::SceneChangeReport(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params)
5542 {
5543
5544 MHW_MI_COPY_MEM_MEM_PARAMS copyMemMemParams;
5545 uint32_t offset = (m_encodeStatusBuf.wCurrIndex * m_encodeStatusBuf.dwReportSize)
5546 + (sizeof(uint32_t) * 2) + m_encodeStatusBuf.dwSceneChangedOffset;
5547
5548 MOS_ZeroMemory(©MemMemParams, sizeof(copyMemMemParams));
5549 copyMemMemParams.presSrc = params->presBrcHistoryBuffer;
5550 copyMemMemParams.dwSrcOffset = brcHistoryBufferOffsetSceneChanged;
5551 copyMemMemParams.presDst = &m_encodeStatusBuf.resStatusBuffer;
5552 copyMemMemParams.dwDstOffset = offset;
5553 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_miInterface->AddMiCopyMemMemCmd(
5554 cmdBuffer,
5555 ©MemMemParams));
5556
5557 return MOS_STATUS_SUCCESS;
5558 }
5559
InitializeState()5560 MOS_STATUS CodechalEncodeAvcEncG11::InitializeState()
5561 {
5562 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeAvcEnc::InitializeState());
5563
5564 m_brcHistoryBufferSize = brcHistoryBufferSize;
5565 m_mbencBrcBufferSize = mbencBrcBufferSize;
5566 m_forceBrcMbStatsEnabled = true;
5567 m_useHwScoreboard = false;
5568
5569 dwBrcConstantSurfaceWidth = brcConstantsurfaceWidth;
5570 dwBrcConstantSurfaceHeight = brcConstantsurfaceHeight;
5571
5572 // Create weighted prediction kernel state
5573 m_wpUseCommonKernel = true;
5574 CODECHAL_ENCODE_CHK_NULL_RETURN(m_wpState = MOS_New(CodechalEncodeWPG11, this));
5575 m_wpState->SetKernelBase(m_kernelBase);
5576 // create intra distortion kernel
5577 m_intraDistKernel = MOS_New(CodechalKernelIntraDist, this);
5578 CODECHAL_ENCODE_CHK_NULL_RETURN(m_intraDistKernel);
5579 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_intraDistKernel->Initialize(
5580 GetCommonKernelHeaderAndSizeG11,
5581 m_kernelBase,
5582 m_kuidCommon));
5583
5584 // Create SW scoreboard init kernel state
5585 CODECHAL_ENCODE_CHK_NULL_RETURN(m_swScoreboardState = MOS_New(CodechalEncodeSwScoreboardG11, this));
5586 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_swScoreboardState->InitKernelState());
5587
5588 if (MOS_VE_SUPPORTED(m_osInterface))
5589 {
5590 m_sinlgePipeVeState = (PCODECHAL_ENCODE_SINGLEPIPE_VIRTUALENGINE_STATE)MOS_AllocAndZeroMemory(sizeof(CODECHAL_ENCODE_SINGLEPIPE_VIRTUALENGINE_STATE));
5591 CODECHAL_ENCODE_CHK_NULL_RETURN(m_sinlgePipeVeState);
5592 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_InitInterface(m_hwInterface, m_sinlgePipeVeState));
5593 }
5594 return MOS_STATUS_SUCCESS;
5595 }
5596
InitKernelStateBrc()5597 MOS_STATUS CodechalEncodeAvcEncG11::InitKernelStateBrc()
5598 {
5599 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5600
5601 CODECHAL_ENCODE_FUNCTION_ENTER;
5602
5603 uint8_t* kernelBinary;
5604 uint32_t kernelSize;
5605
5606 MOS_STATUS status = CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize);
5607 CODECHAL_ENCODE_CHK_STATUS_RETURN(status);
5608
5609 CODECHAL_KERNEL_HEADER currKrnHeader;
5610 for (uint32_t krnStateIdx = 0; krnStateIdx < CODECHAL_ENCODE_BRC_IDX_NUM; krnStateIdx++)
5611 {
5612 auto kernelStatePtr = &BrcKernelStates[krnStateIdx];
5613 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetKernelHeaderAndSize(
5614 kernelBinary,
5615 ENC_BRC,
5616 krnStateIdx,
5617 (void*)&currKrnHeader,
5618 &kernelSize));
5619
5620 kernelStatePtr->KernelParams.iBTCount = m_brcBTCounts[krnStateIdx];
5621 kernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
5622 kernelStatePtr->KernelParams.iCurbeLength = m_brcCurbeSize[krnStateIdx];
5623 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
5624 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
5625 kernelStatePtr->KernelParams.iIdCount = 1;
5626
5627 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
5628 kernelStatePtr->KernelParams.pBinary = kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
5629 kernelStatePtr->KernelParams.iSize = kernelSize;
5630
5631 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
5632 m_stateHeapInterface,
5633 kernelStatePtr->KernelParams.iBTCount,
5634 &kernelStatePtr->dwSshSize,
5635 &kernelStatePtr->dwBindingTableSize));
5636
5637 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
5638 }
5639
5640 // Until a better way can be found, maintain old binding table structures
5641 auto bindingTable = &BrcUpdateBindingTable;
5642 bindingTable->dwFrameBrcHistoryBuffer = frameBrcUpdateHistory;
5643 bindingTable->dwFrameBrcPakStatisticsOutputBuffer = frameBrcUpdatePakStatisticsOutput;
5644 bindingTable->dwFrameBrcImageStateReadBuffer = frameBrcUpdateImageStateRead;
5645 bindingTable->dwFrameBrcImageStateWriteBuffer = frameBrcUpdateImageStateWrite;
5646
5647 bindingTable->dwFrameBrcMbEncCurbeWriteData = frameBrcUpdateMbencCurbeWrite;
5648 bindingTable->dwFrameBrcDistortionBuffer = frameBrcUpdateDistortion;
5649 bindingTable->dwFrameBrcConstantData = frameBrcUpdateConstantData;
5650 bindingTable->dwFrameBrcMbStatBuffer = frameBrcUpdateMbStat;
5651 bindingTable->dwFrameBrcMvDataBuffer = frameBrcUpdateMvStat;
5652 // starting GEN9 BRC kernel has split into a frame level update, and an MB level update.
5653 // above is BTI for frame level, below is BTI for MB level
5654 bindingTable->dwMbBrcHistoryBuffer = mbBrcUpdateHistory;
5655 bindingTable->dwMbBrcMbQpBuffer = mbBrcUpdateMbQp;
5656 bindingTable->dwMbBrcROISurface = mbBrcUpdateRoi;
5657 bindingTable->dwMbBrcMbStatBuffer = mbBrcUpdateMbStat;
5658
5659 return eStatus;
5660 }
5661
GetTrellisQuantization(PCODECHAL_ENCODE_AVC_TQ_INPUT_PARAMS params,PCODECHAL_ENCODE_AVC_TQ_PARAMS trellisQuantParams)5662 MOS_STATUS CodechalEncodeAvcEncG11::GetTrellisQuantization(
5663 PCODECHAL_ENCODE_AVC_TQ_INPUT_PARAMS params,
5664 PCODECHAL_ENCODE_AVC_TQ_PARAMS trellisQuantParams)
5665 {
5666 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5667
5668 CODECHAL_ENCODE_FUNCTION_ENTER;
5669
5670 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
5671 CODECHAL_ENCODE_CHK_NULL_RETURN(trellisQuantParams);
5672
5673 trellisQuantParams->dwTqEnabled = TrellisQuantizationEnable[params->ucTargetUsage];
5674 trellisQuantParams->dwTqRounding =
5675 trellisQuantParams->dwTqEnabled ? trellisQuantizationRounding[params->ucTargetUsage] : 0;
5676
5677 // If AdaptiveTrellisQuantization is enabled then disable trellis quantization for
5678 // B-frames with QP > 26 only in CQP mode
5679 if(trellisQuantParams->dwTqEnabled
5680 && EnableAdaptiveTrellisQuantization[params->ucTargetUsage]
5681 && params->wPictureCodingType == B_TYPE
5682 && !params->bBrcEnabled && params->ucQP > 26)
5683 {
5684 trellisQuantParams->dwTqEnabled = 0;
5685 trellisQuantParams->dwTqRounding = 0;
5686 }
5687 return eStatus;
5688 }
5689
GetMbEncKernelStateIdx(CodechalEncodeIdOffsetParams * params,uint32_t * kernelOffset)5690 MOS_STATUS CodechalEncodeAvcEncG11::GetMbEncKernelStateIdx(CodechalEncodeIdOffsetParams* params, uint32_t* kernelOffset)
5691 {
5692 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5693
5694 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
5695 CODECHAL_ENCODE_CHK_NULL_RETURN(kernelOffset);
5696
5697 *kernelOffset = mbencIOffset;
5698
5699 if (params->EncFunctionType == CODECHAL_MEDIA_STATE_ENC_ADV)
5700 {
5701 *kernelOffset +=
5702 mbencNumTargetUsages * mbencFrameTypeNum;
5703 }
5704 else
5705 {
5706 if (params->EncFunctionType == CODECHAL_MEDIA_STATE_ENC_NORMAL)
5707 {
5708 *kernelOffset += mbencFrameTypeNum;
5709 }
5710 else if (params->EncFunctionType == CODECHAL_MEDIA_STATE_ENC_PERFORMANCE)
5711 {
5712 *kernelOffset += mbencFrameTypeNum * 2;
5713 }
5714 }
5715
5716 if (params->wPictureCodingType == P_TYPE)
5717 {
5718 *kernelOffset += mbencPOffset;
5719 }
5720 else if (params->wPictureCodingType == B_TYPE)
5721 {
5722 *kernelOffset += mbencBOffset;
5723 }
5724
5725 return eStatus;
5726 }
5727
InitKernelStateMbEnc()5728 MOS_STATUS CodechalEncodeAvcEncG11::InitKernelStateMbEnc()
5729 {
5730 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5731
5732 CODECHAL_ENCODE_FUNCTION_ENTER;
5733
5734 dwNumMbEncEncKrnStates =
5735 mbencNumTargetUsages * mbencFrameTypeNum;
5736 dwNumMbEncEncKrnStates += mbencFrameTypeNum;
5737 pMbEncKernelStates =
5738 MOS_NewArray(MHW_KERNEL_STATE, dwNumMbEncEncKrnStates);
5739 CODECHAL_ENCODE_CHK_NULL_RETURN(pMbEncKernelStates);
5740
5741 auto kernelStatePtr = pMbEncKernelStates;
5742 CODECHAL_KERNEL_HEADER currKrnHeader;
5743
5744 uint8_t* kernelBinary;
5745 uint32_t kernelSize;
5746
5747 MOS_STATUS status = CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize);
5748 CODECHAL_ENCODE_CHK_STATUS_RETURN(status);
5749
5750 for (uint32_t krnStateIdx = 0; krnStateIdx < dwNumMbEncEncKrnStates; krnStateIdx++)
5751 {
5752 bool kernelState = (krnStateIdx >= mbencNumTargetUsages * mbencFrameTypeNum);
5753
5754 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetKernelHeaderAndSize(
5755 kernelBinary,
5756 (kernelState ? ENC_MBENC_ADV : ENC_MBENC),
5757 (kernelState ? krnStateIdx - mbencNumTargetUsages * mbencFrameTypeNum : krnStateIdx),
5758 &currKrnHeader,
5759 &kernelSize));
5760
5761 kernelStatePtr->KernelParams.iBTCount = mbencNumSurfaces;
5762 kernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
5763 kernelStatePtr->KernelParams.iCurbeLength = sizeof(MbencCurbe);
5764 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
5765 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
5766 kernelStatePtr->KernelParams.iIdCount = 1;
5767
5768 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
5769 kernelStatePtr->KernelParams.pBinary = kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
5770 kernelStatePtr->KernelParams.iSize = kernelSize;
5771
5772 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
5773 m_stateHeapInterface,
5774 kernelStatePtr->KernelParams.iBTCount,
5775 &kernelStatePtr->dwSshSize,
5776 &kernelStatePtr->dwBindingTableSize));
5777
5778 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
5779
5780 kernelStatePtr++;
5781 }
5782
5783 // Until a better way can be found, maintain old binding table structures
5784 auto bindingTable = &MbEncBindingTable;
5785
5786 bindingTable->dwAvcMBEncMfcAvcPakObj = mbencMfcAvcPakObj;
5787 bindingTable->dwAvcMBEncIndMVData = mbencIndMvData;
5788 bindingTable->dwAvcMBEncBRCDist = mbencBrcDistortion;
5789 bindingTable->dwAvcMBEncCurrY = mbencCurrY;
5790 bindingTable->dwAvcMBEncCurrUV = mbencCurrUv;
5791 bindingTable->dwAvcMBEncMbSpecificData = mbencMbSpecificData;
5792
5793 bindingTable->dwAvcMBEncRefPicSelectL0 = mbencRefpicselectL0;
5794 bindingTable->dwAvcMBEncMVDataFromME = mbencMvDataFromMe;
5795 bindingTable->dwAvcMBEncMEDist = mbenc4xMeDistortion;
5796 bindingTable->dwAvcMBEncSliceMapData = mbencSlicemapData;
5797 bindingTable->dwAvcMBEncBwdRefMBData = mbencFwdMbData;
5798 bindingTable->dwAvcMBEncBwdRefMVData = mbencFwdMvData;
5799 bindingTable->dwAvcMBEncMbBrcConstData = mbencMbbrcConstData;
5800 bindingTable->dwAvcMBEncMBStats = mbencMbStats;
5801 bindingTable->dwAvcMBEncMADData = mbencMadData;
5802 bindingTable->dwAvcMBEncMbNonSkipMap = mbencForceNonskipMbMap;
5803 bindingTable->dwAvcMBEncAdv = mbEncAdv;
5804 bindingTable->dwAvcMbEncBRCCurbeData = mbencBrcCurbeData;
5805 bindingTable->dwAvcMBEncStaticDetectionCostTable = mbencSfdCostTable;
5806
5807 // Frame
5808 bindingTable->dwAvcMBEncMbQpFrame = mbencMbqp;
5809 bindingTable->dwAvcMBEncCurrPicFrame[0] = mbencVmeInterPredCurrPicIdx0;
5810 bindingTable->dwAvcMBEncFwdPicFrame[0] = mbencVmeInterPredFwdPicIDX0;
5811 bindingTable->dwAvcMBEncBwdPicFrame[0] = mbencVmeInterPredBwdPicIDX00;
5812 bindingTable->dwAvcMBEncFwdPicFrame[1] = mbencVmeInterPredFwdPicIDX1;
5813 bindingTable->dwAvcMBEncBwdPicFrame[1] = mbencVmeInterPredBwdPicIDX10;
5814 bindingTable->dwAvcMBEncFwdPicFrame[2] = mbencVmeInterPredFwdPicIDX2;
5815 bindingTable->dwAvcMBEncFwdPicFrame[3] = mbencVmeInterPredFwdPicIDX3;
5816 bindingTable->dwAvcMBEncFwdPicFrame[4] = mbencVmeInterPredFwdPicIDX4;
5817 bindingTable->dwAvcMBEncFwdPicFrame[5] = mbencVmeInterPredFwdPicIDX5;
5818 bindingTable->dwAvcMBEncFwdPicFrame[6] = mbencVmeInterPredFwdPicIDX6;
5819 bindingTable->dwAvcMBEncFwdPicFrame[7] = mbencVmeInterPredFwdPicIDX7;
5820 bindingTable->dwAvcMBEncCurrPicFrame[1] = mbencVmeInterPredCurrPicIdx1;
5821 bindingTable->dwAvcMBEncBwdPicFrame[2] = mbencVmeInterPredBwdPicIDX01;
5822 bindingTable->dwAvcMBEncBwdPicFrame[3] = mbencVmeInterPredBwdPicIDX11;
5823
5824 // Field
5825 bindingTable->dwAvcMBEncMbQpField = mbencMbqp;
5826 bindingTable->dwAvcMBEncFieldCurrPic[0] = mbencVmeInterPredCurrPicIdx0;
5827 bindingTable->dwAvcMBEncFwdPicTopField[0] = mbencVmeInterPredFwdPicIDX0;
5828 bindingTable->dwAvcMBEncBwdPicTopField[0] = mbencVmeInterPredBwdPicIDX00;
5829 bindingTable->dwAvcMBEncFwdPicBotField[0] = mbencVmeInterPredFwdPicIDX0;
5830 bindingTable->dwAvcMBEncBwdPicBotField[0] = mbencVmeInterPredBwdPicIDX00;
5831 bindingTable->dwAvcMBEncFwdPicTopField[1] = mbencVmeInterPredFwdPicIDX1;
5832 bindingTable->dwAvcMBEncBwdPicTopField[1] = mbencVmeInterPredBwdPicIDX10;
5833 bindingTable->dwAvcMBEncFwdPicBotField[1] = mbencVmeInterPredFwdPicIDX1;
5834 bindingTable->dwAvcMBEncBwdPicBotField[1] = mbencVmeInterPredBwdPicIDX10;
5835 bindingTable->dwAvcMBEncFwdPicTopField[2] = mbencVmeInterPredFwdPicIDX2;
5836 bindingTable->dwAvcMBEncFwdPicBotField[2] = mbencVmeInterPredFwdPicIDX2;
5837 bindingTable->dwAvcMBEncFwdPicTopField[3] = mbencVmeInterPredFwdPicIDX3;
5838 bindingTable->dwAvcMBEncFwdPicBotField[3] = mbencVmeInterPredFwdPicIDX3;
5839 bindingTable->dwAvcMBEncFwdPicTopField[4] = mbencVmeInterPredFwdPicIDX4;
5840 bindingTable->dwAvcMBEncFwdPicBotField[4] = mbencVmeInterPredFwdPicIDX4;
5841 bindingTable->dwAvcMBEncFwdPicTopField[5] = mbencVmeInterPredFwdPicIDX5;
5842 bindingTable->dwAvcMBEncFwdPicBotField[5] = mbencVmeInterPredFwdPicIDX5;
5843 bindingTable->dwAvcMBEncFwdPicTopField[6] = mbencVmeInterPredFwdPicIDX6;
5844 bindingTable->dwAvcMBEncFwdPicBotField[6] = mbencVmeInterPredFwdPicIDX6;
5845 bindingTable->dwAvcMBEncFwdPicTopField[7] = mbencVmeInterPredFwdPicIDX7;
5846 bindingTable->dwAvcMBEncFwdPicBotField[7] = mbencVmeInterPredFwdPicIDX7;
5847 bindingTable->dwAvcMBEncFieldCurrPic[1] = mbencVmeInterPredCurrPicIdx1;
5848 bindingTable->dwAvcMBEncBwdPicTopField[2] = mbencVmeInterPredBwdPicIDX01;
5849 bindingTable->dwAvcMBEncBwdPicBotField[2] = mbencVmeInterPredBwdPicIDX01;
5850 bindingTable->dwAvcMBEncBwdPicTopField[3] = mbencVmeInterPredBwdPicIDX11;
5851 bindingTable->dwAvcMBEncBwdPicBotField[3] = mbencVmeInterPredBwdPicIDX11;
5852
5853 return eStatus;
5854 }
5855
InitMbBrcConstantDataBuffer(PCODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS params)5856 MOS_STATUS CodechalEncodeAvcEncG11::InitMbBrcConstantDataBuffer(PCODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS params)
5857 {
5858 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5859
5860 CODECHAL_ENCODE_FUNCTION_ENTER;
5861
5862 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
5863 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
5864 CODECHAL_ENCODE_CHK_NULL_RETURN(params->presBrcConstantDataBuffer);
5865
5866 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeAvcEnc::InitMbBrcConstantDataBuffer(params));
5867
5868 if (params->wPictureCodingType == I_TYPE)
5869 {
5870 MOS_LOCK_PARAMS lockFlags;
5871 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
5872 lockFlags.WriteOnly = 1;
5873
5874 uint32_t * data = (uint32_t *)params->pOsInterface->pfnLockResource(
5875 params->pOsInterface,
5876 params->presBrcConstantDataBuffer,
5877 &lockFlags);
5878 if (data == nullptr)
5879 {
5880 eStatus = MOS_STATUS_UNKNOWN;
5881 return eStatus;
5882 }
5883
5884 // Update MbBrcConstantDataBuffer with high texture cost
5885 for (uint8_t qp = 0; qp < CODEC_AVC_NUM_QP; qp++)
5886 {
5887 // Writing to DW13 in each sub-array of 16 DWs
5888 *(data + 13) = (uint32_t)m_IntraModeCostForHighTextureMB[qp];
5889 // 16 DWs per QP value
5890 data += 16;
5891 }
5892
5893 params->pOsInterface->pfnUnlockResource(
5894 params->pOsInterface,
5895 params->presBrcConstantDataBuffer);
5896 }
5897
5898 return eStatus;
5899 }
5900
InitBrcConstantBuffer(PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS params)5901 MOS_STATUS CodechalEncodeAvcEncG11::InitBrcConstantBuffer(PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS params)
5902 {
5903 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5904
5905 CODECHAL_ENCODE_FUNCTION_ENTER;
5906
5907 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
5908 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
5909 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
5910
5911 uint8_t tableIdx = params->wPictureCodingType - 1;
5912 bool blockBasedSkipEn = params->dwMbEncBlockBasedSkipEn ? true : false;
5913 bool transform_8x8_mode_flag = params->pPicParams->transform_8x8_mode_flag ? true : false;
5914
5915 if (tableIdx >= 3)
5916 {
5917 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid input parameter.");
5918 eStatus = MOS_STATUS_INVALID_PARAMETER;
5919 return eStatus;
5920 }
5921 MOS_LOCK_PARAMS LockFlags;
5922 MOS_ZeroMemory(&LockFlags, sizeof(MOS_LOCK_PARAMS));
5923 LockFlags.WriteOnly = 1;
5924 auto data = (uint8_t*)params->pOsInterface->pfnLockResource(
5925 params->pOsInterface,
5926 ¶ms->sBrcConstantDataBuffer.OsResource,
5927 &LockFlags);
5928 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
5929
5930 MOS_ZeroMemory(data, params->sBrcConstantDataBuffer.dwWidth * params->sBrcConstantDataBuffer.dwHeight);
5931
5932 // Fill surface with QP Adjustment table, Distortion threshold table, MaxFrame threshold table, Distortion QP Adjustment Table
5933 eStatus = MOS_SecureMemcpy(
5934 data,
5935 sizeof(m_QPAdjustmentDistThresholdMaxFrameThresholdIPB),
5936 (void*)m_QPAdjustmentDistThresholdMaxFrameThresholdIPB,
5937 sizeof(m_QPAdjustmentDistThresholdMaxFrameThresholdIPB));
5938 if (eStatus != MOS_STATUS_SUCCESS)
5939 {
5940 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
5941 return eStatus;
5942 }
5943
5944 data += sizeof(m_QPAdjustmentDistThresholdMaxFrameThresholdIPB);
5945
5946 // Fill surface with Skip Threshold Table
5947 switch (params->wPictureCodingType)
5948 {
5949 case P_TYPE:
5950 eStatus = MOS_SecureMemcpy(
5951 data,
5952 brcConstantsurfaceEarlySkipTableSize,
5953 (void*)&SkipVal_P_Common[blockBasedSkipEn][transform_8x8_mode_flag][0],
5954 brcConstantsurfaceEarlySkipTableSize);
5955 if (eStatus != MOS_STATUS_SUCCESS)
5956 {
5957 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
5958 return eStatus;
5959 }
5960 break;
5961 case B_TYPE:
5962 eStatus = MOS_SecureMemcpy(
5963 data,
5964 brcConstantsurfaceEarlySkipTableSize,
5965 (void*)&SkipVal_B_Common[blockBasedSkipEn][transform_8x8_mode_flag][0],
5966 brcConstantsurfaceEarlySkipTableSize);
5967 if (eStatus != MOS_STATUS_SUCCESS)
5968 {
5969 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
5970 return eStatus;
5971 }
5972 break;
5973 default:
5974 // do nothing for I TYPE
5975 break;
5976 }
5977
5978 if ((params->wPictureCodingType != I_TYPE) && (params->pAvcQCParams != nullptr) && (params->pAvcQCParams->NonFTQSkipThresholdLUTInput))
5979 {
5980 for (uint8_t qp = 0; qp < CODEC_AVC_NUM_QP; qp++)
5981 {
5982 *(data + 1 + (qp * 2)) = (uint8_t)CalcSkipVal((params->dwMbEncBlockBasedSkipEn ? true : false),
5983 (params->pPicParams->transform_8x8_mode_flag ? true : false),
5984 params->pAvcQCParams->NonFTQSkipThresholdLUT[qp]);
5985 }
5986 }
5987
5988 data += brcConstantsurfaceEarlySkipTableSize;
5989
5990 // Fill surface with QP list
5991
5992 // Initialize to -1 (0xff)
5993 MOS_FillMemory(data, brcConstantsurfaceQpList0, 0xff);
5994 MOS_FillMemory(data
5995 + brcConstantsurfaceQpList0
5996 + brcConstantsurfaceQpList0Reserved,
5997 brcConstantsurfaceQpList1, 0xff);
5998
5999 switch (params->wPictureCodingType)
6000 {
6001 case B_TYPE:
6002 data += (brcConstantsurfaceQpList0 + brcConstantsurfaceQpList0Reserved);
6003
6004 for (uint8_t refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l1_active_minus1; refIdx++)
6005 {
6006 CODEC_PICTURE refPic = params->pAvcSlcParams->RefPicList[LIST_1][refIdx];
6007 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
6008 {
6009 *(data + refIdx) = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
6010 }
6011 }
6012 data -= (brcConstantsurfaceQpList0 + brcConstantsurfaceQpList0Reserved);
6013 // break statement omitted intentionally
6014 case P_TYPE:
6015 for (uint8_t refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l0_active_minus1; refIdx++)
6016 {
6017 CODEC_PICTURE refPic = params->pAvcSlcParams->RefPicList[LIST_0][refIdx];
6018 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
6019 {
6020 *(data + refIdx) = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
6021 }
6022 }
6023 break;
6024 default:
6025 // do nothing for I type
6026 break;
6027 }
6028
6029 data += (brcConstantsurfaceQpList0 + brcConstantsurfaceQpList0Reserved
6030 + brcConstantsurfaceQpList1 + brcConstantsurfaceQpList1Reserved);
6031
6032 // Fill surface with Mode cost and MV cost
6033 eStatus = MOS_SecureMemcpy(
6034 data,
6035 brcConstantsurfaceModeMvCostSize,
6036 (void*)ModeMvCost_Cm[tableIdx],
6037 brcConstantsurfaceModeMvCostSize);
6038 if (eStatus != MOS_STATUS_SUCCESS)
6039 {
6040 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6041 return eStatus;
6042 }
6043
6044 // If old mode cost is used the update the table
6045 if (params->wPictureCodingType == I_TYPE && params->bOldModeCostEnable)
6046 {
6047 auto dataTemp = (uint32_t *)data;
6048 for (uint8_t qp = 0; qp < CODEC_AVC_NUM_QP; qp++)
6049 {
6050 // Writing to DW0 in each sub-array of 16 DWs
6051 *dataTemp = (uint32_t)OldIntraModeCost_Cm_Common[qp];
6052 dataTemp += 16;
6053 }
6054 }
6055
6056 if (params->pAvcQCParams)
6057 {
6058 for (uint8_t qp = 0; qp < CODEC_AVC_NUM_QP; qp++)
6059 {
6060 if (params->pAvcQCParams->FTQSkipThresholdLUTInput)
6061 {
6062 *(data + (qp * 32) + 24) =
6063 *(data + (qp * 32) + 25) =
6064 *(data + (qp * 32) + 27) =
6065 *(data + (qp * 32) + 28) =
6066 *(data + (qp * 32) + 29) =
6067 *(data + (qp * 32) + 30) =
6068 *(data + (qp * 32) + 31) = params->pAvcQCParams->FTQSkipThresholdLUT[qp];
6069 }
6070 }
6071 }
6072
6073 data += brcConstantsurfaceModeMvCostSize;
6074
6075 // Fill surface with Refcost
6076 eStatus = MOS_SecureMemcpy(
6077 data,
6078 brcConstantsurfaceRefcostSize,
6079 (void*)&m_refCostMultiRefQp[tableIdx][0],
6080 brcConstantsurfaceRefcostSize);
6081 if (eStatus != MOS_STATUS_SUCCESS)
6082 {
6083 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6084 return eStatus;
6085 }
6086 data += brcConstantsurfaceRefcostSize;
6087
6088 //Fill surface with Intra cost scaling Factor
6089 if (params->bAdaptiveIntraScalingEnable)
6090 {
6091 eStatus = MOS_SecureMemcpy(
6092 data,
6093 brcConstantsurfaceIntracostScalingFactor,
6094 (void*)&AdaptiveIntraScalingFactor_Cm_Common[0],
6095 brcConstantsurfaceIntracostScalingFactor);
6096 if (eStatus != MOS_STATUS_SUCCESS)
6097 {
6098 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6099 return eStatus;
6100 }
6101 }
6102 else
6103 {
6104 eStatus = MOS_SecureMemcpy(
6105 data,
6106 brcConstantsurfaceIntracostScalingFactor,
6107 (void*)&IntraScalingFactor_Cm_Common[0],
6108 brcConstantsurfaceIntracostScalingFactor);
6109 if (eStatus != MOS_STATUS_SUCCESS)
6110 {
6111 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6112 return eStatus;
6113 }
6114 }
6115
6116 data += brcConstantsurfaceIntracostScalingFactor;
6117
6118 eStatus = MOS_SecureMemcpy(
6119 data,
6120 brcConstantsurfaceLambdaSize,
6121 (void*)&m_LambdaData[0],
6122 brcConstantsurfaceLambdaSize);
6123 if (eStatus != MOS_STATUS_SUCCESS)
6124 {
6125 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6126 return eStatus;
6127 }
6128
6129 data += brcConstantsurfaceLambdaSize;
6130
6131 eStatus = MOS_SecureMemcpy(
6132 data,
6133 brcConstantsurfaceFtq25Size,
6134 (void*)&m_FTQ25[0],
6135 brcConstantsurfaceFtq25Size);
6136 if (eStatus != MOS_STATUS_SUCCESS)
6137 {
6138 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6139 return eStatus;
6140 }
6141
6142 params->pOsInterface->pfnUnlockResource(
6143 params->pOsInterface,
6144 ¶ms->sBrcConstantDataBuffer.OsResource);
6145
6146 return eStatus;
6147 }
6148
6149 //------------------------------------------------------------------------------
6150 //| Purpose: Setup Curbe for AVC MbEnc Kernels
6151 //| Return: N/A
6152 //------------------------------------------------------------------------------
SetCurbeAvcMbEnc(PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS params)6153 MOS_STATUS CodechalEncodeAvcEncG11::SetCurbeAvcMbEnc(PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS params)
6154 {
6155 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6156
6157 CODECHAL_ENCODE_FUNCTION_ENTER;
6158
6159 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6160 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
6161 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
6162 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSlcParams);
6163
6164 auto picParams = params->pPicParams;
6165 auto seqParams = params->pSeqParams;
6166 auto slcParams = params->pSlcParams;
6167
6168 MHW_VDBOX_AVC_SLICE_STATE sliceState;
6169 MOS_ZeroMemory(&sliceState, sizeof(sliceState));
6170 sliceState.pEncodeAvcSeqParams = seqParams;
6171 sliceState.pEncodeAvcPicParams = picParams;
6172 sliceState.pEncodeAvcSliceParams = slcParams;
6173
6174 CODECHAL_ENCODE_ASSERT(seqParams->TargetUsage < NUM_TARGET_USAGE_MODES);
6175
6176 uint8_t meMethod =
6177 (m_pictureCodingType == B_TYPE) ? m_bMeMethodGeneric[seqParams->TargetUsage] : m_meMethodGeneric[seqParams->TargetUsage];
6178 // set sliceQP to MAX_SLICE_QP for MbEnc kernel, we can use it to verify whether QP is changed or not
6179 uint8_t sliceQP = (params->bUseMbEncAdvKernel && params->bBrcEnabled) ? CODECHAL_ENCODE_AVC_MAX_SLICE_QP : picParams->pic_init_qp_minus26 + 26 + slcParams->slice_qp_delta;
6180 bool framePicture = CodecHal_PictureIsFrame(picParams->CurrOriginalPic);
6181 bool topField = CodecHal_PictureIsTopField(picParams->CurrOriginalPic);
6182 bool bottomField = CodecHal_PictureIsBottomField(picParams->CurrOriginalPic);
6183
6184 MbencCurbe::MBEncCurbeInitType curbeInitType;
6185 if (params->bMbEncIFrameDistEnabled)
6186 {
6187 curbeInitType = MbencCurbe::IDist;
6188 }
6189 else
6190 {
6191 switch (m_pictureCodingType)
6192 {
6193 case I_TYPE:
6194 if (framePicture)
6195 curbeInitType = MbencCurbe::IFrame;
6196 else
6197 curbeInitType = MbencCurbe::IField;
6198 break;
6199
6200 case P_TYPE:
6201 if (framePicture)
6202 curbeInitType = MbencCurbe::PFrame;
6203 else
6204 curbeInitType = MbencCurbe::PField;
6205 break;
6206 case B_TYPE:
6207 if (framePicture)
6208 curbeInitType = MbencCurbe::BFrame;
6209 else
6210 curbeInitType = MbencCurbe::BField;
6211 break;
6212 default:
6213 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture coding type.");
6214 eStatus = MOS_STATUS_UNKNOWN;
6215 return eStatus;
6216 }
6217 }
6218
6219 MbencCurbe cmd(curbeInitType);
6220 // r1
6221 cmd.m_dw0.AdaptiveEn =
6222 cmd.m_dw37.AdaptiveEn = EnableAdaptiveSearch[seqParams->TargetUsage];
6223 cmd.m_dw0.T8x8FlagForInterEn =
6224 cmd.m_dw37.T8x8FlagForInterEn = picParams->transform_8x8_mode_flag;
6225 cmd.m_dw2.LenSP = MaxLenSP[seqParams->TargetUsage];
6226
6227 cmd.m_dw1.ExtendedMvCostRange = bExtendedMvCostRange;
6228 cmd.m_dw36.MBInputEnable = bMbSpecificDataEnabled;
6229 cmd.m_dw38.LenSP = 0; // MBZ
6230 cmd.m_dw3.SrcAccess =
6231 cmd.m_dw3.RefAccess = framePicture ? 0 : 1;
6232 if (m_pictureCodingType != I_TYPE && bFTQEnable)
6233 {
6234 if (m_pictureCodingType == P_TYPE)
6235 {
6236 cmd.m_dw3.FTEnable = FTQBasedSkip[seqParams->TargetUsage] & 0x01;
6237 }
6238 else // B_TYPE
6239 {
6240 cmd.m_dw3.FTEnable = (FTQBasedSkip[seqParams->TargetUsage] >> 1) & 0x01;
6241 }
6242 }
6243 else
6244 {
6245 cmd.m_dw3.FTEnable = 0;
6246 }
6247 if (picParams->UserFlags.bDisableSubMBPartition)
6248 {
6249 cmd.m_dw3.SubMbPartMask = CODECHAL_ENCODE_AVC_DISABLE_4X4_SUB_MB_PARTITION | CODECHAL_ENCODE_AVC_DISABLE_4X8_SUB_MB_PARTITION | CODECHAL_ENCODE_AVC_DISABLE_8X4_SUB_MB_PARTITION;
6250 }
6251 cmd.m_dw2.PicWidth = params->wPicWidthInMb;
6252 cmd.m_dw4.PicHeightMinus1 = params->wFieldFrameHeightInMb - 1;
6253 cmd.m_dw4.FieldParityFlag = cmd.m_dw7.SrcFieldPolarity = bottomField ? 1 : 0;
6254 cmd.m_dw4.EnableFBRBypass = bFBRBypassEnable;
6255 cmd.m_dw4.EnableIntraCostScalingForStaticFrame = params->bStaticFrameDetectionEnabled;
6256 cmd.m_dw4.bCurFldIDR = framePicture ? 0 : (picParams->bIdrPic || m_firstFieldIdrPic);
6257 cmd.m_dw4.ConstrainedIntraPredFlag = picParams->constrained_intra_pred_flag;
6258 cmd.m_dw4.HMEEnable = m_hmeEnabled;
6259 cmd.m_dw4.PictureType = m_pictureCodingType - 1;
6260 cmd.m_dw4.UseActualRefQPValue = m_hmeEnabled ? (m_MRDisableQPCheck[seqParams->TargetUsage] == 0) : false;
6261 cmd.m_dw5.SliceMbHeight = params->usSliceHeight;
6262 cmd.m_dw7.IntraPartMask = picParams->transform_8x8_mode_flag ? 0 : 0x2; // Disable 8x8 if flag is not set
6263
6264 // r2
6265 if (params->bMbEncIFrameDistEnabled)
6266 {
6267 cmd.m_dw6.BatchBufferEnd = 0;
6268 }
6269 else
6270 {
6271 uint8_t ucTableIdx = m_pictureCodingType - 1;
6272 eStatus = MOS_SecureMemcpy(&(cmd.m_modeMvCost), 8 * sizeof(uint32_t), ModeMvCost_Cm[ucTableIdx][sliceQP], 8 * sizeof(uint32_t));
6273 if (eStatus != MOS_STATUS_SUCCESS)
6274 {
6275 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6276 return eStatus;
6277 }
6278
6279 if (m_pictureCodingType == I_TYPE && bOldModeCostEnable)
6280 {
6281 // Old intra mode cost needs to be used if bOldModeCostEnable is 1
6282 cmd.m_modeMvCost.DW8.Value = OldIntraModeCost_Cm_Common[sliceQP];
6283 }
6284 else if (m_skipBiasAdjustmentEnable)
6285 {
6286 // Load different MvCost for P picture when SkipBiasAdjustment is enabled
6287 // No need to check for P picture as the flag is only enabled for P picture
6288 cmd.m_modeMvCost.DW11.Value = MvCost_PSkipAdjustment_Cm_Common[sliceQP];
6289 }
6290 }
6291
6292 uint8_t tableIdx;
6293 // r3 & r4
6294 if (params->bMbEncIFrameDistEnabled)
6295 {
6296 cmd.m_spDelta.DW31.IntraComputeType = 1;
6297 }
6298 else
6299 {
6300 tableIdx = (m_pictureCodingType == B_TYPE) ? 1 : 0;
6301 eStatus = MOS_SecureMemcpy(&(cmd.m_spDelta), 16 * sizeof(uint32_t), m_encodeSearchPath[tableIdx][meMethod], 16 * sizeof(uint32_t));
6302 if (eStatus != MOS_STATUS_SUCCESS)
6303 {
6304 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6305 return eStatus;
6306 }
6307 }
6308
6309 // r5
6310 if (m_pictureCodingType == P_TYPE)
6311 {
6312 cmd.m_dw32.SkipVal = SkipVal_P_Common
6313 [cmd.m_dw3.BlockBasedSkipEnable]
6314 [picParams->transform_8x8_mode_flag]
6315 [sliceQP];
6316 }
6317 else if (m_pictureCodingType == B_TYPE)
6318 {
6319 cmd.m_dw32.SkipVal = SkipVal_B_Common
6320 [cmd.m_dw3.BlockBasedSkipEnable]
6321 [picParams->transform_8x8_mode_flag]
6322 [sliceQP];
6323 }
6324
6325 cmd.m_modeMvCost.DW13.QpPrimeY = sliceQP;
6326 // QpPrimeCb and QpPrimeCr are not used by Kernel. Following settings are for CModel matching.
6327 cmd.m_modeMvCost.DW13.QpPrimeCb = sliceQP;
6328 cmd.m_modeMvCost.DW13.QpPrimeCr = sliceQP;
6329 cmd.m_modeMvCost.DW13.TargetSizeInWord = 0xff; // hardcoded for BRC disabled
6330
6331 if (bMultiPredEnable && (m_pictureCodingType != I_TYPE))
6332 {
6333 // Based on "MultiPred to Kernel Mapping" in kernel
6334 switch (m_multiPred[seqParams->TargetUsage])
6335 {
6336 case 0: // Disable multipred for both P & B picture types
6337 cmd.m_dw32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6338 cmd.m_dw32.MultiPredL1Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6339 break;
6340
6341 case 1: // Enable multipred for P pictures only
6342 cmd.m_dw32.MultiPredL0Disable = (m_pictureCodingType == P_TYPE) ? CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6343 cmd.m_dw32.MultiPredL1Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6344 break;
6345
6346 case 2: // Enable multipred for B pictures only
6347 cmd.m_dw32.MultiPredL0Disable = (m_pictureCodingType == B_TYPE) ? CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6348 cmd.m_dw32.MultiPredL1Disable = (m_pictureCodingType == B_TYPE) ? CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6349 break;
6350
6351 case 3: // Enable multipred for both P & B picture types
6352 cmd.m_dw32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE;
6353 cmd.m_dw32.MultiPredL1Disable = (m_pictureCodingType == B_TYPE) ? CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6354 break;
6355 }
6356 }
6357 else
6358 {
6359 cmd.m_dw32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6360 cmd.m_dw32.MultiPredL1Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6361 }
6362
6363 if (!framePicture)
6364 {
6365 if (m_pictureCodingType != I_TYPE)
6366 {
6367 cmd.m_dw34.List0RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_0);
6368 cmd.m_dw34.List0RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_1);
6369 cmd.m_dw34.List0RefID2FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_2);
6370 cmd.m_dw34.List0RefID3FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_3);
6371 cmd.m_dw34.List0RefID4FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_4);
6372 cmd.m_dw34.List0RefID5FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_5);
6373 cmd.m_dw34.List0RefID6FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_6);
6374 cmd.m_dw34.List0RefID7FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_7);
6375 }
6376 if (m_pictureCodingType == B_TYPE)
6377 {
6378 cmd.m_dw34.List1RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_0);
6379 cmd.m_dw34.List1RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_1);
6380 }
6381 }
6382
6383 if (m_adaptiveTransformDecisionEnabled)
6384 {
6385 if (m_pictureCodingType != I_TYPE)
6386 {
6387 cmd.m_dw34.EnableAdaptiveTxDecision = true;
6388 }
6389 cmd.m_dw60.TxDecisonThreshold = adaptiveTxDecisionThreshold;
6390 }
6391
6392 if (m_adaptiveTransformDecisionEnabled || m_flatnessCheckEnabled)
6393 {
6394 cmd.m_dw60.MBTextureThreshold = mbTextureThreshold;
6395 }
6396
6397 if (m_pictureCodingType == B_TYPE)
6398 {
6399 cmd.m_dw34.List1RefID0FrameFieldFlag = GetRefPicFieldFlag(params, LIST_1, CODECHAL_ENCODE_REF_ID_0);
6400 cmd.m_dw34.List1RefID1FrameFieldFlag = GetRefPicFieldFlag(params, LIST_1, CODECHAL_ENCODE_REF_ID_1);
6401 cmd.m_dw34.bDirectMode = slcParams->direct_spatial_mv_pred_flag;
6402 }
6403
6404 cmd.m_dw34.EnablePerMBStaticCheck = params->bStaticFrameDetectionEnabled;
6405 cmd.m_dw34.EnableAdaptiveSearchWindowSize = params->bApdatvieSearchWindowSizeEnabled;
6406 cmd.m_dw34.RemoveIntraRefreshOverlap = picParams->bDisableRollingIntraRefreshOverlap;
6407 cmd.m_dw34.bOriginalBff = framePicture ? 0 : ((m_firstField && (bottomField)) || (!m_firstField && (!bottomField)));
6408 cmd.m_dw34.EnableMBFlatnessChkOptimization = m_flatnessCheckEnabled;
6409 cmd.m_dw34.ROIEnableFlag = params->bRoiEnabled;
6410 cmd.m_dw34.MADEnableFlag = m_madEnabled;
6411 cmd.m_dw34.MBBrcEnable = bMbBrcEnabled || bMbQpDataEnabled;
6412 cmd.m_dw34.ArbitraryNumMbsPerSlice = m_arbitraryNumMbsInSlice;
6413 cmd.m_dw34.TQEnable = m_trellisQuantParams.dwTqEnabled; //Enabled for KBL
6414 cmd.m_dw34.ForceNonSkipMbEnable = params->bMbDisableSkipMapEnabled;
6415 if (params->pAvcQCParams && !cmd.m_dw34.ForceNonSkipMbEnable) // ignore DisableEncSkipCheck if Mb Disable Skip Map is available
6416 {
6417 cmd.m_dw34.DisableEncSkipCheck = params->pAvcQCParams->skipCheckDisable;
6418 }
6419 cmd.m_dw34.CQPFlag = !bBrcEnabled; // 1 - Rate Control is CQP, 0 - Rate Control is BRC
6420 cmd.m_dw36.CheckAllFractionalEnable = bCAFEnable;
6421 cmd.m_dw38.RefThreshold = refThreshold;
6422 cmd.m_dw39.HMERefWindowsCombThreshold = (m_pictureCodingType == B_TYPE) ? HMEBCombineLen[seqParams->TargetUsage] : HMECombineLen[seqParams->TargetUsage];
6423
6424 // Default:2 used for MBBRC (MB QP Surface width and height are 4x downscaled picture in MB unit * 4 bytes)
6425 // 0 used for MBQP data surface (MB QP Surface width and height are same as the input picture size in MB unit * 1bytes)
6426 // BRC use split kernel, MB QP surface is same size as input picture
6427 cmd.m_dw47.MbQpReadFactor = (bMbBrcEnabled || bMbQpDataEnabled) ? 0 : 2;
6428
6429 // Those fields are not really used for I_dist kernel,
6430 // but set them to 0 to get bit-exact match with kernel
6431 if (params->bMbEncIFrameDistEnabled)
6432 {
6433 cmd.m_modeMvCost.DW13.QpPrimeY = 0;
6434 cmd.m_modeMvCost.DW13.QpPrimeCb = 0;
6435 cmd.m_modeMvCost.DW13.QpPrimeCr = 0;
6436 cmd.m_dw33.Intra16x16NonDCPredPenalty = 0;
6437 cmd.m_dw33.Intra4x4NonDCPredPenalty = 0;
6438 cmd.m_dw33.Intra8x8NonDCPredPenalty = 0;
6439 }
6440
6441 //r6
6442 if (cmd.m_dw4.UseActualRefQPValue)
6443 {
6444 cmd.m_dw44.ActualQPValueForRefID0List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_0);
6445 cmd.m_dw44.ActualQPValueForRefID1List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_1);
6446 cmd.m_dw44.ActualQPValueForRefID2List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_2);
6447 cmd.m_dw44.ActualQPValueForRefID3List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_3);
6448 cmd.m_dw45.ActualQPValueForRefID4List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_4);
6449 cmd.m_dw45.ActualQPValueForRefID5List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_5);
6450 cmd.m_dw45.ActualQPValueForRefID6List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_6);
6451 cmd.m_dw45.ActualQPValueForRefID7List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_7);
6452 cmd.m_dw46.ActualQPValueForRefID0List1 = AVCGetQPValueFromRefList(params, LIST_1, CODECHAL_ENCODE_REF_ID_0);
6453 cmd.m_dw46.ActualQPValueForRefID1List1 = AVCGetQPValueFromRefList(params, LIST_1, CODECHAL_ENCODE_REF_ID_1);
6454 }
6455
6456 tableIdx = m_pictureCodingType - 1;
6457 cmd.m_dw46.RefCost = m_refCostMultiRefQp[tableIdx][sliceQP];
6458
6459 // Picture Coding Type dependent parameters
6460 if (m_pictureCodingType == I_TYPE)
6461 {
6462 cmd.m_dw0.SkipModeEn = 0;
6463 cmd.m_dw37.SkipModeEn = 0;
6464 cmd.m_dw36.HMECombineOverlap = 0;
6465 cmd.m_dw47.IntraCostSF = 16; // This is not used but recommended to set this to 16 by Kernel team
6466 cmd.m_dw34.EnableDirectBiasAdjustment = 0;
6467 }
6468 else if (m_pictureCodingType == P_TYPE)
6469 {
6470 cmd.m_dw1.MaxNumMVs = GetMaxMvsPer2Mb(seqParams->Level) / 2;
6471 cmd.m_dw3.BMEDisableFBR = 1;
6472 cmd.m_dw5.RefWidth = SearchX[seqParams->TargetUsage];
6473 cmd.m_dw5.RefHeight = SearchY[seqParams->TargetUsage];
6474 cmd.m_dw7.NonSkipZMvAdded = 1;
6475 cmd.m_dw7.NonSkipModeAdded = 1;
6476 cmd.m_dw7.SkipCenterMask = 1;
6477 cmd.m_dw47.IntraCostSF =
6478 bAdaptiveIntraScalingEnable ? AdaptiveIntraScalingFactor_Cm_Common[sliceQP] : IntraScalingFactor_Cm_Common[sliceQP];
6479 cmd.m_dw47.MaxVmvR = (framePicture) ? CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) * 4 : (CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) >> 1) * 4;
6480 cmd.m_dw36.HMECombineOverlap = 1;
6481 cmd.m_dw36.NumRefIdxL0MinusOne = bMultiPredEnable ? slcParams->num_ref_idx_l0_active_minus1 : 0;
6482 cmd.m_dw39.RefWidth = SearchX[seqParams->TargetUsage];
6483 cmd.m_dw39.RefHeight = SearchY[seqParams->TargetUsage];
6484 cmd.m_dw34.EnableDirectBiasAdjustment = 0;
6485 if (params->pAvcQCParams)
6486 {
6487 cmd.m_dw34.EnableGlobalMotionBiasAdjustment = params->pAvcQCParams->globalMotionBiasAdjustmentEnable;
6488 }
6489 }
6490 else
6491 {
6492 // B_TYPE
6493 cmd.m_dw1.MaxNumMVs = GetMaxMvsPer2Mb(seqParams->Level) / 2;
6494 cmd.m_dw1.BiWeight = m_biWeight;
6495 cmd.m_dw3.SearchCtrl = 7;
6496 cmd.m_dw3.SkipType = 1;
6497 cmd.m_dw5.RefWidth = BSearchX[seqParams->TargetUsage];
6498 cmd.m_dw5.RefHeight = BSearchY[seqParams->TargetUsage];
6499 cmd.m_dw7.SkipCenterMask = 0xFF;
6500 cmd.m_dw47.IntraCostSF =
6501 bAdaptiveIntraScalingEnable ? AdaptiveIntraScalingFactor_Cm_Common[sliceQP] : IntraScalingFactor_Cm_Common[sliceQP];
6502 cmd.m_dw47.MaxVmvR = (framePicture) ? CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) * 4 : (CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) >> 1) * 4;
6503 cmd.m_dw36.HMECombineOverlap = 1;
6504 // Checking if the forward frame (List 1 index 0) is a short term reference
6505 {
6506 auto codecHalPic = params->pSlcParams->RefPicList[LIST_1][0];
6507 if (codecHalPic.PicFlags != PICTURE_INVALID &&
6508 codecHalPic.FrameIdx != CODECHAL_ENCODE_AVC_INVALID_PIC_ID &&
6509 params->pPicIdx[codecHalPic.FrameIdx].bValid)
6510 {
6511 // Although its name is FWD, it actually means the future frame or the backward reference frame
6512 cmd.m_dw36.IsFwdFrameShortTermRef = CodecHal_PictureIsShortTermRef(params->pPicParams->RefFrameList[codecHalPic.FrameIdx]);
6513 }
6514 else
6515 {
6516 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid backward reference frame.");
6517 eStatus = MOS_STATUS_INVALID_PARAMETER;
6518 return eStatus;
6519 }
6520 }
6521 cmd.m_dw36.NumRefIdxL0MinusOne = bMultiPredEnable ? slcParams->num_ref_idx_l0_active_minus1 : 0;
6522 cmd.m_dw36.NumRefIdxL1MinusOne = bMultiPredEnable ? slcParams->num_ref_idx_l1_active_minus1 : 0;
6523 cmd.m_dw39.RefWidth = BSearchX[seqParams->TargetUsage];
6524 cmd.m_dw39.RefHeight = BSearchY[seqParams->TargetUsage];
6525 cmd.m_dw40.DistScaleFactorRefID0List0 = m_distScaleFactorList0[0];
6526 cmd.m_dw40.DistScaleFactorRefID1List0 = m_distScaleFactorList0[1];
6527 cmd.m_dw41.DistScaleFactorRefID2List0 = m_distScaleFactorList0[2];
6528 cmd.m_dw41.DistScaleFactorRefID3List0 = m_distScaleFactorList0[3];
6529 cmd.m_dw42.DistScaleFactorRefID4List0 = m_distScaleFactorList0[4];
6530 cmd.m_dw42.DistScaleFactorRefID5List0 = m_distScaleFactorList0[5];
6531 cmd.m_dw43.DistScaleFactorRefID6List0 = m_distScaleFactorList0[6];
6532 cmd.m_dw43.DistScaleFactorRefID7List0 = m_distScaleFactorList0[7];
6533 if (params->pAvcQCParams)
6534 {
6535 cmd.m_dw34.EnableDirectBiasAdjustment = params->pAvcQCParams->directBiasAdjustmentEnable;
6536 if (cmd.m_dw34.EnableDirectBiasAdjustment)
6537 {
6538 cmd.m_dw7.NonSkipModeAdded = 1;
6539 cmd.m_dw7.NonSkipZMvAdded = 1;
6540 }
6541
6542 cmd.m_dw34.EnableGlobalMotionBiasAdjustment = params->pAvcQCParams->globalMotionBiasAdjustmentEnable;
6543 }
6544 }
6545
6546 *params->pdwBlockBasedSkipEn = cmd.m_dw3.BlockBasedSkipEnable;
6547
6548 if (picParams->EnableRollingIntraRefresh)
6549 {
6550 cmd.m_dw34.IntraRefreshEn = picParams->EnableRollingIntraRefresh;
6551
6552 /* Multiple predictor should be completely disabled for the RollingI feature. This does not lead to much quality drop for P frames especially for TU as 1 */
6553 cmd.m_dw32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
6554
6555 /* Pass the same IntraRefreshUnit to the kernel w/o the adjustment by -1, so as to have an overlap of one MB row or column of Intra macroblocks
6556 across one P frame to another P frame, as needed by the RollingI algo */
6557 if (ROLLING_I_SQUARE == picParams->EnableRollingIntraRefresh && RATECONTROL_CQP != seqParams->RateControlMethod)
6558 {
6559 /*BRC update kernel updates these CURBE to MBEnc*/
6560 cmd.m_dw4.EnableIntraRefresh = false;
6561 cmd.m_dw34.IntraRefreshEn = ROLLING_I_DISABLED;
6562 cmd.m_dw48.IntraRefreshMBx = 0; /* MB column number */
6563 cmd.m_dw61.IntraRefreshMBy = 0; /* MB row number */
6564 }
6565 else
6566 {
6567 cmd.m_dw4.EnableIntraRefresh = true;
6568 cmd.m_dw34.IntraRefreshEn = picParams->EnableRollingIntraRefresh;
6569 cmd.m_dw48.IntraRefreshMBx = picParams->IntraRefreshMBx; /* MB column number */
6570 cmd.m_dw61.IntraRefreshMBy = picParams->IntraRefreshMBy; /* MB row number */
6571 }
6572 cmd.m_dw48.IntraRefreshUnitInMBMinus1 = picParams->IntraRefreshUnitinMB;
6573 cmd.m_dw48.IntraRefreshQPDelta = picParams->IntraRefreshQPDelta;
6574 }
6575 else
6576 {
6577 cmd.m_dw34.IntraRefreshEn = 0;
6578 }
6579
6580 if (params->bRoiEnabled)
6581 {
6582 cmd.m_dw49.ROI1_X_left = picParams->ROI[0].Left;
6583 cmd.m_dw49.ROI1_Y_top = picParams->ROI[0].Top;
6584 cmd.m_dw50.ROI1_X_right = picParams->ROI[0].Right;
6585 cmd.m_dw50.ROI1_Y_bottom = picParams->ROI[0].Bottom;
6586
6587 cmd.m_dw51.ROI2_X_left = picParams->ROI[1].Left;
6588 cmd.m_dw51.ROI2_Y_top = picParams->ROI[1].Top;
6589 cmd.m_dw52.ROI2_X_right = picParams->ROI[1].Right;
6590 cmd.m_dw52.ROI2_Y_bottom = picParams->ROI[1].Bottom;
6591
6592 cmd.m_dw53.ROI3_X_left = picParams->ROI[2].Left;
6593 cmd.m_dw53.ROI3_Y_top = picParams->ROI[2].Top;
6594 cmd.m_dw54.ROI3_X_right = picParams->ROI[2].Right;
6595 cmd.m_dw54.ROI3_Y_bottom = picParams->ROI[2].Bottom;
6596
6597 cmd.m_dw55.ROI4_X_left = picParams->ROI[3].Left;
6598 cmd.m_dw55.ROI4_Y_top = picParams->ROI[3].Top;
6599 cmd.m_dw56.ROI4_X_right = picParams->ROI[3].Right;
6600 cmd.m_dw56.ROI4_Y_bottom = picParams->ROI[3].Bottom;
6601
6602 if (bBrcEnabled == false)
6603 {
6604 uint16_t numROI = picParams->NumROI;
6605 char priorityLevelOrDQp[CODECHAL_ENCODE_AVC_MAX_ROI_NUMBER] = { 0 };
6606
6607 // cqp case
6608 for (unsigned int i = 0; i < numROI; i += 1)
6609 {
6610 char dQpRoi = picParams->ROI[i].PriorityLevelOrDQp;
6611
6612 // clip qp roi in order to have (qp + qpY) in range [0, 51]
6613 priorityLevelOrDQp[i] = (int8_t)CodecHal_Clip3(-sliceQP, CODECHAL_ENCODE_AVC_MAX_SLICE_QP - sliceQP, dQpRoi);
6614 }
6615
6616 cmd.m_dw57.ROI1_dQpPrimeY = priorityLevelOrDQp[0];
6617 cmd.m_dw57.ROI2_dQpPrimeY = priorityLevelOrDQp[1];
6618 cmd.m_dw57.ROI3_dQpPrimeY = priorityLevelOrDQp[2];
6619 cmd.m_dw57.ROI4_dQpPrimeY = priorityLevelOrDQp[3];
6620 }
6621 else
6622 {
6623 // kernel does not support BRC case
6624 cmd.m_dw34.ROIEnableFlag = 0;
6625 }
6626 }
6627 else if (params->bDirtyRoiEnabled)
6628 {
6629 // enable Dirty Rect flag
6630 cmd.m_dw4.EnableDirtyRect = true;
6631
6632 cmd.m_dw49.ROI1_X_left = params->pPicParams->DirtyROI[0].Left;
6633 cmd.m_dw49.ROI1_Y_top = params->pPicParams->DirtyROI[0].Top;
6634 cmd.m_dw50.ROI1_X_right = params->pPicParams->DirtyROI[0].Right;
6635 cmd.m_dw50.ROI1_Y_bottom = params->pPicParams->DirtyROI[0].Bottom;
6636
6637 cmd.m_dw51.ROI2_X_left = params->pPicParams->DirtyROI[1].Left;
6638 cmd.m_dw51.ROI2_Y_top = params->pPicParams->DirtyROI[1].Top;
6639 cmd.m_dw52.ROI2_X_right = params->pPicParams->DirtyROI[1].Right;
6640 cmd.m_dw52.ROI2_Y_bottom = params->pPicParams->DirtyROI[1].Bottom;
6641
6642 cmd.m_dw53.ROI3_X_left = params->pPicParams->DirtyROI[2].Left;
6643 cmd.m_dw53.ROI3_Y_top = params->pPicParams->DirtyROI[2].Top;
6644 cmd.m_dw54.ROI3_X_right = params->pPicParams->DirtyROI[2].Right;
6645 cmd.m_dw54.ROI3_Y_bottom = params->pPicParams->DirtyROI[2].Bottom;
6646
6647 cmd.m_dw55.ROI4_X_left = params->pPicParams->DirtyROI[3].Left;
6648 cmd.m_dw55.ROI4_Y_top = params->pPicParams->DirtyROI[3].Top;
6649 cmd.m_dw56.ROI4_X_right = params->pPicParams->DirtyROI[3].Right;
6650 cmd.m_dw56.ROI4_Y_bottom = params->pPicParams->DirtyROI[3].Bottom;
6651 }
6652
6653 if (m_trellisQuantParams.dwTqEnabled)
6654 {
6655 // Lambda values for TQ
6656 if (m_pictureCodingType == I_TYPE)
6657 {
6658 cmd.m_dw58.Value = TQ_LAMBDA_I_FRAME[sliceQP][0];
6659 cmd.m_dw59.Value = TQ_LAMBDA_I_FRAME[sliceQP][1];
6660 }
6661 else if (m_pictureCodingType == P_TYPE)
6662 {
6663 cmd.m_dw58.Value = TQ_LAMBDA_P_FRAME[sliceQP][0];
6664 cmd.m_dw59.Value = TQ_LAMBDA_P_FRAME[sliceQP][1];
6665 }
6666 else
6667 {
6668 cmd.m_dw58.Value = TQ_LAMBDA_B_FRAME[sliceQP][0];
6669 cmd.m_dw59.Value = TQ_LAMBDA_B_FRAME[sliceQP][1];
6670 }
6671
6672 // check if Lambda is greater than max value
6673 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetInterRounding(&sliceState));
6674
6675 if (cmd.m_dw58.Lambda_8x8Inter > maxLambda)
6676 {
6677 cmd.m_dw58.Lambda_8x8Inter = 0xf000 + sliceState.dwRoundingValue;
6678 }
6679
6680 if (cmd.m_dw58.Lambda_8x8Intra > maxLambda)
6681 {
6682 cmd.m_dw58.Lambda_8x8Intra = 0xf000 + defaultTrellisQuantIntraRounding;
6683 }
6684
6685 // check if Lambda is greater than max value
6686 if (cmd.m_dw59.Lambda_Inter > maxLambda)
6687 {
6688 cmd.m_dw59.Lambda_Inter = 0xf000 + sliceState.dwRoundingValue;
6689 }
6690
6691 if (cmd.m_dw59.Lambda_Intra > maxLambda)
6692 {
6693 cmd.m_dw59.Lambda_Intra = 0xf000 + defaultTrellisQuantIntraRounding;
6694 }
6695 }
6696
6697 //IPCM QP and threshold
6698 cmd.m_dw62.IPCM_QP0 = m_IPCMThresholdTable[0].QP;
6699 cmd.m_dw62.IPCM_QP1 = m_IPCMThresholdTable[1].QP;
6700 cmd.m_dw62.IPCM_QP2 = m_IPCMThresholdTable[2].QP;
6701 cmd.m_dw62.IPCM_QP3 = m_IPCMThresholdTable[3].QP;
6702 cmd.m_dw63.IPCM_QP4 = m_IPCMThresholdTable[4].QP;
6703
6704 cmd.m_dw63.IPCM_Thresh0 = m_IPCMThresholdTable[0].Threshold;
6705 cmd.m_dw64.IPCM_Thresh1 = m_IPCMThresholdTable[1].Threshold;
6706 cmd.m_dw64.IPCM_Thresh2 = m_IPCMThresholdTable[2].Threshold;
6707 cmd.m_dw65.IPCM_Thresh3 = m_IPCMThresholdTable[3].Threshold;
6708 cmd.m_dw65.IPCM_Thresh4 = m_IPCMThresholdTable[4].Threshold;
6709
6710 cmd.m_dw66.MBDataSurfIndex = mbencMfcAvcPakObj;
6711 cmd.m_dw67.MVDataSurfIndex = mbencIndMvData;
6712 cmd.m_dw68.IDistSurfIndex = mbencBrcDistortion;
6713 cmd.m_dw69.SrcYSurfIndex = mbencCurrY;
6714 cmd.m_dw70.MBSpecificDataSurfIndex = mbencMbSpecificData;
6715 cmd.m_dw71.AuxVmeOutSurfIndex = mbencAuxVmeOut;
6716 cmd.m_dw72.CurrRefPicSelSurfIndex = mbencRefpicselectL0;
6717 cmd.m_dw73.HMEMVPredFwdBwdSurfIndex = mbencMvDataFromMe;
6718 cmd.m_dw74.HMEDistSurfIndex = mbenc4xMeDistortion;
6719 cmd.m_dw75.SliceMapSurfIndex = mbencSlicemapData;
6720 cmd.m_dw76.FwdFrmMBDataSurfIndex = mbencFwdMbData;
6721 cmd.m_dw77.FwdFrmMVSurfIndex = mbencFwdMvData;
6722 cmd.m_dw78.MBQPBuffer = mbencMbqp;
6723 cmd.m_dw79.MBBRCLut = mbencMbbrcConstData;
6724 cmd.m_dw80.VMEInterPredictionSurfIndex = mbencVmeInterPredCurrPicIdx0;
6725 cmd.m_dw81.VMEInterPredictionMRSurfIndex = mbencVmeInterPredCurrPicIdx1;
6726 cmd.m_dw82.MbStatsSurfIndex = mbencMbStats;
6727 cmd.m_dw83.MADSurfIndex = mbencMadData;
6728 cmd.m_dw84.BRCCurbeSurfIndex = mbencBrcCurbeData;
6729 cmd.m_dw85.ForceNonSkipMBmapSurface = mbencForceNonskipMbMap;
6730 cmd.m_dw86.ReservedIndex = mbEncAdv;
6731 cmd.m_dw87.StaticDetectionCostTableIndex = mbencSfdCostTable;
6732 cmd.m_dw88.SWScoreboardIndex = mbencSwScoreboard;
6733
6734 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
6735 &cmd,
6736 params->pKernelState->dwCurbeOffset,
6737 sizeof(cmd)));
6738
6739 CODECHAL_DEBUG_TOOL(
6740 CODECHAL_ENCODE_CHK_STATUS_RETURN(PopulateEncParam(
6741 meMethod,
6742 &cmd));
6743 )
6744
6745 return eStatus;
6746 }
6747
SetCurbeAvcBrcInitReset(PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS params)6748 MOS_STATUS CodechalEncodeAvcEncG11::SetCurbeAvcBrcInitReset(PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS params)
6749 {
6750 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6751
6752 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6753
6754 auto picParams = m_avcPicParam;
6755 auto seqParams = m_avcSeqParam;
6756 auto vuiParams = m_avcVuiParams;
6757 uint32_t profileLevelMaxFrame;
6758 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalAvcEncode_GetProfileLevelMaxFrameSize(
6759 seqParams,
6760 this,
6761 (uint32_t*)&profileLevelMaxFrame));
6762
6763 BrcInitResetCurbeG11 cmd;
6764 cmd.m_dw0.ProfileLevelMaxFrame = profileLevelMaxFrame;
6765 cmd.m_dw1.InitBufFullInBits = seqParams->InitVBVBufferFullnessInBit;
6766 cmd.m_dw2.BufSizeInBits = seqParams->VBVBufferSizeInBit;
6767 cmd.m_dw3.AverageBitRate = seqParams->TargetBitRate;
6768 cmd.m_dw4.MaxBitRate = seqParams->MaxBitRate;
6769 cmd.m_dw8.GopP =
6770 (seqParams->GopRefDist) ? ((seqParams->GopPicSize - 1) / seqParams->GopRefDist) : 0;
6771 cmd.m_dw9.GopB = seqParams->GopPicSize - 1 - cmd.m_dw8.GopP;
6772 cmd.m_dw9.FrameWidthInBytes = m_frameWidth;
6773 cmd.m_dw10.FrameHeightInBytes = m_frameHeight;
6774 cmd.m_dw12.NoSlices = m_numSlices;
6775
6776 cmd.m_dw32.SurfaceIndexhistorybuffer = CODECHAL_ENCODE_AVC_BRC_INIT_RESET_HISTORY;
6777 cmd.m_dw33.SurfaceIndexdistortionbuffer = CODECHAL_ENCODE_AVC_BRC_INIT_RESET_DISTORTION;
6778
6779 // if VUI present, VUI data has high priority
6780 if (seqParams->vui_parameters_present_flag && seqParams->RateControlMethod != RATECONTROL_AVBR)
6781 {
6782 cmd.m_dw4.MaxBitRate =
6783 ((vuiParams->bit_rate_value_minus1[0] + 1) << (6 + vuiParams->bit_rate_scale));
6784
6785 if (seqParams->RateControlMethod == RATECONTROL_CBR)
6786 {
6787 cmd.m_dw3.AverageBitRate = cmd.m_dw4.MaxBitRate;
6788 }
6789 }
6790
6791 cmd.m_dw6.FrameRateM = seqParams->FramesPer100Sec;
6792 cmd.m_dw7.FrameRateD = 100;
6793 cmd.m_dw8.BRCFlag = (CodecHal_PictureIsFrame(m_currOriginalPic)) ? 0 : CODECHAL_ENCODE_BRCINIT_FIELD_PIC;
6794 // MBBRC should be skipped when BRC ROI is on
6795 cmd.m_dw8.BRCFlag |= (bMbBrcEnabled && !bBrcRoiEnabled) ? 0 : CODECHAL_ENCODE_BRCINIT_DISABLE_MBBRC;
6796
6797 if (seqParams->RateControlMethod == RATECONTROL_CBR)
6798 {
6799 cmd.m_dw4.MaxBitRate = cmd.m_dw3.AverageBitRate;
6800 cmd.m_dw8.BRCFlag = cmd.m_dw8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISCBR;
6801 }
6802 else if (seqParams->RateControlMethod == RATECONTROL_VBR)
6803 {
6804 if (cmd.m_dw4.MaxBitRate < cmd.m_dw3.AverageBitRate)
6805 {
6806 cmd.m_dw3.AverageBitRate = cmd.m_dw4.MaxBitRate; // Use max bit rate for HRD compliance
6807 }
6808 cmd.m_dw8.BRCFlag = cmd.m_dw8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISVBR;
6809 }
6810 else if (seqParams->RateControlMethod == RATECONTROL_AVBR)
6811 {
6812 cmd.m_dw8.BRCFlag = cmd.m_dw8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISAVBR;
6813 // For AVBR, max bitrate = target bitrate,
6814 cmd.m_dw4.MaxBitRate = cmd.m_dw3.AverageBitRate;
6815 }
6816 else if (seqParams->RateControlMethod == RATECONTROL_ICQ)
6817 {
6818 cmd.m_dw8.BRCFlag = cmd.m_dw8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISICQ;
6819 cmd.m_dw23.ACQP = seqParams->ICQQualityFactor;
6820 }
6821 else if (seqParams->RateControlMethod == RATECONTROL_VCM)
6822 {
6823 cmd.m_dw8.BRCFlag = cmd.m_dw8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISVCM;
6824 }
6825 else if (seqParams->RateControlMethod == RATECONTROL_QVBR)
6826 {
6827 if (cmd.m_dw4.MaxBitRate < cmd.m_dw3.AverageBitRate)
6828 {
6829 cmd.m_dw3.AverageBitRate = cmd.m_dw4.MaxBitRate; // Use max bit rate for HRD compliance
6830 }
6831 cmd.m_dw8.BRCFlag = cmd.m_dw8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISQVBR;
6832 // use ICQQualityFactor to determine the larger Qp for each MB
6833 cmd.m_dw23.ACQP = seqParams->ICQQualityFactor;
6834 }
6835
6836 cmd.m_dw10.AVBRAccuracy = usAVBRAccuracy;
6837 cmd.m_dw11.AVBRConvergence = usAVBRConvergence;
6838
6839 // Set dynamic thresholds
6840 double inputBitsPerFrame =
6841 ((double)(cmd.m_dw4.MaxBitRate) * (double)(cmd.m_dw7.FrameRateD) /
6842 (double)(cmd.m_dw6.FrameRateM));
6843 if (CodecHal_PictureIsField(m_currOriginalPic))
6844 {
6845 inputBitsPerFrame *= 0.5;
6846 }
6847
6848 if (cmd.m_dw2.BufSizeInBits == 0)
6849 {
6850 cmd.m_dw2.BufSizeInBits = (uint32_t)inputBitsPerFrame * 4;
6851 }
6852
6853 if (cmd.m_dw1.InitBufFullInBits == 0)
6854 {
6855 cmd.m_dw1.InitBufFullInBits = 7 * cmd.m_dw2.BufSizeInBits / 8;
6856 }
6857 if (cmd.m_dw1.InitBufFullInBits < (uint32_t)(inputBitsPerFrame * 2))
6858 {
6859 cmd.m_dw1.InitBufFullInBits = (uint32_t)(inputBitsPerFrame * 2);
6860 }
6861 if (cmd.m_dw1.InitBufFullInBits > cmd.m_dw2.BufSizeInBits)
6862 {
6863 cmd.m_dw1.InitBufFullInBits = cmd.m_dw2.BufSizeInBits;
6864 }
6865
6866 if (seqParams->RateControlMethod == RATECONTROL_AVBR)
6867 {
6868 // For AVBR, Buffer size = 2*Bitrate, InitVBV = 0.75 * BufferSize
6869 cmd.m_dw2.BufSizeInBits = 2 * seqParams->TargetBitRate;
6870 cmd.m_dw1.InitBufFullInBits = (uint32_t)(0.75 * cmd.m_dw2.BufSizeInBits);
6871 }
6872
6873 double bpsRatio = inputBitsPerFrame / ((double)(cmd.m_dw2.BufSizeInBits) / 30);
6874 bpsRatio = (bpsRatio < 0.1) ? 0.1 : (bpsRatio > 3.5) ? 3.5 : bpsRatio;
6875
6876 cmd.m_dw16.DeviationThreshold0ForPandB = (uint32_t)(-50 * pow(0.90, bpsRatio));
6877 cmd.m_dw16.DeviationThreshold1ForPandB = (uint32_t)(-50 * pow(0.66, bpsRatio));
6878 cmd.m_dw16.DeviationThreshold2ForPandB = (uint32_t)(-50 * pow(0.46, bpsRatio));
6879 cmd.m_dw16.DeviationThreshold3ForPandB = (uint32_t)(-50 * pow(0.3, bpsRatio));
6880 cmd.m_dw17.DeviationThreshold4ForPandB = (uint32_t)(50 * pow(0.3, bpsRatio));
6881 cmd.m_dw17.DeviationThreshold5ForPandB = (uint32_t)(50 * pow(0.46, bpsRatio));
6882 cmd.m_dw17.DeviationThreshold6ForPandB = (uint32_t)(50 * pow(0.7, bpsRatio));
6883 cmd.m_dw17.DeviationThreshold7ForPandB = (uint32_t)(50 * pow(0.9, bpsRatio));
6884 cmd.m_dw18.DeviationThreshold0ForVBR = (uint32_t)(-50 * pow(0.9, bpsRatio));
6885 cmd.m_dw18.DeviationThreshold1ForVBR = (uint32_t)(-50 * pow(0.7, bpsRatio));
6886 cmd.m_dw18.DeviationThreshold2ForVBR = (uint32_t)(-50 * pow(0.5, bpsRatio));
6887 cmd.m_dw18.DeviationThreshold3ForVBR = (uint32_t)(-50 * pow(0.3, bpsRatio));
6888 cmd.m_dw19.DeviationThreshold4ForVBR = (uint32_t)(100 * pow(0.4, bpsRatio));
6889 cmd.m_dw19.DeviationThreshold5ForVBR = (uint32_t)(100 * pow(0.5, bpsRatio));
6890 cmd.m_dw19.DeviationThreshold6ForVBR = (uint32_t)(100 * pow(0.75, bpsRatio));
6891 cmd.m_dw19.DeviationThreshold7ForVBR = (uint32_t)(100 * pow(0.9, bpsRatio));
6892 cmd.m_dw20.DeviationThreshold0ForI = (uint32_t)(-50 * pow(0.8, bpsRatio));
6893 cmd.m_dw20.DeviationThreshold1ForI = (uint32_t)(-50 * pow(0.6, bpsRatio));
6894 cmd.m_dw20.DeviationThreshold2ForI = (uint32_t)(-50 * pow(0.34, bpsRatio));
6895 cmd.m_dw20.DeviationThreshold3ForI = (uint32_t)(-50 * pow(0.2, bpsRatio));
6896 cmd.m_dw21.DeviationThreshold4ForI = (uint32_t)(50 * pow(0.2, bpsRatio));
6897 cmd.m_dw21.DeviationThreshold5ForI = (uint32_t)(50 * pow(0.4, bpsRatio));
6898 cmd.m_dw21.DeviationThreshold6ForI = (uint32_t)(50 * pow(0.66, bpsRatio));
6899 cmd.m_dw21.DeviationThreshold7ForI = (uint32_t)(50 * pow(0.9, bpsRatio));
6900
6901 cmd.m_dw22.SlidingWindowSize = dwSlidingWindowSize;
6902
6903 if (bBrcInit)
6904 {
6905 *params->pdBrcInitCurrentTargetBufFullInBits = cmd.m_dw1.InitBufFullInBits;
6906 }
6907
6908 *params->pdwBrcInitResetBufSizeInBits = cmd.m_dw2.BufSizeInBits;
6909 *params->pdBrcInitResetInputBitsPerFrame = inputBitsPerFrame;
6910
6911 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
6912 &cmd,
6913 params->pKernelState->dwCurbeOffset,
6914 sizeof(cmd)));
6915
6916 CODECHAL_DEBUG_TOOL(
6917 CODECHAL_ENCODE_CHK_STATUS_RETURN(PopulateBrcInitParam(
6918 &cmd));
6919 )
6920
6921 return eStatus;
6922 }
6923
SetCurbeAvcFrameBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)6924 MOS_STATUS CodechalEncodeAvcEncG11::SetCurbeAvcFrameBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)
6925 {
6926 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6927
6928 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6929 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
6930
6931 auto seqParams = m_avcSeqParam;
6932 auto picParams = m_avcPicParam;
6933 auto slcParams = m_avcSliceParams;
6934
6935 MHW_VDBOX_AVC_SLICE_STATE sliceState;
6936 MOS_ZeroMemory(&sliceState, sizeof(sliceState));
6937 sliceState.pEncodeAvcSeqParams = seqParams;
6938 sliceState.pEncodeAvcPicParams = picParams;
6939 sliceState.pEncodeAvcSliceParams = slcParams;
6940
6941 FrameBrcUpdateCurbe cmd;
6942 cmd.m_dw5.TargetSizeFlag = 0;
6943 if (*params->pdBrcInitCurrentTargetBufFullInBits > (double)dwBrcInitResetBufSizeInBits)
6944 {
6945 *params->pdBrcInitCurrentTargetBufFullInBits -= (double)dwBrcInitResetBufSizeInBits;
6946 cmd.m_dw5.TargetSizeFlag = 1;
6947 }
6948
6949 // skipped frame handling
6950 if (params->dwNumSkipFrames)
6951 {
6952 // pass num/size of skipped frames to update BRC
6953 cmd.m_dw6.NumSkipFrames = params->dwNumSkipFrames;
6954 cmd.m_dw7.SizeSkipFrames = params->dwSizeSkipFrames;
6955
6956 // account for skipped frame in calculating CurrentTargetBufFullInBits
6957 *params->pdBrcInitCurrentTargetBufFullInBits += dBrcInitResetInputBitsPerFrame * params->dwNumSkipFrames;
6958 }
6959
6960 cmd.m_dw0.TargetSize = (uint32_t)(*params->pdBrcInitCurrentTargetBufFullInBits);
6961 cmd.m_dw1.FrameNumber = m_storeData - 1;
6962 cmd.m_dw2.SizeofPicHeaders = m_headerBytesInserted << 3; // kernel uses how many bits instead of bytes
6963 cmd.m_dw5.CurrFrameType =
6964 ((m_pictureCodingType - 2) < 0) ? 2 : (m_pictureCodingType - 2);
6965 cmd.m_dw5.BRCFlag =
6966 (CodecHal_PictureIsTopField(m_currOriginalPic)) ? brcUpdateIsField : ((CodecHal_PictureIsBottomField(m_currOriginalPic)) ? (brcUpdateIsField | brcUpdateIsBottomField) : 0);
6967 cmd.m_dw5.BRCFlag |= (m_refList[m_currReconstructedPic.FrameIdx]->bUsedAsRef) ? brcUpdateIsReference : 0;
6968
6969 if (bMultiRefQpEnabled)
6970 {
6971 cmd.m_dw5.BRCFlag |= brcUpdateIsActualQp;
6972 cmd.m_dw14.QPIndexOfCurPic = m_currOriginalPic.FrameIdx;
6973 }
6974
6975 cmd.m_dw5.BRCFlag |= seqParams->bAutoMaxPBFrameSizeForSceneChange ? brcUpdateAutoPbFrameSize : 0;
6976
6977 cmd.m_dw5.MaxNumPAKs = m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses();
6978
6979 cmd.m_dw6.MinimumQP = params->ucMinQP;
6980 cmd.m_dw6.MaximumQP = params->ucMaxQP;
6981 cmd.m_dw6.EnableForceToSkip = (bForceToSkipEnable && !m_avcPicParam->bDisableFrameSkip);
6982 cmd.m_dw6.EnableSlidingWindow = (seqParams->FrameSizeTolerance == EFRAMESIZETOL_LOW);
6983 cmd.m_dw6.EnableExtremLowDelay = (seqParams->FrameSizeTolerance == EFRAMESIZETOL_EXTREMELY_LOW);
6984 cmd.m_dw6.DisableVarCompute = bBRCVarCompuBypass;
6985
6986 *params->pdBrcInitCurrentTargetBufFullInBits += dBrcInitResetInputBitsPerFrame;
6987
6988 if (seqParams->RateControlMethod == RATECONTROL_AVBR)
6989 {
6990 cmd.m_dw3.startGAdjFrame0 = (uint32_t)((10 * usAVBRConvergence) / (double)150);
6991 cmd.m_dw3.startGAdjFrame1 = (uint32_t)((50 * usAVBRConvergence) / (double)150);
6992 cmd.m_dw4.startGAdjFrame2 = (uint32_t)((100 * usAVBRConvergence) / (double)150);
6993 cmd.m_dw4.startGAdjFrame3 = (uint32_t)((150 * usAVBRConvergence) / (double)150);
6994 cmd.m_dw11.gRateRatioThreshold0 =
6995 (uint32_t)((100 - (usAVBRAccuracy / (double)30) * (100 - 40)));
6996 cmd.m_dw11.gRateRatioThreshold1 =
6997 (uint32_t)((100 - (usAVBRAccuracy / (double)30) * (100 - 75)));
6998 cmd.m_dw12.gRateRatioThreshold2 = (uint32_t)((100 - (usAVBRAccuracy / (double)30) * (100 - 97)));
6999 cmd.m_dw12.gRateRatioThreshold3 = (uint32_t)((100 + (usAVBRAccuracy / (double)30) * (103 - 100)));
7000 cmd.m_dw12.gRateRatioThreshold4 = (uint32_t)((100 + (usAVBRAccuracy / (double)30) * (125 - 100)));
7001 cmd.m_dw12.gRateRatioThreshold5 = (uint32_t)((100 + (usAVBRAccuracy / (double)30) * (160 - 100)));
7002 }
7003
7004 cmd.m_dw15.EnableROI = params->ucEnableROI;
7005
7006 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetInterRounding(&sliceState));
7007
7008 cmd.m_dw15.RoundingIntra = 5;
7009 cmd.m_dw15.RoundingInter = sliceState.dwRoundingValue;
7010
7011 uint32_t profileLevelMaxFrame;
7012 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalAvcEncode_GetProfileLevelMaxFrameSize(
7013 seqParams,
7014 this,
7015 (uint32_t*)&profileLevelMaxFrame));
7016
7017 cmd.m_dw19.UserMaxFrame = profileLevelMaxFrame;
7018 cmd.m_dw24.SurfaceIndexBRChistorybuffer = frameBrcUpdateHistory;
7019 cmd.m_dw25.SurfaceIndexPreciousPAKstatisticsoutputbuffer = frameBrcUpdatePakStatisticsOutput;
7020 cmd.m_dw26.SurfaceIndexAVCIMGstateinputbuffer = frameBrcUpdateImageStateRead;
7021 cmd.m_dw27.SurfaceIndexAVCIMGstateoutputbuffer = frameBrcUpdateImageStateWrite;
7022 cmd.m_dw28.SurfaceIndexAVC_Encbuffer = frameBrcUpdateMbencCurbeWrite;
7023 cmd.m_dw29.SurfaceIndexAVCDISTORTIONbuffer = frameBrcUpdateDistortion;
7024 cmd.m_dw30.SurfaceIndexBRCconstdatabuffer = frameBrcUpdateConstantData;
7025 cmd.m_dw31.SurfaceIndexMBStatsBuffer = frameBrcUpdateMbStat;
7026 cmd.m_dw32.SurfaceIndexMotionvectorbuffer = frameBrcUpdateMvStat;
7027 auto pStateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7028 CODECHAL_ENCODE_CHK_NULL_RETURN(pStateHeapInterface);
7029
7030 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7031 &cmd,
7032 params->pKernelState->dwCurbeOffset,
7033 sizeof(cmd)));
7034
7035 CODECHAL_DEBUG_TOOL(
7036 CODECHAL_ENCODE_CHK_STATUS_RETURN(PopulateBrcUpdateParam(
7037 &cmd));
7038 )
7039
7040 return eStatus;
7041 }
7042
SetCurbeAvcMbBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)7043 MOS_STATUS CodechalEncodeAvcEncG11::SetCurbeAvcMbBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)
7044 {
7045 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7046
7047 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7048 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7049
7050 MbBrcUpdateCurbe curbe;
7051
7052 // BRC curbe requires: 2 for I-frame, 0 for P-frame, 1 for B-frame
7053 curbe.m_dw0.CurrFrameType = (m_pictureCodingType + 1) % 3;
7054 if( params->ucEnableROI )
7055 {
7056 if (bROIValueInDeltaQP)
7057 {
7058 curbe.m_dw0.EnableROI = 2; // 1-Enabled ROI priority, 2-Enable ROI QP Delta, 0- disabled
7059 curbe.m_dw0.ROIRatio = 0;
7060 }
7061 else
7062 {
7063 curbe.m_dw0.EnableROI = 1; // 1-Enabled ROI priority, 2-Enable ROI QP Delta, 0- disabled
7064
7065 uint32_t roisize = 0;
7066 uint32_t roiratio = 0;
7067
7068 for (uint32_t i = 0 ; i < m_avcPicParam->NumROI ; ++i)
7069 {
7070 CODECHAL_ENCODE_VERBOSEMESSAGE("ROI[%d] = {%d, %d, %d, %d} {%d}, size = %d", i,
7071 m_avcPicParam->ROI[i].Left, m_avcPicParam->ROI[i].Top,
7072 m_avcPicParam->ROI[i].Bottom, m_avcPicParam->ROI[i].Right,
7073 m_avcPicParam->ROI[i].PriorityLevelOrDQp,
7074 (CODECHAL_MACROBLOCK_HEIGHT * MOS_ABS(m_avcPicParam->ROI[i].Top - m_avcPicParam->ROI[i].Bottom)) *
7075 (CODECHAL_MACROBLOCK_WIDTH * MOS_ABS(m_avcPicParam->ROI[i].Right - m_avcPicParam->ROI[i].Left)));
7076 roisize += (CODECHAL_MACROBLOCK_HEIGHT * MOS_ABS(m_avcPicParam->ROI[i].Top - m_avcPicParam->ROI[i].Bottom)) *
7077 (CODECHAL_MACROBLOCK_WIDTH * MOS_ABS(m_avcPicParam->ROI[i].Right - m_avcPicParam->ROI[i].Left));
7078 }
7079
7080 if (roisize)
7081 {
7082 uint32_t numMBs = m_picWidthInMb * m_picHeightInMb;
7083 roiratio = 2 * (numMBs * 256 / roisize - 1);
7084 roiratio = MOS_MIN(51, roiratio); // clip QP from 0-51
7085 }
7086 CODECHAL_ENCODE_VERBOSEMESSAGE("ROIRatio = %d", roiratio);
7087 curbe.m_dw0.ROIRatio = roiratio;
7088 }
7089 }
7090 else
7091 {
7092 curbe.m_dw0.ROIRatio = 0;
7093 }
7094
7095 if (m_avcPicParam->bEnableQpAdjustment)
7096 {
7097 curbe.m_dw0.CQP_QPValue = MOS_MIN(m_avcPicParam->QpY + m_avcSliceParams->slice_qp_delta, 51);
7098 curbe.m_dw1.EnableCQPMode = 1;
7099 }
7100
7101 curbe.m_dw8.HistorybufferIndex = mbBrcUpdateHistory;
7102 curbe.m_dw9.MBQPbufferIndex = mbBrcUpdateMbQp;
7103 curbe.m_dw10.ROIbufferIndex = mbBrcUpdateRoi;
7104 curbe.m_dw11.MBstatisticalbufferIndex = mbBrcUpdateMbStat;
7105 auto pStateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7106 CODECHAL_ENCODE_CHK_NULL_RETURN(pStateHeapInterface);
7107
7108 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7109 &curbe,
7110 params->pKernelState->dwCurbeOffset,
7111 sizeof(curbe)));
7112
7113 return eStatus;
7114 }
7115
SetCurbeAvcBrcBlockCopy(PCODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_PARAMS params)7116 MOS_STATUS CodechalEncodeAvcEncG11::SetCurbeAvcBrcBlockCopy(PCODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_PARAMS params)
7117 {
7118 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7119
7120 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7121 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7122
7123 BrcBlockCopyCurbe cmd;
7124 cmd.m_dw0.BufferOffset = params->dwBufferOffset;
7125 cmd.m_dw0.BlockHeight = params->dwBlockHeight;
7126 cmd.m_dw1.SrcSurfaceIndex = 0x00;
7127 cmd.m_dw2.DstSurfaceIndex = 0x01;
7128
7129 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7130 &cmd,
7131 params->pKernelState->dwCurbeOffset,
7132 sizeof(cmd)));
7133
7134 return eStatus;
7135 }
7136
UserFeatureKeyReport()7137 MOS_STATUS CodechalEncodeAvcEncG11::UserFeatureKeyReport()
7138 {
7139 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7140
7141 CODECHAL_ENCODE_FUNCTION_ENTER;
7142
7143 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeAvcEnc::UserFeatureKeyReport());
7144
7145 #if (_DEBUG || _RELEASE_INTERNAL)
7146
7147 // VE2.0 Reporting
7148 CodecHalEncode_WriteKey(__MEDIA_USER_FEATURE_VALUE_ENABLE_ENCODE_VE_CTXSCHEDULING_ID, MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(m_osInterface), m_osInterface->pOsContext);
7149
7150 #endif // _DEBUG || _RELEASE_INTERNAL
7151 return eStatus;
7152 }
7153 //------------------------------------------------------------------------------
7154 //| Purpose: Send surface for AVC MBEnc kernels
7155 //| Return: N/A
7156 //------------------------------------------------------------------------------
SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)7157 MOS_STATUS CodechalEncodeAvcEncG11::SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)
7158 {
7159 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7160
7161 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
7162 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7163 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pAvcSlcParams);
7164 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ppRefList);
7165 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrOriginalPic);
7166 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrReconstructedPic);
7167 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psCurrPicSurface);
7168 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pAvcPicIdx);
7169 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMbEncBindingTable);
7170 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7171
7172 auto kernelState = params->pKernelState;
7173 auto avcMbEncBindingTable = params->pMbEncBindingTable;
7174 bool currFieldPicture = CodecHal_PictureIsField(*(params->pCurrOriginalPic)) ? 1 : 0;
7175 bool currBottomField = CodecHal_PictureIsBottomField(*(params->pCurrOriginalPic)) ? 1 : 0;
7176 auto currPicRefListEntry = params->ppRefList[params->pCurrReconstructedPic->FrameIdx];
7177 auto mbCodeBuffer = &currPicRefListEntry->resRefMbCodeBuffer;
7178 auto mvDataBuffer = &currPicRefListEntry->resRefMvDataBuffer;
7179 uint32_t refMbCodeBottomFieldOffset =
7180 params->dwFrameFieldHeightInMb * params->dwFrameWidthInMb * 64;
7181 uint32_t refMvBottomFieldOffset =
7182 MOS_ALIGN_CEIL(params->dwFrameFieldHeightInMb * params->dwFrameWidthInMb * (32 * 4), 0x1000);
7183
7184 uint8_t vdirection, refVDirection;
7185 if (params->bMbEncIFrameDistInUse)
7186 {
7187 vdirection = CODECHAL_VDIRECTION_FRAME;
7188 }
7189 else
7190 {
7191 vdirection = (CodecHal_PictureIsFrame(*(params->pCurrOriginalPic))) ? CODECHAL_VDIRECTION_FRAME :
7192 (currBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD;
7193 }
7194
7195 // PAK Obj command buffer
7196 uint32_t size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4; // 11DW + 5DW padding
7197 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
7198 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7199 surfaceCodecParams.presBuffer = mbCodeBuffer;
7200 surfaceCodecParams.dwSize = size;
7201 surfaceCodecParams.dwOffset = params->dwMbCodeBottomFieldOffset;
7202 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMfcAvcPakObj;
7203 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
7204 surfaceCodecParams.bRenderTarget = true;
7205 surfaceCodecParams.bIsWritable = true;
7206 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7207 m_hwInterface,
7208 cmdBuffer,
7209 &surfaceCodecParams,
7210 kernelState));
7211
7212 // MV data buffer
7213 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
7214 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7215 surfaceCodecParams.presBuffer = mvDataBuffer;
7216 surfaceCodecParams.dwSize = size;
7217 surfaceCodecParams.dwOffset = params->dwMvBottomFieldOffset;
7218 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
7219 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncIndMVData;
7220 surfaceCodecParams.bRenderTarget = true;
7221 surfaceCodecParams.bIsWritable = true;
7222 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7223 m_hwInterface,
7224 cmdBuffer,
7225 &surfaceCodecParams,
7226 kernelState));
7227
7228 // Limit OCA dump size for MV buffer to ocaMvDataBufferMaxSize to do not overflow OCA
7229 if (m_mvDataSize > ocaMvDataBufferMaxSize)
7230 {
7231 std::stringstream ss;
7232 ss << "MV Data buffer ( size == 0x" << std::hex << m_mvDataSize << " ) is too large to fit into the OCA buffer. "
7233 "Put only 0x" << std::hex << ocaMvDataBufferMaxSize << " bytes - max allowed size";
7234 std::string ocaLog = ss.str();
7235 HalOcaInterface::TraceMessage(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, ocaLog.c_str(), ocaLog.length());
7236 }
7237 HalOcaInterface::OnIndirectState(*cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, mvDataBuffer, 0, false, MOS_MIN(m_mvDataSize, ocaMvDataBufferMaxSize));
7238
7239 // Current Picture Y
7240 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7241 surfaceCodecParams.bIs2DSurface = true;
7242 surfaceCodecParams.bMediaBlockRW = true; // Use media block RW for DP 2D surface access
7243 surfaceCodecParams.bUseUVPlane = true;
7244 surfaceCodecParams.psSurface = params->psCurrPicSurface;
7245 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
7246 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
7247 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncCurrY;
7248 surfaceCodecParams.dwUVBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncCurrUV;
7249 surfaceCodecParams.dwVerticalLineStride = params->dwVerticalLineStride;
7250 surfaceCodecParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
7251
7252 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7253 m_hwInterface,
7254 cmdBuffer,
7255 &surfaceCodecParams,
7256 kernelState));
7257
7258 // AVC_ME MV data buffer
7259 if (params->bHmeEnabled)
7260 {
7261 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
7262
7263 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7264 surfaceCodecParams.bIs2DSurface = true;
7265 surfaceCodecParams.bMediaBlockRW = true;
7266 surfaceCodecParams.psSurface = params->ps4xMeMvDataBuffer;
7267 surfaceCodecParams.dwOffset = params->dwMeMvBottomFieldOffset;
7268 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
7269 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMVDataFromME;
7270 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7271 m_hwInterface,
7272 cmdBuffer,
7273 &surfaceCodecParams,
7274 kernelState));
7275
7276 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeDistortionBuffer);
7277
7278 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7279 surfaceCodecParams.bIs2DSurface = true;
7280 surfaceCodecParams.bMediaBlockRW = true;
7281 surfaceCodecParams.psSurface = params->ps4xMeDistortionBuffer;
7282 surfaceCodecParams.dwOffset = params->dwMeDistortionBottomFieldOffset;
7283 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
7284 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMEDist;
7285 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7286 m_hwInterface,
7287 cmdBuffer,
7288 &surfaceCodecParams,
7289 kernelState));
7290 }
7291
7292 if (params->bMbConstDataBufferInUse)
7293 {
7294 // 16 DWs per QP value
7295 size = 16 * 52 * sizeof(uint32_t);
7296
7297 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7298 surfaceCodecParams.presBuffer = params->presMbBrcConstDataBuffer;
7299 surfaceCodecParams.dwSize = size;
7300 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MB_BRC_CONST_ENCODE].Value;
7301 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbBrcConstData;
7302 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7303 m_hwInterface,
7304 cmdBuffer,
7305 &surfaceCodecParams,
7306 kernelState));
7307 }
7308
7309 if (params->bMbQpBufferInUse)
7310 {
7311 // AVC MB BRC QP buffer
7312 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7313 surfaceCodecParams.bIs2DSurface = true;
7314 surfaceCodecParams.bMediaBlockRW = true;
7315 surfaceCodecParams.psSurface = params->psMbQpBuffer;
7316 surfaceCodecParams.dwOffset = params->dwMbQpBottomFieldOffset;
7317 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_MB_QP_ENCODE].Value;
7318 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ? avcMbEncBindingTable->dwAvcMBEncMbQpField :
7319 avcMbEncBindingTable->dwAvcMBEncMbQpFrame;
7320 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7321 m_hwInterface,
7322 cmdBuffer,
7323 &surfaceCodecParams,
7324 kernelState));
7325 }
7326
7327 if (params->bMbSpecificDataEnabled)
7328 {
7329 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * sizeof(CODECHAL_ENCODE_AVC_MB_SPECIFIC_PARAMS);
7330 CODECHAL_ENCODE_VERBOSEMESSAGE("Send MB specific surface, size = %d", size);
7331 memset((void *)&surfaceCodecParams, 0, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7332 surfaceCodecParams.dwSize = size;
7333 surfaceCodecParams.presBuffer = params->presMbSpecificDataBuffer;
7334 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbSpecificData;
7335 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7336 m_hwInterface,
7337 cmdBuffer,
7338 &surfaceCodecParams,
7339 kernelState));
7340 }
7341
7342 // Current Picture Y - VME
7343 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7344 surfaceCodecParams.bUseAdvState = true;
7345 surfaceCodecParams.psSurface = params->psCurrPicSurface;
7346 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
7347 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
7348 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ?
7349 avcMbEncBindingTable->dwAvcMBEncFieldCurrPic[0] : avcMbEncBindingTable->dwAvcMBEncCurrPicFrame[0];
7350 surfaceCodecParams.ucVDirection = vdirection;
7351
7352 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7353 m_hwInterface,
7354 cmdBuffer,
7355 &surfaceCodecParams,
7356 kernelState));
7357
7358 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ?
7359 avcMbEncBindingTable->dwAvcMBEncFieldCurrPic[1] : avcMbEncBindingTable->dwAvcMBEncCurrPicFrame[1];
7360 surfaceCodecParams.ucVDirection = vdirection;
7361 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7362 m_hwInterface,
7363 cmdBuffer,
7364 &surfaceCodecParams,
7365 kernelState));
7366
7367 // Setup references 1...n
7368 // LIST 0 references
7369 uint8_t refIdx;
7370 for (refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l0_active_minus1; refIdx++)
7371 {
7372 auto refPic = params->pAvcSlcParams->RefPicList[LIST_0][refIdx];
7373 uint32_t refMbCodeBottomFieldOffsetUsed;
7374 uint32_t refMvBottomFieldOffsetUsed;
7375 uint32_t refBindingTableOffset;
7376 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
7377 {
7378 uint8_t refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
7379 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? true : false;
7380 // Program the surface based on current picture's field/frame mode
7381 if (currFieldPicture) // if current picture is field
7382 {
7383 if (refBottomField)
7384 {
7385 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
7386 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicBotField[refIdx];
7387 }
7388 else
7389 {
7390 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
7391 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicTopField[refIdx];
7392 }
7393 }
7394 else // if current picture is frame
7395 {
7396 refVDirection = CODECHAL_VDIRECTION_FRAME;
7397 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicFrame[refIdx];
7398 }
7399
7400 // Picture Y VME
7401 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7402 surfaceCodecParams.bUseAdvState = true;
7403 if((0 == refIdx) && (params->bUseWeightedSurfaceForL0))
7404 {
7405 surfaceCodecParams.psSurface = m_wpState->GetWPOutputPicList(CODEC_WP_OUTPUT_L0_START + refIdx);
7406 }
7407 else
7408 {
7409 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
7410 }
7411 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
7412 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
7413
7414 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
7415 surfaceCodecParams.ucVDirection = refVDirection;
7416 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
7417
7418 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7419 m_hwInterface,
7420 cmdBuffer,
7421 &surfaceCodecParams,
7422 kernelState));
7423 }
7424 }
7425
7426 // Setup references 1...n
7427 // LIST 1 references
7428 uint32_t curbeSize;
7429 for (refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l1_active_minus1; refIdx++)
7430 {
7431 if (!currFieldPicture && refIdx > 0)
7432 {
7433 // Only 1 LIST 1 reference required here since only single ref is supported in frame case
7434 break;
7435 }
7436
7437 auto refPic = params->pAvcSlcParams->RefPicList[LIST_1][refIdx];
7438 uint32_t refMbCodeBottomFieldOffsetUsed;
7439 uint32_t refMvBottomFieldOffsetUsed;
7440 uint32_t refBindingTableOffset;
7441 bool refBottomField;
7442 uint8_t refPicIdx;
7443 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
7444 {
7445 refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
7446 refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
7447 // Program the surface based on current picture's field/frame mode
7448 if (currFieldPicture) // if current picture is field
7449 {
7450 if (refBottomField)
7451 {
7452 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
7453 refMbCodeBottomFieldOffsetUsed = refMbCodeBottomFieldOffset;
7454 refMvBottomFieldOffsetUsed = refMvBottomFieldOffset;
7455 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicBotField[refIdx];
7456 }
7457 else
7458 {
7459 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
7460 refMbCodeBottomFieldOffsetUsed = 0;
7461 refMvBottomFieldOffsetUsed = 0;
7462 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicTopField[refIdx];
7463 }
7464 }
7465 else // if current picture is frame
7466 {
7467 refVDirection = CODECHAL_VDIRECTION_FRAME;
7468 refMbCodeBottomFieldOffsetUsed = 0;
7469 refMvBottomFieldOffsetUsed = 0;
7470 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicFrame[refIdx];
7471 }
7472
7473 // Picture Y VME
7474 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7475 surfaceCodecParams.bUseAdvState = true;
7476 if((0 == refIdx) && (params->bUseWeightedSurfaceForL1))
7477 {
7478 surfaceCodecParams.psSurface = m_wpState->GetWPOutputPicList(CODEC_WP_OUTPUT_L1_START + refIdx);
7479 }
7480 else
7481 {
7482 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
7483 }
7484 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
7485 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
7486
7487 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
7488 surfaceCodecParams.ucVDirection = refVDirection;
7489 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
7490
7491 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7492 m_hwInterface,
7493 cmdBuffer,
7494 &surfaceCodecParams,
7495 kernelState));
7496
7497 if (refIdx == 0)
7498 {
7499 // MB data buffer
7500 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4;
7501 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7502 surfaceCodecParams.dwSize = size;
7503 surfaceCodecParams.presBuffer = ¶ms->ppRefList[refPicIdx]->resRefMbCodeBuffer;
7504 surfaceCodecParams.dwOffset = refMbCodeBottomFieldOffsetUsed;
7505 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
7506 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdRefMBData;
7507 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7508 m_hwInterface,
7509 cmdBuffer,
7510 &surfaceCodecParams,
7511 kernelState));
7512
7513 // MV data buffer
7514 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
7515 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7516 surfaceCodecParams.dwSize = size;
7517 surfaceCodecParams.presBuffer = ¶ms->ppRefList[refPicIdx]->resRefMvDataBuffer;
7518 surfaceCodecParams.dwOffset = refMvBottomFieldOffsetUsed;
7519 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
7520 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdRefMVData;
7521 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7522 m_hwInterface,
7523 cmdBuffer,
7524 &surfaceCodecParams,
7525 kernelState));
7526 }
7527
7528 if (refIdx < CODECHAL_ENCODE_NUM_MAX_VME_L1_REF)
7529 {
7530 if (currFieldPicture)
7531 {
7532 // The binding table contains multiple entries for IDX0 backwards references
7533 if (refBottomField)
7534 {
7535 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicBotField[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
7536 }
7537 else
7538 {
7539 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicTopField[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
7540 }
7541 }
7542 else
7543 {
7544 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicFrame[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
7545 }
7546
7547 // Picture Y VME
7548 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7549 surfaceCodecParams.bUseAdvState = true;
7550 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
7551 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
7552 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
7553 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
7554 surfaceCodecParams.ucVDirection = refVDirection;
7555 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
7556
7557 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7558 m_hwInterface,
7559 cmdBuffer,
7560 &surfaceCodecParams,
7561 kernelState));
7562 }
7563 }
7564 }
7565
7566 // BRC distortion data buffer for I frame
7567 if (params->bMbEncIFrameDistInUse)
7568 {
7569 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7570 surfaceCodecParams.bIs2DSurface = true;
7571 surfaceCodecParams.bMediaBlockRW = true;
7572 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
7573 surfaceCodecParams.dwOffset = params->dwMeBrcDistortionBottomFieldOffset;
7574 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBRCDist;
7575 surfaceCodecParams.bIsWritable = true;
7576 surfaceCodecParams.bRenderTarget = true;
7577 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7578 m_hwInterface,
7579 cmdBuffer,
7580 &surfaceCodecParams,
7581 kernelState));
7582 }
7583
7584 // RefPicSelect of Current Picture
7585 if (params->bUsedAsRef)
7586 {
7587 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7588 surfaceCodecParams.bIs2DSurface = true;
7589 surfaceCodecParams.bMediaBlockRW = true;
7590 surfaceCodecParams.psSurface = &currPicRefListEntry->pRefPicSelectListEntry->sBuffer;
7591 surfaceCodecParams.psSurface->dwHeight = MOS_ALIGN_CEIL(surfaceCodecParams.psSurface->dwHeight, 8);
7592 surfaceCodecParams.dwOffset = params->dwRefPicSelectBottomFieldOffset;
7593 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncRefPicSelectL0;
7594 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
7595 surfaceCodecParams.bRenderTarget = true;
7596 surfaceCodecParams.bIsWritable = true;
7597 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7598 m_hwInterface,
7599 cmdBuffer,
7600 &surfaceCodecParams,
7601 kernelState));
7602 }
7603
7604 if(params->bMBVProcStatsEnabled)
7605 {
7606 size = params->dwFrameWidthInMb *
7607 (currFieldPicture ? params->dwFrameFieldHeightInMb : params->dwFrameHeightInMb) *
7608 16 * sizeof(uint32_t);
7609
7610 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7611 surfaceCodecParams.dwSize = size;
7612 surfaceCodecParams.presBuffer = params->presMBVProcStatsBuffer;
7613 surfaceCodecParams.dwOffset = currBottomField ? params->dwMBVProcStatsBottomFieldOffset : 0;
7614 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_MB_STATS_ENCODE].Value;
7615 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMBStats;
7616 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7617 m_hwInterface,
7618 cmdBuffer,
7619 &surfaceCodecParams,
7620 kernelState));
7621 }
7622 else if (params->bFlatnessCheckEnabled)
7623 {
7624 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7625 surfaceCodecParams.bIs2DSurface = true;
7626 surfaceCodecParams.bMediaBlockRW = true;
7627 surfaceCodecParams.psSurface = params->psFlatnessCheckSurface;
7628 surfaceCodecParams.dwOffset = currBottomField ? params->dwFlatnessCheckBottomFieldOffset : 0;
7629 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFlatnessChk;
7630 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_FLATNESS_CHECK_ENCODE].Value;
7631 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7632 m_hwInterface,
7633 cmdBuffer,
7634 &surfaceCodecParams,
7635 kernelState));
7636 }
7637
7638 if (params->bMADEnabled)
7639 {
7640 size = CODECHAL_MAD_BUFFER_SIZE;
7641
7642 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7643 surfaceCodecParams.bRawSurface = true;
7644 surfaceCodecParams.dwSize = size;
7645 surfaceCodecParams.presBuffer = params->presMADDataBuffer;
7646 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMADData;
7647 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MAD_ENCODE].Value;
7648 surfaceCodecParams.bRenderTarget = true;
7649 surfaceCodecParams.bIsWritable = true;
7650 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7651 m_hwInterface,
7652 cmdBuffer,
7653 &surfaceCodecParams,
7654 kernelState));
7655 }
7656
7657 if (params->dwMbEncBRCBufferSize > 0)
7658 {
7659 //Started from GEN95, separated Mbenc curbe from BRC update kernel. BRC update kernel will generate a 128 bytes surface for mbenc.
7660 //The new surface contains the updated data for mbenc. MBenc kernel has been changed to use the new BRC update output surface
7661 //to update its curbe internally.
7662 // MbEnc BRC buffer - write only
7663 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7664 surfaceCodecParams.presBuffer = params->presMbEncBRCBuffer;
7665 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwMbEncBRCBufferSize);
7666 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMbEncBRCCurbeData;
7667 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE].Value;
7668 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7669 m_hwInterface,
7670 cmdBuffer,
7671 &surfaceCodecParams,
7672 kernelState));
7673 }
7674 else
7675 {
7676 if (params->bUseMbEncAdvKernel)
7677 {
7678 // For BRC the new BRC surface is used
7679 if (params->bUseAdvancedDsh)
7680 {
7681 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7682 surfaceCodecParams.presBuffer = params->presMbEncCurbeBuffer;
7683 curbeSize = MOS_ALIGN_CEIL(
7684 params->pKernelState->KernelParams.iCurbeLength,
7685 m_hwInterface->GetRenderInterface()->m_stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
7686 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(curbeSize);
7687 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMbEncBRCCurbeData;
7688 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE].Value;
7689 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7690 m_hwInterface,
7691 cmdBuffer,
7692 &surfaceCodecParams,
7693 kernelState));
7694 }
7695 else // For CQP the DSH CURBE is used
7696 {
7697 MOS_RESOURCE *dsh = nullptr;
7698 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = params->pKernelState->m_dshRegion.GetResource());
7699 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7700 surfaceCodecParams.presBuffer = dsh;
7701 surfaceCodecParams.dwOffset =
7702 params->pKernelState->m_dshRegion.GetOffset() +
7703 params->pKernelState->dwCurbeOffset;
7704 curbeSize = MOS_ALIGN_CEIL(
7705 params->pKernelState->KernelParams.iCurbeLength,
7706 m_hwInterface->GetRenderInterface()->m_stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
7707 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(curbeSize);
7708 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMbEncBRCCurbeData;
7709 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE].Value;
7710 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7711 m_hwInterface,
7712 cmdBuffer,
7713 &surfaceCodecParams,
7714 kernelState));
7715 }
7716 }
7717 }
7718
7719 if (params->bArbitraryNumMbsInSlice)
7720 {
7721 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7722 surfaceCodecParams.bIs2DSurface = true;
7723 surfaceCodecParams.bMediaBlockRW = true;
7724 surfaceCodecParams.psSurface = params->psSliceMapSurface;
7725 surfaceCodecParams.bRenderTarget = false;
7726 surfaceCodecParams.bIsWritable = false;
7727 surfaceCodecParams.dwOffset = currBottomField ? params->dwSliceMapBottomFieldOffset : 0;
7728 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_SLICE_MAP_ENCODE].Value;
7729 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncSliceMapData;
7730
7731 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7732 m_hwInterface,
7733 cmdBuffer,
7734 &surfaceCodecParams,
7735 kernelState));
7736 }
7737
7738 if(!params->bMbEncIFrameDistInUse)
7739 {
7740 if( params->bMbDisableSkipMapEnabled )
7741 {
7742 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7743 surfaceCodecParams.bIs2DSurface = true;
7744 surfaceCodecParams.bMediaBlockRW = true;
7745 surfaceCodecParams.psSurface = params->psMbDisableSkipMapSurface;
7746 surfaceCodecParams.dwOffset = 0;
7747 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbNonSkipMap;
7748 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_MBDISABLE_SKIPMAP_CODEC].Value;
7749 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7750 m_hwInterface,
7751 cmdBuffer,
7752 &surfaceCodecParams,
7753 kernelState));
7754 }
7755
7756 if( params->bStaticFrameDetectionEnabled )
7757 {
7758 // static frame cost table surface
7759 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7760 surfaceCodecParams.presBuffer = params->presSFDCostTableBuffer;
7761 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(sfdCostTableBufferSizeCommon );
7762 surfaceCodecParams.dwOffset = 0;
7763 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
7764 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncStaticDetectionCostTable;
7765 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7766 m_hwInterface,
7767 cmdBuffer,
7768 &surfaceCodecParams,
7769 kernelState));
7770 }
7771
7772 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7773 surfaceCodecParams.bIs2DSurface = true;
7774 surfaceCodecParams.bMediaBlockRW = true;
7775 surfaceCodecParams.psSurface = m_swScoreboardState->GetCurSwScoreboardSurface();
7776 surfaceCodecParams.bRenderTarget = true;
7777 surfaceCodecParams.bIsWritable = true;
7778 surfaceCodecParams.dwOffset = 0;
7779 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_SOFTWARE_SCOREBOARD_ENCODE].Value;
7780 surfaceCodecParams.dwBindingTableOffset = mbencSwScoreboard;
7781 surfaceCodecParams.bUse32UINTSurfaceFormat = true;
7782 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7783 m_hwInterface,
7784 cmdBuffer,
7785 &surfaceCodecParams,
7786 kernelState));
7787
7788 }
7789 return eStatus;
7790 }
7791
SendAvcBrcFrameUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)7792 MOS_STATUS CodechalEncodeAvcEncG11::SendAvcBrcFrameUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)
7793 {
7794 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7795
7796 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
7797 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7798 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pBrcBuffers);
7799
7800 // BRC history buffer
7801 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
7802 auto kernelState = params->pKernelState;
7803 auto avcBrcUpdateBindingTable = params->pBrcUpdateBindingTable;
7804 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7805 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcHistoryBuffer;
7806 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwBrcHistoryBufferSize);
7807 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_HISTORY_ENCODE].Value;
7808 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcHistoryBuffer;
7809 surfaceCodecParams.bIsWritable = true;
7810 surfaceCodecParams.bRenderTarget = true;
7811 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7812 m_hwInterface,
7813 cmdBuffer,
7814 &surfaceCodecParams,
7815 kernelState));
7816
7817 // PAK Statistics buffer
7818 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7819 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcPakStatisticBuffer[0];
7820 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwBrcPakStatisticsSize);
7821 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_PAK_STATS_ENCODE].Value;
7822 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcPakStatisticsOutputBuffer;
7823 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7824 m_hwInterface,
7825 cmdBuffer,
7826 &surfaceCodecParams,
7827 kernelState));
7828
7829 // PAK IMG_STATEs buffer - read only
7830 uint32_t size = MOS_BYTES_TO_DWORDS(BRC_IMG_STATE_SIZE_PER_PASS * m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses());
7831 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7832 surfaceCodecParams.presBuffer =
7833 ¶ms->pBrcBuffers->resBrcImageStatesReadBuffer[params->ucCurrRecycledBufIdx];
7834 surfaceCodecParams.dwSize = size;
7835 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_PAK_IMAGESTATE_ENCODE].Value;
7836 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcImageStateReadBuffer;
7837 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7838 m_hwInterface,
7839 cmdBuffer,
7840 &surfaceCodecParams,
7841 kernelState));
7842
7843 // PAK IMG_STATEs buffer - write only
7844 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7845 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcImageStatesWriteBuffer;
7846 surfaceCodecParams.dwSize = size;
7847 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_PAK_IMAGESTATE_ENCODE].Value;
7848 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcImageStateWriteBuffer;
7849 surfaceCodecParams.bIsWritable = true;
7850 surfaceCodecParams.bRenderTarget = true;
7851 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7852 m_hwInterface,
7853 cmdBuffer,
7854 &surfaceCodecParams,
7855 kernelState));
7856
7857 if (params->dwMbEncBRCBufferSize > 0)
7858 {
7859 //Started from GEN95, separated Mbenc curbe from BRC update kernel. BRC update kernel will generate a 128 bytes surface for mbenc.
7860 //The new surface contains the updated data for mbenc. MBenc kernel has been changed to use the new BRC update output surface
7861 //to update its curbe internally.
7862 // MbEnc BRC buffer - write only
7863 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7864 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resMbEncBrcBuffer;
7865 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwMbEncBRCBufferSize);
7866 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MBENC_BRC_ENCODE].Value;
7867 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbEncCurbeWriteData;
7868 surfaceCodecParams.bIsWritable = true;
7869 surfaceCodecParams.bRenderTarget = true;
7870 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7871 m_hwInterface,
7872 cmdBuffer,
7873 &surfaceCodecParams,
7874 kernelState));
7875 }
7876 else
7877 {
7878 PMHW_KERNEL_STATE pMbEncKernelState;
7879 CODECHAL_ENCODE_CHK_NULL_RETURN(pMbEncKernelState = params->pBrcBuffers->pMbEncKernelStateInUse);
7880
7881 MOS_RESOURCE *dsh = nullptr;
7882 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = pMbEncKernelState->m_dshRegion.GetResource());
7883
7884 // BRC ENC CURBE Buffer - read only
7885 size = MOS_ALIGN_CEIL(
7886 pMbEncKernelState->KernelParams.iCurbeLength,
7887 m_renderEngineInterface->m_stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
7888 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7889 surfaceCodecParams.presBuffer = dsh;
7890 surfaceCodecParams.dwOffset =
7891 pMbEncKernelState->m_dshRegion.GetOffset() +
7892 pMbEncKernelState->dwCurbeOffset;
7893 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(size);
7894 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbEncCurbeReadBuffer;
7895 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7896 m_hwInterface,
7897 cmdBuffer,
7898 &surfaceCodecParams,
7899 kernelState));
7900
7901 // BRC ENC CURBE Buffer - write only
7902 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7903 if (params->bUseAdvancedDsh)
7904 {
7905 surfaceCodecParams.presBuffer = params->presMbEncCurbeBuffer;
7906 }
7907 else
7908 {
7909 surfaceCodecParams.presBuffer = dsh;
7910 surfaceCodecParams.dwOffset =
7911 pMbEncKernelState->m_dshRegion.GetOffset() +
7912 pMbEncKernelState->dwCurbeOffset;
7913 }
7914 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(size);
7915 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbEncCurbeWriteData;
7916 surfaceCodecParams.bRenderTarget = true;
7917 surfaceCodecParams.bIsWritable = true;
7918 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7919 m_hwInterface,
7920 cmdBuffer,
7921 &surfaceCodecParams,
7922 kernelState));
7923 }
7924
7925 // AVC_ME BRC Distortion data buffer - input/output
7926 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7927 surfaceCodecParams.bIs2DSurface = true;
7928 surfaceCodecParams.bMediaBlockRW = true;
7929 surfaceCodecParams.psSurface = ¶ms->pBrcBuffers->sMeBrcDistortionBuffer;
7930 surfaceCodecParams.dwOffset = params->pBrcBuffers->dwMeBrcDistortionBottomFieldOffset;
7931 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_ME_DISTORTION_ENCODE].Value;
7932 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcDistortionBuffer;
7933 surfaceCodecParams.bRenderTarget = true;
7934 surfaceCodecParams.bIsWritable = true;
7935 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7936 m_hwInterface,
7937 cmdBuffer,
7938 &surfaceCodecParams,
7939 kernelState));
7940
7941 // BRC Constant Data Surface
7942 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7943 surfaceCodecParams.bIs2DSurface = true;
7944 surfaceCodecParams.bMediaBlockRW = true;
7945 surfaceCodecParams.psSurface =
7946 ¶ms->pBrcBuffers->sBrcConstantDataBuffer[params->ucCurrRecycledBufIdx];
7947 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_CONSTANT_DATA_ENCODE].Value;
7948 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcConstantData;
7949 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7950 m_hwInterface,
7951 cmdBuffer,
7952 &surfaceCodecParams,
7953 kernelState));
7954
7955 // MBStat buffer - input
7956 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7957 surfaceCodecParams.presBuffer = params->presMbStatBuffer;
7958 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(m_hwInterface->m_avcMbStatBufferSize);
7959 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_MB_STATS_ENCODE].Value;
7960 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbStatBuffer;
7961 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7962 m_hwInterface,
7963 cmdBuffer,
7964 &surfaceCodecParams,
7965 kernelState));
7966
7967 // MV data buffer
7968 if (params->psMvDataBuffer)
7969 {
7970 memset((void *)&surfaceCodecParams, 0, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7971 surfaceCodecParams.bIs2DSurface = true;
7972 surfaceCodecParams.bMediaBlockRW = true;
7973 surfaceCodecParams.psSurface = params->psMvDataBuffer;
7974 surfaceCodecParams.dwOffset = params->dwMvBottomFieldOffset;
7975 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
7976 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMvDataBuffer;
7977 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7978 m_hwInterface,
7979 cmdBuffer,
7980 &surfaceCodecParams,
7981 kernelState));
7982 }
7983
7984 return eStatus;
7985 }
7986
SendAvcBrcMbUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)7987 MOS_STATUS CodechalEncodeAvcEncG11::SendAvcBrcMbUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)
7988 {
7989 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7990
7991 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
7992 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7993 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pBrcBuffers);
7994
7995 // BRC history buffer
7996 auto kernelState = params->pKernelState;
7997 auto avcBrcUpdateBindingTable = params->pBrcUpdateBindingTable;
7998 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
7999 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8000 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcHistoryBuffer;
8001 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwBrcHistoryBufferSize);
8002 surfaceCodecParams.bIsWritable = true;
8003 surfaceCodecParams.bRenderTarget = true;
8004 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_HISTORY_ENCODE].Value;
8005 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcHistoryBuffer;
8006 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8007 m_hwInterface,
8008 cmdBuffer,
8009 &surfaceCodecParams,
8010 kernelState));
8011
8012 // AVC MB QP data buffer
8013 if (params->bMbBrcEnabled)
8014 {
8015 params->pBrcBuffers->sBrcMbQpBuffer.dwHeight = MOS_ALIGN_CEIL((params->dwDownscaledFrameFieldHeightInMb4x << 2), 8);
8016
8017 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8018 surfaceCodecParams.bIs2DSurface = true;
8019 surfaceCodecParams.bMediaBlockRW = true;
8020 surfaceCodecParams.bIsWritable = true;
8021 surfaceCodecParams.bRenderTarget = true;
8022 surfaceCodecParams.psSurface = ¶ms->pBrcBuffers->sBrcMbQpBuffer;
8023 surfaceCodecParams.dwOffset = params->pBrcBuffers->dwBrcMbQpBottomFieldOffset;
8024 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_MB_QP_ENCODE].Value;
8025 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcMbQpBuffer;
8026 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8027 m_hwInterface,
8028 cmdBuffer,
8029 &surfaceCodecParams,
8030 kernelState));
8031 }
8032
8033 // BRC ROI feature
8034 if (params->bBrcRoiEnabled)
8035 {
8036 params->psRoiSurface->dwHeight = MOS_ALIGN_CEIL((params->dwDownscaledFrameFieldHeightInMb4x << 2), 8);
8037
8038 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8039 surfaceCodecParams.bIs2DSurface = true;
8040 surfaceCodecParams.bMediaBlockRW = true;
8041 surfaceCodecParams.bIsWritable = false;
8042 surfaceCodecParams.bRenderTarget = true;
8043 surfaceCodecParams.psSurface = params->psRoiSurface;
8044 surfaceCodecParams.dwOffset = 0;
8045 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_ROI_ENCODE].Value;
8046 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcROISurface;
8047 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8048 m_hwInterface,
8049 cmdBuffer,
8050 &surfaceCodecParams,
8051 kernelState));
8052 }
8053
8054 // MBStat buffer
8055 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8056 surfaceCodecParams.presBuffer = params->presMbStatBuffer;
8057 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(m_hwInterface->m_avcMbStatBufferSize);
8058 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_MB_STATS_ENCODE].Value;
8059 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcMbStatBuffer;
8060 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8061 m_hwInterface,
8062 cmdBuffer,
8063 &surfaceCodecParams,
8064 kernelState));
8065
8066 return eStatus;
8067 }
8068
SetGpuCtxCreatOption()8069 MOS_STATUS CodechalEncodeAvcEncG11::SetGpuCtxCreatOption()
8070 {
8071 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
8072
8073 CODECHAL_ENCODE_FUNCTION_ENTER;
8074
8075 if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(m_osInterface))
8076 {
8077 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncoderState::SetGpuCtxCreatOption());
8078 }
8079 else
8080 {
8081 m_gpuCtxCreatOpt = MOS_New(MOS_GPUCTX_CREATOPTIONS_ENHANCED);
8082 CODECHAL_ENCODE_CHK_NULL_RETURN(m_gpuCtxCreatOpt);
8083
8084 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_ConstructParmsForGpuCtxCreation(
8085 m_sinlgePipeVeState,
8086 (PMOS_GPUCTX_CREATOPTIONS_ENHANCED)m_gpuCtxCreatOpt));
8087 }
8088
8089 return eStatus;
8090 }
8091
SetupROISurface()8092 MOS_STATUS CodechalEncodeAvcEncG11::SetupROISurface()
8093 {
8094 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
8095
8096 CODECHAL_ENCODE_FUNCTION_ENTER;
8097
8098 MOS_LOCK_PARAMS readOnly;
8099 MOS_ZeroMemory(&readOnly, sizeof(readOnly));
8100 readOnly.ReadOnly = 1;
8101 uint32_t * data = (uint32_t *)m_osInterface->pfnLockResource(m_osInterface, &BrcBuffers.sBrcRoiSurface.OsResource, &readOnly);
8102 if (!data)
8103 {
8104 eStatus = MOS_STATUS_INVALID_HANDLE;
8105 return eStatus;
8106 }
8107
8108 uint32_t bufferWidthInByte = BrcBuffers.sBrcRoiSurface.dwPitch;
8109 uint32_t bufferHeightInByte = MOS_ALIGN_CEIL((m_downscaledHeightInMb4x << 2), 8);
8110 uint32_t numMBs = m_picWidthInMb * m_picHeightInMb;
8111 for (uint32_t uMB = 0; uMB <= numMBs; uMB++)
8112 {
8113 int32_t curMbY = uMB / m_picWidthInMb;
8114 int32_t curMbX = uMB - curMbY * m_picWidthInMb;
8115
8116 uint32_t outdata = 0;
8117 for (int32_t roi = (m_avcPicParam->NumROI - 1); roi >= 0; roi--)
8118 {
8119 int32_t QPLevel;
8120 if (bROIValueInDeltaQP)
8121 {
8122 QPLevel = -m_avcPicParam->ROI[roi].PriorityLevelOrDQp;
8123 }
8124 else
8125 {
8126 // QP Level sent to ROI surface is (priority * 6)
8127 QPLevel = m_avcPicParam->ROI[roi].PriorityLevelOrDQp * 6;
8128 }
8129
8130 if (QPLevel == 0)
8131 {
8132 continue;
8133 }
8134
8135 if ((curMbX >= (int32_t)m_avcPicParam->ROI[roi].Left) && (curMbX < (int32_t)m_avcPicParam->ROI[roi].Right) &&
8136 (curMbY >= (int32_t)m_avcPicParam->ROI[roi].Top) && (curMbY < (int32_t)m_avcPicParam->ROI[roi].Bottom))
8137 {
8138 outdata = 15 | ((QPLevel & 0xFF) << 8);
8139 }
8140 else if (bROISmoothEnabled)
8141 {
8142 if ((curMbX >= (int32_t)m_avcPicParam->ROI[roi].Left - 1) && (curMbX < (int32_t)m_avcPicParam->ROI[roi].Right + 1) &&
8143 (curMbY >= (int32_t)m_avcPicParam->ROI[roi].Top - 1) && (curMbY < (int32_t)m_avcPicParam->ROI[roi].Bottom + 1))
8144 {
8145 outdata = 14 | ((QPLevel & 0xFF) << 8);
8146 }
8147 else if ((curMbX >= (int32_t)m_avcPicParam->ROI[roi].Left - 2) && (curMbX < (int32_t)m_avcPicParam->ROI[roi].Right + 2) &&
8148 (curMbY >= (int32_t)m_avcPicParam->ROI[roi].Top - 2) && (curMbY < (int32_t)m_avcPicParam->ROI[roi].Bottom + 2))
8149 {
8150 outdata = 13 | ((QPLevel & 0xFF) << 8);
8151 }
8152 else if ((curMbX >= (int32_t)m_avcPicParam->ROI[roi].Left - 3) && (curMbX < (int32_t)m_avcPicParam->ROI[roi].Right + 3) &&
8153 (curMbY >= (int32_t)m_avcPicParam->ROI[roi].Top - 3) && (curMbY < (int32_t)m_avcPicParam->ROI[roi].Bottom + 3))
8154 {
8155 outdata = 12 | ((QPLevel & 0xFF) << 8);
8156 }
8157 }
8158 }
8159 data[(curMbY * (bufferWidthInByte>>2)) + curMbX] = outdata;
8160 }
8161
8162 m_osInterface->pfnUnlockResource(m_osInterface, &BrcBuffers.sBrcRoiSurface.OsResource);
8163
8164 uint32_t bufferSize = bufferWidthInByte * bufferHeightInByte;
8165 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
8166 &BrcBuffers.sBrcRoiSurface.OsResource,
8167 CodechalDbgAttr::attrInput,
8168 "ROI",
8169 bufferSize,
8170 0,
8171 CODECHAL_MEDIA_STATE_MB_BRC_UPDATE)));
8172 return eStatus;
8173 }
8174
SendPrologWithFrameTracking(PMOS_COMMAND_BUFFER cmdBuffer,bool frameTracking,MHW_MI_MMIOREGISTERS * mmioRegister)8175 MOS_STATUS CodechalEncodeAvcEncG11::SendPrologWithFrameTracking(
8176 PMOS_COMMAND_BUFFER cmdBuffer,
8177 bool frameTracking,
8178 MHW_MI_MMIOREGISTERS *mmioRegister)
8179 {
8180 if (MOS_VE_SUPPORTED(m_osInterface))
8181 {
8182 if (cmdBuffer->Attributes.pAttriVe)
8183 {
8184 PMOS_CMD_BUF_ATTRI_VE attriExt =
8185 (PMOS_CMD_BUF_ATTRI_VE)(cmdBuffer->Attributes.pAttriVe);
8186 attriExt->bUseVirtualEngineHint = true;
8187 attriExt->VEngineHintParams.NeedSyncWithPrevious = 1;
8188 }
8189 }
8190
8191 return CodechalEncodeAvcEnc::SendPrologWithFrameTracking(cmdBuffer, frameTracking, mmioRegister);
8192 }
8193
InitKernelStateMe()8194 MOS_STATUS CodechalEncodeAvcEncG11::InitKernelStateMe()
8195 {
8196 m_hmeKernel = MOS_New(CodechalKernelHmeG11, this);
8197 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hmeKernel);
8198 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hmeKernel->Initialize(
8199 GetCommonKernelHeaderAndSizeG11,
8200 m_kernelBase,
8201 m_kuidCommon));
8202 return MOS_STATUS_SUCCESS;
8203 }
8204
ResizeOnResChange()8205 void CodechalEncodeAvcEncG11::ResizeOnResChange()
8206 {
8207 CODECHAL_ENCODE_FUNCTION_ENTER;
8208
8209 CodechalEncoderState::ResizeOnResChange();
8210
8211 // need to re-allocate surfaces according to resolution
8212 m_swScoreboardState->ReleaseResources();
8213 }
8214
UpdateCmdBufAttribute(PMOS_COMMAND_BUFFER cmdBuffer,bool renderEngineInUse)8215 MOS_STATUS CodechalEncodeAvcEncG11::UpdateCmdBufAttribute(
8216 PMOS_COMMAND_BUFFER cmdBuffer,
8217 bool renderEngineInUse)
8218 {
8219 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
8220
8221 // should not be there. Will remove it in the next change
8222 CODECHAL_ENCODE_FUNCTION_ENTER;
8223 if (MOS_VE_SUPPORTED(m_osInterface) && cmdBuffer->Attributes.pAttriVe)
8224 {
8225 PMOS_CMD_BUF_ATTRI_VE attriExt =
8226 (PMOS_CMD_BUF_ATTRI_VE)(cmdBuffer->Attributes.pAttriVe);
8227
8228 memset((void *)attriExt, 0, sizeof(MOS_CMD_BUF_ATTRI_VE));
8229 attriExt->bUseVirtualEngineHint =
8230 attriExt->VEngineHintParams.NeedSyncWithPrevious = !renderEngineInUse;
8231 }
8232
8233 return eStatus;
8234 }
8235
8236 #if USE_CODECHAL_DEBUG_TOOL
PopulateBrcInitParam(void * cmd)8237 MOS_STATUS CodechalEncodeAvcEncG11::PopulateBrcInitParam(
8238 void *cmd)
8239 {
8240 CODECHAL_DEBUG_FUNCTION_ENTER;
8241
8242 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
8243
8244 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
8245 {
8246 return MOS_STATUS_SUCCESS;
8247 }
8248
8249 BrcInitResetCurbeG11 *curbe = (BrcInitResetCurbeG11 *)cmd;
8250
8251 if (m_pictureCodingType == I_TYPE)
8252 {
8253 m_avcPar->MBBRCEnable = bMbBrcEnabled;
8254 m_avcPar->MBRC = bMbBrcEnabled;
8255 m_avcPar->BitRate = curbe->m_dw3.AverageBitRate;
8256 m_avcPar->InitVbvFullnessInBit = curbe->m_dw1.InitBufFullInBits;
8257 m_avcPar->MaxBitRate = curbe->m_dw4.MaxBitRate;
8258 m_avcPar->VbvSzInBit = curbe->m_dw2.BufSizeInBits;
8259 m_avcPar->AvbrAccuracy = curbe->m_dw10.AVBRAccuracy;
8260 m_avcPar->AvbrConvergence = curbe->m_dw11.AVBRConvergence;
8261 m_avcPar->SlidingWindowSize = curbe->m_dw22.SlidingWindowSize;
8262 m_avcPar->LongTermInterval = curbe->m_dw24.LongTermInterval;
8263 }
8264
8265 return MOS_STATUS_SUCCESS;
8266 }
8267
PopulateBrcUpdateParam(void * cmd)8268 MOS_STATUS CodechalEncodeAvcEncG11::PopulateBrcUpdateParam(
8269 void *cmd)
8270 {
8271 CODECHAL_DEBUG_FUNCTION_ENTER;
8272
8273 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
8274
8275 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
8276 {
8277 return MOS_STATUS_SUCCESS;
8278 }
8279
8280 FrameBrcUpdateCurbe *curbe = (FrameBrcUpdateCurbe *)cmd;
8281
8282 if (m_pictureCodingType == I_TYPE)
8283 {
8284 m_avcPar->EnableMultipass = (curbe->m_dw5.MaxNumPAKs > 0) ? 1 : 0;
8285 m_avcPar->MaxNumPakPasses = curbe->m_dw5.MaxNumPAKs;
8286 m_avcPar->SlidingWindowEnable = curbe->m_dw6.EnableSlidingWindow;
8287 m_avcPar->FrameSkipEnable = curbe->m_dw6.EnableForceToSkip;
8288 m_avcPar->UserMaxFrame = curbe->m_dw19.UserMaxFrame;
8289 }
8290 else
8291 {
8292 m_avcPar->UserMaxFrameP = curbe->m_dw19.UserMaxFrame;
8293 }
8294
8295 return MOS_STATUS_SUCCESS;
8296 }
8297
PopulateEncParam(uint8_t meMethod,void * cmd)8298 MOS_STATUS CodechalEncodeAvcEncG11::PopulateEncParam(
8299 uint8_t meMethod,
8300 void *cmd)
8301 {
8302 CODECHAL_DEBUG_FUNCTION_ENTER;
8303
8304 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
8305
8306 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
8307 {
8308 return MOS_STATUS_SUCCESS;
8309 }
8310
8311 MbencCurbe *curbe = (MbencCurbe *)cmd;
8312
8313 if (m_pictureCodingType == I_TYPE)
8314 {
8315 m_avcPar->MRDisableQPCheck = MRDisableQPCheck[m_targetUsage];
8316 m_avcPar->AllFractional =
8317 CODECHAL_ENCODE_AVC_AllFractional_Common[m_targetUsage & 0x7];
8318 m_avcPar->DisableAllFractionalCheckForHighRes =
8319 CODECHAL_ENCODE_AVC_DisableAllFractionalCheckForHighRes_Common[m_targetUsage & 0x7];
8320 m_avcPar->EnableAdaptiveSearch = curbe->m_dw37.AdaptiveEn;
8321 m_avcPar->EnableFBRBypass = curbe->m_dw4.EnableFBRBypass;
8322 m_avcPar->BlockBasedSkip = curbe->m_dw3.BlockBasedSkipEnable;
8323 m_avcPar->MADEnableFlag = curbe->m_dw34.MADEnableFlag;
8324 m_avcPar->MBTextureThreshold = curbe->m_dw60.MBTextureThreshold;
8325 m_avcPar->EnableMBFlatnessCheckOptimization = curbe->m_dw34.EnableMBFlatnessChkOptimization;
8326 m_avcPar->EnableArbitrarySliceSize = curbe->m_dw34.ArbitraryNumMbsPerSlice;
8327 m_avcPar->RefThresh = curbe->m_dw38.RefThreshold;
8328 m_avcPar->EnableWavefrontOptimization = curbe->m_dw4.EnableWavefrontOptimization;
8329 m_avcPar->MaxLenSP = curbe->m_dw2.LenSP;
8330 m_avcPar->DisableExtendedMvCostRange = !curbe->m_dw1.ExtendedMvCostRange;
8331 }
8332 else if (m_pictureCodingType == P_TYPE)
8333 {
8334 m_avcPar->MEMethod = meMethod;
8335 m_avcPar->HMECombineLen = HMECombineLen[m_targetUsage];
8336 m_avcPar->FTQBasedSkip = FTQBasedSkip[m_targetUsage];
8337 m_avcPar->MultiplePred = MultiPred[m_targetUsage];
8338 m_avcPar->EnableAdaptiveIntraScaling = bAdaptiveIntraScalingEnable;
8339 m_avcPar->StaticFrameIntraCostScalingRatioP = 240;
8340 m_avcPar->SubPelMode = curbe->m_dw3.SubPelMode;
8341 m_avcPar->HMECombineOverlap = curbe->m_dw36.HMECombineOverlap;
8342 m_avcPar->SearchX = curbe->m_dw5.RefWidth;
8343 m_avcPar->SearchY = curbe->m_dw5.RefHeight;
8344 m_avcPar->SearchControl = curbe->m_dw3.SearchCtrl;
8345 m_avcPar->EnableAdaptiveTxDecision = curbe->m_dw34.EnableAdaptiveTxDecision;
8346 m_avcPar->TxDecisionThr = curbe->m_dw60.TxDecisonThreshold;
8347 m_avcPar->EnablePerMBStaticCheck = curbe->m_dw34.EnablePerMBStaticCheck;
8348 m_avcPar->EnableAdaptiveSearchWindowSize = curbe->m_dw34.EnableAdaptiveSearchWindowSize;
8349 m_avcPar->EnableIntraCostScalingForStaticFrame = curbe->m_dw4.EnableIntraCostScalingForStaticFrame;
8350 m_avcPar->BiMixDisable = curbe->m_dw0.BiMixDis;
8351 m_avcPar->SurvivedSkipCost = (curbe->m_dw7.NonSkipZMvAdded << 1) + curbe->m_dw7.NonSkipModeAdded;
8352 m_avcPar->UniMixDisable = curbe->m_dw1.UniMixDisable;
8353 }
8354 else if (m_pictureCodingType == B_TYPE)
8355 {
8356 m_avcPar->BMEMethod = meMethod;
8357 m_avcPar->HMEBCombineLen = HMEBCombineLen[m_targetUsage];
8358 m_avcPar->StaticFrameIntraCostScalingRatioB = 200;
8359 m_avcPar->BSearchX = curbe->m_dw5.RefWidth;
8360 m_avcPar->BSearchY = curbe->m_dw5.RefHeight;
8361 m_avcPar->BSearchControl = curbe->m_dw3.SearchCtrl;
8362 m_avcPar->BSkipType = curbe->m_dw3.SkipType;
8363 m_avcPar->DirectMode = curbe->m_dw34.bDirectMode;
8364 m_avcPar->BiWeight = curbe->m_dw1.BiWeight;
8365 }
8366
8367 return MOS_STATUS_SUCCESS;
8368 }
8369
PopulatePakParam(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER secondLevelBatchBuffer)8370 MOS_STATUS CodechalEncodeAvcEncG11::PopulatePakParam(
8371 PMOS_COMMAND_BUFFER cmdBuffer,
8372 PMHW_BATCH_BUFFER secondLevelBatchBuffer)
8373 {
8374 CODECHAL_DEBUG_FUNCTION_ENTER;
8375
8376 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
8377
8378 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
8379 {
8380 return MOS_STATUS_SUCCESS;
8381 }
8382
8383 uint8_t *data = nullptr;
8384 MOS_LOCK_PARAMS lockFlags;
8385 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
8386 lockFlags.ReadOnly = 1;
8387
8388 if (cmdBuffer != nullptr)
8389 {
8390 data = (uint8_t*)(cmdBuffer->pCmdPtr - (mhw_vdbox_mfx_g11_X::MFX_AVC_IMG_STATE_CMD::byteSize / sizeof(uint32_t)));
8391 }
8392 else if (secondLevelBatchBuffer != nullptr)
8393 {
8394 data = secondLevelBatchBuffer->pData;
8395 }
8396 else
8397 {
8398 data = (uint8_t*)m_osInterface->pfnLockResource(m_osInterface, &BrcBuffers.resBrcImageStatesReadBuffer[m_currRecycledBufIdx], &lockFlags);
8399 }
8400
8401 CODECHAL_DEBUG_CHK_NULL(data);
8402
8403 mhw_vdbox_mfx_g11_X::MFX_AVC_IMG_STATE_CMD mfxCmd;
8404 mfxCmd = *(mhw_vdbox_mfx_g11_X::MFX_AVC_IMG_STATE_CMD *)(data);
8405
8406 if (m_pictureCodingType == I_TYPE)
8407 {
8408 m_avcPar->TrellisQuantizationEnable = mfxCmd.DW5.TrellisQuantizationEnabledTqenb;
8409 m_avcPar->EnableAdaptiveTrellisQuantization = mfxCmd.DW5.TrellisQuantizationEnabledTqenb;
8410 m_avcPar->TrellisQuantizationRounding = mfxCmd.DW5.TrellisQuantizationRoundingTqr;
8411 m_avcPar->TrellisQuantizationChromaDisable = mfxCmd.DW5.TrellisQuantizationChromaDisableTqchromadisable;
8412 m_avcPar->ExtendedRhoDomainEn = mfxCmd.DW17.ExtendedRhodomainStatisticsEnable;
8413 }
8414
8415 if (data && (cmdBuffer == nullptr) && (secondLevelBatchBuffer == nullptr))
8416 {
8417 m_osInterface->pfnUnlockResource(
8418 m_osInterface,
8419 &BrcBuffers.resBrcImageStatesReadBuffer[m_currRecycledBufIdx]);
8420 }
8421
8422 return MOS_STATUS_SUCCESS;
8423 }
8424 #endif
8425