1 /*
2 * Copyright (c) 2018, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encode_vp8_g11.cpp
24 //! \brief VP8 dual-pipe encoder for GEN11.
25 //!
26
27 #include "codechal_encode_vp8_g11.h"
28 #include "codeckrnheader.h"
29 #ifndef _FULL_OPEN_SOURCE
30 #include "igcodeckrn_g11.h"
31 #include "igcodeckrn_g11_icllp.h"
32 #endif
33 #include "mhw_vdbox_mfx_hwcmd_g11_X.h"
34
35 #define INTRA_PROBABILIY 63
36 #define INTER_LAST_PROBABILIY 255
37 #define INTER_GOLD_PROBABILIY 128
38 #define NAX_NUM_TEMPORAL_LAYERS 4
39
40 enum CodechalBindingTableOffsetVp8BrcInitResetG11
41 {
42 CODECHAL_VP8_BRC_INIT_RESET_HISTORY_G11 = 0,
43 CODECHAL_VP8_BRC_INIT_RESET_DISTORTION_G11 = 1,
44 CODECHAL_VP8_BRC_INIT_RESET_NUM_SURFACES_G11 = 2
45 };
46
47 enum CodechalBindingTableOffsetVp8BrcUpdateG11
48 {
49 CODECHAL_VP8_BRC_UPDATE_HISTORY_G11 = 1,
50 CODECHAL_VP8_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G11 = 2,
51 CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_READ_G11 = 3,
52 CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_WRITE_G11 = 4,
53 CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_READ_G11 = 5,
54 CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_WRITE_G11 = 6,
55 CODECHAL_VP8_BRC_UPDATE_DISTORTION_SURFACE_G11 = 7,
56 CODECHAL_VP8_BRC_UPDATE_CONSTANT_DATA_G11 = 8,
57 CODECHAL_VP8_BRC_UPDATE_SEGMENT_MAP_G11 = 9,
58 CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_READ_G11 = 10,
59 CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_WRITE_G11 = 11,
60 CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_READ_G11 = 12,
61 CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_WRITE_G11 = 13,
62 CODECHAL_VP8_BRC_UPDATE_NUM_SURFACES_G11 = 14
63 };
64
65 enum CodechalBindingTableOffsetVp8MeG11
66 {
67 CODECHAL_VP8_ME_MV_DATA_G11 = 0,
68 CODECHAL_VP8_16xME_MV_DATA_G11 = 2,
69 CODECHAL_VP8_ME_DISTORTION_G11 = 3,
70 CODECHAL_VP8_ME_MIN_DIST_BRC_DATA_G11 = 4,
71 CODECHAL_VP8_VME_INTER_PRED_G11 = 5,
72 CODECHAL_VP8_ME_REF1_PIC_G11 = 6,
73 CODECHAL_VP8_ME_REF2_PIC_G11 = 8,
74 CODECHAL_VP8_ME_REF3_PIC_G11 = 10,
75 CODECHAL_VP8_ME_NUM_SURFACES_G11 = 11
76 };
77
78 enum CodechalBindingTableOffsetVp8MbencG11
79 {
80 CODECHAL_VP8_MBENC_PER_MB_OUT_G11 = 0,
81 CODECHAL_VP8_MBENC_CURR_Y_G11 = 1,
82 CODECHAL_VP8_MBENC_CURR_UV_G11 = 2,
83 };
84
85 enum CodechalBindingTableOffsetVp8MbencIFrameG11
86 {
87 CODECHAL_VP8_MBENC_MB_MODE_COST_LUMA_G11 = 3,
88 CODECHAL_VP8_MBENC_BLOCK_MODE_COST_G11 = 4,
89 CODECHAL_VP8_MBENC_CHROMA_RECON_G11 = 5,
90 CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G11 = 6,
91 CODECHAL_VP8_MBENC_HISTOGRAM_G11 = 7,
92 CODECHAL_VP8_MBENC_I_VME_DEBUG_STREAMOUT_G11 = 8,
93 CODECHAL_VP8_MBENC_VME_G11 = 9,
94 CODECHAL_VP8_MBENC_IDIST_G11 = 10,
95 CODECHAL_VP8_MBENC_CURR_Y_DOWNSCALED_G11 = 11,
96 CODECHAL_VP8_MBENC_VME_Coarse_Intra_G11 = 12,
97 CODECHAL_VP8_MBENC_I_SWSCOREBOARD_G11 = 13
98 };
99
100 enum CodechalBindingTableOffsetVp8MbencPFrameG11
101 {
102 CODECHAL_VP8_MBENC_MV_DATA_FROM_ME_G11 = 3,
103 CODECHAL_VP8_MBENC_IND_MV_DATA_G11 = 4,
104 CODECHAL_VP8_MBENC_REF_MB_COUNT_G11 = 5,
105 CODECHAL_VP8_MBENC_INTER_PRED_G11 = 8,
106 CODECHAL_VP8_MBENC_REF1_PIC_G11 = 9,
107 CODECHAL_VP8_MBENC_REF2_PIC_G11 = 11,
108 CODECHAL_VP8_MBENC_REF3_PIC_G11 = 13,
109 CODECHAL_VP8_MBENC_P_PER_MB_QUANT_G11 = 14,
110 CODECHAL_VP8_MBEBC_INTER_PRED_DISTORTION_G11 = 15,
111 CODECHAL_VP8_MBEBC_PER_MV_DATA_G11 = 16,
112 CODECHAL_VP8_MBENC_MODE_COST_UPDATE_G11 = 17,
113 CODECHAL_VP8_MBENC_P_VME_DEBUG_STREAMOUT_G11 = 18,
114 CODECHAL_VP8_MBENC_P_SWSCOREBOARD_G11 = 19,
115 CODECHAL_VP8_MBENC_NUM_SURFACES_G11 = 20,
116 };
117
118 enum CodechalBindingTableOffsetVp8MpuFhbG11
119 {
120 CODECHAL_VP8_MPU_FHB_HISTOGRAM_G11 = 0,
121 CODECHAL_VP8_MPU_FHB_REF_MODE_PROBABILITY_G11 = 1,
122 CODECHAL_VP8_MPU_FHB_CURR_MODE_PROBABILITY_G11 = 2,
123 CODECHAL_VP8_MPU_FHB_REF_TOKEN_PROBABILITY_G11 = 3,
124 CODECHAL_VP8_MPU_FHB_CURR_TOKEN_PROBABILITY_G11 = 4,
125 CODECHAL_VP8_MPU_FHB_HEADER_BITSTREAM_G11 = 5,
126 CODECHAL_VP8_MPU_FHB_HEADER_METADATA_G11 = 6,
127 CODECHAL_VP8_MPU_FHB_PICTURE_STATE_G11 = 7,
128 CODECHAL_VP8_MPU_FHB_MPU_BITSTREAM_G11 = 8,
129 CODECHAL_VP8_MPU_FHB_TOKEN_BITS_DATA_TABLE_G11 = 9,
130 CODECHAL_VP8_MPU_FHB_VME_DEBUG_STREAMOUT_G11 = 10,
131 CODECHAL_VP8_MPU_FHB_ENTROPY_COST_TABLE_G11 = 11,
132 CODECHAL_VP8_MPU_MODE_COST_UPDATE_G11 = 12,
133 CODECHAL_VP8_MPU_FHB_NUM_SURFACES_G11 = 13
134 };
135
136 enum CodechalBindingTableOffsetVp8TpuFhbG11
137 {
138 CODECHAL_VP8_TPU_FHB_PAK_TOKEN_STATISTICS_G11 = 0,
139 CODECHAL_VP8_TPU_FHB_TOKEN_UPDATE_FLAGS_G11 = 1,
140 CODECHAL_VP8_TPU_FHB_ENTROPY_COST_TABLE_G11 = 2,
141 CODECHAL_VP8_TPU_FHB_HEADER_BITSTREAM_G11 = 3,
142 CODECHAL_VP8_TPU_FHB_DEFAULT_TOKEN_PROBABILITY_G11 = 4,
143 CODECHAL_VP8_TPU_FHB_PICTURE_STATE_G11 = 5,
144 CODECHAL_VP8_TPU_FHB_MPU_CURBE_DATA_G11 = 6,
145 CODECHAL_VP8_TPU_FHB_HEADER_METADATA_G11 = 7,
146 CODECHAL_VP8_TPU_FHB_TOKEN_PROBABILITY_G11 = 8,
147 CODECHAL_VP8_TPU_FHB_PAK_HW_PASS1_PROBABILITY_G11 = 9,
148 CODECHAL_VP8_TPU_FHB_KEY_TOKEN_PROBABILITY_G11 = 10,
149 CODECHAL_VP8_TPU_FHB_UPDATED_TOKEN_PROBABILITY_G11 = 11,
150 CODECHAL_VP8_TPU_FHB_PAK_HW_PASS2_PROBABILITY_G11 = 12,
151 CODECHAL_VP8_TPU_FHB_VME_DEBUG_STREAMOUT_G11 = 13,
152 CODECHAL_VP8_TPU_FHB_REPAK_DECISION_G11 = 14,
153 CODECHAL_VP8_TPU_FHB_NUM_SURFACES_G11 = 15
154 };
155
156 struct Vp8BrcInitResetCurbeG11
157 {
158 union
159 {
160 struct
161 {
162 uint32_t ProfileLevelMaxFrame : 32;
163 };
164 struct
165 {
166 uint32_t Value;
167 };
168 } DW0;
169
170 union
171 {
172 struct
173 {
174 uint32_t InitBufFullInBits : 32;
175 };
176 struct
177 {
178 uint32_t Value;
179 };
180 } DW1;
181
182 union
183 {
184 struct
185 {
186 uint32_t BufSizeInBits : 32;
187 };
188 struct
189 {
190 uint32_t Value;
191 };
192 } DW2;
193
194 union
195 {
196 struct
197 {
198 uint32_t AverageBitRate : 32;
199 };
200 struct
201 {
202 uint32_t Value;
203 };
204 } DW3;
205
206 union
207 {
208 struct
209 {
210 uint32_t MaxBitRate : 32;
211 };
212 struct
213 {
214 uint32_t Value;
215 };
216 } DW4;
217
218 union
219 {
220 struct
221 {
222 uint32_t MinBitRate : 32;
223 };
224 struct
225 {
226 uint32_t Value;
227 };
228 } DW5;
229
230 union
231 {
232 struct
233 {
234 uint32_t FrameRateM : 32;
235 };
236 struct
237 {
238 uint32_t Value;
239 };
240 } DW6;
241
242 union
243 {
244 struct
245 {
246 uint32_t FrameRateD : 32;
247 };
248 struct
249 {
250 uint32_t Value;
251 };
252 } DW7;
253
254 union
255 {
256 struct
257 {
258 uint32_t BRCFlag : 16;
259 uint32_t GopP : 16;
260 };
261 struct
262 {
263 uint32_t Value;
264 };
265 } DW8;
266
267 union
268 {
269 struct
270 {
271 uint32_t Reserved : 16;
272 uint32_t FrameWidthInBytes : 16;
273 };
274 struct
275 {
276 uint32_t Value;
277 };
278 } DW9;
279
280 union
281 {
282 struct
283 {
284 uint32_t FrameHeightInBytes : 16;
285 uint32_t AVBRAccuracy : 16;
286 };
287 struct
288 {
289 uint32_t Value;
290 };
291 } DW10;
292
293 union
294 {
295 struct
296 {
297 uint32_t AVBRConvergence : 16;
298 uint32_t MinQP : 16;
299 };
300 struct
301 {
302 uint32_t Value;
303 };
304 } DW11;
305
306 union
307 {
308 struct
309 {
310 uint32_t MaxQP : 16;
311 uint32_t LevelQP : 16;
312 };
313 struct
314 {
315 uint32_t Value;
316 };
317 } DW12;
318
319 union
320 {
321 struct
322 {
323 uint32_t MaxSection_pct : 16;
324 uint32_t OverShootCBR_pct : 16;
325 };
326 struct
327 {
328 uint32_t Value;
329 };
330 } DW13;
331
332 union
333 {
334 struct
335 {
336 uint32_t VBRBias_pct : 16;
337 uint32_t MinSection_pct : 16;
338 };
339 struct
340 {
341 uint32_t Value;
342 };
343 } DW14;
344
345 union
346 {
347 struct
348 {
349 uint32_t InstantRateThreshold0ForP : 8;
350 uint32_t InstantRateThreshold1ForP : 8;
351 uint32_t InstantRateThreshold2ForP : 8;
352 uint32_t InstantRateThreshold3ForP : 8;
353 };
354 struct
355 {
356 uint32_t Value;
357 };
358 } DW15;
359
360 union
361 {
362 struct
363 {
364 uint32_t Reserved : 32;
365 };
366 struct
367 {
368 uint32_t Value;
369 };
370 } DW16;
371
372 union
373 {
374 struct
375 {
376 uint32_t InstantRateThreshold0ForI : 8;
377 uint32_t InstantRateThreshold1ForI : 8;
378 uint32_t InstantRateThreshold2ForI : 8;
379 uint32_t InstantRateThreshold3ForI : 8;
380 };
381 struct
382 {
383 uint32_t Value;
384 };
385 } DW17;
386
387 union
388 {
389 struct
390 {
391 uint32_t DeviationThreshold0ForP : 8; // Signed byte
392 uint32_t DeviationThreshold1ForP : 8; // Signed byte
393 uint32_t DeviationThreshold2ForP : 8; // Signed byte
394 uint32_t DeviationThreshold3ForP : 8; // Signed byte
395 };
396 struct
397 {
398 uint32_t Value;
399 };
400 } DW18;
401
402 union
403 {
404 struct
405 {
406 uint32_t DeviationThreshold4ForP : 8; // Signed byte
407 uint32_t DeviationThreshold5ForP : 8; // Signed byte
408 uint32_t DeviationThreshold6ForP : 8; // Signed byte
409 uint32_t DeviationThreshold7ForP : 8; // Signed byte
410 };
411 struct
412 {
413 uint32_t Value;
414 };
415 } DW19;
416
417 union
418 {
419 struct
420 {
421 uint32_t DeviationThreshold0ForVBR : 8; // Signed byte
422 uint32_t DeviationThreshold1ForVBR : 8; // Signed byte
423 uint32_t DeviationThreshold2ForVBR : 8; // Signed byte
424 uint32_t DeviationThreshold3ForVBR : 8; // Signed byte
425 };
426 struct
427 {
428 uint32_t Value;
429 };
430 } DW20;
431
432 union
433 {
434 struct
435 {
436 uint32_t DeviationThreshold4ForVBR : 8; // Signed byte
437 uint32_t DeviationThreshold5ForVBR : 8; // Signed byte
438 uint32_t DeviationThreshold6ForVBR : 8; // Signed byte
439 uint32_t DeviationThreshold7ForVBR : 8; // Signed byte
440 };
441 struct
442 {
443 uint32_t Value;
444 };
445 } DW21;
446
447 union
448 {
449 struct
450 {
451 uint32_t DeviationThreshold0ForI : 8; // Signed byte
452 uint32_t DeviationThreshold1ForI : 8; // Signed byte
453 uint32_t DeviationThreshold2ForI : 8; // Signed byte
454 uint32_t DeviationThreshold3ForI : 8; // Signed byte
455 };
456 struct
457 {
458 uint32_t Value;
459 };
460 } DW22;
461
462 union
463 {
464 struct
465 {
466 uint32_t DeviationThreshold4ForI : 8; // Signed byte
467 uint32_t DeviationThreshold5ForI : 8; // Signed byte
468 uint32_t DeviationThreshold6ForI : 8; // Signed byte
469 uint32_t DeviationThreshold7ForI : 8; // Signed byte
470 };
471 struct
472 {
473 uint32_t Value;
474 };
475 } DW23;
476
477 union
478 {
479 struct
480 {
481 uint32_t NumTLevels : 8;
482 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer0 : 8;
483 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer1 : 8;
484 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer2 : 8;
485 };
486 struct
487 {
488 uint32_t Value;
489 };
490 } DW24;
491
492 union
493 {
494 struct
495 {
496 uint32_t INITBCK_MaxLevel_Ratio_U8_Layer3 : 8;
497 uint32_t Reserved : 24;
498 };
499 struct
500 {
501 uint32_t Value;
502 };
503 } DW25;
504
505 union
506 {
507 struct
508 {
509 uint32_t HistoryBufferBTI : 32; // Signed byte
510 };
511 struct
512 {
513 uint32_t Value;
514 };
515 } DW26;
516
517 union
518 {
519 struct
520 {
521 uint32_t DistortionBufferBTI : 32; // Signed byte
522 };
523 struct
524 {
525 uint32_t Value;
526 };
527 } DW27;
528
529 };
530
531 struct Vp8BrcUpdateCurbeG11
532 {
533 union
534 {
535 struct
536 {
537 uint32_t TargetSize : 32;
538 };
539 struct
540 {
541 uint32_t Value;
542 };
543 } DW0;
544
545 union
546 {
547 struct
548 {
549 uint32_t FrameNumber : 32;
550 };
551 struct
552 {
553 uint32_t Value;
554 };
555 } DW1;
556
557 union
558 {
559 struct
560 {
561 uint32_t PictureHeaderSize : 32;
562 };
563 struct
564 {
565 uint32_t Value;
566 };
567 } DW2;
568
569 union
570 {
571 struct
572 {
573 uint32_t startGAdjFrame0 : 16;
574 uint32_t startGAdjFrame1 : 16;
575 };
576 struct
577 {
578 uint32_t Value;
579 };
580 } DW3;
581
582 union
583 {
584 struct
585 {
586 uint32_t startGAdjFrame2 : 16;
587 uint32_t startGAdjFrame3 : 16;
588 };
589 struct
590 {
591 uint32_t Value;
592 };
593 } DW4;
594
595 union
596 {
597 struct
598 {
599 uint32_t TargetSizeFlag : 8;
600 uint32_t BRCFlag : 8;
601 uint32_t MaxNumPAKs : 8;
602 uint32_t CurrFrameType : 8;
603 };
604 struct
605 {
606 uint32_t Value;
607 };
608 } DW5;
609
610 // This offset indicates the byte position of the q_scale_type bit
611 // in the 2nd level batch buffer containing the INSERT_OBJ command
612 // for inserting the picture header data into the bitstream.
613 // This offset includes the 8 bytes of the INSERT command at the
614 // beginning of the buffer.
615 // Similarly for the VbvDelay field.
616 union
617 {
618 struct
619 {
620 uint32_t TID : 8;
621 uint32_t NumTLevels : 8;
622 uint32_t Reserved : 16;
623 };
624 struct
625 {
626 uint32_t Value;
627 };
628 } DW6;
629
630 // This size is the size of the entire 2nd level batch buffer
631 // containing the INSERT_OBJ command for inserting the
632 // picture header data into the bitstream. It includes the batch buffer end
633 // command at the end of the buffer.
634 union
635 {
636 struct
637 {
638 uint32_t Reserved0 : 32;
639 };
640 struct
641 {
642 uint32_t Value;
643 };
644
645 } DW7;
646
647 union
648 {
649 struct
650 {
651 uint32_t StartGlobalAdjustMult0 : 8;
652 uint32_t StartGlobalAdjustMult1 : 8;
653 uint32_t StartGlobalAdjustMult2 : 8;
654 uint32_t StartGlobalAdjustMult3 : 8;
655 };
656 struct
657 {
658 uint32_t Value;
659 };
660 } DW8;
661
662 union
663 {
664 struct
665 {
666 uint32_t StartGlobalAdjustMult4 : 8;
667 uint32_t StartGlobalAdjustDiv0 : 8;
668 uint32_t StartGlobalAdjustDiv1 : 8;
669 uint32_t StartGlobalAdjustDiv2 : 8;
670 };
671 struct
672 {
673 uint32_t Value;
674 };
675 } DW9;
676
677 union
678 {
679 struct
680 {
681 uint32_t StartGlobalAdjustDiv3 : 8;
682 uint32_t StartGlobalAdjustDiv4 : 8;
683 uint32_t QPThreshold0 : 8;
684 uint32_t QPThreshold1 : 8;
685 };
686 struct
687 {
688 uint32_t Value;
689 };
690 } DW10;
691
692 union
693 {
694 struct
695 {
696 uint32_t QPThreshold2 : 8;
697 uint32_t QPThreshold3 : 8;
698 uint32_t gRateRatioThreshold0 : 8;
699 uint32_t gRateRatioThreshold1 : 8;
700 };
701 struct
702 {
703 uint32_t Value;
704 };
705 } DW11;
706
707 union
708 {
709 struct
710 {
711 uint32_t gRateRatioThreshold2 : 8;
712 uint32_t gRateRatioThreshold3 : 8;
713 uint32_t gRateRatioThreshold4 : 8;
714 uint32_t gRateRatioThreshold5 : 8;
715 };
716 struct
717 {
718 uint32_t Value;
719 };
720 } DW12;
721
722 union
723 {
724 struct
725 {
726 uint32_t gRateRatioThresholdQP0 : 8;
727 uint32_t gRateRatioThresholdQP1 : 8;
728 uint32_t gRateRatioThresholdQP2 : 8;
729 uint32_t gRateRatioThresholdQP3 : 8;
730 };
731 struct
732 {
733 uint32_t Value;
734 };
735 } DW13;
736
737 union
738 {
739 struct
740 {
741 uint32_t gRateRatioThresholdQP4 : 8;
742 uint32_t gRateRatioThresholdQP5 : 8;
743 uint32_t gRateRatioThresholdQP6 : 8;
744 uint32_t IndexOfPreviousQP : 8;
745 };
746 struct
747 {
748 uint32_t Value;
749 };
750 } DW14;
751
752 union
753 {
754 struct
755 {
756 uint32_t FrameWidthInMB : 16;
757 uint32_t FrameHeightInMB : 16;
758 };
759 struct
760 {
761 uint32_t Value;
762 };
763 } DW15;
764
765 union
766 {
767 struct
768 {
769 uint32_t PFrameQPSeg0 : 8;
770 uint32_t PFrameQPSeg1 : 8;
771 uint32_t PFrameQPSeg2 : 8;
772 uint32_t PFrameQPSeg3 : 8;
773 };
774 struct
775 {
776 uint32_t Value;
777 };
778 } DW16;
779
780 union
781 {
782 struct
783 {
784 uint32_t KeyFrameQPSeg0 : 8;
785 uint32_t KeyFrameQPSeg1 : 8;
786 uint32_t KeyFrameQPSeg2 : 8;
787 uint32_t KeyFrameQPSeg3 : 8;
788 };
789 struct
790 {
791 uint32_t Value;
792 };
793 } DW17;
794
795 union
796 {
797 struct
798 {
799 uint32_t QDeltaPlane0 : 8;
800 uint32_t QDeltaPlane1 : 8;
801 uint32_t QDeltaPlane2 : 8;
802 uint32_t QDeltaPlane3 : 8;
803 };
804 struct
805 {
806 uint32_t Value;
807 };
808 } DW18;
809
810 union
811 {
812 struct
813 {
814 uint32_t QDeltaPlane4 : 8;
815 uint32_t QIndex : 8;
816 uint32_t MainRef : 8;
817 uint32_t RefFrameFlags : 8;
818 };
819 struct
820 {
821 uint32_t Value;
822 };
823 } DW19;
824
825 union
826 {
827 struct
828 {
829 uint32_t SegOn : 8;
830 uint32_t MBRC : 8;
831 uint32_t BRCMethod : 8;
832 uint32_t VMEIntraPrediction : 8;
833 };
834 struct
835 {
836 uint32_t Value;
837 };
838 } DW20;
839
840 union
841 {
842 struct
843 {
844 uint32_t CurrentFrameQPIndex : 8;
845 uint32_t LastFrameQPIndex : 8;
846 uint32_t GoldFrameQPIndex : 8;
847 uint32_t AltFrameQPIndex : 8;
848 };
849 struct
850 {
851 uint32_t Value;
852 };
853 } DW21;
854
855 union
856 {
857 struct
858 {
859 uint32_t HistorytBufferBTI : 32;
860 };
861 struct
862 {
863 uint32_t Value;
864 };
865 } DW22;
866
867 union
868 {
869 struct
870 {
871 uint32_t PakStatisticsBTI : 32;
872 };
873 struct
874 {
875 uint32_t Value;
876 };
877 } DW23;
878
879 union
880 {
881 struct
882 {
883 uint32_t MfxVp8EncoderCfgReadBTI :32;
884 };
885 struct
886 {
887 uint32_t Value;
888 };
889 } DW24;
890
891 union
892 {
893 struct
894 {
895 uint32_t MfxVp8EncoderCfgWriteBTI : 32;
896 };
897 struct
898 {
899 uint32_t Value;
900 };
901 } DW25;
902
903 union
904 {
905 struct
906 {
907 uint32_t MBEncCurbeReadBTI : 32;
908 };
909 struct
910 {
911 uint32_t Value;
912 };
913 } DW26;
914
915 union
916 {
917 struct
918 {
919 uint32_t MBEncCurbeWriteBTI : 32;
920 };
921 struct
922 {
923 uint32_t Value;
924 };
925 } DW27;
926
927 union
928 {
929 struct
930 {
931 uint32_t DistortionBTI : 32;
932 };
933 struct
934 {
935 uint32_t Value;
936 };
937 } DW28;
938
939 union
940 {
941 struct
942 {
943 uint32_t ConstantDataBTI : 32;
944 };
945 struct
946 {
947 uint32_t Value;
948 };
949 } DW29;
950
951 union
952 {
953 struct
954 {
955 uint32_t SegmentMapBTI : 32;
956 };
957 struct
958 {
959 uint32_t Value;
960 };
961 } DW30;
962
963 union
964 {
965 struct
966 {
967 uint32_t MpuCurbeReadBTI : 32;
968 };
969 struct
970 {
971 uint32_t Value;
972 };
973 } DW31;
974
975 union
976 {
977 struct
978 {
979 uint32_t MpuCurbeWriteBTI : 32;
980 };
981 struct
982 {
983 uint32_t Value;
984 };
985 } DW32;
986
987 union
988 {
989 struct
990 {
991 uint32_t TpuCurbeReadBTI : 32;
992 };
993 struct
994 {
995 uint32_t Value;
996 };
997 } DW33;
998
999 union
1000 {
1001 struct
1002 {
1003 uint32_t TpuCurbeWriteBTI : 32;
1004 };
1005 struct
1006 {
1007 uint32_t Value;
1008 };
1009 } DW34;
1010
1011 };
1012
1013 struct Vp8MeCurbeG11
1014 {
1015 // DW0
1016 union
1017 {
1018 struct
1019 {
1020 uint32_t SkipModeEn : MOS_BITFIELD_BIT(0);
1021 uint32_t AdaptiveEn : MOS_BITFIELD_BIT(1);
1022 uint32_t BiMixDis : MOS_BITFIELD_BIT(2);
1023 uint32_t Reserved0 : MOS_BITFIELD_RANGE(3, 4);
1024 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT(5);
1025 uint32_t Reserved1 : MOS_BITFIELD_BIT(6);
1026 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT(7);
1027 uint32_t Reserved2 : MOS_BITFIELD_RANGE(8,23);
1028 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE(24,31);
1029 };
1030 struct
1031 {
1032 uint32_t Value;
1033 };
1034 } DW0;
1035
1036 // DW1
1037 union
1038 {
1039 struct
1040 {
1041 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE(0,5);
1042 uint32_t Reserved0 : MOS_BITFIELD_RANGE(6,15);
1043 uint32_t BiWeight : MOS_BITFIELD_RANGE(16,21);
1044 uint32_t Reserved1 : MOS_BITFIELD_RANGE(22,27);
1045 uint32_t UniMixDisable : MOS_BITFIELD_BIT(28);
1046 uint32_t Reserved2 : MOS_BITFIELD_RANGE(29,31);
1047 };
1048 struct
1049 {
1050 uint32_t Value;
1051 };
1052 } DW1;
1053
1054 // DW2
1055 union
1056 {
1057 struct
1058 {
1059 uint32_t MaxLenSP : MOS_BITFIELD_RANGE(0,7);
1060 uint32_t MaxNumSU : MOS_BITFIELD_RANGE(8,15);
1061 uint32_t Reserved0 : MOS_BITFIELD_RANGE(16,31);
1062 };
1063 struct
1064 {
1065 uint32_t Value;
1066 };
1067 } DW2;
1068
1069 // DW3
1070 union
1071 {
1072 struct
1073 {
1074 uint32_t SrcSize : MOS_BITFIELD_RANGE(0,1);
1075 uint32_t Reserved0 : MOS_BITFIELD_RANGE(2,3);
1076 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE(4,5);
1077 uint32_t SrcAccess : MOS_BITFIELD_BIT(6);
1078 uint32_t RefAccess : MOS_BITFIELD_BIT(7);
1079 uint32_t SearchCtrl : MOS_BITFIELD_RANGE(8,10);
1080 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT(11);
1081 uint32_t SubPelMode : MOS_BITFIELD_RANGE(12,13);
1082 uint32_t SkipType : MOS_BITFIELD_BIT(14);
1083 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT(15);
1084 uint32_t InterChromaMode : MOS_BITFIELD_BIT(16);
1085 uint32_t FTEnable : MOS_BITFIELD_BIT(17);
1086 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT(18);
1087 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT(19);
1088 uint32_t InterSAD : MOS_BITFIELD_RANGE(20,21);
1089 uint32_t IntraSAD : MOS_BITFIELD_RANGE(22,23);
1090 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE(24,30);
1091 uint32_t Reserved1 : MOS_BITFIELD_BIT(31);
1092 };
1093 struct
1094 {
1095 uint32_t Value;
1096 };
1097 } DW3;
1098
1099 // DW4
1100 union
1101 {
1102 struct
1103 {
1104 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,7);
1105 uint32_t PictureHeightMinus1 : MOS_BITFIELD_RANGE(8,15);
1106 uint32_t PictureWidth : MOS_BITFIELD_RANGE(16,23);
1107 uint32_t Reserved1 : MOS_BITFIELD_RANGE(24,31);
1108 };
1109 struct
1110 {
1111 uint32_t Value;
1112 };
1113 } DW4;
1114
1115 // DW5
1116 union
1117 {
1118 struct
1119 {
1120 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,7);
1121 uint32_t QpPrimeY : MOS_BITFIELD_RANGE(8,15);
1122 uint32_t RefWidth : MOS_BITFIELD_RANGE(16,23);
1123 uint32_t RefHeight : MOS_BITFIELD_RANGE(24,31);
1124
1125 };
1126 struct
1127 {
1128 uint32_t Value;
1129 };
1130 } DW5;
1131
1132 // DW6
1133 union
1134 {
1135 struct
1136 {
1137 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,2);
1138 uint32_t MEModes : MOS_BITFIELD_RANGE(3,4);
1139 uint32_t Reserved1 : MOS_BITFIELD_RANGE(5,7);
1140 uint32_t SuperCombineDist : MOS_BITFIELD_RANGE(8,15);
1141 uint32_t MaxVmvR : MOS_BITFIELD_RANGE(16,31);
1142 };
1143 struct
1144 {
1145 uint32_t Value;
1146 };
1147 } DW6;
1148
1149 // DW7
1150 union
1151 {
1152 struct
1153 {
1154 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,15);
1155 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE(16,17);
1156 uint32_t BilinearEnable : MOS_BITFIELD_BIT(18);
1157 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT(19);
1158 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT(20);
1159 uint32_t AConlyHAAR : MOS_BITFIELD_BIT(21);
1160 uint32_t RefIDCostMode : MOS_BITFIELD_BIT(22);
1161 uint32_t Reserved1 : MOS_BITFIELD_BIT(23);
1162 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE(24,31);
1163 };
1164 struct
1165 {
1166 uint32_t Value;
1167 };
1168 } DW7;
1169
1170 // DW8
1171 union
1172 {
1173 struct
1174 {
1175 uint32_t Mode0Cost : MOS_BITFIELD_RANGE(0,7);
1176 uint32_t Mode1Cost : MOS_BITFIELD_RANGE(8,15);
1177 uint32_t Mode2Cost : MOS_BITFIELD_RANGE(16,23);
1178 uint32_t Mode3Cost : MOS_BITFIELD_RANGE(24,31);
1179 };
1180 struct
1181 {
1182 uint32_t Value;
1183 };
1184 } DW8;
1185
1186 // DW9
1187 union
1188 {
1189 struct
1190 {
1191 uint32_t Mode4Cost : MOS_BITFIELD_RANGE(0,7);
1192 uint32_t Mode5Cost : MOS_BITFIELD_RANGE(8,15);
1193 uint32_t Mode6Cost : MOS_BITFIELD_RANGE(16,23);
1194 uint32_t Mode7Cost : MOS_BITFIELD_RANGE(24,31);
1195 };
1196 struct
1197 {
1198 uint32_t Value;
1199 };
1200 } DW9;
1201
1202 // DW10
1203 union
1204 {
1205 struct
1206 {
1207 uint32_t Mode8Cost : MOS_BITFIELD_RANGE(0,7);
1208 uint32_t Mode9Cost : MOS_BITFIELD_RANGE(8,15);
1209 uint32_t RefIDCost : MOS_BITFIELD_RANGE(16,23);
1210 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE(24,31);
1211 };
1212 struct
1213 {
1214 uint32_t Value;
1215 };
1216 } DW10;
1217
1218 // DW11
1219 union
1220 {
1221 struct
1222 {
1223 uint32_t MV0Cost : MOS_BITFIELD_RANGE(0,7);
1224 uint32_t MV1Cost : MOS_BITFIELD_RANGE(8,15);
1225 uint32_t MV2Cost : MOS_BITFIELD_RANGE(16,23);
1226 uint32_t MV3Cost : MOS_BITFIELD_RANGE(24,31);
1227 };
1228 struct
1229 {
1230 uint32_t Value;
1231 };
1232 } DW11;
1233
1234 // DW12
1235 union
1236 {
1237 struct
1238 {
1239 uint32_t MV4Cost : MOS_BITFIELD_RANGE(0,7);
1240 uint32_t MV5Cost : MOS_BITFIELD_RANGE(8,15);
1241 uint32_t MV6Cost : MOS_BITFIELD_RANGE(16,23);
1242 uint32_t MV7Cost : MOS_BITFIELD_RANGE(24,31);
1243 };
1244 struct
1245 {
1246 uint32_t Value;
1247 };
1248 } DW12;
1249
1250 // DW13
1251 union
1252 {
1253 struct
1254 {
1255 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE(0,7);
1256 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE(8,15);
1257 uint32_t ActualMBWidth : MOS_BITFIELD_RANGE(16,23);
1258 uint32_t ActualMBHeight : MOS_BITFIELD_RANGE(24,31);
1259 };
1260 struct
1261 {
1262 uint32_t Value;
1263 };
1264 } DW13;
1265
1266 // DW14
1267 union
1268 {
1269 struct
1270 {
1271 uint32_t L0RefPicPolarityBits : MOS_BITFIELD_RANGE(0,7);
1272 uint32_t L1RefPicPolarityBits : MOS_BITFIELD_RANGE(8,9);
1273 uint32_t Reserved : MOS_BITFIELD_RANGE(10,31);
1274 };
1275 struct
1276 {
1277 uint32_t Value;
1278 };
1279 } DW14;
1280
1281 // DW15
1282 union
1283 {
1284 struct
1285 {
1286 uint32_t Reserved : MOS_BITFIELD_RANGE(0,31);
1287 };
1288 struct
1289 {
1290 uint32_t Value;
1291 };
1292 } DW15;
1293
1294 struct
1295 {
1296 // DW16
1297 union
1298 {
1299 struct
1300 {
1301 SearchPathDelta SPDelta_0;
1302 SearchPathDelta SPDelta_1;
1303 SearchPathDelta SPDelta_2;
1304 SearchPathDelta SPDelta_3;
1305 };
1306 struct
1307 {
1308 uint32_t Value;
1309 };
1310 } DW16;
1311
1312 // DW17
1313 union
1314 {
1315 struct
1316 {
1317 SearchPathDelta SPDelta_4;
1318 SearchPathDelta SPDelta_5;
1319 SearchPathDelta SPDelta_6;
1320 SearchPathDelta SPDelta_7;
1321 };
1322 struct
1323 {
1324 uint32_t Value;
1325 };
1326 } DW17;
1327
1328 // DW18
1329 union
1330 {
1331 struct
1332 {
1333 SearchPathDelta SPDelta_8;
1334 SearchPathDelta SPDelta_9;
1335 SearchPathDelta SPDelta_10;
1336 SearchPathDelta SPDelta_11;
1337 };
1338 struct
1339 {
1340 uint32_t Value;
1341 };
1342 } DW18;
1343
1344 // DW19
1345 union
1346 {
1347 struct
1348 {
1349 SearchPathDelta SPDelta_12;
1350 SearchPathDelta SPDelta_13;
1351 SearchPathDelta SPDelta_14;
1352 SearchPathDelta SPDelta_15;
1353 };
1354 struct
1355 {
1356 uint32_t Value;
1357 };
1358 } DW19;
1359
1360 // DW20
1361 union
1362 {
1363 struct
1364 {
1365 SearchPathDelta SPDelta_16;
1366 SearchPathDelta SPDelta_17;
1367 SearchPathDelta SPDelta_18;
1368 SearchPathDelta SPDelta_19;
1369 };
1370 struct
1371 {
1372 uint32_t Value;
1373 };
1374 } DW20;
1375
1376 // DW21
1377 union
1378 {
1379 struct
1380 {
1381 SearchPathDelta SPDelta_20;
1382 SearchPathDelta SPDelta_21;
1383 SearchPathDelta SPDelta_22;
1384 SearchPathDelta SPDelta_23;
1385 };
1386 struct
1387 {
1388 uint32_t Value;
1389 };
1390 } DW21;
1391
1392 // DW22
1393 union
1394 {
1395 struct
1396 {
1397 SearchPathDelta SPDelta_24;
1398 SearchPathDelta SPDelta_25;
1399 SearchPathDelta SPDelta_26;
1400 SearchPathDelta SPDelta_27;
1401 };
1402 struct
1403 {
1404 uint32_t Value;
1405 };
1406 } DW22;
1407
1408 // DW23
1409 union
1410 {
1411 struct
1412 {
1413 SearchPathDelta SPDelta_28;
1414 SearchPathDelta SPDelta_29;
1415 SearchPathDelta SPDelta_30;
1416 SearchPathDelta SPDelta_31;
1417 };
1418 struct
1419 {
1420 uint32_t Value;
1421 };
1422 } DW23;
1423
1424 // DW24
1425 union
1426 {
1427 struct
1428 {
1429 SearchPathDelta SPDelta_32;
1430 SearchPathDelta SPDelta_33;
1431 SearchPathDelta SPDelta_34;
1432 SearchPathDelta SPDelta_35;
1433 };
1434 struct
1435 {
1436 uint32_t Value;
1437 };
1438 } DW24;
1439
1440 // DW25
1441 union
1442 {
1443 struct
1444 {
1445 SearchPathDelta SPDelta_36;
1446 SearchPathDelta SPDelta_37;
1447 SearchPathDelta SPDelta_38;
1448 SearchPathDelta SPDelta_39;
1449 };
1450 struct
1451 {
1452 uint32_t Value;
1453 };
1454 } DW25;
1455
1456 // DW26
1457 union
1458 {
1459 struct
1460 {
1461 SearchPathDelta SPDelta_40;
1462 SearchPathDelta SPDelta_41;
1463 SearchPathDelta SPDelta_42;
1464 SearchPathDelta SPDelta_43;
1465 };
1466 struct
1467 {
1468 uint32_t Value;
1469 };
1470 } DW26;
1471
1472 // DW27
1473 union
1474 {
1475 struct
1476 {
1477 SearchPathDelta SPDelta_44;
1478 SearchPathDelta SPDelta_45;
1479 SearchPathDelta SPDelta_46;
1480 SearchPathDelta SPDelta_47;
1481 };
1482 struct
1483 {
1484 uint32_t Value;
1485 };
1486 } DW27;
1487
1488 // DW28
1489 union
1490 {
1491 struct
1492 {
1493 SearchPathDelta SPDelta_48;
1494 SearchPathDelta SPDelta_49;
1495 SearchPathDelta SPDelta_50;
1496 SearchPathDelta SPDelta_51;
1497 };
1498 struct
1499 {
1500 uint32_t Value;
1501 };
1502 } DW28;
1503
1504 // DW29
1505 union
1506 {
1507 struct
1508 {
1509 SearchPathDelta SPDelta_52;
1510 SearchPathDelta SPDelta_53;
1511 SearchPathDelta SPDelta_54;
1512 SearchPathDelta SPDelta_55;
1513 };
1514 struct
1515 {
1516 uint32_t Value;
1517 };
1518 } DW29;
1519 } SpDelta;
1520
1521 // DW30
1522 union
1523 {
1524 struct
1525 {
1526 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,31);
1527 };
1528 struct
1529 {
1530 uint32_t Value;
1531 };
1532 } DW30;
1533
1534 // DW31
1535 union
1536 {
1537 struct
1538 {
1539 uint32_t Reserved0 : MOS_BITFIELD_RANGE(0,31);
1540 };
1541 struct
1542 {
1543 uint32_t Value;
1544 };
1545 } DW31;
1546
1547 // DW32
1548 union
1549 {
1550 struct
1551 {
1552 uint32_t VP8MeMVOutputDataBTI : MOS_BITFIELD_RANGE(0,31);
1553 };
1554 struct
1555 {
1556 uint32_t Value;
1557 };
1558 } DW32;
1559
1560 // DW33
1561 union
1562 {
1563 struct
1564 {
1565 uint32_t VP8MeMVInputDataBTI : MOS_BITFIELD_RANGE(0,31);
1566 };
1567 struct
1568 {
1569 uint32_t Value;
1570 };
1571 } DW33;
1572
1573 // DW34
1574 union
1575 {
1576 struct
1577 {
1578 uint32_t VP8MeDistortionBTI : MOS_BITFIELD_RANGE(0,31);
1579 };
1580 struct
1581 {
1582 uint32_t Value;
1583 };
1584 } DW34;
1585
1586 // DW35
1587 union
1588 {
1589 struct
1590 {
1591 uint32_t VP8MeMinDistBrcBTI : MOS_BITFIELD_RANGE(0,31);
1592 };
1593 struct
1594 {
1595 uint32_t Value;
1596 };
1597 } DW35;
1598
1599 // DW36
1600 union
1601 {
1602 struct
1603 {
1604 uint32_t ForwardRefBTI : MOS_BITFIELD_RANGE(0,31);
1605 };
1606 struct
1607 {
1608 uint32_t Value;
1609 };
1610 } DW36;
1611
1612 // DW37
1613 union
1614 {
1615 struct
1616 {
1617 uint32_t BackwardRefBTI : MOS_BITFIELD_RANGE(0,31);
1618 };
1619 struct
1620 {
1621 uint32_t Value;
1622 };
1623 } DW37;
1624 };
1625 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct Vp8MeCurbeG11)) == 38);
1626
1627 struct Vp8MbencICurbeG11
1628 {
1629 // DW0
1630 union
1631 {
1632 struct
1633 {
1634 uint32_t FrameWidth : 16;
1635 uint32_t FrameHeight : 16;
1636 };
1637 struct
1638 {
1639 uint32_t Value;
1640 };
1641 } DW0;
1642
1643 // DW1
1644 union
1645 {
1646 struct
1647 {
1648 uint32_t FrameType : 1;
1649 uint32_t EnableSegmentation : 1;
1650 uint32_t EnableHWIntraPrediction : 1;
1651 uint32_t EnableDebugDumps : 1;
1652 uint32_t EnableCoeffClamp : 1;
1653 uint32_t EnableEnableChromaIPEnhancement : 1;
1654 uint32_t EnableMPUHistogramUpdate : 1;
1655 uint32_t ReservedMBZ : 1;
1656 uint32_t VMEEnableTMCheck : 1;
1657 uint32_t VMEDistortionMeasure : 2;
1658 uint32_t : 21;
1659 };
1660 struct
1661 {
1662 uint32_t Value;
1663 };
1664 } DW1;
1665
1666 // DW2
1667 union
1668 {
1669 struct
1670 {
1671 uint32_t LambdaSegment0 : 16;
1672 uint32_t LambdaSegment1 : 16;
1673 };
1674 struct
1675 {
1676 uint32_t Value;
1677 };
1678 } DW2;
1679
1680 // DW3
1681 union
1682 {
1683 struct
1684 {
1685 uint32_t LambdaSegment2 : 16;
1686 uint32_t LambdaSegment3 : 16;
1687 };
1688 struct
1689 {
1690 uint32_t Value;
1691 };
1692 } DW3;
1693
1694 // DW4
1695 union
1696 {
1697 struct
1698 {
1699 uint32_t AllDCBiasSegment0 : 16;
1700 uint32_t AllDCBiasSegment1 : 16;
1701 };
1702 struct
1703 {
1704 uint32_t Value;
1705 };
1706 } DW4;
1707
1708 // DW5
1709 union
1710 {
1711 struct
1712 {
1713 uint32_t AllDCBiasSegment2 : 16;
1714 uint32_t AllDCBiasSegment3 : 16;
1715 };
1716 struct
1717 {
1718 uint32_t Value;
1719 };
1720 } DW5;
1721
1722 // DW6
1723 union
1724 {
1725 struct
1726 {
1727 uint32_t ChromaDCDeQuantSegment0 : 16;
1728 uint32_t ChromaDCDeQuantSegment1 : 16;
1729 };
1730 struct
1731 {
1732 uint32_t Value;
1733 };
1734 } DW6;
1735
1736 // DW7
1737 union
1738 {
1739 struct
1740 {
1741 uint32_t ChromaDCDeQuantSegment2 : 16;
1742 uint32_t ChromaDCDeQuantSegment3 : 16;
1743 };
1744 struct
1745 {
1746 uint32_t Value;
1747 };
1748 } DW7;
1749
1750 // DW8
1751 union
1752 {
1753 struct
1754 {
1755 uint32_t ChromaACDeQuantSegment0 : 16;
1756 uint32_t ChromaACDeQuantSegment1 : 16;
1757 };
1758 struct
1759 {
1760 uint32_t Value;
1761 };
1762 } DW8;
1763
1764 // DW9
1765 union
1766 {
1767 struct
1768 {
1769 uint32_t ChromaACDeQuantSegment2 : 16;
1770 uint32_t ChromaACDeQuantSegment3 : 16;
1771 };
1772 struct
1773 {
1774 uint32_t Value;
1775 };
1776 } DW9;
1777
1778 // DW10
1779 union
1780 {
1781 struct
1782 {
1783 uint32_t ChromaAC0Threshold0Segment0 : 16;
1784 uint32_t ChromaAC0Threshold1Segment0 : 16;
1785 };
1786 struct
1787 {
1788 uint32_t Value;
1789 };
1790 } DW10;
1791
1792 // DW11
1793 union
1794 {
1795 struct
1796 {
1797 uint32_t ChromaAC0Threshold0Segment1 : 16;
1798 uint32_t ChromaAC0Threshold1Segment1 : 16;
1799 };
1800 struct
1801 {
1802 uint32_t Value;
1803 };
1804 } DW11;
1805
1806 // DW12
1807 union
1808 {
1809 struct
1810 {
1811 uint32_t ChromaAC0Threshold0Segment2 : 16;
1812 uint32_t ChromaAC0Threshold1Segment2 : 16;
1813 };
1814 struct
1815 {
1816 uint32_t Value;
1817 };
1818 } DW12;
1819
1820 // DW13
1821 union
1822 {
1823 struct
1824 {
1825 uint32_t ChromaAC0Threshold0Segment3 : 16;
1826 uint32_t ChromaAC0Threshold1Segment3 : 16;
1827 };
1828 struct
1829 {
1830 uint32_t Value;
1831 };
1832 } DW13;
1833
1834 // DW14
1835 union
1836 {
1837 struct
1838 {
1839 uint32_t ChromaDCThreshold0Segment0 : 16;
1840 uint32_t ChromaDCThreshold1Segment0 : 16;
1841 };
1842 struct
1843 {
1844 uint32_t Value;
1845 };
1846 } DW14;
1847
1848 // DW15
1849 union
1850 {
1851 struct
1852 {
1853 uint32_t ChromaDCThreshold2Segment0 : 16;
1854 uint32_t ChromaDCThreshold3Segment0 : 16;
1855 };
1856 struct
1857 {
1858 uint32_t Value;
1859 };
1860 } DW15;
1861
1862 // DW16
1863 union
1864 {
1865 struct
1866 {
1867 uint32_t ChromaDCThreshold0Segment1 : 16;
1868 uint32_t ChromaDCThreshold1Segment1 : 16;
1869 };
1870 struct
1871 {
1872 uint32_t Value;
1873 };
1874 } DW16;
1875
1876 // DW17
1877 union
1878 {
1879 struct
1880 {
1881 uint32_t ChromaDCThreshold2Segment1 : 16;
1882 uint32_t ChromaDCThreshold3Segment1 : 16;
1883 };
1884 struct
1885 {
1886 uint32_t Value;
1887 };
1888 } DW17;
1889
1890 // DW18
1891 union
1892 {
1893 struct
1894 {
1895 uint32_t ChromaDCThreshold0Segment2 : 16;
1896 uint32_t ChromaDCThreshold1Segment2 : 16;
1897 };
1898 struct
1899 {
1900 uint32_t Value;
1901 };
1902 } DW18;
1903
1904 // DW19
1905 union
1906 {
1907 struct
1908 {
1909 uint32_t ChromaDCThreshold2Segment2 : 16;
1910 uint32_t ChromaDCThreshold3Segment2 : 16;
1911 };
1912 struct
1913 {
1914 uint32_t Value;
1915 };
1916 } DW19;
1917
1918 // DW20
1919 union
1920 {
1921 struct
1922 {
1923 uint32_t ChromaDCThreshold0Segment3 : 16;
1924 uint32_t ChromaDCThreshold1Segment3 : 16;
1925 };
1926 struct
1927 {
1928 uint32_t Value;
1929 };
1930 } DW20;
1931
1932 // DW21
1933 union
1934 {
1935 struct
1936 {
1937 uint32_t ChromaDCThreshold2Segment3 : 16;
1938 uint32_t ChromaDCThreshold3Segment3 : 16;
1939 };
1940 struct
1941 {
1942 uint32_t Value;
1943 };
1944 } DW21;
1945
1946 // DW22
1947 union
1948 {
1949 struct
1950 {
1951 uint32_t ChromaAC1ThresholdSegment0 : 16;
1952 uint32_t ChromaAC1ThresholdSegment1 : 16;
1953 };
1954 struct
1955 {
1956 uint32_t Value;
1957 };
1958 } DW22;
1959
1960 // DW23
1961 union
1962 {
1963 struct
1964 {
1965 uint32_t ChromaAC1ThresholdSegment2 : 16;
1966 uint32_t ChromaAC1ThresholdSegment3 : 16;
1967 };
1968 struct
1969 {
1970 uint32_t Value;
1971 };
1972 } DW23;
1973
1974 // DW24
1975 union
1976 {
1977 struct
1978 {
1979 uint32_t VME16x16CostSegment0 : 8;
1980 uint32_t VME16x16CostSegment1 : 8;
1981 uint32_t VME16x16CostSegment2 : 8;
1982 uint32_t VME16x16CostSegment3 : 8;
1983 };
1984 struct
1985 {
1986 uint32_t Value;
1987 };
1988 } DW24;
1989
1990 // DW25
1991 union
1992 {
1993 struct
1994 {
1995 uint32_t VME4x4CostSegment0 : 8;
1996 uint32_t VME4x4CostSegment1 : 8;
1997 uint32_t VME4x4CostSegment2 : 8;
1998 uint32_t VME4x4CostSegment3 : 8;
1999 };
2000 struct
2001 {
2002 uint32_t Value;
2003 };
2004 } DW25;
2005
2006 // DW26
2007 union
2008 {
2009 struct
2010 {
2011 uint32_t VME16x16NonDCPenaltySegment0 : 8;
2012 uint32_t VME16x16NonDCPenaltySegment1 : 8;
2013 uint32_t VME16x16NonDCPenaltySegment2 : 8;
2014 uint32_t VME16x16NonDCPenaltySegment3 : 8;
2015 };
2016 struct
2017 {
2018 uint32_t Value;
2019 };
2020 } DW26;
2021
2022 // DW27
2023 union
2024 {
2025 struct
2026 {
2027 uint32_t VME4x4NonDCPenaltySegment0 : 8;
2028 uint32_t VME4x4NonDCPenaltySegment1 : 8;
2029 uint32_t VME4x4NonDCPenaltySegment2 : 8;
2030 uint32_t VME4x4NonDCPenaltySegment3 : 8;
2031 };
2032 struct
2033 {
2034 uint32_t Value;
2035 };
2036 } DW27;
2037
2038 // DW28
2039 union
2040 {
2041 struct
2042 {
2043 uint32_t : 32;
2044 };
2045 struct
2046 {
2047 uint32_t Value;
2048 };
2049 } DW28;
2050
2051 // DW29
2052 union
2053 {
2054 struct
2055 {
2056 uint32_t : 32;
2057 };
2058 struct
2059 {
2060 uint32_t Value;
2061 };
2062 } DW29;
2063
2064 // DW30
2065 union
2066 {
2067 struct
2068 {
2069 uint32_t : 32;
2070 };
2071 struct
2072 {
2073 uint32_t Value;
2074 };
2075 } DW30;
2076
2077 // DW31
2078 union
2079 {
2080 struct
2081 {
2082 uint32_t : 32;
2083 };
2084 struct
2085 {
2086 uint32_t Value;
2087 };
2088 } DW31;
2089
2090 // DW32
2091 union
2092 {
2093 struct
2094 {
2095 uint32_t MBEncPerMBOutDataSurfBTI : 32;
2096 };
2097 struct
2098 {
2099 uint32_t Value;
2100 };
2101 } DW32;
2102
2103 // DW33
2104 union
2105 {
2106 struct
2107 {
2108 uint32_t MBEncCurrYBTI : 32;
2109 };
2110 struct
2111 {
2112 uint32_t Value;
2113 };
2114 } DW33;
2115
2116 // DW34
2117 union
2118 {
2119 struct
2120 {
2121 uint32_t MBEncCurrUVBTI : 32;
2122 };
2123 struct
2124 {
2125 uint32_t Value;
2126 };
2127 } DW34;
2128
2129 // DW35
2130 union
2131 {
2132 struct
2133 {
2134 uint32_t MBModeCostLumaBTI : 32;
2135 };
2136 struct
2137 {
2138 uint32_t Value;
2139 };
2140 } DW35;
2141
2142 // DW36
2143 union
2144 {
2145 struct
2146 {
2147 uint32_t MBEncBlockModeCostBTI : 32;
2148 };
2149 struct
2150 {
2151 uint32_t Value;
2152 };
2153 } DW36;
2154
2155 // DW37
2156 union
2157 {
2158 struct
2159 {
2160 uint32_t ChromaReconSurfBTI : 32;
2161 };
2162 struct
2163 {
2164 uint32_t Value;
2165 };
2166 } DW37;
2167
2168 // DW38
2169 union
2170 {
2171 struct
2172 {
2173 uint32_t SegmentationMapBTI : 32;
2174 };
2175 struct
2176 {
2177 uint32_t Value;
2178 };
2179 } DW38;
2180
2181 // DW39
2182 union
2183 {
2184 struct
2185 {
2186 uint32_t HistogramBTI : 32;
2187 };
2188 struct
2189 {
2190 uint32_t Value;
2191 };
2192 } DW39;
2193
2194 // DW40
2195 union
2196 {
2197 struct
2198 {
2199 uint32_t MBEncVMEDebugStreamOutBTI : 32;
2200 };
2201 struct
2202 {
2203 uint32_t Value;
2204 };
2205 } DW40;
2206
2207 // DW41
2208 union
2209 {
2210 struct
2211 {
2212 uint32_t VmeBTI : 32;
2213 };
2214 struct
2215 {
2216 uint32_t Value;
2217 };
2218 } DW41;
2219
2220 // DW42
2221 union
2222 {
2223 struct
2224 {
2225 uint32_t SWScoreboardIndex : 32;
2226 };
2227 struct
2228 {
2229 uint32_t Value;
2230 };
2231 } DW42;
2232
2233 // DW43
2234 union
2235 {
2236 struct
2237 {
2238 uint32_t IDistortionSurfaceBTI : 32;
2239 };
2240 struct
2241 {
2242 uint32_t Value;
2243 };
2244 } DW43;
2245
2246 // DW44
2247 union
2248 {
2249 struct
2250 {
2251 uint32_t MBEncCurrYDownScaledBTI : 32;
2252 };
2253 struct
2254 {
2255 uint32_t Value;
2256 };
2257 } DW44;
2258
2259 // DW45
2260 union
2261 {
2262 struct
2263 {
2264 uint32_t MBEncVMECoarseIntraBTI : 32;
2265 };
2266 struct
2267 {
2268 uint32_t Value;
2269 };
2270 } DW45;
2271
2272 } ;
2273 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct Vp8MbencICurbeG11)) == 46);
2274
2275 struct Vp8MbencPCurbeG11
2276 {
2277 // DW0
2278 union
2279 {
2280 struct
2281 {
2282 uint32_t FrameWidth : 16;
2283 uint32_t FrameHeight : 16;
2284 };
2285 struct
2286 {
2287 uint32_t Value;
2288 };
2289 } DW0;
2290 //DW1
2291 union
2292 {
2293 struct
2294 {
2295 uint32_t FrameType :1;
2296 uint32_t MultiplePred :2;
2297 uint32_t HMEEnable :1;
2298 uint32_t HMECombineOverlap :2;
2299 uint32_t AllFractional :1;
2300 uint32_t EnableTemporalScalability :1;
2301 uint32_t HMECombinedExtraSU :8;
2302 uint32_t RefFrameFlags :4;
2303 uint32_t EnableSegmentation :1;
2304 uint32_t EnableSegmentationInfoUpdate :1;
2305 uint32_t EnableCoeffClamp :1;
2306 uint32_t MultiReferenceQPCheck :1;
2307 uint32_t ModecostEnableFlag :1;
2308 uint32_t MainRef :6;
2309 uint32_t EnableDebugDumps :1;
2310 };
2311 struct
2312 {
2313 uint32_t Value;
2314 };
2315
2316 } DW1;
2317
2318 //DW2
2319 union
2320 {
2321 struct
2322 {
2323 uint32_t LambdaIntraSegment0 :16;
2324 uint32_t LambdaInterSegment0 :16;
2325 };
2326 struct
2327 {
2328 uint32_t Value;
2329 };
2330 } DW2;
2331
2332 //DW3
2333 union
2334 {
2335 struct
2336 {
2337 uint32_t LambdaIntraSegment1 :16;
2338 uint32_t LambdaInterSegment1 :16;
2339 };
2340 struct
2341 {
2342 uint32_t Value;
2343 };
2344 } DW3;
2345
2346 //DW4
2347 union
2348 {
2349 struct
2350 {
2351 uint32_t LambdaIntraSegment2 :16;
2352 uint32_t LambdaInterSegment2 :16;
2353 };
2354 struct
2355 {
2356 uint32_t Value;
2357 };
2358 } DW4;
2359
2360 //DW5
2361 union
2362 {
2363 struct
2364 {
2365 uint32_t LambdaIntraSegment3 :16;
2366 uint32_t LambdaInterSegment3 :16;
2367 };
2368 struct
2369 {
2370 uint32_t Value;
2371 };
2372 } DW5;
2373
2374 // DW6
2375 union
2376 {
2377 struct
2378 {
2379 uint32_t ReferenceFrameSignBias_0 : 8;
2380 uint32_t ReferenceFrameSignBias_1 : 8;
2381 uint32_t ReferenceFrameSignBias_2 : 8;
2382 uint32_t ReferenceFrameSignBias_3 : 8;
2383 };
2384 struct
2385 {
2386 uint32_t Value;
2387 };
2388 } DW6;
2389
2390 //DW7
2391 union
2392 {
2393 struct
2394 {
2395 uint32_t RawDistThreshold :16;
2396 uint32_t TemporalLayerID :8;
2397 uint32_t ReservedMBZ :8;
2398 };
2399 struct
2400 {
2401 uint32_t Value;
2402 };
2403 } DW7;
2404
2405 //DW8
2406 union
2407 {
2408 struct
2409 {
2410 uint32_t SkipModeEnable :1;
2411 uint32_t AdaptiveSearchEnable :1;
2412 uint32_t BidirectionalMixDisbale :1;
2413 uint32_t ReservedMBZ1 :2;
2414 uint32_t EarlyIMESuccessEnable :1;
2415 uint32_t ReservedMBZ2 :1;
2416 uint32_t Transform8x8FlagForInterEnable :1;
2417 uint32_t ReservedMBZ3 :16;
2418 uint32_t EarlyIMESuccessfulStopThreshold :8;
2419 };
2420 struct
2421 {
2422 uint32_t Value;
2423 };
2424 } DW8;
2425
2426 //DW9
2427 union
2428 {
2429 struct
2430 {
2431 uint32_t MaximumNumberOfMotionVectors :6;
2432 uint32_t ReservedMBZ1 :2;
2433 uint32_t RefIDPolarityBits :8;
2434 uint32_t BidirectionalWeight :6;
2435 uint32_t ReservedMBZ2 :6;
2436 uint32_t UnidirectionMixEnable :1;
2437 uint32_t RefPixelBiasEnable :1;
2438 uint32_t ReservedMBZ3 :2;
2439 };
2440 struct
2441 {
2442 uint32_t Value;
2443 };
2444 } DW9;
2445
2446 //DW10
2447 union
2448 {
2449 struct
2450 {
2451 uint32_t MaxFixedSearchPathLength :8;
2452 uint32_t MaximumSearchPathLength :8;
2453 uint32_t ReservedMBZ :16;
2454 };
2455 struct
2456 {
2457 uint32_t Value;
2458 };
2459 } DW10;
2460
2461 //DW11
2462 union
2463 {
2464 struct
2465 {
2466 uint32_t SourceBlockSize :2;
2467 uint32_t ReservedMBZ1 :2;
2468 uint32_t InterMbTypeRoadMap :2;
2469 uint32_t SourceAccess :1;
2470 uint32_t ReferenceAccess :1;
2471 uint32_t SearchControl :3;
2472 uint32_t DualSearchPathOption :1;
2473 uint32_t SubPelMode :2;
2474 uint32_t SkipModeType :1;
2475 uint32_t DisableFieldCacheAllocation :1;
2476 uint32_t ProcessInterChromaPixelsMode :1;
2477 uint32_t ForwardTransformSkipCheckEnable :1;
2478 uint32_t BMEdisableforFBRMessage :1;
2479 uint32_t BlockBasedSkipEnable :1;
2480 uint32_t InterSADMeasureAdjustment :2;
2481 uint32_t IntraSADMeasureAdjustment :2;
2482 uint32_t SubMacroBlockSubPartitionMask :6;
2483 uint32_t ReservedMBZ2 :1;
2484 };
2485 struct
2486 {
2487 uint32_t Value;
2488 };
2489 } DW11;
2490
2491 //DW12
2492 union
2493 {
2494 struct
2495 {
2496 uint32_t ReservedMBZ :16;
2497 uint32_t ReferenceSearchWindowsWidth :8;
2498 uint32_t ReferenceSearchWindowsHeight :8;
2499 };
2500 struct
2501 {
2502 uint32_t Value;
2503 };
2504 } DW12;
2505
2506 // DW13
2507 union
2508 {
2509 struct
2510 {
2511 uint32_t Mode0CostSegment0 :8;
2512 uint32_t Mode1CostSegment0 :8;
2513 uint32_t Mode2CostSegment0 :8;
2514 uint32_t Mode3CostSegment0 :8;
2515 };
2516 struct
2517 {
2518 uint32_t Value;
2519 };
2520 } DW13;
2521
2522 // DW14
2523 union
2524 {
2525 struct
2526 {
2527 uint32_t Mode4CostSegment0 :8;
2528 uint32_t Mode5CostSegment0 :8;
2529 uint32_t Mode6CostSegment0 :8;
2530 uint32_t Mode7CostSegment0 :8;
2531 };
2532 struct
2533 {
2534 uint32_t Value;
2535 };
2536 } DW14;
2537
2538 // DW15
2539 union
2540 {
2541 struct
2542 {
2543 uint32_t Mode8CostSegment0 :8;
2544 uint32_t Mode9CostSegment0 :8;
2545 uint32_t RefIDCostSegment0 :8;
2546 uint32_t ChromaCostSegment0 :8;
2547 };
2548 struct
2549 {
2550 uint32_t Value;
2551 };
2552 } DW15;
2553
2554 // DW16
2555 union
2556 {
2557 struct
2558 {
2559 SearchPathDelta SPDelta_0;
2560 SearchPathDelta SPDelta_1;
2561 SearchPathDelta SPDelta_2;
2562 SearchPathDelta SPDelta_3;
2563 };
2564 struct
2565 {
2566 uint32_t Value;
2567 };
2568 } DW16;
2569
2570 // DW17
2571 union
2572 {
2573 struct
2574 {
2575 SearchPathDelta SPDelta_4;
2576 SearchPathDelta SPDelta_5;
2577 SearchPathDelta SPDelta_6;
2578 SearchPathDelta SPDelta_7;
2579 };
2580 struct
2581 {
2582 uint32_t Value;
2583 };
2584 } DW17;
2585
2586 // DW18
2587 union
2588 {
2589 struct
2590 {
2591 SearchPathDelta SPDelta_8;
2592 SearchPathDelta SPDelta_9;
2593 SearchPathDelta SPDelta_10;
2594 SearchPathDelta SPDelta_11;
2595 };
2596 struct
2597 {
2598 uint32_t Value;
2599 };
2600 } DW18;
2601
2602 // DW19
2603 union
2604 {
2605 struct
2606 {
2607 SearchPathDelta SPDelta_12;
2608 SearchPathDelta SPDelta_13;
2609 SearchPathDelta SPDelta_14;
2610 SearchPathDelta SPDelta_15;
2611 };
2612 struct
2613 {
2614 uint32_t Value;
2615 };
2616 } DW19;
2617
2618 // DW20
2619 union
2620 {
2621 struct
2622 {
2623 SearchPathDelta SPDelta_16;
2624 SearchPathDelta SPDelta_17;
2625 SearchPathDelta SPDelta_18;
2626 SearchPathDelta SPDelta_19;
2627 };
2628 struct
2629 {
2630 uint32_t Value;
2631 };
2632 } DW20;
2633
2634 // DW21
2635 union
2636 {
2637 struct
2638 {
2639 SearchPathDelta SPDelta_20;
2640 SearchPathDelta SPDelta_21;
2641 SearchPathDelta SPDelta_22;
2642 SearchPathDelta SPDelta_23;
2643 };
2644 struct
2645 {
2646 uint32_t Value;
2647 };
2648 } DW21;
2649
2650 // DW22
2651 union
2652 {
2653 struct
2654 {
2655 SearchPathDelta SPDelta_24;
2656 SearchPathDelta SPDelta_25;
2657 SearchPathDelta SPDelta_26;
2658 SearchPathDelta SPDelta_27;
2659 };
2660 struct
2661 {
2662 uint32_t Value;
2663 };
2664 } DW22;
2665
2666 // DW23
2667 union
2668 {
2669 struct
2670 {
2671 SearchPathDelta SPDelta_28;
2672 SearchPathDelta SPDelta_29;
2673 SearchPathDelta SPDelta_30;
2674 SearchPathDelta SPDelta_31;
2675 };
2676 struct
2677 {
2678 uint32_t Value;
2679 };
2680 } DW23;
2681
2682 // DW24
2683 union
2684 {
2685 struct
2686 {
2687 SearchPathDelta SPDelta_32;
2688 SearchPathDelta SPDelta_33;
2689 SearchPathDelta SPDelta_34;
2690 SearchPathDelta SPDelta_35;
2691 };
2692 struct
2693 {
2694 uint32_t Value;
2695 };
2696 } DW24;
2697
2698 // DW25
2699 union
2700 {
2701 struct
2702 {
2703 SearchPathDelta SPDelta_36;
2704 SearchPathDelta SPDelta_37;
2705 SearchPathDelta SPDelta_38;
2706 SearchPathDelta SPDelta_39;
2707 };
2708 struct
2709 {
2710 uint32_t Value;
2711 };
2712 } DW25;
2713
2714 // DW26
2715 union
2716 {
2717 struct
2718 {
2719 SearchPathDelta SPDelta_40;
2720 SearchPathDelta SPDelta_41;
2721 SearchPathDelta SPDelta_42;
2722 SearchPathDelta SPDelta_43;
2723 };
2724 struct
2725 {
2726 uint32_t Value;
2727 };
2728 } DW26;
2729
2730 // DW27
2731 union
2732 {
2733 struct
2734 {
2735 SearchPathDelta SPDelta_44;
2736 SearchPathDelta SPDelta_45;
2737 SearchPathDelta SPDelta_46;
2738 SearchPathDelta SPDelta_47;
2739 };
2740 struct
2741 {
2742 uint32_t Value;
2743 };
2744 } DW27;
2745
2746 // DW28
2747 union
2748 {
2749 struct
2750 {
2751 SearchPathDelta SPDelta_48;
2752 SearchPathDelta SPDelta_49;
2753 SearchPathDelta SPDelta_50;
2754 SearchPathDelta SPDelta_51;
2755 };
2756 struct
2757 {
2758 uint32_t Value;
2759 };
2760 } DW28;
2761
2762 // DW29
2763 union
2764 {
2765 struct
2766 {
2767 SearchPathDelta SPDelta_52;
2768 SearchPathDelta SPDelta_53;
2769 SearchPathDelta SPDelta_54;
2770 SearchPathDelta SPDelta_55;
2771 };
2772 struct
2773 {
2774 uint32_t Value;
2775 };
2776 } DW29;
2777
2778 // DW30
2779 union
2780 {
2781 struct
2782 {
2783 uint32_t MV0CostSegment0 :8;
2784 uint32_t MV1CostSegment0 :8;
2785 uint32_t MV2CostSegment0 :8;
2786 uint32_t MV3CostSegment0 :8;
2787 };
2788 struct
2789 {
2790 uint32_t Value;
2791 };
2792 } DW30;
2793
2794 // DW31
2795 union
2796 {
2797 struct
2798 {
2799 uint32_t MV4CostSegment0 :8;
2800 uint32_t MV5CostSegment0 :8;
2801 uint32_t MV6CostSegment0 :8;
2802 uint32_t MV7CostSegment0 :8;
2803 };
2804 struct
2805 {
2806 uint32_t Value;
2807 };
2808 } DW31;
2809
2810 // DW32
2811 union
2812 {
2813 struct
2814 {
2815 uint32_t Intra16x16NoDCPenaltySegment0 :8;
2816 uint32_t Intra16x16NoDCPenaltySegment1 :8;
2817 uint32_t ReservedMBZ1 :7;
2818 uint32_t BilinearEnable :1;
2819 uint32_t ReservedMBZ2 :8;
2820 };
2821 struct
2822 {
2823 uint32_t Value;
2824 };
2825 } DW32;
2826
2827 // DW33
2828 union
2829 {
2830 struct
2831 {
2832 uint32_t HMECombineLen :16;
2833 uint32_t Intra16x16NoDCPenaltySegment2 :8;
2834 uint32_t Intra16x16NoDCPenaltySegment3 :8;
2835
2836 };
2837 struct
2838 {
2839 uint32_t Value;
2840 };
2841 } DW33;
2842
2843 // DW34
2844 union
2845 {
2846 struct
2847 {
2848 uint32_t MvRefCostContext_0_0_0 : 16;
2849 uint32_t MvRefCostContext_0_0_1 : 16;
2850 };
2851 struct
2852 {
2853 uint32_t Value;
2854 };
2855 } DW34;
2856
2857 // DW35
2858 union
2859 {
2860 struct
2861 {
2862 uint32_t MvRefCostContext_0_1_0 : 16;
2863 uint32_t MvRefCostContext_0_1_1 : 16;
2864 };
2865 struct
2866 {
2867 uint32_t Value;
2868 };
2869 } DW35;
2870
2871 // DW36
2872 union
2873 {
2874 struct
2875 {
2876 uint32_t MvRefCostContext_0_2_0 : 16;
2877 uint32_t MvRefCostContext_0_2_1 : 16;
2878 };
2879 struct
2880 {
2881 uint32_t Value;
2882 };
2883 } DW36;
2884
2885 // DW37
2886 union
2887 {
2888 struct
2889 {
2890 uint32_t MvRefCostContext_0_3_0 : 16;
2891 uint32_t MvRefCostContext_0_3_1 : 16;
2892 };
2893 struct
2894 {
2895 uint32_t Value;
2896 };
2897 } DW37;
2898
2899 // DW38
2900 union
2901 {
2902 struct
2903 {
2904 uint32_t MvRefCostContext_1_0_0 : 16;
2905 uint32_t MvRefCostContext_1_0_1 : 16;
2906 };
2907 struct
2908 {
2909 uint32_t Value;
2910 };
2911 } DW38;
2912
2913 // DW39
2914 union
2915 {
2916 struct
2917 {
2918 uint32_t MvRefCostContext_1_1_0 : 16;
2919 uint32_t MvRefCostContext_1_1_1 : 16;
2920 };
2921 struct
2922 {
2923 uint32_t Value;
2924 };
2925 } DW39;
2926
2927 // DW40
2928 union
2929 {
2930 struct
2931 {
2932 uint32_t MvRefCostContext_1_2_0 : 16;
2933 uint32_t MvRefCostContext_1_2_1 : 16;
2934 };
2935 struct
2936 {
2937 uint32_t Value;
2938 };
2939 } DW40;
2940
2941 // DW41
2942 union
2943 {
2944 struct
2945 {
2946 uint32_t MvRefCostContext_1_3_0 : 16;
2947 uint32_t MvRefCostContext_1_3_1 : 16;
2948 };
2949 struct
2950 {
2951 uint32_t Value;
2952 };
2953 } DW41;
2954
2955 // DW42
2956 union
2957 {
2958 struct
2959 {
2960 uint32_t MvRefCostContext_2_0_0 : 16;
2961 uint32_t MvRefCostContext_2_0_1 : 16;
2962 };
2963 struct
2964 {
2965 uint32_t Value;
2966 };
2967 } DW42;
2968
2969 // DW43
2970 union
2971 {
2972 struct
2973 {
2974 uint32_t MvRefCostContext_2_1_0 : 16;
2975 uint32_t MvRefCostContext_2_1_1 : 16;
2976 };
2977 struct
2978 {
2979 uint32_t Value;
2980 };
2981 } DW43;
2982
2983 // DW44
2984 union
2985 {
2986 struct
2987 {
2988 uint32_t MvRefCostContext_2_2_0 : 16;
2989 uint32_t MvRefCostContext_2_2_1 : 16;
2990 };
2991 struct
2992 {
2993 uint32_t Value;
2994 };
2995 } DW44;
2996
2997 // DW45
2998 union
2999 {
3000 struct
3001 {
3002 uint32_t MvRefCostContext_2_3_0 : 16;
3003 uint32_t MvRefCostContext_2_3_1 : 16;
3004 };
3005 struct
3006 {
3007 uint32_t Value;
3008 };
3009 } DW45;
3010
3011 // DW46
3012 union
3013 {
3014 struct
3015 {
3016 uint32_t MvRefCostContext_3_0_0 : 16;
3017 uint32_t MvRefCostContext_3_0_1 : 16;
3018 };
3019 struct
3020 {
3021 uint32_t Value;
3022 };
3023 } DW46;
3024
3025 // DW47
3026 union
3027 {
3028 struct
3029 {
3030 uint32_t MvRefCostContext_3_1_0 : 16;
3031 uint32_t MvRefCostContext_3_1_1 : 16;
3032 };
3033 struct
3034 {
3035 uint32_t Value;
3036 };
3037 } DW47;
3038
3039 // DW48
3040 union
3041 {
3042 struct
3043 {
3044 uint32_t MvRefCostContext_3_2_0 : 16;
3045 uint32_t MvRefCostContext_3_2_1 : 16;
3046 };
3047 struct
3048 {
3049 uint32_t Value;
3050 };
3051 } DW48;
3052
3053 // DW49
3054 union
3055 {
3056 struct
3057 {
3058 uint32_t MvRefCostContext_3_3_0 : 16;
3059 uint32_t MvRefCostContext_3_3_1 : 16;
3060 };
3061 struct
3062 {
3063 uint32_t Value;
3064 };
3065 } DW49;
3066
3067 // DW50
3068 union
3069 {
3070 struct
3071 {
3072 uint32_t MvRefCostContext_4_0_0 : 16;
3073 uint32_t MvRefCostContext_4_0_1 : 16;
3074 };
3075 struct
3076 {
3077 uint32_t Value;
3078 };
3079 } DW50;
3080
3081 // DW51
3082 union
3083 {
3084 struct
3085 {
3086 uint32_t MvRefCostContext_4_1_0 : 16;
3087 uint32_t MvRefCostContext_4_1_1 : 16;
3088 };
3089 struct
3090 {
3091 uint32_t Value;
3092 };
3093 } DW51;
3094
3095 // DW52
3096 union
3097 {
3098 struct
3099 {
3100 uint32_t MvRefCostContext_4_2_0 : 16;
3101 uint32_t MvRefCostContext_4_2_1 : 16;
3102 };
3103 struct
3104 {
3105 uint32_t Value;
3106 };
3107 } DW52;
3108
3109 // DW53
3110 union
3111 {
3112 struct
3113 {
3114 uint32_t MvRefCostContext_4_3_0 : 16;
3115 uint32_t MvRefCostContext_4_3_1 : 16;
3116 };
3117 struct
3118 {
3119 uint32_t Value;
3120 };
3121 } DW53;
3122
3123 // DW54
3124 union
3125 {
3126 struct
3127 {
3128 uint32_t MvRefCostContext_5_0_0 : 16;
3129 uint32_t MvRefCostContext_5_0_1 : 16;
3130 };
3131 struct
3132 {
3133 uint32_t Value;
3134 };
3135 } DW54;
3136
3137 // DW55
3138 union
3139 {
3140 struct
3141 {
3142 uint32_t MvRefCostContext_5_1_0 : 16;
3143 uint32_t MvRefCostContext_5_1_1 : 16;
3144 };
3145 struct
3146 {
3147 uint32_t Value;
3148 };
3149 } DW55;
3150
3151 // DW56
3152 union
3153 {
3154 struct
3155 {
3156 uint32_t MvRefCostContext_5_2_0 : 16;
3157 uint32_t MvRefCostContext_5_2_1 : 16;
3158 };
3159 struct
3160 {
3161 uint32_t Value;
3162 };
3163 } DW56;
3164
3165 // DW57
3166 union
3167 {
3168 struct
3169 {
3170 uint32_t MvRefCostContext_5_3_0 : 16;
3171 uint32_t MvRefCostContext_5_3_1 : 16;
3172 };
3173 struct
3174 {
3175 uint32_t Value;
3176 };
3177 } DW57;
3178
3179 // DW58
3180 union
3181 {
3182 struct
3183 {
3184 uint32_t EncCost16x16 : 16;
3185 uint32_t EncCost16x8 : 16;
3186 };
3187 struct
3188 {
3189 uint32_t Value;
3190 };
3191 } DW58;
3192
3193 // DW59
3194 union
3195 {
3196 struct
3197 {
3198 uint32_t EncCost8x8 : 16;
3199 uint32_t EncCost4x4 : 16;
3200 };
3201 struct
3202 {
3203 uint32_t Value;
3204 };
3205 } DW59;
3206
3207 // DW60
3208 union
3209 {
3210 struct
3211 {
3212 uint32_t FrameCountProbabilityRefFrameCost_0 : 16;
3213 uint32_t FrameCountProbabilityRefFrameCost_1 : 16;
3214 };
3215 struct
3216 {
3217 uint32_t Value;
3218 };
3219 } DW60;
3220
3221 // DW61
3222 union
3223 {
3224 struct
3225 {
3226 uint32_t FrameCountProbabilityRefFrameCost_2 : 16;
3227 uint32_t FrameCountProbabilityRefFrameCost_3 : 16;
3228 };
3229 struct
3230 {
3231 uint32_t Value;
3232 };
3233 } DW61;
3234
3235 // DW62
3236 union
3237 {
3238 struct
3239 {
3240 uint32_t AverageQPOfLastRefFrame :8;
3241 uint32_t AverageQPOfGoldRefFrame :8;
3242 uint32_t AverageQPOfAltRefFrame :8;
3243 uint32_t ReservedMBZ :8;
3244 };
3245 struct
3246 {
3247 uint32_t Value;
3248 };
3249
3250 } DW62;
3251
3252 // DW63
3253 union
3254 {
3255 struct
3256 {
3257 uint32_t Intra4x4NoDCPenaltySegment0 :8;
3258 uint32_t Intra4x4NoDCPenaltySegment1 :8;
3259 uint32_t Intra4x4NoDCPenaltySegment2 :8;
3260 uint32_t Intra4x4NoDCPenaltySegment3 :8;
3261 };
3262 struct
3263 {
3264 uint32_t Value;
3265 };
3266
3267 } DW63;
3268
3269 // DW64
3270 union
3271 {
3272 struct
3273 {
3274 uint32_t Mode0CostSegment1 :8;
3275 uint32_t Mode1CostSegment1 :8;
3276 uint32_t Mode2CostSegment1 :8;
3277 uint32_t Mode3CostSegment1 :8;
3278 };
3279 struct
3280 {
3281 uint32_t Value;
3282 };
3283 } DW64;
3284
3285 // DW65
3286 union
3287 {
3288 struct
3289 {
3290 uint32_t Mode4CostSegment1 :8;
3291 uint32_t Mode5CostSegment1 :8;
3292 uint32_t Mode6CostSegment1 :8;
3293 uint32_t Mode7CostSegment1 :8;
3294 };
3295 struct
3296 {
3297 uint32_t Value;
3298 };
3299 } DW65;
3300
3301 // DW66
3302 union
3303 {
3304 struct
3305 {
3306 uint32_t Mode8CostSegment1 :8;
3307 uint32_t Mode9CostSegment1 :8;
3308 uint32_t RefIDCostSegment1 :8;
3309 uint32_t ChromaCostSegment1 :8;
3310 };
3311 struct
3312 {
3313 uint32_t Value;
3314 };
3315 } DW66;
3316
3317 // DW67
3318 union
3319 {
3320 struct
3321 {
3322 uint32_t MV0CostSegment1 :8;
3323 uint32_t MV1CostSegment1 :8;
3324 uint32_t MV2CostSegment1 :8;
3325 uint32_t MV3CostSegment1 :8;
3326 };
3327 struct
3328 {
3329 uint32_t Value;
3330 };
3331 } DW67;
3332
3333 // DW68
3334 union
3335 {
3336 struct
3337 {
3338 uint32_t MV4CostSegment1 :8;
3339 uint32_t MV5CostSegment1 :8;
3340 uint32_t MV6CostSegment1 :8;
3341 uint32_t MV7CostSegment1 :8;
3342 };
3343 struct
3344 {
3345 uint32_t Value;
3346 };
3347 } DW68;
3348
3349 // DW69
3350 union
3351 {
3352 struct
3353 {
3354 uint32_t Mode0CostSegment2 :8;
3355 uint32_t Mode1CostSegment2 :8;
3356 uint32_t Mode2CostSegment2 :8;
3357 uint32_t Mode3CostSegment2 :8;
3358 };
3359 struct
3360 {
3361 uint32_t Value;
3362 };
3363 } DW69;
3364
3365 // DW70
3366 union
3367 {
3368 struct
3369 {
3370 uint32_t Mode4CostSegment2 :8;
3371 uint32_t Mode5CostSegment2 :8;
3372 uint32_t Mode6CostSegment2 :8;
3373 uint32_t Mode7CostSegment2 :8;
3374 };
3375 struct
3376 {
3377 uint32_t Value;
3378 };
3379 } DW70;
3380
3381 // DW71
3382 union
3383 {
3384 struct
3385 {
3386 uint32_t Mode8CostSegment2 :8;
3387 uint32_t Mode9CostSegment2 :8;
3388 uint32_t RefIDCostSegment2 :8;
3389 uint32_t ChromaCostSegment2 :8;
3390 };
3391 struct
3392 {
3393 uint32_t Value;
3394 };
3395 } DW71;
3396
3397 // DW72
3398 union
3399 {
3400 struct
3401 {
3402 uint32_t MV0CostSegment2 :8;
3403 uint32_t MV1CostSegment2 :8;
3404 uint32_t MV2CostSegment2 :8;
3405 uint32_t MV3CostSegment2 :8;
3406 };
3407 struct
3408 {
3409 uint32_t Value;
3410 };
3411 } DW72;
3412
3413 // DW73
3414 union
3415 {
3416 struct
3417 {
3418 uint32_t MV4CostSegment2 :8;
3419 uint32_t MV5CostSegment2 :8;
3420 uint32_t MV6CostSegment2 :8;
3421 uint32_t MV7CostSegment2 :8;
3422 };
3423 struct
3424 {
3425 uint32_t Value;
3426 };
3427 } DW73;
3428
3429 // DW74
3430 union
3431 {
3432 struct
3433 {
3434 uint32_t Mode0CostSegment3 :8;
3435 uint32_t Mode1CostSegment3 :8;
3436 uint32_t Mode2CostSegment3 :8;
3437 uint32_t Mode3CostSegment3 :8;
3438 };
3439 struct
3440 {
3441 uint32_t Value;
3442 };
3443 } DW74;
3444
3445 // DW75
3446 union
3447 {
3448 struct
3449 {
3450 uint32_t Mode4CostSegment3 :8;
3451 uint32_t Mode5CostSegment3 :8;
3452 uint32_t Mode6CostSegment3 :8;
3453 uint32_t Mode7CostSegment3 :8;
3454 };
3455 struct
3456 {
3457 uint32_t Value;
3458 };
3459 } DW75;
3460
3461 // DW76
3462 union
3463 {
3464 struct
3465 {
3466 uint32_t Mode8CostSegment3 :8;
3467 uint32_t Mode9CostSegment3 :8;
3468 uint32_t RefIDCostSegment3 :8;
3469 uint32_t ChromaCostSegment3 :8;
3470 };
3471 struct
3472 {
3473 uint32_t Value;
3474 };
3475 } DW76;
3476
3477 // DW77
3478 union
3479 {
3480 struct
3481 {
3482 uint32_t MV0CostSegment3 :8;
3483 uint32_t MV1CostSegment3 :8;
3484 uint32_t MV2CostSegment3 :8;
3485 uint32_t MV3CostSegment3 :8;
3486 };
3487 struct
3488 {
3489 uint32_t Value;
3490 };
3491 } DW77;
3492
3493 // DW78
3494 union
3495 {
3496 struct
3497 {
3498 uint32_t MV4CostSegment3 :8;
3499 uint32_t MV5CostSegment3 :8;
3500 uint32_t MV6CostSegment3 :8;
3501 uint32_t MV7CostSegment3 :8;
3502 };
3503 struct
3504 {
3505 uint32_t Value;
3506 };
3507 } DW78;
3508
3509 // DW79
3510 union
3511 {
3512 struct
3513 {
3514 uint32_t NewMVSkipThresholdSegment0 :16;
3515 uint32_t NewMVSkipThresholdSegment1 :16;
3516 };
3517 struct
3518 {
3519 uint32_t Value;
3520 };
3521 } DW79;
3522
3523 // DW80
3524 union
3525 {
3526 struct
3527 {
3528 uint32_t NewMVSkipThresholdSegment2 :16;
3529 uint32_t NewMVSkipThresholdSegment3 :16;
3530 };
3531 struct
3532 {
3533 uint32_t Value;
3534 };
3535 } DW80;
3536
3537 // DW81
3538 union
3539 {
3540 struct
3541 {
3542 uint32_t PerMbOutputDataSurfaceBTI :32;
3543 };
3544 struct
3545 {
3546 uint32_t Value;
3547 };
3548 } DW81;
3549
3550 // DW82
3551 union
3552 {
3553 struct
3554 {
3555 uint32_t CurrentPictureYSurfaceBTI :32;
3556 };
3557 struct
3558 {
3559 uint32_t Value;
3560 };
3561 } DW82;
3562
3563 // DW83
3564 union
3565 {
3566 struct
3567 {
3568 uint32_t CurrentPictureInterleavedUVSurfaceBTI :32;
3569 };
3570 struct
3571 {
3572 uint32_t Value;
3573 };
3574 } DW83;
3575
3576 // DW84
3577 union
3578 {
3579 struct
3580 {
3581 uint32_t HMEMVDataSurfaceBTI :32;
3582 };
3583 struct
3584 {
3585 uint32_t Value;
3586 };
3587 } DW84;
3588
3589 // DW85
3590 union
3591 {
3592 struct
3593 {
3594 uint32_t MVDataSurfaceBTI :32;
3595 };
3596 struct
3597 {
3598 uint32_t Value;
3599 };
3600 } DW85;
3601
3602 // DW86
3603 union
3604 {
3605 struct
3606 {
3607 uint32_t MbCountPerReferenceFrameBTI :32;
3608 };
3609 struct
3610 {
3611 uint32_t Value;
3612 };
3613 } DW86;
3614
3615 // DW87
3616 union
3617 {
3618 struct
3619 {
3620 uint32_t VMEInterPredictionBTI :32;
3621 };
3622 struct
3623 {
3624 uint32_t Value;
3625 };
3626 } DW87;
3627
3628 // DW88
3629 union
3630 {
3631 struct
3632 {
3633 uint32_t ActiveRef1BTI : 32;
3634 };
3635 struct
3636 {
3637 uint32_t Value;
3638 };
3639 } DW88;
3640
3641 // DW89
3642 union
3643 {
3644 struct
3645 {
3646 uint32_t ActiveRef2BTI : 32;
3647 };
3648 struct
3649 {
3650 uint32_t Value;
3651 };
3652 } DW89;
3653
3654 // DW90
3655 union
3656 {
3657 struct
3658 {
3659 uint32_t ActiveRef3BTI : 32;
3660 };
3661 struct
3662 {
3663 uint32_t Value;
3664 };
3665 } DW90;
3666
3667 // DW91
3668 union
3669 {
3670 struct
3671 {
3672 uint32_t PerMbQuantDataBTI :32;
3673 };
3674 struct
3675 {
3676 uint32_t Value;
3677 };
3678 } DW91;
3679
3680 // DW92
3681 union
3682 {
3683 struct
3684 {
3685 uint32_t SegmentMapBTI :32;
3686 };
3687 struct
3688 {
3689 uint32_t Value;
3690 };
3691 } DW92;
3692
3693 // DW93
3694 union
3695 {
3696 struct
3697 {
3698 uint32_t InterPredictionDistortionBTI :32;
3699 };
3700 struct
3701 {
3702 uint32_t Value;
3703 };
3704 } DW93;
3705
3706 // DW94
3707 union
3708 {
3709 struct
3710 {
3711 uint32_t HistogramBTI :32;
3712 };
3713 struct
3714 {
3715 uint32_t Value;
3716 };
3717 } DW94;
3718
3719 // DW95
3720 union
3721 {
3722 struct
3723 {
3724 uint32_t PredMVDataBTI :32;
3725 };
3726 struct
3727 {
3728 uint32_t Value;
3729 };
3730 } DW95;
3731
3732 // DW96
3733 union
3734 {
3735 struct
3736 {
3737 uint32_t ModeCostUpdateBTI :32;
3738 };
3739 struct
3740 {
3741 uint32_t Value;
3742 };
3743 } DW96;
3744
3745 // DW97
3746 union
3747 {
3748 struct
3749 {
3750 uint32_t SWScoreboardIndex : 32;
3751 };
3752 struct
3753 {
3754 uint32_t Value;
3755 };
3756 } DW97;
3757
3758 // DW98
3759 union
3760 {
3761 struct
3762 {
3763 uint32_t KernelDebugDumpBTI :32;
3764 };
3765 struct
3766 {
3767 uint32_t Value;
3768 };
3769 } DW98;
3770 };
3771 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct Vp8MbencPCurbeG11)) == 99);
3772
3773 struct Vp8MpuFhbCurbeG11
3774 {
3775 // uint32_t 0
3776 union {
3777 struct {
3778 uint32_t FrameWidth : MOS_BITFIELD_RANGE( 0,15 ); //
3779 uint32_t FrameHeight : MOS_BITFIELD_RANGE( 16,31 ); //
3780 };
3781 uint32_t Value;
3782 } DW0;
3783
3784 // uint32_t 1
3785 union {
3786 struct {
3787 uint32_t FrameType : MOS_BITFIELD_BIT( 0 ); //
3788 uint32_t Version : MOS_BITFIELD_RANGE( 1, 3 ); //
3789 uint32_t ShowFrame : MOS_BITFIELD_BIT( 4 ); //
3790 uint32_t HorizontalScaleCode : MOS_BITFIELD_RANGE( 5, 6 ); //
3791 uint32_t VerticalScaleCode : MOS_BITFIELD_RANGE( 7, 8 ); //
3792 uint32_t ColorSpaceType : MOS_BITFIELD_BIT( 9 ); //
3793 uint32_t ClampType : MOS_BITFIELD_BIT( 10 ); //
3794 uint32_t PartitionNumL2 : MOS_BITFIELD_RANGE( 11,12 ); //
3795 uint32_t EnableSegmentation : MOS_BITFIELD_BIT( 13 ); //
3796 uint32_t SegMapUpdate : MOS_BITFIELD_BIT( 14 ); //
3797 uint32_t SegmentationFeatureUpdate : MOS_BITFIELD_BIT( 15 ); //
3798 uint32_t SegmentationFeatureMode : MOS_BITFIELD_BIT( 16 ); //
3799 uint32_t LoopFilterType : MOS_BITFIELD_BIT( 17 ); //
3800 uint32_t SharpnessLevel : MOS_BITFIELD_RANGE( 18,20 ); //
3801 uint32_t LoopFilterAdjustmentOn : MOS_BITFIELD_BIT( 21 ); //
3802 uint32_t MBNoCoeffiscientSkip : MOS_BITFIELD_BIT( 22 ); //
3803 uint32_t GoldenReferenceCopyFlag : MOS_BITFIELD_RANGE( 23,24 ); //
3804 uint32_t AlternateReferenceCopyFlag : MOS_BITFIELD_RANGE( 25,26 ); //
3805 uint32_t LastFrameUpdate : MOS_BITFIELD_BIT( 27 ); //
3806 uint32_t SignBiasGolden : MOS_BITFIELD_BIT( 28 ); //
3807 uint32_t SignBiasAltRef : MOS_BITFIELD_BIT( 29 ); //
3808 uint32_t RefreshEntropyP : MOS_BITFIELD_BIT( 30 ); //
3809 uint32_t ForcedLFUpdateForKeyFrame : MOS_BITFIELD_BIT( 31 ); //
3810 };
3811 uint32_t Value;
3812 } DW1;
3813
3814 // uint32_t 2
3815 union {
3816 struct {
3817 uint32_t LoopFilterLevel : MOS_BITFIELD_RANGE( 0, 5 ); //
3818 uint32_t : MOS_BITFIELD_RANGE( 6, 7 ); //
3819 uint32_t Qindex : MOS_BITFIELD_RANGE( 8,14 ); //
3820 uint32_t : MOS_BITFIELD_BIT( 15 ); //
3821 uint32_t Y1DCQindex : MOS_BITFIELD_RANGE( 16,23 ); //
3822 uint32_t Y2DCQindex : MOS_BITFIELD_RANGE( 24,31 ); //
3823 };
3824 uint32_t Value;
3825 } DW2;
3826
3827 // uint32_t 3
3828 union {
3829 struct {
3830 uint32_t Y2ACQindex : MOS_BITFIELD_RANGE( 0, 7 ); //
3831 uint32_t UVDCQindex : MOS_BITFIELD_RANGE( 8,15 ); //
3832 uint32_t UVACQindex : MOS_BITFIELD_RANGE( 16,23 ); //
3833 uint32_t FeatureData0Segment0 : MOS_BITFIELD_RANGE( 24,31 ); //
3834 };
3835 uint32_t Value;
3836 } DW3;
3837
3838 // uint32_t 4
3839 union {
3840 struct {
3841 uint32_t FeatureData0Segment1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3842 uint32_t FeatureData0Segment2 : MOS_BITFIELD_RANGE( 8,15 ); //
3843 uint32_t FeatureData0Segment3 : MOS_BITFIELD_RANGE( 16,23 ); //
3844 uint32_t FeatureData1Segment0 : MOS_BITFIELD_RANGE( 24,31 ); //
3845 };
3846 uint32_t Value;
3847 } DW4;
3848
3849 // uint32_t 5
3850 union {
3851 struct {
3852 uint32_t FeatureData1Segment1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3853 uint32_t FeatureData1Segment2 : MOS_BITFIELD_RANGE( 8,15 ); //
3854 uint32_t FeatureData1Segment3 : MOS_BITFIELD_RANGE( 16,23 ); //
3855 uint32_t RefLFDelta0 : MOS_BITFIELD_RANGE( 24,31 ); //
3856 };
3857 uint32_t Value;
3858 } DW5;
3859
3860 // uint32_t 6
3861 union {
3862 struct {
3863 uint32_t RefLFDelta1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3864 uint32_t RefLFDelta2 : MOS_BITFIELD_RANGE( 8,15 ); //
3865 uint32_t RefLFDelta3 : MOS_BITFIELD_RANGE( 16,23 ); //
3866 uint32_t ModeLFDelta0 : MOS_BITFIELD_RANGE( 24,31 ); //
3867 };
3868 uint32_t Value;
3869 } DW6;
3870
3871 // uint32_t 7
3872 union {
3873 struct {
3874 uint32_t ModeLFDelta1 : MOS_BITFIELD_RANGE( 0, 7 ); //
3875 uint32_t ModeLFDelta2 : MOS_BITFIELD_RANGE( 8,15 ); //
3876 uint32_t ModeLFDelta3 : MOS_BITFIELD_RANGE( 16,23 ); //
3877 uint32_t ForcedTokenSurfaceRead : MOS_BITFIELD_BIT( 24 );
3878 uint32_t ModecostEnableFlag : MOS_BITFIELD_BIT( 25 );
3879 uint32_t MCFilterSelect : MOS_BITFIELD_BIT( 26 );
3880 uint32_t ChromaFullPixelMCFilterMode : MOS_BITFIELD_BIT(27);
3881 uint32_t MaxNumPakPasses : MOS_BITFIELD_RANGE(28, 31); //
3882
3883 };
3884 uint32_t Value;
3885 } DW7;
3886
3887 // uint32_t 8
3888 union {
3889 struct {
3890 uint32_t TemporalLayerID : MOS_BITFIELD_RANGE(0, 7); //
3891 uint32_t NumTLevels : MOS_BITFIELD_RANGE(8, 15); //
3892 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(16, 31); //
3893 };
3894 uint32_t Value;
3895 } DW8;
3896
3897 // uint32_t 9
3898 union {
3899 struct {
3900 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(0, 31); //
3901 };
3902 uint32_t Value;
3903 } DW9;
3904
3905 // uint32_t 10
3906 union {
3907 struct {
3908 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(0, 31); //
3909 };
3910 uint32_t Value;
3911 } DW10;
3912
3913 // uint32_t 11
3914 union {
3915 struct {
3916 uint32_t ReservedMBZ : MOS_BITFIELD_RANGE(0, 31); //
3917 };
3918 uint32_t Value;
3919 } DW11;
3920
3921 // uint32_t 12
3922 union {
3923 struct {
3924 uint32_t HistogramBTI : MOS_BITFIELD_RANGE( 0, 31); //
3925 };
3926 uint32_t Value;
3927 } DW12;
3928
3929 // uint32_t 13
3930 union {
3931 struct {
3932 uint32_t ReferenceModeProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3933 };
3934 uint32_t Value;
3935 } DW13;
3936
3937 // uint32_t 14
3938 union {
3939 struct {
3940 uint32_t ModeProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3941 };
3942 uint32_t Value;
3943 } DW14;
3944
3945 // uint32_t 15
3946 union {
3947 struct {
3948 uint32_t ReferenceTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3949 };
3950 uint32_t Value;
3951 } DW15;
3952
3953 // uint32_t 16
3954 union {
3955 struct {
3956 uint32_t TokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
3957 };
3958 uint32_t Value;
3959 } DW16;
3960
3961 // uint32_t 17
3962 union {
3963 struct {
3964 uint32_t FrameHeaderBitstreamBTI : MOS_BITFIELD_RANGE( 0, 31); //
3965 };
3966 uint32_t Value;
3967 } DW17;
3968
3969 // uint32_t 18
3970 union {
3971 struct {
3972 uint32_t HeaderMetaDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
3973 };
3974 uint32_t Value;
3975 } DW18;
3976
3977 // uint32_t 19
3978 union {
3979 struct {
3980 uint32_t PictureStateBTI : MOS_BITFIELD_RANGE( 0, 31); //
3981 };
3982 uint32_t Value;
3983 } DW19;
3984
3985 // uint32_t 20
3986 union {
3987 struct {
3988 uint32_t MPUBitStreamBTI : MOS_BITFIELD_RANGE( 0, 31); //
3989 };
3990 uint32_t Value;
3991 } DW20;
3992
3993 union {
3994 struct {
3995 uint32_t TokenBitsDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
3996 };
3997 uint32_t Value;
3998 } DW21;
3999 union {
4000 struct {
4001 uint32_t KernelDebugDumpBTI : MOS_BITFIELD_RANGE( 0, 31); //
4002 };
4003 uint32_t Value;
4004 } DW22;
4005 union {
4006 struct {
4007 uint32_t EntropyCostBTI : MOS_BITFIELD_RANGE( 0, 31); //
4008 };
4009 uint32_t Value;
4010 } DW23;
4011 union {
4012 struct {
4013 uint32_t ModeCostUpdateBTI : MOS_BITFIELD_RANGE( 0, 31); //
4014 };
4015 uint32_t Value;
4016 } DW24;
4017 };
4018 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct Vp8MpuFhbCurbeG11)) == 25);
4019
4020 struct Vp8TpuFhbCurbeG11
4021 {
4022 // uint32_t 0
4023 union {
4024 struct {
4025 uint32_t MBsInFrame : MOS_BITFIELD_RANGE( 0, 31); //
4026 };
4027 uint32_t Value;
4028 } DW0;
4029
4030 // uint32_t 1
4031 union {
4032 struct {
4033 uint32_t FrameType : MOS_BITFIELD_BIT( 0 ); //
4034 uint32_t EnableSegmentation : MOS_BITFIELD_BIT( 1 ); //
4035 uint32_t RebinarizationFrameHdr : MOS_BITFIELD_BIT( 2 ); //
4036 uint32_t RefreshEntropyP : MOS_BITFIELD_BIT( 3 ); //
4037 uint32_t MBNoCoeffiscientSkip : MOS_BITFIELD_BIT( 4 ); //
4038 uint32_t : MOS_BITFIELD_RANGE( 5,31 ); //
4039 };
4040 uint32_t Value;
4041 } DW1;
4042
4043 // uint32_t 2
4044 union {
4045 struct {
4046 uint32_t TokenProbabilityStatOffset : MOS_BITFIELD_RANGE( 0,15 ); //
4047 uint32_t TokenProbabilityEndOffset : MOS_BITFIELD_RANGE( 16,31 ); //
4048 };
4049 uint32_t Value;
4050 } DW2;
4051
4052 // uint32_t 3
4053 union {
4054 struct {
4055 uint32_t FrameHeaderBitCount : MOS_BITFIELD_RANGE( 0,15 ); //
4056 uint32_t MaxQP : MOS_BITFIELD_RANGE( 16,23 ); //
4057 uint32_t MinQP : MOS_BITFIELD_RANGE( 24,31 ); //
4058 };
4059 uint32_t Value;
4060 } DW3;
4061
4062 // uint32_t 4
4063 union {
4064 struct {
4065 uint32_t LoopFilterLevelSegment0 : MOS_BITFIELD_RANGE( 0, 7 ); //
4066 uint32_t LoopFilterLevelSegment1 : MOS_BITFIELD_RANGE( 8,15 ); //
4067 uint32_t LoopFilterLevelSegment2 : MOS_BITFIELD_RANGE( 16,23 ); //
4068 uint32_t LoopFilterLevelSegment3 : MOS_BITFIELD_RANGE( 24,31 ); //
4069 };
4070 uint32_t Value;
4071 } DW4;
4072
4073 // uint32_t 5
4074 union {
4075 struct {
4076 uint32_t QuantizationIndexSegment0 : MOS_BITFIELD_RANGE( 0, 7 ); //
4077 uint32_t QuantizationIndexSegment1 : MOS_BITFIELD_RANGE( 8,15 ); //
4078 uint32_t QuantizationIndexSegment2 : MOS_BITFIELD_RANGE( 16,23 ); //
4079 uint32_t QuantizationIndexSegment3 : MOS_BITFIELD_RANGE( 24,31 ); //
4080 };
4081 uint32_t Value;
4082 } DW5;
4083
4084 // uint32_t 6
4085 union {
4086 struct {
4087 uint32_t PakPassNum : MOS_BITFIELD_RANGE( 0, 31); //
4088 };
4089 uint32_t Value;
4090 } DW6;
4091
4092 // uint32_t 7
4093 union {
4094 struct {
4095 uint32_t TokenCostDeltaThreshold : MOS_BITFIELD_RANGE(0, 15); //
4096 uint32_t SkipCostDeltaThreshold : MOS_BITFIELD_RANGE(16, 31); //
4097 };
4098 uint32_t Value;
4099 } DW7;
4100
4101 // uint32_t 8
4102 union {
4103 struct {
4104 uint32_t CumulativeDQIndex01 : MOS_BITFIELD_RANGE( 0, 31); //
4105 };
4106 uint32_t Value;
4107 } DW8;
4108
4109 // uint32_t 9
4110 union {
4111 struct {
4112 uint32_t CumulativeDQIndex02 : MOS_BITFIELD_RANGE( 0, 31); //
4113 };
4114 uint32_t Value;
4115 } DW9;
4116
4117 // uint32_t 10
4118 union {
4119 struct {
4120 uint32_t CumulativeLoopFilter01 : MOS_BITFIELD_RANGE( 0, 31); //
4121 };
4122 uint32_t Value;
4123 } DW10;
4124
4125 // uint32_t 11
4126 union {
4127 struct {
4128 uint32_t CumulativeLoopFilter02 : MOS_BITFIELD_RANGE( 0, 31); //
4129 };
4130 uint32_t Value;
4131 } DW11;
4132
4133 // uint32_t 12
4134 union {
4135 struct {
4136 uint32_t PakTokenStatisticsBTI : MOS_BITFIELD_RANGE( 0, 31); //
4137 };
4138 uint32_t Value;
4139 } DW12;
4140
4141 // uint32_t 13
4142 union {
4143 struct {
4144 uint32_t TokenUpdateFlagsBTI : MOS_BITFIELD_RANGE( 0, 31); //
4145 };
4146 uint32_t Value;
4147 } DW13;
4148
4149 // uint32_t 14
4150 union {
4151 struct {
4152 uint32_t EntropyCostTableBTI : MOS_BITFIELD_RANGE( 0, 31); //
4153 };
4154 uint32_t Value;
4155 } DW14;
4156
4157 // uint32_t 15
4158 union {
4159 struct {
4160 uint32_t FrameHeaderBitstreamBTI : MOS_BITFIELD_RANGE( 0, 31); //
4161 };
4162 uint32_t Value;
4163 } DW15;
4164 // uint32_t 16
4165 union {
4166 struct {
4167 uint32_t DefaultTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4168 };
4169 uint32_t Value;
4170 } DW16;
4171
4172 // uint32_t 17
4173 union {
4174 struct {
4175 uint32_t PictureStateBTI : MOS_BITFIELD_RANGE( 0, 31); //
4176 };
4177 uint32_t Value;
4178 } DW17;
4179
4180 // uint32_t 18
4181 union {
4182 struct {
4183 uint32_t MpuCurbeDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
4184 };
4185 uint32_t Value;
4186 } DW18;
4187
4188 // uint32_t 19
4189 union {
4190 struct {
4191 uint32_t HeaderMetaDataBTI : MOS_BITFIELD_RANGE( 0, 31); //
4192 };
4193 uint32_t Value;
4194 } DW19;
4195
4196 // uint32_t 20
4197 union {
4198 struct {
4199 uint32_t TokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4200 };
4201 uint32_t Value;
4202 } DW20;
4203
4204 // uint32_t 21
4205 union {
4206 struct {
4207 uint32_t PakHardwareTokenProbabilityPass1BTI : MOS_BITFIELD_RANGE( 0, 31); //
4208 };
4209 uint32_t Value;
4210 } DW21;
4211
4212 // uint32_t 22
4213 union {
4214 struct {
4215 uint32_t KeyFrameTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4216 };
4217 uint32_t Value;
4218 } DW22;
4219
4220 // uint32_t 23
4221 union {
4222 struct {
4223 uint32_t UpdatedTokenProbabilityBTI : MOS_BITFIELD_RANGE( 0, 31); //
4224 };
4225 uint32_t Value;
4226 } DW23;
4227
4228 // uint32_t 24
4229 union {
4230 struct {
4231 uint32_t PakHardwareTokenProbabilityPass2BTI : MOS_BITFIELD_RANGE( 0, 31); //
4232 };
4233 uint32_t Value;
4234 } DW24;
4235
4236 // uint32_t 25
4237 union {
4238 struct {
4239 uint32_t KernelDebugDumpBTI : MOS_BITFIELD_RANGE( 0, 31); //
4240 };
4241 uint32_t Value;
4242 } DW25;
4243
4244 // uint32_t 26
4245 union {
4246 struct {
4247 uint32_t RepakDecisionSurfaceBTI : MOS_BITFIELD_RANGE(0, 31); //
4248 };
4249 uint32_t Value;
4250 } DW26;
4251 };
4252 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(struct Vp8TpuFhbCurbeG11)) == 27);
4253
4254 struct CodechalVp8KernelHeaderG11 {
4255 int nKernelCount;
4256
4257 // Normal mode
4258 CODECHAL_KERNEL_HEADER VP8MBEnc_Norm_Frm_I;
4259 CODECHAL_KERNEL_HEADER VP8MBEnc_Norm_Frm_P;
4260
4261 // MPU/FHB
4262 CODECHAL_KERNEL_HEADER VP8_MPU;
4263
4264 // TPU
4265 CODECHAL_KERNEL_HEADER VP8_TPU;
4266
4267 // Intra prediction mode search for only luma components of key-frame.
4268 // To be used when HW intra prediction is disabled.
4269 CODECHAL_KERNEL_HEADER VP8MBEnc_I_Luma;
4270
4271 // HME
4272 CODECHAL_KERNEL_HEADER VP8_ME_P;
4273
4274 // DownScaling
4275 CODECHAL_KERNEL_HEADER PLY_DScale_PLY;
4276
4277 // MBEnc I Dist
4278 CODECHAL_KERNEL_HEADER VP8MBEnc_I_Dist;
4279
4280 // BRC Init
4281 CODECHAL_KERNEL_HEADER VP8_BRC_InitFrame;
4282
4283 // BRC Reset
4284 CODECHAL_KERNEL_HEADER VP8_BRC_ResetFrame;
4285
4286 // BRC Update
4287 CODECHAL_KERNEL_HEADER VP8_BRC_FrameEncUpdate;
4288 };
4289
4290 const uint8_t VP8_IFRAME_VME_COSTS_G11[128][4] =
4291 {
4292 {0x05, 0x1f, 0x02, 0x09},
4293 {0x05, 0x1f, 0x02, 0x09},
4294 {0x08, 0x2b, 0x03, 0x0e},
4295 {0x08, 0x2b, 0x03, 0x0e},
4296 {0x0a, 0x2f, 0x04, 0x12},
4297 {0x0a, 0x2f, 0x04, 0x12},
4298 {0x0d, 0x39, 0x05, 0x17},
4299 {0x0d, 0x39, 0x05, 0x17},
4300 {0x0d, 0x39, 0x05, 0x17},
4301 {0x0f, 0x3b, 0x06, 0x1b},
4302 {0x0f, 0x3b, 0x06, 0x1b},
4303 {0x19, 0x3d, 0x07, 0x20},
4304 {0x19, 0x3d, 0x07, 0x20},
4305 {0x1a, 0x3f, 0x08, 0x24},
4306 {0x1a, 0x3f, 0x08, 0x24},
4307 {0x1a, 0x3f, 0x08, 0x24},
4308 {0x1b, 0x48, 0x09, 0x29},
4309 {0x1b, 0x48, 0x09, 0x29},
4310 {0x1d, 0x49, 0x09, 0x2d},
4311 {0x1d, 0x49, 0x09, 0x2d},
4312 {0x1d, 0x49, 0x09, 0x2d},
4313 {0x1d, 0x49, 0x09, 0x2d},
4314 {0x1e, 0x4a, 0x0a, 0x32},
4315 {0x1e, 0x4a, 0x0a, 0x32},
4316 {0x1e, 0x4a, 0x0a, 0x32},
4317 {0x1e, 0x4a, 0x0a, 0x32},
4318 {0x1f, 0x4b, 0x0b, 0x36},
4319 {0x1f, 0x4b, 0x0b, 0x36},
4320 {0x1f, 0x4b, 0x0b, 0x36},
4321 {0x28, 0x4c, 0x0c, 0x3b},
4322 {0x28, 0x4c, 0x0c, 0x3b},
4323 {0x29, 0x4d, 0x0d, 0x3f},
4324 {0x29, 0x4d, 0x0d, 0x3f},
4325 {0x29, 0x4e, 0x0e, 0x44},
4326 {0x29, 0x4e, 0x0e, 0x44},
4327 {0x2a, 0x4f, 0x0f, 0x48},
4328 {0x2a, 0x4f, 0x0f, 0x48},
4329 {0x2b, 0x58, 0x10, 0x4d},
4330 {0x2b, 0x58, 0x10, 0x4d},
4331 {0x2b, 0x58, 0x11, 0x51},
4332 {0x2b, 0x58, 0x11, 0x51},
4333 {0x2b, 0x58, 0x11, 0x51},
4334 {0x2c, 0x58, 0x12, 0x56},
4335 {0x2c, 0x58, 0x12, 0x56},
4336 {0x2c, 0x59, 0x13, 0x5a},
4337 {0x2c, 0x59, 0x13, 0x5a},
4338 {0x2d, 0x59, 0x14, 0x5f},
4339 {0x2d, 0x59, 0x14, 0x5f},
4340 {0x2e, 0x5a, 0x15, 0x63},
4341 {0x2e, 0x5a, 0x15, 0x63},
4342 {0x2e, 0x5a, 0x16, 0x68},
4343 {0x2e, 0x5a, 0x16, 0x68},
4344 {0x2e, 0x5a, 0x16, 0x68},
4345 {0x2f, 0x5b, 0x17, 0x6c},
4346 {0x2f, 0x5b, 0x17, 0x6c},
4347 {0x38, 0x5b, 0x18, 0x71},
4348 {0x38, 0x5b, 0x18, 0x71},
4349 {0x38, 0x5c, 0x19, 0x76},
4350 {0x38, 0x5c, 0x19, 0x76},
4351 {0x38, 0x5c, 0x1a, 0x7a},
4352 {0x38, 0x5c, 0x1a, 0x7a},
4353 {0x39, 0x5d, 0x1a, 0x7f},
4354 {0x39, 0x5d, 0x1a, 0x7f},
4355 {0x39, 0x5d, 0x1b, 0x83},
4356 {0x39, 0x5d, 0x1b, 0x83},
4357 {0x39, 0x5e, 0x1c, 0x88},
4358 {0x39, 0x5e, 0x1c, 0x88},
4359 {0x3a, 0x5e, 0x1d, 0x8c},
4360 {0x3a, 0x5e, 0x1d, 0x8c},
4361 {0x3a, 0x5f, 0x1e, 0x91},
4362 {0x3a, 0x5f, 0x1e, 0x91},
4363 {0x3a, 0x5f, 0x1f, 0x95},
4364 {0x3a, 0x5f, 0x1f, 0x95},
4365 {0x3a, 0x68, 0x20, 0x9a},
4366 {0x3a, 0x68, 0x20, 0x9a},
4367 {0x3b, 0x68, 0x21, 0x9e},
4368 {0x3b, 0x68, 0x21, 0x9e},
4369 {0x3b, 0x68, 0x22, 0xa3},
4370 {0x3b, 0x68, 0x22, 0xa3},
4371 {0x3b, 0x68, 0x23, 0xa7},
4372 {0x3b, 0x68, 0x23, 0xa7},
4373 {0x3c, 0x68, 0x24, 0xac},
4374 {0x3c, 0x68, 0x24, 0xac},
4375 {0x3c, 0x68, 0x24, 0xac},
4376 {0x3c, 0x69, 0x25, 0xb0},
4377 {0x3c, 0x69, 0x25, 0xb0},
4378 {0x3c, 0x69, 0x26, 0xb5},
4379 {0x3c, 0x69, 0x26, 0xb5},
4380 {0x3d, 0x69, 0x27, 0xb9},
4381 {0x3d, 0x69, 0x27, 0xb9},
4382 {0x3d, 0x69, 0x28, 0xbe},
4383 {0x3d, 0x69, 0x28, 0xbe},
4384 {0x3d, 0x6a, 0x29, 0xc2},
4385 {0x3d, 0x6a, 0x29, 0xc2},
4386 {0x3e, 0x6a, 0x2a, 0xc7},
4387 {0x3e, 0x6a, 0x2a, 0xc7},
4388 {0x3e, 0x6a, 0x2b, 0xcb},
4389 {0x3e, 0x6a, 0x2b, 0xd0},
4390 {0x3f, 0x6b, 0x2c, 0xd4},
4391 {0x3f, 0x6b, 0x2d, 0xd9},
4392 {0x3f, 0x6b, 0x2e, 0xdd},
4393 {0x48, 0x6b, 0x2f, 0xe2},
4394 {0x48, 0x6b, 0x2f, 0xe2},
4395 {0x48, 0x6c, 0x30, 0xe6},
4396 {0x48, 0x6c, 0x31, 0xeb},
4397 {0x48, 0x6c, 0x32, 0xf0},
4398 {0x48, 0x6c, 0x33, 0xf4},
4399 {0x48, 0x6c, 0x34, 0xf9},
4400 {0x49, 0x6d, 0x35, 0xfd},
4401 {0x49, 0x6d, 0x36, 0xff},
4402 {0x49, 0x6d, 0x37, 0xff},
4403 {0x49, 0x6d, 0x38, 0xff},
4404 {0x49, 0x6e, 0x3a, 0xff},
4405 {0x49, 0x6e, 0x3b, 0xff},
4406 {0x4a, 0x6e, 0x3c, 0xff},
4407 {0x4a, 0x6f, 0x3d, 0xff},
4408 {0x4a, 0x6f, 0x3d, 0xff},
4409 {0x4a, 0x6f, 0x3e, 0xff},
4410 {0x4a, 0x6f, 0x3f, 0xff},
4411 {0x4a, 0x6f, 0x40, 0xff},
4412 {0x4b, 0x78, 0x41, 0xff},
4413 {0x4b, 0x78, 0x42, 0xff},
4414 {0x4b, 0x78, 0x43, 0xff},
4415 {0x4b, 0x78, 0x44, 0xff},
4416 {0x4b, 0x78, 0x46, 0xff},
4417 {0x4c, 0x78, 0x47, 0xff},
4418 {0x4c, 0x79, 0x49, 0xff},
4419 {0x4c, 0x79, 0x4a, 0xff}
4420 };
4421
4422 const uint32_t VP8_NewMVSkipThreshold_G11[128] =
4423 {
4424 111, 120, 129, 137, 146, 155, 163, 172, 180, 189, 198, 206, 215, 224, 232, 241,
4425 249, 258, 267, 275, 284, 293, 301, 310, 318, 327, 336, 344, 353, 362, 370, 379,
4426 387, 396, 405, 413, 422, 431, 439, 448, 456, 465, 474, 482, 491, 500, 508, 517,
4427 525, 534, 543, 551, 560, 569, 577, 586, 594, 603, 612, 620, 629, 638, 646, 655,
4428 663, 672, 681, 689, 698, 707, 715, 724, 733, 741, 750, 758, 767, 776, 784, 793,
4429 802, 810, 819, 827, 836, 845, 853, 862, 871, 879, 888, 896, 905, 914, 922, 931,
4430 940, 948, 957, 965, 974, 983, 991, 1000, 1009, 1017, 1026, 1034, 1043, 1052, 1060, 1069,
4431 1078, 1086, 1095, 1103, 1112, 1121, 1129, 1138, 1147, 1155, 1164, 1172, 1181, 1190, 1198, 1208
4432 };
4433
4434 const uint32_t VP8_COST_TABLE_G11[128][7] =
4435 {
4436 {0x398f0500, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x08, 0x0e},
4437 {0x3b8f0600, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x0a, 0x11},
4438 {0x3e8f0700, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x0c, 0x14},
4439 {0x488f0800, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x1a0c0907, 0x0f, 0x18},
4440 {0x498f0a00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x11, 0x1b},
4441 {0x4a8f0b00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x13, 0x1e},
4442 {0x4b8f0c00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x15, 0x22},
4443 {0x4b8f0c00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x15, 0x22},
4444 {0x4d8f0d00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x291b190e, 0x17, 0x25},
4445 {0x4e8f0e00, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x19, 0x29},
4446 {0x4f8f0f00, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x1b, 0x2c},
4447 {0x588f1800, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x1d, 0x2f},
4448 {0x588f1900, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x2e281e1a, 0x1f, 0x33},
4449 {0x598f1900, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x21, 0x36},
4450 {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x23, 0x3a},
4451 {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x23, 0x3a},
4452 {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x25, 0x3d},
4453 {0x5b8f1b00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x392b291e, 0x27, 0x40},
4454 {0x5b8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2a, 0x44},
4455 {0x5b8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2a, 0x44},
4456 {0x5c8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2c, 0x47},
4457 {0x5c8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2c, 0x47},
4458 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2e, 0x4a},
4459 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x2e, 0x4a},
4460 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x30, 0x4e},
4461 {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x3c2e2b29, 0x30, 0x4e},
4462 {0x5e8f1e00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x32, 0x51},
4463 {0x5e8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x34, 0x55},
4464 {0x5e8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x34, 0x55},
4465 {0x5f8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x36, 0x58},
4466 {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x3e382e2a, 0x38, 0x5b},
4467 {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x3a, 0x5f},
4468 {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x3c, 0x62},
4469 {0x688f2900, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x3e, 0x65},
4470 {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x483a382c, 0x40, 0x69},
4471 {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x43, 0x6c},
4472 {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x45, 0x70},
4473 {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x47, 0x73},
4474 {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x493b392e, 0x49, 0x76},
4475 {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4b, 0x7a},
4476 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4d, 0x7d},
4477 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4d, 0x7d},
4478 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x4f, 0x81},
4479 {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x4b3d3a38, 0x51, 0x84},
4480 {0x6b8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x53, 0x87},
4481 {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x55, 0x8b},
4482 {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x57, 0x8e},
4483 {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x4c3e3b38, 0x59, 0x91},
4484 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x5b, 0x95},
4485 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x5e, 0x98},
4486 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x60, 0x9c},
4487 {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x60, 0x9c},
4488 {0x6d8f2e00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x4d483c39, 0x62, 0x9f},
4489 {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x64, 0xa2},
4490 {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x66, 0xa6},
4491 {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x68, 0xa9},
4492 {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x4e483e3a, 0x6a, 0xad},
4493 {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x6c, 0xb0},
4494 {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x6e, 0xb3},
4495 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x70, 0xb7},
4496 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x4f493f3b, 0x72, 0xba},
4497 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x74, 0xbd},
4498 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x76, 0xc1},
4499 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x79, 0xc4},
4500 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x584a483c, 0x7b, 0xc8},
4501 {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x7d, 0xcb},
4502 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x7f, 0xce},
4503 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x81, 0xd2},
4504 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x594b483d, 0x83, 0xd5},
4505 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x85, 0xd9},
4506 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x87, 0xdc},
4507 {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x89, 0xdf},
4508 {0x798f3a00, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x594b493e, 0x8b, 0xe3},
4509 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x8d, 0xe6},
4510 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x8f, 0xe9},
4511 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x91, 0xed},
4512 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x5a4c493f, 0x94, 0xf0},
4513 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x96, 0xf4},
4514 {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x98, 0xf7},
4515 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x9a, 0xfa},
4516 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x5b4d4a48, 0x9c, 0xfe},
4517 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0x9e, 0xff},
4518 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0x9e, 0xff},
4519 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0xa0, 0xff},
4520 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0xa2, 0xff},
4521 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x5b4d4b48, 0xa4, 0xff},
4522 {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xa6, 0xff},
4523 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xa8, 0xff},
4524 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xaa, 0xff},
4525 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x5c4e4b48, 0xac, 0xff},
4526 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xaf, 0xff},
4527 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xb1, 0xff},
4528 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xb3, 0xff},
4529 {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x5c4f4c49, 0xb5, 0xff},
4530 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x5d584c49, 0xb7, 0xff},
4531 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x5d584c49, 0xb9, 0xff},
4532 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x5d584c49, 0xbd, 0xff},
4533 {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x493a3b2e, 0x5e584d4a, 0xc1, 0xff},
4534 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493a3b2e, 0x5e584d4a, 0xc5, 0xff},
4535 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3b2e, 0x5e584e4a, 0xc8, 0xff},
4536 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3b2e, 0x5e584e4a, 0xcc, 0xff},
4537 {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x5f594e4b, 0xd0, 0xff},
4538 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x5f594e4b, 0xd2, 0xff},
4539 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x5f594e4b, 0xd4, 0xff},
4540 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x4a3c3c2f, 0x5f594f4b, 0xd8, 0xff},
4541 {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x4a3c3c2f, 0x5f594f4b, 0xdc, 0xff},
4542 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4a3c3d38, 0x68594f4c, 0xe0, 0xff},
4543 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4a3c3d38, 0x68594f4c, 0xe5, 0xff},
4544 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3d38, 0x685a584c, 0xe9, 0xff},
4545 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3d38, 0x685a584c, 0xed, 0xff},
4546 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3e38, 0x685a584c, 0xf1, 0xff},
4547 {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3e38, 0x685a584c, 0xf5, 0xff},
4548 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4b3e3e39, 0x695b584d, 0xfe, 0xff},
4549 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3e3e39, 0x695b594d, 0xff, 0xff},
4550 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3e3e39, 0x695b594d, 0xff, 0xff},
4551 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3f3f39, 0x695b594e, 0xff, 0xff},
4552 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3f3f39, 0x695b594e, 0xff, 0xff},
4553 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4d3f3f3a, 0x6a5c594e, 0xff, 0xff},
4554 {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4d3f3f3a, 0x6a5c594e, 0xff, 0xff},
4555 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c594f, 0xff, 0xff},
4556 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c594f, 0xff, 0xff},
4557 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c5a4f, 0xff, 0xff},
4558 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x6a5c5a4f, 0xff, 0xff},
4559 {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4e48483a, 0x6a5d5a58, 0xff, 0xff},
4560 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4e48483b, 0x6b5d5a58, 0xff, 0xff},
4561 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4e48483b, 0x6b5d5a58, 0xff, 0xff},
4562 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4f48493b, 0x6b5d5b58, 0xff, 0xff},
4563 {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4f49493b, 0x6b5e5b58, 0xff, 0xff}
4564 };
4565
4566 const uint32_t VP8_SINGLESU[56] =
4567 {
4568 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4569 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4570 0x00000000, 0x00000000, 0x00000000, 0x00000000,
4571 0x00000000, 0x00000000
4572 };
4573
4574 const uint8_t VP8_FULLSPIRAL_48x40[56] =
4575 {
4576 // L -> U -> R -> D
4577 0x0F,
4578 0xF0,
4579 0x01, 0x01,
4580 0x10, 0x10,
4581 0x0F, 0x0F, 0x0F,
4582 0xF0, 0xF0, 0xF0,
4583 0x01, 0x01, 0x01, 0x01,
4584 0x10, 0x10, 0x10, 0x10,
4585 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
4586 0xF0, 0xF0, 0xF0, 0xF0, 0xF0,
4587 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
4588 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, // The last 0x10 steps outside the search window.
4589 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, // These are outside the search window.
4590 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0
4591 };
4592
4593 const uint8_t VP8_RASTERSCAN_48x40[56] =
4594 {
4595 0x11, 0x01, 0x01, 0x01,
4596 0x11, 0x01, 0x01, 0x01,
4597 0x11, 0x01, 0x01, 0x01,
4598 0x11, 0x01, 0x01, 0x01,
4599 0x11, 0x01, 0x01, 0x01,
4600 0x01, 0x01, 0x01, 0x01,
4601 0x00, 0x00, 0x00, 0x00,
4602 0x00, 0x00, 0x00, 0x00,
4603 0x00, 0x00, 0x00, 0x00,
4604 0x00, 0x00, 0x00, 0x00,
4605 0x00, 0x00, 0x00, 0x00,
4606 0x00, 0x00, 0x00, 0x00,
4607 0x00, 0x00, 0x00, 0x00,
4608 0x00, 0x00, 0x00, 0x00
4609 };
4610
4611 const uint8_t VP8_DIAMOND[56] =
4612 {
4613 0x0F, 0xF1, 0x0F, 0x12,//5
4614 0x0D, 0xE2, 0x22, 0x1E,//9
4615 0x10, 0xFF, 0xE2, 0x20,//13
4616 0xFC, 0x06, 0xDD,//16
4617 0x2E, 0xF1, 0x3F, 0xD3, 0x11, 0x3D, 0xF3, 0x1F,//24
4618 0xEB, 0xF1, 0xF1, 0xF1,//28
4619 0x4E, 0x11, 0x12, 0xF2, 0xF1,//33
4620 0xE0, 0xFF, 0xFF, 0x0D, 0x1F, 0x1F,//39
4621 0x20, 0x11, 0xCF, 0xF1, 0x05, 0x11,//45
4622 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,//51
4623 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
4624 };
4625
4626 const uint8_t VP8_MAINREF_TABLE_G11[8] =
4627 {
4628 0, 1, 2, 9, 3, 13, 14, 57
4629 };
4630
4631 const uint8_t VP8_NUM_REFS_G11[8] =
4632 {
4633 0, 1, 1, 2, 1, 2, 2, 3
4634 };
4635
4636 const uint8_t VP8_BRC_IFRAME_COST_TABLE_G11[128][4] =
4637 {
4638 { 0x5, 0x5, 0x8, 0x8},
4639 { 0xa, 0xa, 0xd, 0xd},
4640 { 0xd, 0xf, 0xf, 0x19},
4641 {0x19, 0x1a, 0x1a, 0x1a},
4642 {0x1b, 0x1b, 0x1d, 0x1d},
4643 {0x1d, 0x1d, 0x1e, 0x1e},
4644 {0x1e, 0x1e, 0x1f, 0x1f},
4645 {0x1f, 0x28, 0x28, 0x29},
4646 {0x29, 0x29, 0x29, 0x2a},
4647 {0x2a, 0x2b, 0x2b, 0x2b},
4648 {0x2b, 0x2b, 0x2c, 0x2c},
4649 {0x2c, 0x2c, 0x2d, 0x2d},
4650 {0x2e, 0x2e, 0x2e, 0x2e},
4651 {0x2e, 0x2f, 0x2f, 0x38},
4652 {0x38, 0x38, 0x38, 0x38},
4653 {0x38, 0x39, 0x39, 0x39},
4654 {0x39, 0x39, 0x39, 0x3a},
4655 {0x3a, 0x3a, 0x3a, 0x3a},
4656 {0x3a, 0x3a, 0x3a, 0x3b},
4657 {0x3b, 0x3b, 0x3b, 0x3b},
4658 {0x3b, 0x3c, 0x3c, 0x3c},
4659 {0x3c, 0x3c, 0x3c, 0x3c},
4660 {0x3d, 0x3d, 0x3d, 0x3d},
4661 {0x3d, 0x3d, 0x3e, 0x3e},
4662 {0x3e, 0x3e, 0x3f, 0x3f},
4663 {0x3f, 0x48, 0x48, 0x48},
4664 {0x48, 0x48, 0x48, 0x48},
4665 {0x49, 0x49, 0x49, 0x49},
4666 {0x49, 0x49, 0x4a, 0x4a},
4667 {0x4a, 0x4a, 0x4a, 0x4a},
4668 {0x4b, 0x4b, 0x4b, 0x4b},
4669 {0x4b, 0x4c, 0x4c, 0x4c},
4670 {0x1f, 0x1f, 0x2b, 0x2b},
4671 {0x2f, 0x2f, 0x39, 0x39},
4672 {0x39, 0x3b, 0x3b, 0x3d},
4673 {0x3d, 0x3f, 0x3f, 0x3f},
4674 {0x48, 0x48, 0x49, 0x49},
4675 {0x49, 0x49, 0x4a, 0x4a},
4676 {0x4a, 0x4a, 0x4b, 0x4b},
4677 {0x4b, 0x4c, 0x4c, 0x4d},
4678 {0x4d, 0x4e, 0x4e, 0x4f},
4679 {0x4f, 0x58, 0x58, 0x58},
4680 {0x58, 0x58, 0x58, 0x58},
4681 {0x59, 0x59, 0x59, 0x59},
4682 {0x5a, 0x5a, 0x5a, 0x5a},
4683 {0x5a, 0x5b, 0x5b, 0x5b},
4684 {0x5b, 0x5c, 0x5c, 0x5c},
4685 {0x5c, 0x5d, 0x5d, 0x5d},
4686 {0x5d, 0x5e, 0x5e, 0x5e},
4687 {0x5e, 0x5f, 0x5f, 0x5f},
4688 {0x5f, 0x68, 0x68, 0x68},
4689 {0x68, 0x68, 0x68, 0x68},
4690 {0x68, 0x68, 0x68, 0x68},
4691 {0x69, 0x69, 0x69, 0x69},
4692 {0x69, 0x69, 0x69, 0x69},
4693 {0x6a, 0x6a, 0x6a, 0x6a},
4694 {0x6a, 0x6a, 0x6b, 0x6b},
4695 {0x6b, 0x6b, 0x6b, 0x6c},
4696 {0x6c, 0x6c, 0x6c, 0x6c},
4697 {0x6d, 0x6d, 0x6d, 0x6d},
4698 {0x6e, 0x6e, 0x6e, 0x6f},
4699 {0x6f, 0x6f, 0x6f, 0x6f},
4700 {0x78, 0x78, 0x78, 0x78},
4701 {0x78, 0x78, 0x79, 0x79},
4702 { 0x2, 0x2, 0x3, 0x3},
4703 { 0x4, 0x4, 0x5, 0x5},
4704 { 0x5, 0x6, 0x6, 0x7},
4705 { 0x7, 0x8, 0x8, 0x8},
4706 { 0x9, 0x9, 0x9, 0x9},
4707 { 0x9, 0x9, 0xa, 0xa},
4708 { 0xa, 0xa, 0xb, 0xb},
4709 { 0xb, 0xc, 0xc, 0xd},
4710 { 0xd, 0xe, 0xe, 0xf},
4711 { 0xf, 0x10, 0x10, 0x11},
4712 {0x11, 0x11, 0x12, 0x12},
4713 {0x13, 0x13, 0x14, 0x14},
4714 {0x15, 0x15, 0x16, 0x16},
4715 {0x16, 0x17, 0x17, 0x18},
4716 {0x18, 0x19, 0x19, 0x1a},
4717 {0x1a, 0x1a, 0x1a, 0x1b},
4718 {0x1b, 0x1c, 0x1c, 0x1d},
4719 {0x1d, 0x1e, 0x1e, 0x1f},
4720 {0x1f, 0x20, 0x20, 0x21},
4721 {0x21, 0x22, 0x22, 0x23},
4722 {0x23, 0x24, 0x24, 0x24},
4723 {0x25, 0x25, 0x26, 0x26},
4724 {0x27, 0x27, 0x28, 0x28},
4725 {0x29, 0x29, 0x2a, 0x2a},
4726 {0x2b, 0x2b, 0x2c, 0x2d},
4727 {0x2e, 0x2f, 0x2f, 0x30},
4728 {0x31, 0x32, 0x33, 0x34},
4729 {0x35, 0x36, 0x37, 0x38},
4730 {0x3a, 0x3b, 0x3c, 0x3d},
4731 {0x3d, 0x3e, 0x3f, 0x40},
4732 {0x41, 0x42, 0x43, 0x44},
4733 {0x46, 0x47, 0x49, 0x4a},
4734 { 0x9, 0x9, 0xe, 0xe},
4735 {0x12, 0x12, 0x17, 0x17},
4736 {0x17, 0x1b, 0x1b, 0x20},
4737 {0x20, 0x24, 0x24, 0x24},
4738 {0x29, 0x29, 0x2d, 0x2d},
4739 {0x2d, 0x2d, 0x32, 0x32},
4740 {0x32, 0x32, 0x36, 0x36},
4741 {0x36, 0x3b, 0x3b, 0x3f},
4742 {0x3f, 0x44, 0x44, 0x48},
4743 {0x48, 0x4d, 0x4d, 0x51},
4744 {0x51, 0x51, 0x56, 0x56},
4745 {0x5a, 0x5a, 0x5f, 0x5f},
4746 {0x63, 0x63, 0x68, 0x68},
4747 {0x68, 0x6c, 0x6c, 0x71},
4748 {0x71, 0x76, 0x76, 0x7a},
4749 {0x7a, 0x7f, 0x7f, 0x83},
4750 {0x83, 0x88, 0x88, 0x8c},
4751 {0x8c, 0x91, 0x91, 0x95},
4752 {0x95, 0x9a, 0x9a, 0x9e},
4753 {0x9e, 0xa3, 0xa3, 0xa7},
4754 {0xa7, 0xac, 0xac, 0xac},
4755 {0xb0, 0xb0, 0xb5, 0xb5},
4756 {0xb9, 0xb9, 0xbe, 0xbe},
4757 {0xc2, 0xc2, 0xc7, 0xc7},
4758 {0xcb, 0xd0, 0xd4, 0xd9},
4759 {0xdd, 0xe2, 0xe2, 0xe6},
4760 {0xeb, 0xf0, 0xf4, 0xf9},
4761 {0xfd, 0xff, 0xff, 0xff},
4762 {0xff, 0xff, 0xff, 0xff},
4763 {0xff, 0xff, 0xff, 0xff},
4764 {0xff, 0xff, 0xff, 0xff},
4765 {0xff, 0xff, 0xff, 0xff}
4766 };
4767
4768 const uint32_t VP8_BRC_PFRAME_COST_TABLE_G11[256] =
4769 {
4770 0x06040402,
4771 0x06040402,
4772 0x06040402,
4773 0x06040402,
4774 0x0d080805,
4775 0x0d080805,
4776 0x0d080805,
4777 0x0d080805,
4778 0x0d080805,
4779 0x190b0c07,
4780 0x190b0c07,
4781 0x190b0c07,
4782 0x190b0c07,
4783 0x1c0f0f0a,
4784 0x1c0f0f0a,
4785 0x1c0f0f0a,
4786 0x1c0f0f0a,
4787 0x1c0f0f0a,
4788 0x2819190c,
4789 0x2819190c,
4790 0x2819190c,
4791 0x2819190c,
4792 0x2819190c,
4793 0x2819190c,
4794 0x2819190c,
4795 0x2819190c,
4796 0x291b1b0f,
4797 0x291b1b0f,
4798 0x291b1b0f,
4799 0x291b1b0f,
4800 0x291b1b0f,
4801 0x2b1d1d18,
4802 0x2b1d1d18,
4803 0x2b1d1d18,
4804 0x2b1d1d18,
4805 0x2c1f1f19,
4806 0x2c1f1f19,
4807 0x2c1f1f19,
4808 0x2c1f1f19,
4809 0x2e28281b,
4810 0x2e28281b,
4811 0x2e28281b,
4812 0x2e28281b,
4813 0x2e28281b,
4814 0x2f29291c,
4815 0x2f29291c,
4816 0x2f29291c,
4817 0x2f29291c,
4818 0x382a2a1d,
4819 0x382a2a1d,
4820 0x382a2a1d,
4821 0x382a2a1d,
4822 0x382a2a1d,
4823 0x392b2b1e,
4824 0x392b2b1e,
4825 0x392b2b1e,
4826 0x392b2b1e,
4827 0x3a2c2c1f,
4828 0x3a2c2c1f,
4829 0x3a2c2c1f,
4830 0x3a2c2c1f,
4831 0x3b2d2d28,
4832 0x3b2d2d28,
4833 0x3b2d2d28,
4834 0x3b2d2d28,
4835 0x3b2e2e29,
4836 0x3b2e2e29,
4837 0x3b2e2e29,
4838 0x3b2e2e29,
4839 0x3c2f2f29,
4840 0x3c2f2f29,
4841 0x3c2f2f29,
4842 0x3c2f2f29,
4843 0x3d38382a,
4844 0x3d38382a,
4845 0x3d38382a,
4846 0x3d38382a,
4847 0x3e38382b,
4848 0x3e38382b,
4849 0x3e38382b,
4850 0x3e38382b,
4851 0x3f38392b,
4852 0x3f38392b,
4853 0x3f38392b,
4854 0x3f38392b,
4855 0x3f38392b,
4856 0x3f39392c,
4857 0x3f39392c,
4858 0x3f39392c,
4859 0x3f39392c,
4860 0x48393a2c,
4861 0x48393a2c,
4862 0x48393a2c,
4863 0x48393a2c,
4864 0x483a3a2d,
4865 0x483a3a2d,
4866 0x483a3a2d,
4867 0x493a3b2e,
4868 0x493a3b2e,
4869 0x493b3b2e,
4870 0x493b3b2e,
4871 0x493b3c2f,
4872 0x493b3c2f,
4873 0x493b3c2f,
4874 0x4a3c3c2f,
4875 0x4a3c3c2f,
4876 0x4a3c3d38,
4877 0x4a3c3d38,
4878 0x4b3d3d38,
4879 0x4b3d3d38,
4880 0x4b3d3e38,
4881 0x4b3d3e38,
4882 0x4b3e3e39,
4883 0x4c3e3e39,
4884 0x4c3e3e39,
4885 0x4c3f3f39,
4886 0x4c3f3f39,
4887 0x4d3f3f3a,
4888 0x4d3f3f3a,
4889 0x4d48483a,
4890 0x4d48483a,
4891 0x4d48483a,
4892 0x4d48483a,
4893 0x4e48483a,
4894 0x4e48483b,
4895 0x4e48483b,
4896 0x4f48493b,
4897 0x4f49493b,
4898 0x1a0c0907,
4899 0x1a0c0907,
4900 0x1a0c0907,
4901 0x1a0c0907,
4902 0x291b190e,
4903 0x291b190e,
4904 0x291b190e,
4905 0x291b190e,
4906 0x291b190e,
4907 0x2e281e1a,
4908 0x2e281e1a,
4909 0x2e281e1a,
4910 0x2e281e1a,
4911 0x392b291e,
4912 0x392b291e,
4913 0x392b291e,
4914 0x392b291e,
4915 0x392b291e,
4916 0x3c2e2b29,
4917 0x3c2e2b29,
4918 0x3c2e2b29,
4919 0x3c2e2b29,
4920 0x3c2e2b29,
4921 0x3c2e2b29,
4922 0x3c2e2b29,
4923 0x3c2e2b29,
4924 0x3e382e2a,
4925 0x3e382e2a,
4926 0x3e382e2a,
4927 0x3e382e2a,
4928 0x3e382e2a,
4929 0x483a382c,
4930 0x483a382c,
4931 0x483a382c,
4932 0x483a382c,
4933 0x493b392e,
4934 0x493b392e,
4935 0x493b392e,
4936 0x493b392e,
4937 0x4b3d3a38,
4938 0x4b3d3a38,
4939 0x4b3d3a38,
4940 0x4b3d3a38,
4941 0x4b3d3a38,
4942 0x4c3e3b38,
4943 0x4c3e3b38,
4944 0x4c3e3b38,
4945 0x4c3e3b38,
4946 0x4d483c39,
4947 0x4d483c39,
4948 0x4d483c39,
4949 0x4d483c39,
4950 0x4d483c39,
4951 0x4e483e3a,
4952 0x4e483e3a,
4953 0x4e483e3a,
4954 0x4e483e3a,
4955 0x4f493f3b,
4956 0x4f493f3b,
4957 0x4f493f3b,
4958 0x4f493f3b,
4959 0x584a483c,
4960 0x584a483c,
4961 0x584a483c,
4962 0x584a483c,
4963 0x594b483d,
4964 0x594b483d,
4965 0x594b483d,
4966 0x594b483d,
4967 0x594b493e,
4968 0x594b493e,
4969 0x594b493e,
4970 0x594b493e,
4971 0x5a4c493f,
4972 0x5a4c493f,
4973 0x5a4c493f,
4974 0x5a4c493f,
4975 0x5b4d4a48,
4976 0x5b4d4a48,
4977 0x5b4d4a48,
4978 0x5b4d4a48,
4979 0x5b4d4b48,
4980 0x5b4d4b48,
4981 0x5b4d4b48,
4982 0x5b4d4b48,
4983 0x5b4d4b48,
4984 0x5c4e4b48,
4985 0x5c4e4b48,
4986 0x5c4e4b48,
4987 0x5c4e4b48,
4988 0x5c4f4c49,
4989 0x5c4f4c49,
4990 0x5c4f4c49,
4991 0x5c4f4c49,
4992 0x5d584c49,
4993 0x5d584c49,
4994 0x5d584c49,
4995 0x5e584d4a,
4996 0x5e584d4a,
4997 0x5e584e4a,
4998 0x5e584e4a,
4999 0x5f594e4b,
5000 0x5f594e4b,
5001 0x5f594e4b,
5002 0x5f594f4b,
5003 0x5f594f4b,
5004 0x68594f4c,
5005 0x68594f4c,
5006 0x685a584c,
5007 0x685a584c,
5008 0x685a584c,
5009 0x685a584c,
5010 0x695b584d,
5011 0x695b594d,
5012 0x695b594d,
5013 0x695b594e,
5014 0x695b594e,
5015 0x6a5c594e,
5016 0x6a5c594e,
5017 0x6a5c594f,
5018 0x6a5c594f,
5019 0x6a5c5a4f,
5020 0x6a5c5a4f,
5021 0x6a5d5a58,
5022 0x6b5d5a58,
5023 0x6b5d5a58,
5024 0x6b5d5b58,
5025 0x6b5e5b58,
5026 };
5027
5028 const uint16_t VP8_MvRefCostContext_G11[6][4][2] =
5029 {
5030 { { 1328, 10 },
5031 { 2047, 1 },
5032 { 2047, 1 },
5033 { 214, 304 },
5034 },
5035 { { 1072, 21 },
5036 { 979, 27 },
5037 { 1072, 21 },
5038 { 321, 201 },
5039 },
5040 { { 235, 278 },
5041 { 511, 107 },
5042 { 553, 93 },
5043 { 488, 115 },
5044 },
5045 { { 534, 99 },
5046 { 560, 92 },
5047 { 255, 257 },
5048 { 505, 109 },
5049 },
5050 { { 174, 361 },
5051 { 238, 275 },
5052 { 255, 257 },
5053 { 744, 53 },
5054 },
5055 { { 32, 922 },
5056 { 113, 494 },
5057 { 255, 257 },
5058 { 816, 43 },
5059 },
5060 };
5061
5062 const uint16_t VP8_QUANT_DC_G11[CODECHAL_VP8_MAX_QP] =
5063 {
5064 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 17,
5065 18, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 28,
5066 29, 30, 31, 32, 33, 34, 35, 36, 37, 37, 38, 39, 40, 41, 42, 43,
5067 44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
5068 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
5069 75, 76, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
5070 91, 93, 95, 96, 98, 100, 101, 102, 104, 106, 108, 110, 112, 114, 116, 118,
5071 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 143, 145, 148, 151, 154, 157
5072 };
5073
5074 const uint16_t VP8_QUANT_AC_G11[CODECHAL_VP8_MAX_QP/* + 1 + 32*/] =
5075 {
5076 /*4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,*/
5077 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
5078 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
5079 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
5080 52, 53, 54, 55, 56, 57, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76,
5081 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108,
5082 110, 112, 114, 116, 119, 122, 125, 128, 131, 134, 137, 140, 143, 146, 149, 152,
5083 155, 158, 161, 164, 167, 170, 173, 177, 181, 185, 189, 193, 197, 201, 205, 209,
5084 213, 217, 221, 225, 229, 234, 239, 245, 249, 254, 259, 264, 269, 274, 279, 284/*,
5085 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284, 284*/
5086 };
5087
5088 extern const uint16_t VP8_MB_MODE_COST_LUMA_G11[10] =
5089 { 657, 869, 915, 917, 208, 0, 0, 0, 0, 0};
5090
5091 static const uint16_t VP8_BLOCK_MODE_COST_G11[10][10][10] =
5092 {
5093 { {37, 1725, 1868, 1151, 1622, 2096, 2011, 1770, 2218, 2128 },
5094 {139, 759, 1683, 911, 1455, 1846, 1570, 1295, 1792, 1648 },
5095 {560, 1383, 408, 639, 1612, 1174, 1562, 1736, 847, 991 },
5096 {191, 1293, 1299, 466, 1774, 1840, 1784, 1691, 1698, 1505 },
5097 {211, 1624, 1294, 779, 714, 1622, 2222, 1554, 1706, 903 },
5098 {297, 1259, 1098, 1062, 1583, 618, 1053, 1889, 851, 1127 },
5099 {275, 703, 1356, 1111, 1597, 1075, 656, 1529, 1531, 1275 },
5100 {150, 1046, 1760, 1039, 1353, 1981, 2174, 728, 1730, 1379 },
5101 {516, 1414, 741, 1045, 1495, 738, 1288, 1619, 442, 1200 },
5102 {424, 1365, 706, 825, 1197, 1453, 1191, 1462, 1186, 519 },
5103
5104 },
5105 { {393, 515, 1491, 549, 1598, 1524, 964, 1126, 1651, 2172 },
5106 {693, 237, 1954, 641, 1525, 2073, 1183, 971, 1973, 2235 },
5107 {560, 739, 855, 836, 1224, 1115, 966, 839, 1076, 767 },
5108 {657, 368, 1406, 425, 1672, 1853, 1210, 1125, 1969, 1542 },
5109 {321, 1056, 1776, 774, 803, 3311, 1265, 1177, 1366, 636 },
5110 {693, 510, 949, 877, 1049, 658, 882, 1178, 1515, 1111 },
5111 {744, 377, 1278, 958, 1576, 1168, 477, 1146, 1838, 1501 },
5112 {488, 477, 1767, 973, 1107, 1511, 1773, 486, 1527, 1449 },
5113 {744, 1004, 695, 1012, 1326, 834, 1215, 774, 724, 704 },
5114 {522, 567, 1036, 1082, 1039, 1333, 873, 1135, 1189, 677 },
5115
5116 },
5117 { {103, 1441, 1000, 864, 1513, 1928, 1832, 1916, 1663, 1567 },
5118 {304, 872, 1100, 515, 1416, 1417, 3463, 1051, 1305, 1227 },
5119 {684, 2176, 242, 729, 1867, 1496, 2056, 1544, 1038, 930 },
5120 {534, 1198, 669, 300, 1805, 1377, 2165, 1894, 1249, 1153 },
5121 {346, 1602, 1178, 612, 997, 3381, 1335, 1328, 997, 646 },
5122 {393, 1027, 649, 813, 1276, 945, 1545, 1278, 875, 1031 },
5123 {528, 996, 930, 617, 1086, 1190, 621, 2760, 787, 1347 },
5124 {216, 873, 1595, 738, 1339, 3896, 3898, 743, 1343, 1605 },
5125 {675, 1580, 543, 749, 1859, 1245, 1589, 2377, 384, 1075 },
5126 {594, 1163, 415, 684, 1474, 1080, 1491, 1478, 1077, 801 },
5127 },
5128 { {238, 1131, 1483, 398, 1510, 1651, 1495, 1545, 1970, 2090 },
5129 {499, 456, 1499, 449, 1558, 1691, 1272, 969, 2114, 2116 },
5130 {675, 1386, 318, 645, 1449, 1588, 1666, 1925, 979, 859 },
5131 {467, 957, 1223, 238, 1825, 1704, 1608, 1560, 1665, 1376 },
5132 {331, 1460, 1238, 627, 787, 1882, 3928, 1544, 1897, 579 },
5133 {457, 1038, 903, 784, 1158, 725, 955, 1517, 842, 1016 },
5134 {505, 497, 1131, 812, 1508, 1206, 703, 1072, 1254, 1256 },
5135 {397, 741, 1336, 642, 1506, 1852, 1340, 599, 1854, 1000 },
5136 {625, 1212, 597, 750, 1291, 1057, 1401, 1401, 527, 954 },
5137 {499, 1041, 654, 752, 1299, 1217, 1605, 1424, 1377, 505 },
5138 },
5139 { {263, 1094, 1218, 602, 938, 1487, 1231, 1016, 1724, 1448 },
5140 {452, 535, 1728, 562, 1008, 1471, 1473, 873, 3182, 1136 },
5141 {553, 1570, 935, 1093, 826, 1339, 879, 1007, 1006, 476 },
5142 {365, 900, 1050, 582, 866, 1398, 1236, 1123, 1608, 1039 },
5143 {294, 2044, 1790, 1143, 430, 1642, 3688, 1549, 2080, 704 },
5144 {703, 1210, 958, 815, 1211, 960, 623, 2455, 815, 559 },
5145 {675, 574, 862, 1261, 866, 864, 761, 1267, 1014, 936 },
5146 {342, 1254, 1857, 989, 612, 1856, 1858, 553, 1840, 1037 },
5147 {553, 1316, 811, 1072, 1068, 728, 1328, 1317, 1064, 475 },
5148 {288, 1303, 1167, 1167, 823, 1634, 1636, 2497, 1294, 491 },
5149 },
5150 { {227, 1059, 1369, 1066, 1505, 740, 970, 1511, 972, 1775 },
5151 {516, 587, 1033, 646, 1188, 748, 978, 1445, 1294, 1450 },
5152 {684, 1048, 663, 747, 1126, 826, 1386, 1128, 635, 924 },
5153 {494, 814, 933, 510, 1606, 951, 878, 1344, 1031, 1347 },
5154 {553, 1071, 1327, 726, 809, 3376, 1330, 1324, 1062, 407 },
5155 {625, 1120, 988, 1121, 1197, 347, 1064, 1308, 862, 1206 },
5156 {633, 853, 1657, 1073, 1662, 634, 460, 1405, 811, 1155 },
5157 {505, 621, 1394, 876, 1394, 876, 878, 795, 878, 1399 },
5158 {684, 1302, 968, 1704, 1280, 561, 972, 1713, 387, 1104 },
5159 {397, 1447, 1060, 867, 957, 1058, 749, 1475, 1210, 660 },
5160 },
5161 { {331, 933, 1647, 761, 1647, 998, 513, 1402, 1461, 2219 },
5162 {573, 485, 1968, 641, 1570, 1198, 588, 1086, 1382, 1982 },
5163 {790, 942, 570, 790, 1607, 1005, 938, 1193, 714, 751 },
5164 {511, 745, 1152, 492, 1878, 1206, 596, 1867, 1617, 1157 },
5165 {452, 1308, 896, 896, 451, 1308, 3354, 1301, 1306, 794 },
5166 {693, 670, 1072, 1020, 1687, 566, 488, 1432, 1096, 3142 },
5167 {778, 566, 1993, 1283, 3139, 1251, 227, 1378, 1784, 1447 },
5168 {393, 937, 1091, 934, 939, 1348, 1092, 579, 1351, 1095 },
5169 {560, 1013, 1007, 1014, 1011, 644, 1165, 1155, 605, 1016 },
5170 {567, 627, 997, 793, 2562, 998, 849, 1260, 922, 748 },
5171 },
5172 { {338, 762, 1868, 717, 1247, 1757, 1263, 535, 1751, 2162 },
5173 {488, 442, 3235, 756, 1658, 1814, 1264, 528, 1857, 2119 },
5174 {522, 1087, 840, 1103, 843, 1354, 1098, 888, 946, 588 },
5175 {483, 688, 1502, 651, 1213, 1446, 1397, 491, 1908, 1253 },
5176 {452, 1386, 1910, 1175, 298, 1507, 3553, 930, 1904, 905 },
5177 {713, 839, 716, 715, 932, 719, 931, 848, 3088, 1042 },
5178 {516, 495, 1331, 1340, 1331, 1069, 665, 702, 1593, 1337 },
5179 {401, 977, 2167, 1537, 1069, 1764, 3810, 259, 3624, 1578 },
5180 {560, 1104, 601, 1371, 965, 658, 2704, 779, 967, 969 },
5181 {547, 1057, 801, 1141, 1133, 1397, 937, 605, 1252, 631 },
5182 },
5183 { {163, 1240, 925, 983, 1653, 1321, 1353, 1566, 946, 1601 },
5184 {401, 726, 758, 836, 1241, 926, 1656, 795, 1394, 1396 },
5185 {905, 1073, 366, 876, 1436, 1576, 1732, 2432, 459, 1019 },
5186 {594, 922, 835, 417, 1387, 1124, 1098, 2042, 843, 1023 },
5187 {415, 1262, 860, 1274, 758, 1272, 3318, 1010, 1276, 503 },
5188 {641, 1018, 1020, 1095, 1619, 667, 1371, 2348, 397, 849 },
5189 {560, 817, 903, 1014, 1420, 695, 756, 904, 821, 1421 },
5190 {406, 596, 1001, 993, 1257, 1258, 1260, 746, 1002, 1264 },
5191 {979, 1371, 780, 1188, 1693, 1024, 1286, 1699, 183, 1405 },
5192 {733, 1292, 458, 884, 1554, 889, 1151, 1286, 738, 740 },
5193 },
5194 { {109, 1377, 1177, 933, 1140, 1928, 1639, 1705, 1861, 1292 },
5195 {342, 570, 1081, 638, 1154, 1231, 1339, 1342, 1750, 1494 },
5196 {560, 1203, 345, 767, 1325, 1681, 1425, 1905, 1205, 786 },
5197 {406, 1027, 1011, 410, 1306, 1901, 1389, 1636, 1493, 776 },
5198 {206, 1329, 1337, 1037, 802, 1600, 3646, 1451, 1603, 693 },
5199 {472, 1167, 758, 911, 1424, 703, 2749, 1428, 703, 764 },
5200 {342, 780, 1139, 889, 1290, 1139, 781, 1544, 957, 1042 },
5201 {227, 888, 1039, 929, 988, 3753, 1707, 818, 1710, 1306 },
5202 {767, 1055, 627, 725, 1312, 980, 1065, 1324, 599, 811 },
5203 {304, 1372, 888, 1173, 979, 1578, 1580, 1974, 1318, 482 },
5204 }
5205 };
5206
5207 // VP8 BRC
5208 extern const uint8_t VP8_BRC_IFRAME_COST_TABLE_G11[128][4];
5209 extern const uint32_t VP8_BRC_PFRAME_COST_TABLE_G11[256];
5210 extern const uint32_t VP8_NewMVSkipThreshold_G11[128];
5211
5212 const uint8_t VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_g11[576] =
5213 {
5214 0x01, 0x03, 0x05, 0x07, 0x09, 0x01, 0x02, 0x03, 0x05, 0x07, 0x00, 0x00, 0x01, 0x02, 0x04, 0x00,
5215 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0xfb, 0xfc,
5216 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0xf7, 0xf9, 0xfb, 0xfe, 0xff, 0x00, 0x04, 0x1e,
5217 0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
5218 0x01, 0x02, 0x05, 0x08, 0x0a, 0x01, 0x02, 0x04, 0x06, 0x08, 0x00, 0x01, 0x02, 0x04, 0x06, 0x00,
5219 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfe, 0xff, 0xff, 0x00, 0x00, 0xfd, 0xfe,
5220 0xff, 0xff, 0x00, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x04, 0x1e,
5221 0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x04, 0x05, 0x06, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
5222 0x01, 0x02, 0x05, 0x08, 0x0a, 0x01, 0x02, 0x04, 0x06, 0x08, 0x00, 0x01, 0x02, 0x04, 0x06, 0x00,
5223 0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfe, 0xff, 0xff, 0x00, 0x00, 0xfd, 0xfe,
5224 0xff, 0xff, 0x00, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x02, 0x14,
5225 0x28, 0x46, 0x82, 0xa0, 0xc8, 0xff, 0x04, 0x05, 0x06, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
5226 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x06, 0x08, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
5227 0x07, 0x09, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x04, 0x06, 0x07, 0xfe, 0xff, 0x00, 0x00, 0x00,
5228 0x01, 0x02, 0x03, 0x05, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfc, 0xfe, 0xff,
5229 0x00, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfa,
5230 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03,
5231 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5232 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5233 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5234 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
5235 0x06, 0x08, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x08, 0xfe, 0xff, 0x00, 0x00, 0x00,
5236 0x02, 0x04, 0x05, 0x06, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff,
5237 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x04, 0x05, 0xfc,
5238 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x05, 0xfb, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01,
5239 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5240 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5241 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5242 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
5243 0x06, 0x08, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x08, 0xfe, 0xff, 0x00, 0x00, 0x00,
5244 0x02, 0x04, 0x05, 0x06, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff,
5245 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x04, 0x05, 0xfc,
5246 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x05, 0xfb, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01,
5247 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5248 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5249 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5250 };
5251
5252 const uint16_t VP8_BRC_QUANT_DC_TABLE [128] =
5253 {
5254 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 17,
5255 18, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 28,
5256 29, 30, 31, 32, 33, 34, 35, 36, 37, 37, 38, 39, 40, 41, 42, 43,
5257 44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
5258 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
5259 75, 76, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
5260 91, 93, 95, 96, 98, 100, 101, 102, 104, 106, 108, 110, 112, 114, 116, 118,
5261 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 143, 145, 148, 151, 154, 157
5262 };
5263
5264 const uint16_t VP8_BRC_QUANT_AC_TABLE [128] =
5265 {
5266 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
5267 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
5268 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
5269 52, 53, 54, 55, 56, 57, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76,
5270 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108,
5271 110, 112, 114, 116, 119, 122, 125, 128, 131, 134, 137, 140, 143, 146, 149, 152,
5272 155, 158, 161, 164, 167, 170, 173, 177, 181, 185, 189, 193, 197, 201, 205, 209,
5273 213, 217, 221, 225, 229, 234, 239, 245, 249, 254, 259, 264, 269, 274, 279, 284
5274 };
5275
5276 const uint16_t VP8_BRC_SKIP_MV_THRESHOLD_TABLE [256] =
5277 {
5278 111, 120, 129, 137, 146, 155, 163, 172, 180, 189, 198, 206, 215, 224, 232, 241,
5279 249, 258, 267, 275, 284, 293, 301, 310, 318, 327, 336, 344, 353, 362, 370, 379,
5280 387, 396, 405, 413, 422, 431, 439, 448, 456, 465, 474, 482, 491, 500, 508, 517,
5281 525, 534, 543, 551, 560, 569, 577, 586, 594, 603, 612, 620, 629, 638, 646, 655,
5282 663, 672, 681, 689, 698, 707, 715, 724, 733, 741, 750, 758, 767, 776, 784, 793,
5283 802, 810, 819, 827, 836, 845, 853, 862, 871, 879, 888, 896, 905, 914, 922, 931,
5284 940, 948, 957, 965, 974, 983, 991, 1000, 1009, 1017, 1026, 1034, 1043, 1052, 1060, 1069,
5285 1078,1086, 1095, 1103, 1112, 1121, 1129, 1138, 1147, 1155, 1164, 1172, 1181, 1190, 1198, 1208
5286 };
5287
5288 extern const uint32_t VP8_MODE_MV_COST_TABLE_G11[128][5] =
5289 {
5290 {0x008f0000, 0x006f0000, 0x00000000, 0x09060400, 0x000e000a},
5291 {0x008f0000, 0x006f0000, 0x00000000, 0x09000400, 0x0f000c00},
5292 {0x008f0000, 0x006f0000, 0x00000000, 0x09000400, 0x0f000c00},
5293 {0x008f0000, 0x006f0000, 0x00000000, 0x09000400, 0x0f000c00},
5294 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5295 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5296 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5297 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5298 {0x008f0000, 0x006f0000, 0x00000000, 0x12000900, 0x1e001800},
5299 {0x008f0000, 0x006f0000, 0x00000000, 0x1b000d00, 0x2d002400},
5300 {0x008f0000, 0x006f0000, 0x00000000, 0x1b000d00, 0x2d002400},
5301 {0x008f0000, 0x006f0000, 0x00000000, 0x1b000d00, 0x2d002400},
5302 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5303 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5304 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5305 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5306 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5307 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5308 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5309 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5310 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5311 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5312 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5313 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5314 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5315 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5316 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5317 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5318 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5319 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5320 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5321 {0x468f0000, 0x006f0200, 0x05000000, 0x00000000, 0x00000000},
5322 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5323 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5324 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5325 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5326 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5327 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5328 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5329 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5330 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5331 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5332 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5333 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5334 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5335 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5336 {0x6f8f0000, 0x006f0500, 0x0b000000, 0x00000000, 0x00000000},
5337 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5338 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5339 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5340 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5341 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5342 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5343 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5344 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5345 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5346 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5347 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5348 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5349 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5350 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5351 {0x6f8f0010, 0x006f0700, 0x18000000, 0x00000000, 0x00000000},
5352 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5353 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5354 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5355 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5356 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5357 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5358 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5359 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5360 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5361 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5362 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5363 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5364 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5365 {0x188f0010, 0x006f0a00, 0x16000000, 0x00000000, 0x00000000},
5366 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5367 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5368 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5369 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5370 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5371 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5372 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5373 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5374 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5375 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5376 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5377 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5378 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5379 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5380 {0x5e8f0020, 0x006f0d00, 0x1b000000, 0x00000000, 0x00000000},
5381 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5382 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5383 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5384 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5385 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5386 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5387 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5388 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5389 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5390 {0x6f8f0020, 0x006f0f00, 0x21000000, 0x00000000, 0x00000000},
5391 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5392 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5393 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5394 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5395 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5396 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5397 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5398 {0xea8f0030, 0x006f1200, 0x26000000, 0x00000000, 0x00000000},
5399 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5400 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5401 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5402 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5403 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5404 {0x388f0030, 0x006f1500, 0x2c000000, 0x00000000, 0x00000000},
5405 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5406 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5407 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5408 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5409 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5410 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5411 {0x768f0030, 0x006f1700, 0x31000000, 0x00000000, 0x00000000},
5412 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5413 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5414 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5415 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5416 {0x6f8f0040, 0x006f1a00, 0x37000000, 0x00000000, 0x00000000},
5417 {0x028f0040, 0x006f1d00, 0x3c000000, 0x00000000, 0x00000000},
5418 };
5419
5420 extern const uint8_t VP8_DEFAULT_COEFF_PROBS_G11[4][8][3][11] =
5421 {
5422 {
5423 {
5424 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5425 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5426 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}
5427 },
5428 {
5429 { 253, 136, 254, 255, 228, 219, 128, 128, 128, 128, 128},
5430 { 189, 129, 242, 255, 227, 213, 255, 219, 128, 128, 128},
5431 { 106, 126, 227, 252, 214, 209, 255, 255, 128, 128, 128}
5432 },
5433 {
5434 { 1, 98, 248, 255, 236, 226, 255, 255, 128, 128, 128},
5435 { 181, 133, 238, 254, 221, 234, 255, 154, 128, 128, 128},
5436 { 78, 134, 202, 247, 198, 180, 255, 219, 128, 128, 128}
5437 },
5438 {
5439 { 1, 185, 249, 255, 243, 255, 128, 128, 128, 128, 128},
5440 { 184, 150, 247, 255, 236, 224, 128, 128, 128, 128, 128},
5441 { 77, 110, 216, 255, 236, 230, 128, 128, 128, 128, 128}
5442 },
5443 {
5444 { 1, 101, 251, 255, 241, 255, 128, 128, 128, 128, 128},
5445 { 170, 139, 241, 252, 236, 209, 255, 255, 128, 128, 128},
5446 { 37, 116, 196, 243, 228, 255, 255, 255, 128, 128, 128}
5447 },
5448 {
5449 { 1, 204, 254, 255, 245, 255, 128, 128, 128, 128, 128},
5450 { 207, 160, 250, 255, 238, 128, 128, 128, 128, 128, 128},
5451 { 102, 103, 231, 255, 211, 171, 128, 128, 128, 128, 128}
5452 },
5453 {
5454 { 1, 152, 252, 255, 240, 255, 128, 128, 128, 128, 128},
5455 { 177, 135, 243, 255, 234, 225, 128, 128, 128, 128, 128},
5456 { 80, 129, 211, 255, 194, 224, 128, 128, 128, 128, 128}
5457 },
5458 {
5459 { 1, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5460 { 246, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5461 { 255, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}
5462 }
5463 },
5464 {
5465 {
5466 { 198, 35, 237, 223, 193, 187, 162, 160, 145, 155, 62},
5467 { 131, 45, 198, 221, 172, 176, 220, 157, 252, 221, 1},
5468 { 68, 47, 146, 208, 149, 167, 221, 162, 255, 223, 128}
5469 },
5470 {
5471 { 1, 149, 241, 255, 221, 224, 255, 255, 128, 128, 128},
5472 { 184, 141, 234, 253, 222, 220, 255, 199, 128, 128, 128},
5473 { 81, 99, 181, 242, 176, 190, 249, 202, 255, 255, 128}
5474 },
5475 {
5476 { 1, 129, 232, 253, 214, 197, 242, 196, 255, 255, 128},
5477 { 99, 121, 210, 250, 201, 198, 255, 202, 128, 128, 128},
5478 { 23, 91, 163, 242, 170, 187, 247, 210, 255, 255, 128}
5479 },
5480 {
5481 { 1, 200, 246, 255, 234, 255, 128, 128, 128, 128, 128},
5482 { 109, 178, 241, 255, 231, 245, 255, 255, 128, 128, 128},
5483 { 44, 130, 201, 253, 205, 192, 255, 255, 128, 128, 128}
5484 },
5485 {
5486 { 1, 132, 239, 251, 219, 209, 255, 165, 128, 128, 128},
5487 { 94, 136, 225, 251, 218, 190, 255, 255, 128, 128, 128},
5488 { 22, 100, 174, 245, 186, 161, 255, 199, 128, 128, 128}
5489 },
5490 {
5491 { 1, 182, 249, 255, 232, 235, 128, 128, 128, 128, 128},
5492 { 124, 143, 241, 255, 227, 234, 128, 128, 128, 128, 128},
5493 { 35, 77, 181, 251, 193, 211, 255, 205, 128, 128, 128}
5494 },
5495 {
5496 { 1, 157, 247, 255, 236, 231, 255, 255, 128, 128, 128},
5497 { 121, 141, 235, 255, 225, 227, 255, 255, 128, 128, 128},
5498 { 45, 99, 188, 251, 195, 217, 255, 224, 128, 128, 128}
5499 },
5500 {
5501 { 1, 1, 251, 255, 213, 255, 128, 128, 128, 128, 128},
5502 { 203, 1, 248, 255, 255, 128, 128, 128, 128, 128, 128},
5503 { 137, 1, 177, 255, 224, 255, 128, 128, 128, 128, 128}
5504 }
5505 },
5506 {
5507 {
5508 { 253, 9, 248, 251, 207, 208, 255, 192, 128, 128, 128},
5509 { 175, 13, 224, 243, 193, 185, 249, 198, 255, 255, 128},
5510 { 73, 17, 171, 221, 161, 179, 236, 167, 255, 234, 128}
5511 },
5512 {
5513 { 1, 95, 247, 253, 212, 183, 255, 255, 128, 128, 128},
5514 { 239, 90, 244, 250, 211, 209, 255, 255, 128, 128, 128},
5515 { 155, 77, 195, 248, 188, 195, 255, 255, 128, 128, 128}
5516 },
5517 {
5518 { 1, 24, 239, 251, 218, 219, 255, 205, 128, 128, 128},
5519 { 201, 51, 219, 255, 196, 186, 128, 128, 128, 128, 128},
5520 { 69, 46, 190, 239, 201, 218, 255, 228, 128, 128, 128}
5521 },
5522 {
5523 { 1, 191, 251, 255, 255, 128, 128, 128, 128, 128, 128},
5524 { 223, 165, 249, 255, 213, 255, 128, 128, 128, 128, 128},
5525 { 141, 124, 248, 255, 255, 128, 128, 128, 128, 128, 128}
5526 },
5527 {
5528 { 1, 16, 248, 255, 255, 128, 128, 128, 128, 128, 128},
5529 { 190, 36, 230, 255, 236, 255, 128, 128, 128, 128, 128},
5530 { 149, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5531 },
5532 {
5533 { 1, 226, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5534 { 247, 192, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5535 { 240, 128, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5536 },
5537 {
5538 { 1, 134, 252, 255, 255, 128, 128, 128, 128, 128, 128},
5539 { 213, 62, 250, 255, 255, 128, 128, 128, 128, 128, 128},
5540 { 55, 93, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5541 },
5542 {
5543 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5544 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128},
5545 { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128}
5546 }
5547 },
5548 {
5549 {
5550 { 202, 24, 213, 235, 186, 191, 220, 160, 240, 175, 255},
5551 { 126, 38, 182, 232, 169, 184, 228, 174, 255, 187, 128},
5552 { 61, 46, 138, 219, 151, 178, 240, 170, 255, 216, 128}
5553 },
5554 {
5555 { 1, 112, 230, 250, 199, 191, 247, 159, 255, 255, 128},
5556 { 166, 109, 228, 252, 211, 215, 255, 174, 128, 128, 128},
5557 { 39, 77, 162, 232, 172, 180, 245, 178, 255, 255, 128}
5558 },
5559 {
5560 { 1, 52, 220, 246, 198, 199, 249, 220, 255, 255, 128},
5561 { 124, 74, 191, 243, 183, 193, 250, 221, 255, 255, 128},
5562 { 24, 71, 130, 219, 154, 170, 243, 182, 255, 255, 128}
5563 },
5564 {
5565 { 1, 182, 225, 249, 219, 240, 255, 224, 128, 128, 128},
5566 { 149, 150, 226, 252, 216, 205, 255, 171, 128, 128, 128},
5567 { 28, 108, 170, 242, 183, 194, 254, 223, 255, 255, 128}
5568 },
5569 {
5570 { 1, 81, 230, 252, 204, 203, 255, 192, 128, 128, 128},
5571 { 123, 102, 209, 247, 188, 196, 255, 233, 128, 128, 128},
5572 { 20, 95, 153, 243, 164, 173, 255, 203, 128, 128, 128}
5573 },
5574 {
5575 { 1, 222, 248, 255, 216, 213, 128, 128, 128, 128, 128},
5576 { 168, 175, 246, 252, 235, 205, 255, 255, 128, 128, 128},
5577 { 47, 116, 215, 255, 211, 212, 255, 255, 128, 128, 128}
5578 },
5579 {
5580 { 1, 121, 236, 253, 212, 214, 255, 255, 128, 128, 128},
5581 { 141, 84, 213, 252, 201, 202, 255, 219, 128, 128, 128},
5582 { 42, 80, 160, 240, 162, 185, 255, 205, 128, 128, 128}
5583 },
5584 {
5585 { 1, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5586 { 244, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128},
5587 { 238, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128}
5588 }
5589 }
5590 };
5591
5592 const uint16_t VP8_C0_TABLE[256] =
5593 {
5594 2047, 2047, 1791, 1641, 1535, 1452, 1385, 1328, 1279, 1235, 1196, 1161, 1129, 1099, 1072, 1046,
5595 1023, 1000, 979, 959, 940, 922, 905, 889, 873, 858, 843, 829, 816, 803, 790, 778,
5596 767, 755, 744, 733, 723, 713, 703, 693, 684, 675, 666, 657, 649, 641, 633, 625,
5597 617, 609, 602, 594, 587, 580, 573, 567, 560, 553, 547, 541, 534, 528, 522, 516,
5598 511, 505, 499, 494, 488, 483, 477, 472, 467, 462, 457, 452, 447, 442, 437, 433,
5599 428, 424, 419, 415, 410, 406, 401, 397, 393, 389, 385, 381, 377, 373, 369, 365,
5600 361, 357, 353, 349, 346, 342, 338, 335, 331, 328, 324, 321, 317, 314, 311, 307,
5601 304, 301, 297, 294, 291, 288, 285, 281, 278, 275, 272, 269, 266, 263, 260, 257,
5602 255, 252, 249, 246, 243, 240, 238, 235, 232, 229, 227, 224, 221, 219, 216, 214,
5603 211, 208, 206, 203, 201, 198, 196, 194, 191, 189, 186, 184, 181, 179, 177, 174,
5604 172, 170, 168, 165, 163, 161, 159, 156, 154, 152, 150, 148, 145, 143, 141, 139,
5605 137, 135, 133, 131, 129, 127, 125, 123, 121, 119, 117, 115, 113, 111, 109, 107,
5606 105, 103, 101, 99, 97, 95, 93, 92, 90, 88, 86, 84, 82, 81, 79, 77,
5607 75, 73, 72, 70, 68, 66, 65, 63, 61, 60, 58, 56, 55, 53, 51, 50,
5608 48, 46, 45, 43, 41, 40, 38, 37, 35, 33, 32, 30, 29, 27, 25, 24,
5609 22, 21, 19, 18, 16, 15, 13, 12, 10, 9, 7, 6, 4, 3, 1, 1
5610 };
5611
5612 extern const uint8_t VP8_PROBABILITY_UPDATE_FLAGS_G11 [VP8_NUM_COEFF_PLANES][VP8_NUM_COEFF_BANDS][VP8_NUM_LOCAL_COMPLEXITIES][VP8_NUM_COEFF_NODES]= {
5613
5614 {
5615 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}},
5616 {{1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,1,0,0,0,0,0,0,0}, {1,1,1,1,1,0,0,0,0,0,0}},
5617 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5618 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5619 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5620 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5621 {{0,1,1,1,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}},
5622 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5623 },
5624
5625 {
5626 {{1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5627 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,1,0,0,0,0,0,0,0}},
5628 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5629 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5630 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5631 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5632 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5633 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5634 },
5635
5636 {
5637 {{1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5638 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5639 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5640 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5641 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5642 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5643 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5644 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5645 },
5646
5647 {
5648 {{1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5649 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,1,0,0,0,0,0,0,0,0}, {1,1,1,1,0,0,0,0,0,0,0}},
5650 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5651 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5652 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5653 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5654 {{0,1,1,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}, {1,1,0,0,0,0,0,0,0,0,0}},
5655 {{0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0}}
5656 }
5657 };
5658
5659 extern const uint8_t VP8_COEFF_UPDATE_PROBS_G11[4][8][3][11] =
5660 {
5661 {
5662 {
5663 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5664 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5665 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5666 },
5667 {
5668 { 176, 246, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5669 { 223, 241, 252, 255, 255, 255, 255, 255, 255, 255, 255},
5670 { 249, 253, 253, 255, 255, 255, 255, 255, 255, 255, 255}
5671 },
5672 {
5673 { 255, 244, 252, 255, 255, 255, 255, 255, 255, 255, 255},
5674 { 234, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5675 { 253, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5676 },
5677 {
5678 { 255, 246, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5679 { 239, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5680 { 254, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5681 },
5682 {
5683 { 255, 248, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5684 { 251, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5685 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5686 },
5687 {
5688 { 255, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5689 { 251, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5690 { 254, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5691 },
5692 {
5693 { 255, 254, 253, 255, 254, 255, 255, 255, 255, 255, 255},
5694 { 250, 255, 254, 255, 254, 255, 255, 255, 255, 255, 255},
5695 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5696 },
5697 {
5698 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5699 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5700 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5701 }
5702 },
5703 {
5704 {
5705 { 217, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5706 { 225, 252, 241, 253, 255, 255, 254, 255, 255, 255, 255},
5707 { 234, 250, 241, 250, 253, 255, 253, 254, 255, 255, 255}
5708 },
5709 {
5710 { 255, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5711 { 223, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5712 { 238, 253, 254, 254, 255, 255, 255, 255, 255, 255, 255}
5713 },
5714 {
5715 { 255, 248, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5716 { 249, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5717 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5718 },
5719 {
5720 { 255, 253, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5721 { 247, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5722 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5723 },
5724 {
5725 { 255, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5726 { 252, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5727 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5728 },
5729 {
5730 { 255, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5731 { 253, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5732 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5733 },
5734 {
5735 { 255, 254, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5736 { 250, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5737 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5738 },
5739 {
5740 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5741 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5742 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5743 }
5744 },
5745 {
5746 {
5747 { 186, 251, 250, 255, 255, 255, 255, 255, 255, 255, 255},
5748 { 234, 251, 244, 254, 255, 255, 255, 255, 255, 255, 255},
5749 { 251, 251, 243, 253, 254, 255, 254, 255, 255, 255, 255}
5750 },
5751 {
5752 { 255, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5753 { 236, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5754 { 251, 253, 253, 254, 254, 255, 255, 255, 255, 255, 255}
5755 },
5756 {
5757 { 255, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5758 { 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5759 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5760 },
5761 {
5762 { 255, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5763 { 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5764 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5765 },
5766 {
5767 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5768 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5769 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5770 },
5771 {
5772 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5773 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5774 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5775 },
5776 {
5777 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5778 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5779 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5780 },
5781 {
5782 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5783 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5784 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5785 }
5786 },
5787 {
5788 {
5789 { 248, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5790 { 250, 254, 252, 254, 255, 255, 255, 255, 255, 255, 255},
5791 { 248, 254, 249, 253, 255, 255, 255, 255, 255, 255, 255}
5792 },
5793 {
5794 { 255, 253, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5795 { 246, 253, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5796 { 252, 254, 251, 254, 254, 255, 255, 255, 255, 255, 255}
5797 },
5798 {
5799 { 255, 254, 252, 255, 255, 255, 255, 255, 255, 255, 255},
5800 { 248, 254, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5801 { 253, 255, 254, 254, 255, 255, 255, 255, 255, 255, 255}
5802 },
5803 {
5804 { 255, 251, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5805 { 245, 251, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5806 { 253, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5807 },
5808 {
5809 { 255, 251, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5810 { 252, 253, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5811 { 255, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5812 },
5813 {
5814 { 255, 252, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5815 { 249, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255},
5816 { 255, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255}
5817 },
5818 {
5819 { 255, 255, 253, 255, 255, 255, 255, 255, 255, 255, 255},
5820 { 250, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5821 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5822 },
5823 {
5824 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5825 { 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255},
5826 { 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255}
5827 }
5828 }
5829 };
5830
5831 static const int32_t iMbEncCurbeSize_g11[CODECHAL_ENCODE_VP8_MBENC_IDX_NUM] = {
5832 sizeof(struct Vp8MbencICurbeG11),
5833 sizeof(struct Vp8MbencICurbeG11),
5834 sizeof(struct Vp8MbencPCurbeG11)
5835 };
5836
5837 static const int32_t iBrcBtCount_g11[CODECHAL_ENCODE_VP8_BRC_IDX_NUM] = {
5838 CODECHAL_VP8_MBENC_NUM_SURFACES_G11,
5839 CODECHAL_VP8_BRC_INIT_RESET_NUM_SURFACES_G11,
5840 CODECHAL_VP8_BRC_INIT_RESET_NUM_SURFACES_G11,
5841 CODECHAL_VP8_BRC_UPDATE_NUM_SURFACES_G11
5842 };
5843
5844 static const int32_t iBrcCurbeSize_g11[CODECHAL_ENCODE_VP8_BRC_IDX_NUM] = {
5845 sizeof(struct Vp8MbencICurbeG11),
5846 sizeof(struct Vp8BrcInitResetCurbeG11),
5847 sizeof(struct Vp8BrcInitResetCurbeG11),
5848 sizeof(struct Vp8BrcUpdateCurbeG11)
5849 };
5850
CodechalEncodeVp8G11(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)5851 CodechalEncodeVp8G11::CodechalEncodeVp8G11(
5852 CodechalHwInterface* hwInterface,
5853 CodechalDebugInterface* debugInterface,
5854 PCODECHAL_STANDARD_INFO standardInfo)
5855 :CodechalEncodeVp8(hwInterface, debugInterface, standardInfo)
5856 {
5857 CODECHAL_ENCODE_FUNCTION_ENTER;
5858
5859 pfnGetKernelHeaderAndSize = GetKernelHeaderAndSize;
5860
5861 m_kuid = IDR_CODEC_AllVP8Enc;
5862 m_kuidCommon = IDR_CODEC_HME_DS_SCOREBOARD_KERNEL;
5863 // SWSCOREBOARD use the common kernel, but other kernels are withing VP8 combined kernel
5864 m_useCommonKernel = true;
5865 #ifndef _FULL_OPEN_SOURCE
5866 m_kernelBase = (uint8_t*)IGCODECKRN_G11;
5867 #else
5868 m_kernelBase = nullptr;
5869 #endif
5870
5871 CodecHalGetKernelBinaryAndSize(
5872 m_kernelBase,
5873 m_kuid,
5874 &m_kernelBinary,
5875 &m_combinedKernelSize);
5876
5877 m_hwInterface->GetStateHeapSettings()->dwNumSyncTags = CODECHAL_NUM_VP8_ENC_SYNC_TAGS;
5878 m_hwInterface->GetStateHeapSettings()->dwIshSize +=
5879 MOS_ALIGN_CEIL(m_combinedKernelSize, (1 << MHW_KERNEL_OFFSET_SHIFT));
5880 m_hwInterface->GetStateHeapSettings()->dwDshSize = CODECHAL_INIT_DSH_SIZE_VP8_ENC;
5881
5882 m_brcDistortionBufferSupported = true;
5883 m_brcConstantBufferSupported = true;
5884 m_brcConstantSurfaceWidth = CODECHAL_ENCODE_VP8_BRC_CONSTANTSURFACE_WIDTH;
5885 m_brcConstantSurfaceHeight = CODECHAL_ENCODE_VP8_BRC_CONSTANTSURFACE_HEIGHT;
5886 }
5887
FreeResources()5888 void CodechalEncodeVp8G11::FreeResources()
5889 {
5890 if (m_swScoreboardState)
5891 {
5892 MOS_Delete(m_swScoreboardState);
5893 m_swScoreboardState = nullptr;
5894 }
5895
5896 // then call base function
5897 CodechalEncodeVp8::FreeResources();
5898 }
5899
Initialize(CodechalSetting * codecHalSettings)5900 MOS_STATUS CodechalEncodeVp8G11::Initialize(CodechalSetting * codecHalSettings)
5901 {
5902 MOS_STATUS status = MOS_STATUS_SUCCESS;
5903
5904 CODECHAL_ENCODE_FUNCTION_ENTER;
5905
5906 // common initilization
5907 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeVp8::Initialize(codecHalSettings));
5908
5909 m_useHwScoreboard = false;
5910
5911 return status;
5912 }
5913
ResizeOnResChange()5914 void CodechalEncodeVp8G11::ResizeOnResChange()
5915 {
5916 CODECHAL_ENCODE_FUNCTION_ENTER;
5917
5918 CodechalEncoderState::ResizeOnResChange();
5919
5920 // need to re-allocate surfaces according to resolution
5921 m_swScoreboardState->ReleaseResources();
5922 }
5923
ExecuteKernelFunctions()5924 MOS_STATUS CodechalEncodeVp8G11::ExecuteKernelFunctions()
5925 {
5926 MOS_SYNC_PARAMS syncParams;
5927 CodechalEncodeCscDs::KernelParams cscScalingKernelParams;
5928 bool isEncPhase1NotRun;
5929 MOS_STATUS status = MOS_STATUS_SUCCESS;
5930
5931 CODECHAL_ENCODE_FUNCTION_ENTER;
5932
5933 CODECHAL_DEBUG_TOOL(
5934 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
5935 m_rawSurfaceToEnc,
5936 CodechalDbgAttr::attrEncodeRawInputSurface,
5937 "SrcSurf"))
5938 );
5939
5940 MOS_ZeroMemory(&syncParams, sizeof(MOS_SYNC_PARAMS));
5941 // Wait on PAK, if its the P frame after I frame only
5942 if ((m_waitForPak) && !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
5943 {
5944 syncParams = g_cInitSyncParams;
5945 syncParams.GpuContext = m_renderContext;
5946 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
5947
5948 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
5949 }
5950
5951 // Check if SW scoreboard init is needed
5952 auto swScoreboardInitNeeded = true;
5953 CodechalEncodeSwScoreboard::KernelParams swScoreboardKernelParames;
5954 MOS_ZeroMemory(&swScoreboardKernelParames, sizeof(swScoreboardKernelParames));
5955
5956 // Decide dependency pattern
5957 // both I and P need to software scoreboard initialized for the WAVEFRONT_45_DEGREE pattern
5958 swScoreboardKernelParames.surfaceIndex = dependencyWavefront45Degree;
5959 m_swScoreboardState->SetDependencyPattern(dependencyWavefront45Degree);
5960
5961
5962 m_swScoreboardState->SetCurSwScoreboardSurfaceIndex(swScoreboardKernelParames.surfaceIndex);
5963 // Only called if current pattern was not initialized before
5964 if (Mos_ResourceIsNull(&m_swScoreboardState->GetCurSwScoreboardSurface()->OsResource))
5965 {
5966 swScoreboardInitNeeded = true;
5967 }
5968
5969 // BRC init/reset needs to be called before HME since it will reset the Brc Distortion surface
5970 if (m_brcEnabled)
5971 {
5972 m_brcReset = m_vp8SeqParams->ResetBRC;
5973 if (m_brcInit || m_brcReset)
5974 {
5975 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcInitResetKernel());
5976 }
5977 }
5978
5979 // Csc, Downscaling, and/or 10-bit to 8-bit conversion
5980 MOS_ZeroMemory(&cscScalingKernelParams, sizeof(cscScalingKernelParams));
5981 #if 0
5982 cscScalingKernelParams.bLastTaskInPhaseCSC =
5983 cscScalingKernelParams.bLastTaskInPhase4xDS = m_pictureCodingType == I_TYPE;
5984 #endif
5985
5986 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cscDsState->KernelFunctions(&cscScalingKernelParams));
5987
5988 if (m_hmeEnabled)
5989 {
5990 if (m_b16XMeEnabled)
5991 {
5992 CODECHAL_ENCODE_CHK_STATUS_RETURN(MeKernel());
5993 }
5994
5995 CODECHAL_ENCODE_CHK_STATUS_RETURN(MeKernel());
5996
5997 CODECHAL_DEBUG_TOOL(
5998 if (m_hmeEnabled) {
5999 CODECHAL_ME_OUTPUT_PARAMS meOutputParams;
6000 MOS_ZeroMemory(&meOutputParams, sizeof(CODECHAL_ME_OUTPUT_PARAMS));
6001 meOutputParams.psMeMvBuffer = &m_s4XMemvDataBuffer;
6002 meOutputParams.psMeBrcDistortionBuffer = m_brcEnabled ? &m_brcBuffers.sMeBrcDistortionBuffer : nullptr;
6003 meOutputParams.psMeDistortionBuffer = &m_s4XMeDistortionBuffer;
6004 meOutputParams.b16xMeInUse = false;
6005
6006 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
6007 &meOutputParams.psMeMvBuffer->OsResource,
6008 CodechalDbgAttr::attrOutput,
6009 "MvData",
6010 meOutputParams.psMeMvBuffer->dwHeight * meOutputParams.psMeMvBuffer->dwPitch,
6011 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 32), 64) * (m_downscaledFrameFieldHeightInMb4x * 4) : 0,
6012 CODECHAL_MEDIA_STATE_4X_ME));
6013
6014 if (m_brcEnabled)
6015 {
6016 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
6017 &meOutputParams.psMeBrcDistortionBuffer->OsResource,
6018 CodechalDbgAttr::attrOutput,
6019 "BrcDist",
6020 meOutputParams.psMeBrcDistortionBuffer->dwHeight * meOutputParams.psMeBrcDistortionBuffer->dwPitch,
6021 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64) * MOS_ALIGN_CEIL((m_downscaledFrameFieldHeightInMb4x * 4), 8) : 0,
6022 CODECHAL_MEDIA_STATE_4X_ME));
6023 }
6024
6025 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
6026 &meOutputParams.psMeDistortionBuffer->OsResource,
6027 CodechalDbgAttr::attrOutput,
6028 "MeDist",
6029 meOutputParams.psMeDistortionBuffer->dwHeight * meOutputParams.psMeDistortionBuffer->dwPitch,
6030 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64) * MOS_ALIGN_CEIL((m_downscaledFrameFieldHeightInMb4x * 4 * 10), 8) : 0,
6031 CODECHAL_MEDIA_STATE_4X_ME));
6032
6033 if (m_b16XMeEnabled)
6034 {
6035 meOutputParams.psMeMvBuffer = &m_s16XMemvDataBuffer;
6036 meOutputParams.psMeBrcDistortionBuffer = nullptr;
6037 meOutputParams.psMeDistortionBuffer = nullptr;
6038 meOutputParams.b16xMeInUse = true;
6039
6040 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
6041 &meOutputParams.psMeMvBuffer->OsResource,
6042 CodechalDbgAttr::attrOutput,
6043 "MvData",
6044 meOutputParams.psMeMvBuffer->dwHeight * meOutputParams.psMeMvBuffer->dwPitch,
6045 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb16x * 32), 64) * (m_downscaledFrameFieldHeightInMb16x * 4) : 0,
6046 CODECHAL_MEDIA_STATE_16X_ME));
6047 }
6048 })
6049 }
6050
6051 // Initialize software scoreboard used by MBEnc kernel
6052 if (swScoreboardInitNeeded)
6053 {
6054 // Call SW scoreboard Init kernel
6055 m_lastTaskInPhase = true;
6056 swScoreboardKernelParames.scoreboardWidth = m_picWidthInMb;
6057 swScoreboardKernelParames.scoreboardHeight = m_frameFieldHeightInMb;
6058 swScoreboardKernelParames.swScoreboardSurfaceWidth = swScoreboardKernelParames.scoreboardWidth * 4 ;
6059 swScoreboardKernelParames.swScoreboardSurfaceHeight = swScoreboardKernelParames.scoreboardHeight;
6060
6061 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_swScoreboardState->Execute(&swScoreboardKernelParames));
6062 }
6063
6064 // Call Idistortion and BRCUpdate kernels
6065 if (m_brcEnabled)
6066 {
6067 // Intra Distortion kernel
6068 if (m_mbEncIFrameDistEnabled)
6069 {
6070 //CODECHAL_ENCODE_CHK_STATUS_RETURN(MbEncKernel(false, false, true));
6071 CODECHAL_ENCODE_CHK_STATUS_RETURN(IntrDistKernel());
6072 }
6073
6074 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcUpdateKernel());
6075 m_osInterface->pfnResetPerfBufferID(m_osInterface);
6076 }
6077
6078 // Reset after BRC Init has been processed
6079 m_brcInit = false;
6080
6081 // skip Phase 1 for I frame with performance mode
6082 if ((m_pictureCodingType == I_TYPE) && (m_kernelMode == encodePerformanceMode))
6083 {
6084 isEncPhase1NotRun = true;
6085 }
6086 else
6087 {
6088 // Phase 1 MbEnc Kernel
6089 CODECHAL_ENCODE_CHK_STATUS_RETURN(MbEncKernel(false, false, false));
6090 isEncPhase1NotRun = false;
6091 }
6092
6093 /* Call Phase 2 of I frame ENC kernel to process the Chroma component */
6094 if (m_pictureCodingType == I_TYPE)
6095 {
6096 // Phase 2 MbEnc Kernel
6097 CODECHAL_ENCODE_CHK_STATUS_RETURN(MbEncKernel(isEncPhase1NotRun, true, false));
6098 }
6099
6100 /* Call MPU kernel */
6101
6102 CODECHAL_ENCODE_CHK_STATUS_RETURN(MpuKernel());
6103
6104 // send signal from render to video after MPU kernel execution
6105 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
6106 {
6107 syncParams = g_cInitSyncParams;
6108 syncParams.GpuContext = m_renderContext;
6109 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
6110
6111 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
6112 }
6113
6114 if (m_brcEnabled)
6115 {
6116 m_mbEncCurbeSetInBrcUpdate = false;
6117 m_mbPakCurbeSetInBrcUpdate = false;
6118 }
6119
6120 m_frameNum += 1;
6121
6122 return status;
6123 }
6124
IntrDistKernel()6125 MOS_STATUS CodechalEncodeVp8G11::IntrDistKernel()
6126 {
6127 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
6128 PMHW_KERNEL_STATE kernelState;
6129 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
6130 struct CodechalVp8MbencCurbeParams mbEncCurbeParams;
6131 struct CodechalVp8MbencSurfaceParams mbEncSurfaceParams;
6132 struct CodechalBindingTableVp8Mbenc bindingTable;
6133 struct CodechalVp8InitMbencConstantBufferParams initMBEncConstantBufferParams;
6134 CODECHAL_MEDIA_STATE_TYPE encFunctionType;
6135 SendKernelCmdsParams sendKernelCmdsParams;
6136 MHW_WALKER_PARAMS walkerParams;
6137 CODECHAL_WALKER_CODEC_PARAMS walkerCodecParams;
6138 MOS_COMMAND_BUFFER cmdBuffer;
6139 uint8_t* data;
6140 PerfTagSetting perfTag;
6141 uint8_t index;
6142 MOS_LOCK_PARAMS lockFlags;
6143 uint32_t resolutionX, resolutionY;
6144 uint32_t refFrameFlag, finalRefFrameFlag;
6145 MOS_STATUS status = MOS_STATUS_SUCCESS;
6146
6147 CODECHAL_ENCODE_FUNCTION_ENTER;
6148
6149 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
6150 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6151 CODECHAL_ENCODE_CHK_NULL_RETURN(m_refList);
6152 CODECHAL_ENCODE_CHK_NULL_RETURN(m_vp8PicParams);
6153
6154 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
6155 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
6156
6157 perfTag.Value = 0;
6158 perfTag.Mode = (uint16_t)m_mode & CODECHAL_ENCODE_MODE_BIT_MASK;
6159 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_INTRA_DIST;
6160 perfTag.PictureCodingType = m_pictureCodingType;
6161 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
6162
6163 encFunctionType = CODECHAL_MEDIA_STATE_ENC_I_FRAME_DIST;
6164 kernelState = &m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_IFRAMEDIST];
6165 bindingTable = m_mbEncBindingTable;
6166
6167 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
6168 stateHeapInterface,
6169 kernelState->KernelParams.iBTCount));
6170 m_vmeStatesSize =
6171 m_hwInterface->GetKernelLoadCommandSize(kernelState->KernelParams.iBTCount);
6172 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
6173
6174 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
6175 stateHeapInterface,
6176 kernelState,
6177 false,
6178 0,
6179 false,
6180 m_storeData));
6181
6182 MOS_ZeroMemory(&idParams, sizeof(idParams));
6183 idParams.pKernelState = kernelState;
6184 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
6185 stateHeapInterface,
6186 1,
6187 &idParams));
6188
6189 // Setup VP8 Curbe
6190 MOS_ZeroMemory(&mbEncCurbeParams, sizeof(struct CodechalVp8MbencCurbeParams));
6191 mbEncCurbeParams.pPicParams = m_vp8PicParams;
6192 mbEncCurbeParams.pSeqParams = m_vp8SeqParams;
6193 mbEncCurbeParams.pVp8SliceParams = m_vp8SliceParams;
6194 mbEncCurbeParams.pVp8QuantData = m_vp8QuantData;
6195 mbEncCurbeParams.ppRefList = &(m_refList[0]);
6196 mbEncCurbeParams.wPicWidthInMb = m_picWidthInMb;
6197 mbEncCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
6198 mbEncCurbeParams.ucKernelMode = m_kernelMode;
6199 mbEncCurbeParams.bHmeEnabled = m_hmeEnabled;
6200 mbEncCurbeParams.bVmeKernelDump = m_vmeKernelDump;
6201 mbEncCurbeParams.wPictureCodingType = m_pictureCodingType;
6202 mbEncCurbeParams.bMbEncIFrameDistInUse = true;
6203 mbEncCurbeParams.pCurrOriginalPic = &m_currOriginalPic;
6204 mbEncCurbeParams.pLastRefPic = &m_vp8PicParams->LastRefPic;
6205 mbEncCurbeParams.pGoldenRefPic = &m_vp8PicParams->GoldenRefPic;
6206 mbEncCurbeParams.pAlternateRefPic = &m_vp8PicParams->AltRefPic;
6207 mbEncCurbeParams.pKernelState = kernelState;
6208
6209 if (!m_refCtrlOptimizationDone)
6210 {
6211 refFrameFlag = 1;
6212
6213 switch (m_vp8PicParams->ref_frame_ctrl)
6214 {
6215 case 0:
6216 finalRefFrameFlag = 0;
6217 break;
6218 case 1:
6219 finalRefFrameFlag = 1; //Last Ref only
6220 break;
6221 case 2:
6222 finalRefFrameFlag = 2; //Gold Ref only
6223 break;
6224 case 4:
6225 finalRefFrameFlag = 4; //Alt Ref only
6226 break;
6227 default:
6228 finalRefFrameFlag = refFrameFlag;
6229 }
6230
6231 m_vp8PicParams->ref_frame_ctrl = finalRefFrameFlag;
6232 }
6233
6234 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetIntrDistCurbe(&mbEncCurbeParams));
6235
6236 CODECHAL_DEBUG_TOOL(
6237 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
6238 encFunctionType,
6239 MHW_DSH_TYPE,
6240 kernelState));
6241 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
6242 encFunctionType,
6243 kernelState));
6244 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
6245 encFunctionType,
6246 MHW_ISH_TYPE,
6247 kernelState));
6248 )
6249
6250 if (m_initBrcDistortionBuffer)
6251 {
6252 InitBrcDistortionBuffer();
6253 }
6254
6255
6256 if (m_vp8PicParams->segmentation_enabled)
6257 {
6258 CodecHalGetResourceInfo(m_osInterface, &m_mbSegmentMapSurface);
6259 }
6260
6261 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
6262
6263 sendKernelCmdsParams = SendKernelCmdsParams();
6264 sendKernelCmdsParams.EncFunctionType = encFunctionType;
6265 sendKernelCmdsParams.pKernelState = kernelState;
6266 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
6267
6268 // Add binding table
6269 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetBindingTable(
6270 stateHeapInterface,
6271 kernelState));
6272
6273 //Add surface states
6274 MOS_ZeroMemory(&mbEncSurfaceParams, sizeof(struct CodechalVp8MbencSurfaceParams));
6275 mbEncSurfaceParams.MediaStateType = encFunctionType;
6276 mbEncSurfaceParams.ppRefList = &m_refList[0];
6277 mbEncSurfaceParams.wPictureCodingType = m_pictureCodingType;
6278 mbEncSurfaceParams.pCurrReconstructedPic = &m_currReconstructedPic;
6279 mbEncSurfaceParams.psCurrPicSurface = m_rawSurfaceToEnc;
6280 mbEncSurfaceParams.dwFrameWidthInMb = (uint32_t)m_picWidthInMb;
6281 mbEncSurfaceParams.dwFrameFieldHeightInMb = (uint32_t)m_frameFieldHeightInMb;
6282 mbEncSurfaceParams.dwOriFrameWidth = m_oriFrameWidth;
6283 mbEncSurfaceParams.dwOriFrameHeight = m_oriFrameHeight;
6284 mbEncSurfaceParams.dwVerticalLineStride = m_verticalLineStride;
6285 mbEncSurfaceParams.dwVerticalLineStrideOffset = m_verticalLineStrideOffset;
6286 mbEncSurfaceParams.presPerMB_MBCodeOpData = &m_resMbCodeSurface;
6287 mbEncSurfaceParams.bMbEncIFrameDistInUse = true;
6288 mbEncSurfaceParams.pVp8SliceParams = m_vp8SliceParams;
6289 mbEncSurfaceParams.psMeBrcDistortionBuffer = &m_brcBuffers.sMeBrcDistortionBuffer;
6290 mbEncSurfaceParams.uiRefCtrl = m_vp8PicParams->ref_frame_ctrl;
6291 mbEncSurfaceParams.pMbEncBindingTable = &bindingTable;
6292 mbEncSurfaceParams.pKernelState = kernelState;
6293
6294 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendIntrDistSurfaces(&cmdBuffer, &mbEncSurfaceParams));
6295
6296 CODECHAL_DEBUG_TOOL(
6297 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
6298 encFunctionType,
6299 MHW_SSH_TYPE,
6300 kernelState));
6301 )
6302
6303 resolutionX = m_downscaledWidthInMb4x;
6304 resolutionY = m_downscaledHeightInMb4x;
6305
6306 MOS_ZeroMemory(&walkerCodecParams, sizeof(walkerCodecParams));
6307 walkerCodecParams.WalkerMode = m_walkerMode;
6308 walkerCodecParams.bUseScoreboard = m_useHwScoreboard;
6309 walkerCodecParams.dwResolutionX = resolutionX;
6310 walkerCodecParams.dwResolutionY = resolutionY;
6311 walkerCodecParams.wPictureCodingType = m_pictureCodingType;
6312 walkerCodecParams.bNoDependency = true;
6313
6314 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalInitMediaObjectWalkerParams(
6315 m_hwInterface,
6316 &walkerParams,
6317 &walkerCodecParams));
6318
6319 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetRenderInterface()->AddMediaObjectWalkerCmd(
6320 &cmdBuffer,
6321 &walkerParams));
6322
6323 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, encFunctionType));
6324
6325 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSubmitBlocks(
6326 stateHeapInterface,
6327 kernelState));
6328
6329 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnUpdateGlobalCmdBufId(
6330 stateHeapInterface));
6331
6332 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(
6333 &cmdBuffer, nullptr));
6334
6335 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
6336 &cmdBuffer,
6337 encFunctionType,
6338 nullptr)));
6339
6340 CODECHAL_ENCODE_CHK_STATUS_RETURN(
6341 m_hwInterface->UpdateSSEuForCmdBuffer(
6342 &cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
6343
6344 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
6345
6346 CODECHAL_ENCODE_CHK_STATUS_RETURN(
6347 m_osInterface->pfnSubmitCommandBuffer(
6348 m_osInterface, &cmdBuffer, m_renderContextUsesNullHw));
6349
6350 return status;
6351 }
6352
InitKernelState()6353 MOS_STATUS CodechalEncodeVp8G11::InitKernelState()
6354 {
6355 MOS_STATUS status = MOS_STATUS_SUCCESS;
6356
6357 CODECHAL_ENCODE_FUNCTION_ENTER;
6358
6359 // Init kernel state
6360 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateMe());
6361 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateMbEnc());
6362 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateBrc());
6363 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateSwScoreboard());
6364
6365 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateTpu());
6366 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateMpu());
6367
6368 return status;
6369 }
6370
GetKernelHeaderAndSize(void * binary,EncOperation operation,uint32_t krnStateIdx,void * krnHeader,uint32_t * krnSize)6371 MOS_STATUS CodechalEncodeVp8G11::GetKernelHeaderAndSize(
6372 void *binary,
6373 EncOperation operation,
6374 uint32_t krnStateIdx,
6375 void *krnHeader,
6376 uint32_t *krnSize)
6377 {
6378 struct CodechalVp8KernelHeaderG11 * kernelHeaderTable;
6379 PCODECHAL_KERNEL_HEADER currKrnHeader, invalidEntry, nextKrnHeader;
6380 uint32_t nextKrnOffset;
6381 MOS_STATUS status = MOS_STATUS_SUCCESS;
6382
6383 CODECHAL_ENCODE_CHK_NULL_RETURN(binary);
6384 CODECHAL_ENCODE_CHK_NULL_RETURN(krnHeader);
6385 CODECHAL_ENCODE_CHK_NULL_RETURN(krnSize);
6386
6387 kernelHeaderTable = (struct CodechalVp8KernelHeaderG11*)binary;
6388 invalidEntry = &(kernelHeaderTable->VP8_BRC_FrameEncUpdate) + 1;
6389 nextKrnOffset = *krnSize;
6390
6391 if (operation == ENC_SCALING4X)
6392 {
6393 currKrnHeader = &kernelHeaderTable->PLY_DScale_PLY;
6394 }
6395 else if (operation == ENC_ME)
6396 {
6397 currKrnHeader = &kernelHeaderTable->VP8_ME_P;
6398 }
6399 else if (operation == ENC_BRC)
6400 {
6401 currKrnHeader = &kernelHeaderTable->VP8MBEnc_I_Dist;
6402 }
6403 else if (operation == ENC_MBENC_I_LUMA)
6404 {
6405 currKrnHeader = &kernelHeaderTable->VP8MBEnc_I_Luma;
6406 }
6407 else if (operation == ENC_MBENC)
6408 {
6409 currKrnHeader = &kernelHeaderTable->VP8MBEnc_Norm_Frm_I;
6410 }
6411 else if (operation == ENC_MPU)
6412 {
6413 currKrnHeader = &kernelHeaderTable->VP8_MPU;
6414 }
6415 else if (operation == ENC_TPU)
6416 {
6417 currKrnHeader = &kernelHeaderTable->VP8_TPU;
6418 }
6419 else
6420 {
6421 CODECHAL_ENCODE_ASSERTMESSAGE("Unsupported ENC mode requested");
6422 return MOS_STATUS_INVALID_PARAMETER;
6423 }
6424
6425 currKrnHeader += krnStateIdx;
6426 *((PCODECHAL_KERNEL_HEADER)krnHeader) = *currKrnHeader;
6427
6428 nextKrnHeader = (currKrnHeader + 1);
6429 if (nextKrnHeader < invalidEntry)
6430 {
6431 nextKrnOffset = nextKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT;
6432 }
6433 *krnSize = nextKrnOffset - (currKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
6434
6435 return status;
6436 }
6437
InitKernelStateHelper(struct CodechalEncodeVp8InitKernelStateParams * params)6438 MOS_STATUS CodechalEncodeVp8G11::InitKernelStateHelper(
6439 struct CodechalEncodeVp8InitKernelStateParams * params)
6440 {
6441 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
6442 PMHW_KERNEL_STATE kernelStatePtr;
6443 CODECHAL_KERNEL_HEADER currKrnHeader;
6444 uint32_t kernelSize;
6445 MOS_STATUS status = MOS_STATUS_SUCCESS;
6446
6447 CODECHAL_ENCODE_FUNCTION_ENTER;
6448
6449 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6450 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
6451 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pRenderEngineInterface);
6452 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pRenderEngineInterface->GetHwCaps());
6453 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pRenderEngineInterface->m_stateHeapInterface);
6454 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pui8Binary);
6455
6456 stateHeapInterface = params->pRenderEngineInterface->m_stateHeapInterface;
6457 kernelStatePtr = params->pKernelState;
6458 kernelSize = params->dwCombinedKernelSize;
6459
6460 CODECHAL_ENCODE_CHK_STATUS_RETURN(pfnGetKernelHeaderAndSize(
6461 params->pui8Binary,
6462 params->Operation,
6463 params->dwKrnStateIdx,
6464 &currKrnHeader,
6465 &kernelSize));
6466
6467 kernelStatePtr->KernelParams.iBTCount = params->iBtCount;
6468 kernelStatePtr->KernelParams.iThreadCount = params->pRenderEngineInterface->GetHwCaps()->dwMaxThreads;
6469 kernelStatePtr->KernelParams.iCurbeLength = params->iCurbeCount;
6470 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
6471 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
6472 kernelStatePtr->KernelParams.iIdCount = 1;
6473
6474 kernelStatePtr->dwCurbeOffset = stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
6475 kernelStatePtr->KernelParams.pBinary =
6476 params->pui8Binary +
6477 (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
6478 kernelStatePtr->KernelParams.iSize = kernelSize;
6479
6480 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
6481 stateHeapInterface,
6482 kernelStatePtr->KernelParams.iBTCount,
6483 &kernelStatePtr->dwSshSize,
6484 &kernelStatePtr->dwBindingTableSize));
6485
6486 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(stateHeapInterface, kernelStatePtr));
6487
6488 return status;
6489 }
6490
InitKernelStateMbEnc()6491 MOS_STATUS CodechalEncodeVp8G11::InitKernelStateMbEnc()
6492 {
6493 MhwRenderInterface *renderEngineInterface;
6494 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
6495 PMHW_KERNEL_STATE kernelStatePtr;
6496 uint32_t combinedKernelSize;
6497 uint32_t krnStateIdx;
6498 struct CodechalBindingTableVp8Mbenc* bindingTable;
6499 uint8_t *binary;
6500 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6501 MOS_STATUS status = MOS_STATUS_SUCCESS;
6502
6503 CODECHAL_ENCODE_FUNCTION_ENTER;
6504
6505 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6506
6507 renderEngineInterface = m_hwInterface->GetRenderInterface();
6508 stateHeapInterface = renderEngineInterface->m_stateHeapInterface;
6509 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
6510
6511 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6512 m_kernelBase,
6513 m_kuid,
6514 &binary,
6515 (uint32_t*)&combinedKernelSize));
6516
6517 for (krnStateIdx = 0; krnStateIdx < CODECHAL_ENCODE_VP8_MBENC_IDX_NUM; krnStateIdx++)
6518 {
6519 kernelStatePtr = &m_mbEncKernelStates[krnStateIdx];
6520
6521 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6522 initKernelStateParams.pKernelState = kernelStatePtr;
6523 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6524 initKernelStateParams.pui8Binary = binary;
6525 if (krnStateIdx == CODECHAL_ENCODE_VP8_MBENC_IDX_P)
6526 {
6527 initKernelStateParams.Operation = ENC_MBENC;
6528 initKernelStateParams.dwKrnStateIdx = 1; // VP8MBEnc_Norm_Frm_P
6529 }
6530 else
6531 {
6532 initKernelStateParams.dwKrnStateIdx = 0;
6533 if (krnStateIdx == CODECHAL_ENCODE_VP8_MBENC_IDX_I_CHROMA)
6534 {
6535 initKernelStateParams.Operation = ENC_MBENC; // VP8MBEnc_Norm_Frm_I
6536 }
6537 else // CODECHAL_ENCODE_VP8_MBENC_IDX_I_LUMA
6538 {
6539 initKernelStateParams.Operation = ENC_MBENC_I_LUMA; // VP8MBEnc_I_Luma
6540 }
6541 }
6542 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6543 initKernelStateParams.iBtCount = CODECHAL_VP8_MBENC_NUM_SURFACES_G11;
6544 initKernelStateParams.iCurbeCount = iMbEncCurbeSize_g11[krnStateIdx];
6545 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6546 &initKernelStateParams));
6547
6548 if (krnStateIdx != CODECHAL_ENCODE_VP8_MBENC_IDX_P)
6549 {
6550 // I luma and chroma kernels share a single CURBE, so the DSH contains 2 IDs and 1 CURBE
6551 kernelStatePtr->dwCurbeOffset =
6552 stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData() * 2;
6553
6554 if (krnStateIdx == CODECHAL_ENCODE_VP8_MBENC_IDX_I_CHROMA)
6555 {
6556 // The luma kernel ID will occur before the chroma kernel ID
6557 kernelStatePtr->dwIdOffset =
6558 stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
6559 }
6560 }
6561 }
6562
6563 m_mbEncIFrameDshSize =
6564 (stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData() * 2) +
6565 MOS_ALIGN_CEIL(m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_I_LUMA].KernelParams.iCurbeLength,
6566 stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
6567
6568 // Until a better way can be found, maintain old binding table structures
6569 bindingTable = &m_mbEncBindingTable;
6570
6571 bindingTable->dwVp8MBEncMBOut = CODECHAL_VP8_MBENC_PER_MB_OUT_G11;
6572 bindingTable->dwVp8MBEncCurrY = CODECHAL_VP8_MBENC_CURR_Y_G11;
6573 bindingTable->dwVp8MBEncCurrUV = CODECHAL_VP8_MBENC_CURR_UV_G11;
6574 bindingTable->dwVp8MBEncMVDataFromME = CODECHAL_VP8_MBENC_MV_DATA_FROM_ME_G11;
6575 bindingTable->dwVp8MBEncIndMVData = CODECHAL_VP8_MBENC_IND_MV_DATA_G11;
6576 bindingTable->dwVp8MBEncRef1Pic = CODECHAL_VP8_MBENC_REF1_PIC_G11;
6577 bindingTable->dwVp8MBEncRef2Pic = CODECHAL_VP8_MBENC_REF2_PIC_G11;
6578 bindingTable->dwVp8MBEncRef3Pic = CODECHAL_VP8_MBENC_REF3_PIC_G11;
6579 bindingTable->dwVp8MBEncRefMBCount = CODECHAL_VP8_MBENC_REF_MB_COUNT_G11;
6580 bindingTable->dwVp8MBEncMBModeCostLuma = CODECHAL_VP8_MBENC_MB_MODE_COST_LUMA_G11;
6581 bindingTable->dwVp8MBEncBlockModeCost = CODECHAL_VP8_MBENC_BLOCK_MODE_COST_G11;
6582 bindingTable->dwVp8MBEncChromaRecon = CODECHAL_VP8_MBENC_CHROMA_RECON_G11;
6583 bindingTable->dwVp8MBEncHistogram = CODECHAL_VP8_MBENC_HISTOGRAM_G11;
6584 bindingTable->dwVp8MBEncSegmentationMap = CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G11;
6585 bindingTable->dwVp8MBEncBRCDist = CODECHAL_VP8_MBENC_IDIST_G11;
6586 bindingTable->dwVp8MbEncCurrYDownscaled = CODECHAL_VP8_MBENC_CURR_Y_DOWNSCALED_G11;
6587 bindingTable->dwVp8MBEncVMECoarseIntra = CODECHAL_VP8_MBENC_VME_Coarse_Intra_G11;
6588 bindingTable->dwVp8InterPredDistortion = CODECHAL_VP8_MBEBC_INTER_PRED_DISTORTION_G11;
6589 bindingTable->dwVp8PerMVDataSurface = CODECHAL_VP8_MBEBC_PER_MV_DATA_G11;
6590 bindingTable->dwVp8MBEncPerMBQuantDataP = CODECHAL_VP8_MBENC_P_PER_MB_QUANT_G11;
6591 bindingTable->dwVp8MBEncVMEInterPred = CODECHAL_VP8_MBENC_INTER_PRED_G11;
6592 bindingTable->dwVp8MBEncVMEDebugStreamoutI = CODECHAL_VP8_MBENC_I_VME_DEBUG_STREAMOUT_G11;
6593 bindingTable->dwVp8MBModeCostUpdateSurface = CODECHAL_VP8_MBENC_MODE_COST_UPDATE_G11;
6594 bindingTable->dwVp8MBEncVMEDebugStreamoutP = CODECHAL_VP8_MBENC_P_VME_DEBUG_STREAMOUT_G11;
6595 bindingTable->dwVp8MBEncVME = CODECHAL_VP8_MBENC_VME_G11;
6596 bindingTable->dwVp8MbEncSwscoreboardI = CODECHAL_VP8_MBENC_I_SWSCOREBOARD_G11;
6597 bindingTable->dwVp8MbEncSwscoreboardP = CODECHAL_VP8_MBENC_P_SWSCOREBOARD_G11;
6598
6599 return status;
6600 }
6601
InitKernelStateBrc()6602 MOS_STATUS CodechalEncodeVp8G11::InitKernelStateBrc()
6603 {
6604 MhwRenderInterface *renderEngineInterface;
6605 PMHW_KERNEL_STATE kernelStatePtr;
6606 uint32_t combinedKernelSize;
6607 uint32_t krnStateIdx;
6608 struct CodechalBindingTableVp8BrcUpdate* bindingTable;
6609 uint8_t *binary;
6610 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6611 MOS_STATUS status = MOS_STATUS_SUCCESS;
6612
6613 CODECHAL_ENCODE_FUNCTION_ENTER;
6614
6615 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6616
6617 renderEngineInterface = m_hwInterface->GetRenderInterface();
6618
6619 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6620 m_kernelBase,
6621 m_kuid,
6622 &binary,
6623 (uint32_t*)&combinedKernelSize));
6624
6625 for (krnStateIdx = 0; krnStateIdx < CODECHAL_ENCODE_VP8_BRC_IDX_NUM; krnStateIdx++)
6626 {
6627 kernelStatePtr = &m_brcKernelStates[krnStateIdx];
6628
6629 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6630 initKernelStateParams.pKernelState = kernelStatePtr;
6631 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6632 initKernelStateParams.pui8Binary = binary;
6633 initKernelStateParams.Operation = ENC_BRC;
6634 initKernelStateParams.dwKrnStateIdx = krnStateIdx;
6635 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6636 initKernelStateParams.iBtCount = iBrcBtCount_g11[krnStateIdx];
6637 initKernelStateParams.iCurbeCount = iBrcCurbeSize_g11[krnStateIdx];
6638 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6639 &initKernelStateParams));
6640 }
6641
6642 // Until a better way can be found, maintain old binding table structures
6643 bindingTable = &m_brcUpdateBindingTable;
6644 bindingTable->dwBrcHistoryBuffer = CODECHAL_VP8_BRC_UPDATE_HISTORY_G11;
6645 bindingTable->dwBrcPakStatisticsOutputBuffer = CODECHAL_VP8_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G11;
6646 bindingTable->dwBrcEncoderCfgReadBuffer = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_READ_G11;
6647 bindingTable->dwBrcEncoderCfgWriteBuffer = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_WRITE_G11;
6648 bindingTable->dwBrcMbEncCurbeReadBuffer = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_READ_G11;
6649 bindingTable->dwBrcMbEncCurbeWriteData = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_WRITE_G11;
6650 bindingTable->dwBrcDistortionBuffer = CODECHAL_VP8_BRC_UPDATE_DISTORTION_SURFACE_G11;
6651 bindingTable->dwBrcConstantData = CODECHAL_VP8_BRC_UPDATE_CONSTANT_DATA_G11;
6652 bindingTable->dwVp8BrcSegmentationMap = CODECHAL_VP8_BRC_UPDATE_SEGMENT_MAP_G11;
6653 bindingTable->dwBrcMpuCurbeReadBuffer = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_READ_G11;
6654 bindingTable->dwBrcMpuCurbeWriteData = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_WRITE_G11;
6655 bindingTable->dwBrcTpuCurbeReadBuffer = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_READ_G11;
6656 bindingTable->dwBrcTpuCurbeWriteData = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_WRITE_G11;
6657
6658 return status;
6659 }
6660
InitKernelStateMe()6661 MOS_STATUS CodechalEncodeVp8G11::InitKernelStateMe()
6662 {
6663 MhwRenderInterface *renderEngineInterface;
6664 uint32_t combinedKernelSize;
6665 struct CodechalBindingTableVp8Me* bindingTable;
6666 uint8_t *binary;
6667 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6668 MOS_STATUS status = MOS_STATUS_SUCCESS;
6669
6670 CODECHAL_ENCODE_FUNCTION_ENTER;
6671
6672 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6673
6674 renderEngineInterface = m_hwInterface->GetRenderInterface();
6675
6676 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6677 m_kernelBase,
6678 m_kuid,
6679 &binary,
6680 (uint32_t*)&combinedKernelSize));
6681
6682 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6683 initKernelStateParams.pKernelState = &m_meKernelState;
6684 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6685 initKernelStateParams.pui8Binary = binary;
6686 initKernelStateParams.Operation = ENC_ME;
6687 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6688 initKernelStateParams.iBtCount = CODECHAL_VP8_ME_NUM_SURFACES_G11;
6689 initKernelStateParams.iCurbeCount = sizeof(struct Vp8MeCurbeG11);
6690 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6691 &initKernelStateParams));
6692
6693 // Until a better way can be found, maintain old binding table structures
6694 bindingTable = &m_meBindingTable;
6695
6696 bindingTable->dwVp8MEMVDataSurface = CODECHAL_VP8_ME_MV_DATA_G11;
6697 bindingTable->dwVp816xMEMVDataSurface = CODECHAL_VP8_16xME_MV_DATA_G11;
6698 bindingTable->dwVp8MeDist = CODECHAL_VP8_ME_DISTORTION_G11;
6699 bindingTable->dwVp8MeBrcDist = CODECHAL_VP8_ME_MIN_DIST_BRC_DATA_G11;
6700 bindingTable->dwVp8MeCurrPic = CODECHAL_VP8_VME_INTER_PRED_G11;
6701 bindingTable->dwVp8MeRef1Pic = CODECHAL_VP8_ME_REF1_PIC_G11;
6702 bindingTable->dwVp8MeRef2Pic = CODECHAL_VP8_ME_REF2_PIC_G11;
6703 bindingTable->dwVp8MeRef3Pic = CODECHAL_VP8_ME_REF3_PIC_G11;
6704
6705 return status;
6706 }
6707
InitKernelStateMpu()6708 MOS_STATUS CodechalEncodeVp8G11::InitKernelStateMpu()
6709 {
6710 MhwRenderInterface *renderEngineInterface;
6711 uint32_t combinedKernelSize;
6712 struct CodechalBindingTableVp8Mpu* bindingTable;
6713 uint8_t *binary;
6714 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6715 MOS_STATUS status = MOS_STATUS_SUCCESS;
6716
6717 CODECHAL_ENCODE_FUNCTION_ENTER;
6718
6719 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6720
6721 renderEngineInterface = m_hwInterface->GetRenderInterface();
6722
6723 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6724 m_kernelBase,
6725 m_kuid,
6726 &binary,
6727 (uint32_t*)&combinedKernelSize));
6728
6729 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6730 initKernelStateParams.pKernelState = &m_mpuKernelState;
6731 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6732 initKernelStateParams.pui8Binary = binary;
6733 initKernelStateParams.Operation = ENC_MPU;
6734 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6735 initKernelStateParams.iBtCount = CODECHAL_VP8_MPU_FHB_NUM_SURFACES_G11;
6736 initKernelStateParams.iCurbeCount = sizeof(struct Vp8MpuFhbCurbeG11);
6737 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6738 &initKernelStateParams));
6739
6740 // Until a better way can be found, maintain old binding table structures
6741 bindingTable = &m_mpuBindingTable;
6742
6743 bindingTable->dwVp8MpuHistogram = CODECHAL_VP8_MPU_FHB_HISTOGRAM_G11;
6744 bindingTable->dwVp8MpuReferenceModeProbability = CODECHAL_VP8_MPU_FHB_REF_MODE_PROBABILITY_G11;
6745 bindingTable->dwVp8MpuModeProbability = CODECHAL_VP8_MPU_FHB_CURR_MODE_PROBABILITY_G11;
6746 bindingTable->dwVp8MpuReferenceTokenProbability = CODECHAL_VP8_MPU_FHB_REF_TOKEN_PROBABILITY_G11;
6747 bindingTable->dwVp8MpuTokenProbability = CODECHAL_VP8_MPU_FHB_CURR_TOKEN_PROBABILITY_G11;
6748 bindingTable->dwVp8MpuFrameHeaderBitstream = CODECHAL_VP8_MPU_FHB_HEADER_BITSTREAM_G11;
6749 bindingTable->dwVp8MpuHeaderMetaData = CODECHAL_VP8_MPU_FHB_HEADER_METADATA_G11;
6750 bindingTable->dwVp8MpuPictureState = CODECHAL_VP8_MPU_FHB_PICTURE_STATE_G11;
6751 bindingTable->dwVp8MpuMpuBitstream = CODECHAL_VP8_MPU_FHB_MPU_BITSTREAM_G11;
6752 bindingTable->dwVp8MpuTokenBitsData = CODECHAL_VP8_MPU_FHB_TOKEN_BITS_DATA_TABLE_G11;
6753 bindingTable->dwVp8MpuKernelDebugDump = CODECHAL_VP8_MPU_FHB_VME_DEBUG_STREAMOUT_G11;
6754 bindingTable->dwVp8MpuEntropyCost = CODECHAL_VP8_MPU_FHB_ENTROPY_COST_TABLE_G11;
6755 bindingTable->dwVp8MpuModeCostUpdateSurface = CODECHAL_VP8_MPU_MODE_COST_UPDATE_G11;
6756
6757 return status;
6758 }
6759
InitKernelStateTpu()6760 MOS_STATUS CodechalEncodeVp8G11::InitKernelStateTpu()
6761 {
6762 MhwRenderInterface *renderEngineInterface;
6763 uint32_t combinedKernelSize;
6764 struct CodechalBindingTableVp8Tpu* bindingTable;
6765 uint8_t *binary;
6766 struct CodechalEncodeVp8InitKernelStateParams initKernelStateParams;
6767 MOS_STATUS status = MOS_STATUS_SUCCESS;
6768
6769 CODECHAL_ENCODE_FUNCTION_ENTER;
6770
6771 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
6772
6773 renderEngineInterface = m_hwInterface->GetRenderInterface();
6774
6775 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(
6776 m_kernelBase,
6777 m_kuid,
6778 &binary,
6779 (uint32_t*)&combinedKernelSize));
6780
6781 MOS_ZeroMemory(&initKernelStateParams, sizeof(initKernelStateParams));
6782 initKernelStateParams.pKernelState = &m_tpuKernelState;
6783 initKernelStateParams.pRenderEngineInterface = renderEngineInterface;
6784 initKernelStateParams.pui8Binary = binary;
6785 initKernelStateParams.Operation = ENC_TPU;
6786 initKernelStateParams.dwCombinedKernelSize = combinedKernelSize;
6787 initKernelStateParams.iBtCount = CODECHAL_VP8_TPU_FHB_NUM_SURFACES_G11;
6788 initKernelStateParams.iCurbeCount = sizeof(struct Vp8TpuFhbCurbeG11);
6789 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateHelper(
6790 &initKernelStateParams));
6791
6792 // Until a better way can be found, maintain old binding table structures
6793 bindingTable = &m_tpuBindingTable;
6794
6795 bindingTable->dwVp8TpuPakTokenStatistics = CODECHAL_VP8_TPU_FHB_PAK_TOKEN_STATISTICS_G11;
6796 bindingTable->dwVp8TpuTokenUpdateFlags = CODECHAL_VP8_TPU_FHB_TOKEN_UPDATE_FLAGS_G11;
6797 bindingTable->dwVp8TpuEntropyCost = CODECHAL_VP8_TPU_FHB_ENTROPY_COST_TABLE_G11;
6798 bindingTable->dwVp8TpuFrameHeaderBitstream = CODECHAL_VP8_TPU_FHB_HEADER_BITSTREAM_G11;
6799 bindingTable->dwVp8TpuDefaultTokenProbability = CODECHAL_VP8_TPU_FHB_DEFAULT_TOKEN_PROBABILITY_G11;
6800 bindingTable->dwVp8TpuPictureState = CODECHAL_VP8_TPU_FHB_PICTURE_STATE_G11;
6801 bindingTable->dwVp8TpuMpuCurbeData = CODECHAL_VP8_TPU_FHB_MPU_CURBE_DATA_G11;
6802 bindingTable->dwVp8TpuHeaderMetaData = CODECHAL_VP8_TPU_FHB_HEADER_METADATA_G11;
6803 bindingTable->dwVp8TpuTokenProbability = CODECHAL_VP8_TPU_FHB_TOKEN_PROBABILITY_G11;
6804 bindingTable->dwVp8TpuPakHardwareTokenProbabilityPass1 = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS1_PROBABILITY_G11;
6805 bindingTable->dwVp8TpuKeyFrameTokenProbability = CODECHAL_VP8_TPU_FHB_KEY_TOKEN_PROBABILITY_G11;
6806 bindingTable->dwVp8TpuUpdatedTokenProbability = CODECHAL_VP8_TPU_FHB_UPDATED_TOKEN_PROBABILITY_G11;
6807 bindingTable->dwVp8TpuPakHardwareTokenProbabilityPass2 = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS2_PROBABILITY_G11;
6808 bindingTable->dwVp8TpuKernelDebugDump = CODECHAL_VP8_TPU_FHB_VME_DEBUG_STREAMOUT_G11;
6809 bindingTable->dwVp8TpuRepakDecision = CODECHAL_VP8_TPU_FHB_REPAK_DECISION_G11;
6810
6811 return status;
6812 }
6813
InitKernelStateSwScoreboard()6814 MOS_STATUS CodechalEncodeVp8G11::InitKernelStateSwScoreboard()
6815 {
6816 CODECHAL_ENCODE_CHK_NULL_RETURN(m_swScoreboardState = MOS_New(CodechalEncodeSwScoreboardG11, this));
6817 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_swScoreboardState->InitKernelState());
6818
6819 return MOS_STATUS_SUCCESS;
6820 }
6821
InitBrcConstantBuffer(struct CodechalVp8InitBrcConstantBufferParams * params)6822 MOS_STATUS CodechalEncodeVp8G11::InitBrcConstantBuffer(struct CodechalVp8InitBrcConstantBufferParams* params)
6823 {
6824 uint8_t* data;
6825 MOS_LOCK_PARAMS lockFlags;
6826 MOS_STATUS status = MOS_STATUS_SUCCESS;
6827
6828 CODECHAL_ENCODE_FUNCTION_ENTER;
6829
6830 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6831 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
6832
6833 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
6834 lockFlags.WriteOnly = 1;
6835 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6836 params->pOsInterface,
6837 ¶ms->resBrcConstantDataBuffer,
6838 &lockFlags);
6839 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6840
6841 MOS_ZeroMemory(data, BRC_CONSTANTSURFACE_VP8);
6842
6843 // Fill surface with QP Adjustment table, Distortion threshold table, MaxFrame threshold table, Distortion QP Adjustment Table for I frame
6844 status = MOS_SecureMemcpy(
6845 data,
6846 sizeof(VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_g11),
6847 (void *)VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_g11,
6848 sizeof(VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_g11));
6849 if(status != MOS_STATUS_SUCCESS)
6850 {
6851 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6852 return status;
6853 }
6854
6855 data += sizeof(VP8_BRC_QPAdjustment_DistThreshold_MaxFrameThreshold_DistQPAdjustment_IPB_g11);
6856
6857 status = MOS_SecureMemcpy(
6858 data,
6859 sizeof(VP8_BRC_IFRAME_COST_TABLE_G11),
6860 (void *)VP8_BRC_IFRAME_COST_TABLE_G11,
6861 sizeof(VP8_BRC_IFRAME_COST_TABLE_G11));
6862 if(status != MOS_STATUS_SUCCESS)
6863 {
6864 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6865 return status;
6866 }
6867
6868 data += sizeof(VP8_BRC_IFRAME_COST_TABLE_G11);
6869
6870 status = MOS_SecureMemcpy(
6871 data,
6872 sizeof(VP8_BRC_PFRAME_COST_TABLE_G11),
6873 (void *)VP8_BRC_PFRAME_COST_TABLE_G11,
6874 sizeof(VP8_BRC_PFRAME_COST_TABLE_G11));
6875 if(status != MOS_STATUS_SUCCESS)
6876 {
6877 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6878 return status;
6879 }
6880
6881 data += sizeof(VP8_BRC_PFRAME_COST_TABLE_G11);
6882
6883 status = MOS_SecureMemcpy(
6884 data,
6885 sizeof(VP8_BRC_QUANT_DC_TABLE),
6886 (void *)VP8_BRC_QUANT_DC_TABLE,
6887 sizeof(VP8_BRC_QUANT_DC_TABLE));
6888 if(status != MOS_STATUS_SUCCESS)
6889 {
6890 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6891 return status;
6892 }
6893
6894 data += sizeof(VP8_BRC_QUANT_DC_TABLE);
6895
6896 status = MOS_SecureMemcpy(
6897 data,
6898 sizeof(VP8_BRC_QUANT_AC_TABLE),
6899 (void *)VP8_BRC_QUANT_AC_TABLE,
6900 sizeof(VP8_BRC_QUANT_AC_TABLE));
6901 if(status != MOS_STATUS_SUCCESS)
6902 {
6903 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6904 return status;
6905 }
6906
6907 data += sizeof(VP8_BRC_QUANT_AC_TABLE);
6908
6909 status = MOS_SecureMemcpy(
6910 data,
6911 sizeof(VP8_BRC_SKIP_MV_THRESHOLD_TABLE),
6912 (void *)VP8_BRC_SKIP_MV_THRESHOLD_TABLE,
6913 sizeof(VP8_BRC_SKIP_MV_THRESHOLD_TABLE));
6914 if(status != MOS_STATUS_SUCCESS)
6915 {
6916 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6917 return status;
6918 }
6919
6920 params->pOsInterface->pfnUnlockResource(
6921 params->pOsInterface,
6922 ¶ms->resBrcConstantDataBuffer);
6923
6924 return status;
6925 }
6926
InitBrcDistortionBuffer()6927 MOS_STATUS CodechalEncodeVp8G11::InitBrcDistortionBuffer()
6928 {
6929 uint8_t *data;
6930 MOS_STATUS status = MOS_STATUS_SUCCESS;
6931 MOS_LOCK_PARAMS lockFlagsWriteOnly;
6932 uint32_t size, width, height;
6933
6934 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
6935
6936 data = (uint8_t *)m_osInterface->pfnLockResource(
6937 m_osInterface,
6938 &(m_brcBuffers.sMeBrcDistortionBuffer.OsResource),
6939 &lockFlagsWriteOnly);
6940
6941 if (data == nullptr)
6942 {
6943 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to Lock ME BRC Distortion Buffer.");
6944 status = MOS_STATUS_UNKNOWN;
6945 return status;
6946 }
6947 width = MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64);
6948 height = 2 * MOS_ALIGN_CEIL((m_downscaledHeightInMb4x * 4), 8);
6949 size = width * height;
6950
6951 MOS_ZeroMemory(data,size);
6952 m_osInterface->pfnUnlockResource(
6953 m_osInterface, &m_brcBuffers.sMeBrcDistortionBuffer.OsResource);
6954
6955 return status;
6956 }
6957
InitMBEncConstantBuffer(struct CodechalVp8InitMbencConstantBufferParams * params)6958 MOS_STATUS CodechalEncodeVp8G11::InitMBEncConstantBuffer(struct CodechalVp8InitMbencConstantBufferParams* params)
6959 {
6960 uint8_t *data;
6961 MOS_LOCK_PARAMS lockFlagsWriteOnly;
6962 MOS_STATUS status = MOS_STATUS_SUCCESS;
6963
6964 CODECHAL_ENCODE_FUNCTION_ENTER;
6965
6966 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6967 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
6968
6969 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
6970 lockFlagsWriteOnly.WriteOnly = 1;
6971
6972 /* First copy MB_MODE_COST_LUMA table */
6973 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6974 params->pOsInterface,
6975 ¶ms->sMBModeCostLumaBuffer.OsResource,
6976 &lockFlagsWriteOnly);
6977 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
6978
6979 MOS_ZeroMemory(data, params->sMBModeCostLumaBuffer.dwPitch * params->sMBModeCostLumaBuffer.dwHeight);
6980
6981 // Fill surface with VP8_MB_MODE_COST_LUMA table for I frame
6982 status = MOS_SecureMemcpy(
6983 data,
6984 sizeof(VP8_MB_MODE_COST_LUMA_G11),
6985 (void *)VP8_MB_MODE_COST_LUMA_G11,
6986 sizeof(VP8_MB_MODE_COST_LUMA_G11));
6987 if(status != MOS_STATUS_SUCCESS)
6988 {
6989 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6990 return status;
6991 }
6992
6993 params->pOsInterface->pfnUnlockResource(
6994 params->pOsInterface,
6995 ¶ms->sMBModeCostLumaBuffer.OsResource);
6996
6997 /* Now copy BLOCK_MODE_COST table */
6998 data = (uint8_t *)params->pOsInterface->pfnLockResource(
6999 params->pOsInterface,
7000 ¶ms->sBlockModeCostBuffer.OsResource,
7001 &lockFlagsWriteOnly);
7002 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7003
7004 MOS_ZeroMemory(data, params->sBlockModeCostBuffer.dwPitch * params->sBlockModeCostBuffer.dwHeight);
7005
7006 // Fill surface with VP8_BLOCK_MODE_COST table for I frame
7007 status = MOS_SecureMemcpy(
7008 data,
7009 sizeof(VP8_BLOCK_MODE_COST_G11),
7010 (void *)VP8_BLOCK_MODE_COST_G11,
7011 sizeof(VP8_BLOCK_MODE_COST_G11));
7012 if(status != MOS_STATUS_SUCCESS)
7013 {
7014 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7015 return status;
7016 }
7017
7018 params->pOsInterface->pfnUnlockResource(
7019 params->pOsInterface,
7020 ¶ms->sBlockModeCostBuffer.OsResource);
7021
7022 return status;
7023 }
7024
InitMpuTpuBuffer()7025 MOS_STATUS CodechalEncodeVp8G11::InitMpuTpuBuffer()
7026 {
7027 uint8_t *data = nullptr;
7028 uint8_t *origData = nullptr;
7029 MOS_LOCK_PARAMS lockFlagsWriteOnly;
7030 MOS_STATUS status = MOS_STATUS_SUCCESS;
7031
7032 CODECHAL_ENCODE_FUNCTION_ENTER;
7033
7034 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
7035
7036 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
7037 lockFlagsWriteOnly.WriteOnly = 1;
7038
7039 // Last 12 bytes of LFDeltas to be initialized by kernel
7040 origData = data = (uint8_t *)m_osInterface->pfnLockResource(
7041 m_osInterface,
7042 &m_mpuTpuBuffers.resModeProbs,
7043 &lockFlagsWriteOnly);
7044 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7045
7046 MOS_ZeroMemory(data, MODE_PROPABILITIES_SIZE);
7047
7048 m_osInterface->pfnUnlockResource(
7049 m_osInterface,
7050 &m_mpuTpuBuffers.resModeProbs);
7051
7052 data = nullptr;
7053
7054 data = (uint8_t *)m_osInterface->pfnLockResource(
7055 m_osInterface,
7056 &m_mpuTpuBuffers.resRefModeProbs,
7057 &lockFlagsWriteOnly);
7058 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7059
7060 MOS_ZeroMemory(data, MODE_PROPABILITIES_SIZE);
7061
7062 m_osInterface->pfnUnlockResource(
7063 m_osInterface,
7064 &m_mpuTpuBuffers.resRefModeProbs);
7065
7066 data = nullptr;
7067
7068 // Fill surface with VP8_DEFAULT_COEFF_PROBS_G11 table
7069 data = (uint8_t *)m_osInterface->pfnLockResource(
7070 m_osInterface,
7071 &m_mpuTpuBuffers.resRefCoeffProbs,
7072 &lockFlagsWriteOnly);
7073 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7074
7075 status = MOS_SecureMemcpy(
7076 data,
7077 sizeof(VP8_DEFAULT_COEFF_PROBS_G11),
7078 (void *)VP8_DEFAULT_COEFF_PROBS_G11,
7079 sizeof(VP8_DEFAULT_COEFF_PROBS_G11));
7080 if(status != MOS_STATUS_SUCCESS)
7081 {
7082 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7083 return status;
7084 }
7085
7086 m_osInterface->pfnUnlockResource(
7087 m_osInterface,
7088 &m_mpuTpuBuffers.resRefCoeffProbs);
7089
7090 data = nullptr;
7091
7092 // Init Entropy cost surface
7093 data = (uint8_t *)m_osInterface->pfnLockResource(
7094 m_osInterface,
7095 &m_mpuTpuBuffers.resEntropyCostTable,
7096 &lockFlagsWriteOnly);
7097 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7098
7099 status = MOS_SecureMemcpy(
7100 data,
7101 sizeof(VP8_C0_TABLE),
7102 (void *)VP8_C0_TABLE,
7103 sizeof(VP8_C0_TABLE));
7104 if(status != MOS_STATUS_SUCCESS)
7105 {
7106 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7107 return status;
7108 }
7109
7110 m_osInterface->pfnUnlockResource(
7111 m_osInterface,
7112 &m_mpuTpuBuffers.resEntropyCostTable);
7113
7114 data = nullptr;
7115
7116 // Init Token update flags surface
7117 data = (uint8_t *)m_osInterface->pfnLockResource(
7118 m_osInterface,
7119 &m_mpuTpuBuffers.resPakTokenUpdateFlags,
7120 &lockFlagsWriteOnly);
7121 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7122
7123 status = MOS_SecureMemcpy(
7124 data,
7125 sizeof(VP8_PROBABILITY_UPDATE_FLAGS_G11),
7126 (void *)VP8_PROBABILITY_UPDATE_FLAGS_G11,
7127 sizeof(VP8_PROBABILITY_UPDATE_FLAGS_G11));
7128 if(status != MOS_STATUS_SUCCESS)
7129 {
7130 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7131 return status;
7132 }
7133
7134 m_osInterface->pfnUnlockResource(
7135 m_osInterface,
7136 &m_mpuTpuBuffers.resPakTokenUpdateFlags);
7137
7138 data = nullptr;
7139
7140 // Init Token update flags surface
7141 data = (uint8_t *)m_osInterface->pfnLockResource(
7142 m_osInterface,
7143 &m_mpuTpuBuffers.resDefaultTokenProbability,
7144 &lockFlagsWriteOnly);
7145 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7146
7147 status = MOS_SecureMemcpy(
7148 data,
7149 sizeof(VP8_COEFF_UPDATE_PROBS_G11),
7150 (void *)VP8_COEFF_UPDATE_PROBS_G11,
7151 sizeof(VP8_COEFF_UPDATE_PROBS_G11));
7152
7153 m_osInterface->pfnUnlockResource(
7154 m_osInterface,
7155 &m_mpuTpuBuffers.resDefaultTokenProbability);
7156
7157 data = nullptr;
7158
7159 // Init key frame prob
7160 data = (uint8_t *)m_osInterface->pfnLockResource(
7161 m_osInterface,
7162 &m_mpuTpuBuffers.resKeyFrameTokenProbability,
7163 &lockFlagsWriteOnly);
7164 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7165
7166 status = MOS_SecureMemcpy(
7167 data,
7168 sizeof(VP8_DEFAULT_COEFF_PROBS_G11),
7169 (void *)VP8_DEFAULT_COEFF_PROBS_G11,
7170 sizeof(VP8_DEFAULT_COEFF_PROBS_G11));
7171 if(status != MOS_STATUS_SUCCESS)
7172 {
7173 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7174 return status;
7175 }
7176
7177 m_osInterface->pfnUnlockResource(
7178 m_osInterface,
7179 &m_mpuTpuBuffers.resKeyFrameTokenProbability);
7180
7181 data = nullptr;
7182
7183 // Init updated frame token probability
7184 data = (uint8_t *)m_osInterface->pfnLockResource(
7185 m_osInterface,
7186 &m_mpuTpuBuffers.resUpdatedTokenProbability,
7187 &lockFlagsWriteOnly);
7188 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7189
7190 status = MOS_SecureMemcpy(
7191 data,
7192 sizeof(VP8_DEFAULT_COEFF_PROBS_G11),
7193 (void *)VP8_DEFAULT_COEFF_PROBS_G11,
7194 sizeof(VP8_DEFAULT_COEFF_PROBS_G11));
7195
7196 if (status != MOS_STATUS_SUCCESS)
7197 {
7198 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7199 return status;
7200 }
7201
7202 m_osInterface->pfnUnlockResource(
7203 m_osInterface,
7204 &m_mpuTpuBuffers.resUpdatedTokenProbability);
7205
7206 data = nullptr;
7207
7208 return status;
7209 }
7210
KeyFrameUpdateMpuTpuBuffer(struct CodechalVp8UpdateMpuTpuBufferParams * params)7211 MOS_STATUS CodechalEncodeVp8G11::KeyFrameUpdateMpuTpuBuffer(struct CodechalVp8UpdateMpuTpuBufferParams* params)
7212 {
7213 uint8_t *data=nullptr;
7214 uint8_t *origData=nullptr;
7215 MOS_LOCK_PARAMS lockFlagsWriteOnly;
7216 MOS_STATUS status = MOS_STATUS_SUCCESS;
7217
7218 CODECHAL_ENCODE_FUNCTION_ENTER;
7219
7220 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7221 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
7222
7223 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
7224 lockFlagsWriteOnly.WriteOnly = 1;
7225
7226 // Copy Key frame surface to cur probability surface
7227 origData = (uint8_t *)params->pOsInterface->pfnLockResource(
7228 params->pOsInterface,
7229 params->presKeyFrameTokenProbability,
7230 &lockFlagsWriteOnly);
7231 CODECHAL_ENCODE_CHK_NULL_RETURN(origData);
7232
7233 data = (uint8_t *)params->pOsInterface->pfnLockResource(
7234 params->pOsInterface,
7235 params->presCurrFrameTokenProbability,
7236 &lockFlagsWriteOnly);
7237 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7238
7239 status = MOS_SecureMemcpy(
7240 data,
7241 params->dwCoeffProbsSize,
7242 origData,
7243 params->dwCoeffProbsSize);
7244
7245 if(status != MOS_STATUS_SUCCESS)
7246 {
7247 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7248 return status;
7249 }
7250
7251 params->pOsInterface->pfnUnlockResource(
7252 params->pOsInterface,
7253 params->presCurrFrameTokenProbability);
7254
7255 params->pOsInterface->pfnUnlockResource(
7256 params->pOsInterface,
7257 params->presKeyFrameTokenProbability);
7258
7259 data = nullptr;
7260
7261 // Fill surface with VP8_DEFAULT_COEFF_PROBS_G11 table
7262 data = (uint8_t *)params->pOsInterface->pfnLockResource(
7263 params->pOsInterface,
7264 params->presHwTokenProbabilityPass1,
7265 &lockFlagsWriteOnly);
7266 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7267
7268 status = MOS_SecureMemcpy(
7269 data,
7270 sizeof(VP8_DEFAULT_COEFF_PROBS_G11),
7271 (void *)VP8_DEFAULT_COEFF_PROBS_G11,
7272 sizeof(VP8_DEFAULT_COEFF_PROBS_G11));
7273
7274 if(status != MOS_STATUS_SUCCESS)
7275 {
7276 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7277 return status;
7278 }
7279
7280 params->pOsInterface->pfnUnlockResource(
7281 params->pOsInterface,
7282 params->presHwTokenProbabilityPass1);
7283 data = nullptr;
7284
7285 data = (uint8_t *)params->pOsInterface->pfnLockResource(
7286 params->pOsInterface,
7287 params->presHwTokenProbabilityPass2,
7288 &lockFlagsWriteOnly);
7289 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
7290
7291 status = MOS_SecureMemcpy(
7292 data,
7293 sizeof(VP8_DEFAULT_COEFF_PROBS_G11),
7294 (void *)VP8_DEFAULT_COEFF_PROBS_G11,
7295 sizeof(VP8_DEFAULT_COEFF_PROBS_G11));
7296
7297 if(status != MOS_STATUS_SUCCESS)
7298 {
7299 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7300 return status;
7301 }
7302
7303 params->pOsInterface->pfnUnlockResource(
7304 params->pOsInterface,
7305 params->presHwTokenProbabilityPass2);
7306 data = nullptr;
7307
7308 return status;
7309 }
7310
SetBrcInitResetCurbe(struct CodechalVp8BrcInitResetCurbeParams * params)7311 MOS_STATUS CodechalEncodeVp8G11::SetBrcInitResetCurbe(struct CodechalVp8BrcInitResetCurbeParams* params)
7312 {
7313 struct Vp8BrcInitResetCurbeG11 cmd;
7314 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
7315 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
7316 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
7317 double inputBitsPerFrame, bpsRatio;
7318 MOS_STATUS status = MOS_STATUS_SUCCESS;
7319
7320 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
7321 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7322 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
7323 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7324 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7325
7326 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7327 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
7328
7329 picParams = params->pPicParams;
7330 seqParams = params->pSeqParams;
7331
7332 MOS_ZeroMemory(&cmd, sizeof(cmd));
7333
7334 cmd.DW1.InitBufFullInBits = seqParams->InitVBVBufferFullnessInBit;
7335 cmd.DW2.BufSizeInBits = seqParams->VBVBufferSizeInBit;
7336 cmd.DW3.AverageBitRate = seqParams->TargetBitRate[seqParams->NumTemporalLayersMinus1] * CODECHAL_ENCODE_BRC_KBPS; //DDI in Kbits
7337 cmd.DW4.MaxBitRate = seqParams->MaxBitRate * CODECHAL_ENCODE_BRC_KBPS;
7338 cmd.DW8.GopP = seqParams->GopPicSize - 1;
7339 cmd.DW9.FrameWidthInBytes = params->dwFrameWidth;
7340 cmd.DW10.FrameHeightInBytes = params->dwFrameHeight;
7341 cmd.DW10.AVBRAccuracy = 30;
7342
7343 // change FrameRateD from 1 to 100 instead of dividing FramesPer100Sec by 100 in DDI
7344 // this is needed to handle precision issue with decimal frame rate ex) 29.97 fps
7345 cmd.DW6.FrameRateM = seqParams->FramesPer100Sec[seqParams->NumTemporalLayersMinus1];
7346 cmd.DW7.FrameRateD = 100; // change FrameRateD from 1 to 100 instead of dividing FramesPer100Sec by 100 in DDI
7347 cmd.DW8.BRCFlag = 0;
7348
7349 if (seqParams->RateControlMethod == RATECONTROL_CBR)
7350 {
7351 cmd.DW4.MaxBitRate = cmd.DW3.AverageBitRate;
7352 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISCBR;
7353 }
7354 else if (seqParams->RateControlMethod == RATECONTROL_VBR)
7355 {
7356 if (cmd.DW4.MaxBitRate < cmd.DW3.AverageBitRate)
7357 {
7358 cmd.DW4.MaxBitRate = 2 * cmd.DW3.AverageBitRate;
7359 }
7360 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISVBR;
7361 }
7362
7363 // Profile & level max frame size
7364 // DW0 is DDI param seq param.
7365 cmd.DW0.ProfileLevelMaxFrame = params->dwFrameWidth * params->dwFrameHeight;
7366
7367 // Set dynamic thresholds
7368 inputBitsPerFrame =
7369 ((double)(cmd.DW4.MaxBitRate) * (double)(cmd.DW7.FrameRateD) /
7370 (double)(cmd.DW6.FrameRateM));
7371
7372 if (cmd.DW2.BufSizeInBits < (uint32_t)inputBitsPerFrame * 4)
7373 {
7374 cmd.DW2.BufSizeInBits = (uint32_t)inputBitsPerFrame * 4;
7375 }
7376
7377 if (cmd.DW1.InitBufFullInBits == 0)
7378 {
7379 cmd.DW1.InitBufFullInBits = 7 * cmd.DW2.BufSizeInBits / 8;
7380 }
7381 if (cmd.DW1.InitBufFullInBits < (uint32_t)(inputBitsPerFrame * 2))
7382 {
7383 cmd.DW1.InitBufFullInBits = (uint32_t)(inputBitsPerFrame * 2);
7384 }
7385 if (cmd.DW1.InitBufFullInBits > cmd.DW2.BufSizeInBits)
7386 {
7387 cmd.DW1.InitBufFullInBits = cmd.DW2.BufSizeInBits;
7388 }
7389
7390 bpsRatio = inputBitsPerFrame / ((double)(cmd.DW2.BufSizeInBits) / 30);
7391 bpsRatio = (bpsRatio < 0.1) ? 0.1 : (bpsRatio > 3.5) ? 3.5 : bpsRatio;
7392
7393 cmd.DW9.FrameWidthInBytes = seqParams->FrameWidth;
7394 cmd.DW10.FrameHeightInBytes = seqParams->FrameHeight;
7395 cmd.DW10.AVBRAccuracy = 30;
7396 cmd.DW11.AVBRConvergence = 150;
7397 cmd.DW11.MinQP = picParams->ClampQindexLow;
7398 cmd.DW12.MaxQP = picParams->ClampQindexHigh;
7399
7400 cmd.DW12.LevelQP = 60;
7401 // DW13 default 100
7402 cmd.DW13.MaxSection_pct = 100;
7403 cmd.DW13.OverShootCBR_pct = 115;
7404
7405 // DW14 default 100
7406 cmd.DW14.MinSection_pct = 100;
7407 cmd.DW14.VBRBias_pct = 100;
7408 cmd.DW15.InstantRateThreshold0ForP = 30;
7409 cmd.DW15.InstantRateThreshold1ForP = 50;
7410 cmd.DW15.InstantRateThreshold2ForP = 70;
7411 cmd.DW15.InstantRateThreshold3ForP = 120;
7412
7413 cmd.DW17.InstantRateThreshold0ForI = 30;
7414 cmd.DW17.InstantRateThreshold1ForI = 50;
7415 cmd.DW17.InstantRateThreshold2ForI = 90;
7416 cmd.DW17.InstantRateThreshold3ForI = 115;
7417 cmd.DW18.DeviationThreshold0ForP = (uint32_t)(-50 * pow(0.9, bpsRatio));
7418 cmd.DW18.DeviationThreshold1ForP = (uint32_t)(-50 * pow(0.66, bpsRatio));
7419 cmd.DW18.DeviationThreshold2ForP = (uint32_t)(-50 * pow(0.46, bpsRatio));
7420 cmd.DW18.DeviationThreshold3ForP = (uint32_t)(-50 * pow(0.3, bpsRatio));
7421 cmd.DW19.DeviationThreshold4ForP = (uint32_t)(50 * pow(0.3, bpsRatio));
7422 cmd.DW19.DeviationThreshold5ForP = (uint32_t)(50 * pow(0.46, bpsRatio));
7423 cmd.DW19.DeviationThreshold6ForP = (uint32_t)(50 * pow(0.7, bpsRatio));
7424 cmd.DW19.DeviationThreshold7ForP = (uint32_t)(50 * pow(0.9, bpsRatio));
7425 cmd.DW20.DeviationThreshold0ForVBR = (uint32_t)(-50 * pow(0.9, bpsRatio));
7426 cmd.DW20.DeviationThreshold1ForVBR = (uint32_t)(-50 * pow(0.7, bpsRatio));
7427 cmd.DW20.DeviationThreshold2ForVBR = (uint32_t)(-50 * pow(0.5, bpsRatio));
7428 cmd.DW20.DeviationThreshold3ForVBR = (uint32_t)(-50 * pow(0.3, bpsRatio));
7429 cmd.DW21.DeviationThreshold4ForVBR = (uint32_t)(100 * pow(0.4, bpsRatio));
7430 cmd.DW21.DeviationThreshold5ForVBR = (uint32_t)(100 * pow(0.5, bpsRatio));
7431 cmd.DW21.DeviationThreshold6ForVBR = (uint32_t)(100 * pow(0.75, bpsRatio));
7432 cmd.DW21.DeviationThreshold7ForVBR = (uint32_t)(100 * pow(0.9, bpsRatio));
7433 cmd.DW22.DeviationThreshold0ForI = (uint32_t)(-50 * pow(0.8, bpsRatio));
7434 cmd.DW22.DeviationThreshold1ForI = (uint32_t)(-50 * pow(0.6, bpsRatio));
7435 cmd.DW22.DeviationThreshold2ForI = (uint32_t)(-50 * pow(0.34, bpsRatio));
7436 cmd.DW22.DeviationThreshold3ForI = (uint32_t)(-50 * pow(0.2, bpsRatio));
7437 cmd.DW23.DeviationThreshold4ForI = (uint32_t)(50 * pow(0.2, bpsRatio));
7438 cmd.DW23.DeviationThreshold5ForI = (uint32_t)(50 * pow(0.4, bpsRatio));
7439 cmd.DW23.DeviationThreshold6ForI = (uint32_t)(50 * pow(0.66, bpsRatio));
7440 cmd.DW23.DeviationThreshold7ForI = (uint32_t)(50 * pow(0.9, bpsRatio));
7441 cmd.DW24.NumTLevels = seqParams->NumTemporalLayersMinus1 + 1;
7442
7443 if( seqParams->NumTemporalLayersMinus1 > 0)
7444 {
7445 uint32_t tempBitRate[NAX_NUM_TEMPORAL_LAYERS];
7446
7447 CODECHAL_ENCODE_CHK_STATUS_RETURN(CalMaxLevelRatioForTL(
7448 seqParams->FramesPer100Sec,
7449 seqParams->TargetBitRate,
7450 (uint32_t)seqParams->NumTemporalLayersMinus1,
7451 tempBitRate));
7452
7453 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer0 = uint32_t(tempBitRate[0]);
7454 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer1 = uint32_t(tempBitRate[1]);
7455 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer2 = uint32_t(tempBitRate[2]);
7456 cmd.DW25.INITBCK_MaxLevel_Ratio_U8_Layer3 = uint32_t(tempBitRate[3]);
7457 }
7458 else
7459 {
7460 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer0 = 0;
7461 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer1 = 0;
7462 cmd.DW24.INITBCK_MaxLevel_Ratio_U8_Layer2 = 0;
7463 cmd.DW25.INITBCK_MaxLevel_Ratio_U8_Layer3 = 0;
7464 }
7465
7466 if (params->bInitBrc)
7467 {
7468 *params->pdBrcInitCurrentTargetBufFullInBits = cmd.DW1.InitBufFullInBits;
7469 }
7470
7471 *params->pdwBrcInitResetBufSizeInBits = cmd.DW2.BufSizeInBits;
7472 *params->pdBrcInitResetInputBitsPerFrame = inputBitsPerFrame;
7473
7474 cmd.DW26.HistoryBufferBTI = CODECHAL_VP8_BRC_INIT_RESET_HISTORY_G11;
7475 cmd.DW27.DistortionBufferBTI = CODECHAL_VP8_BRC_INIT_RESET_DISTORTION_G11;
7476
7477 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7478 &cmd,
7479 params->pKernelState->dwCurbeOffset,
7480 sizeof(cmd)));
7481
7482 return status;
7483 }
7484
SendBrcInitResetSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8BrcInitResetSurfaceParams * params)7485 MOS_STATUS CodechalEncodeVp8G11::SendBrcInitResetSurfaces(
7486 PMOS_COMMAND_BUFFER cmdBuffer,
7487 struct CodechalVp8BrcInitResetSurfaceParams* params)
7488 {
7489 uint32_t size;
7490 PMHW_KERNEL_STATE kernelState;
7491 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
7492 MOS_STATUS status = MOS_STATUS_SUCCESS;
7493
7494 CODECHAL_ENCODE_FUNCTION_ENTER;
7495
7496 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
7497 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7498 CODECHAL_ENCODE_CHK_NULL_RETURN(params->presBrcHistoryBuffer);
7499 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7500
7501 kernelState = params->pKernelState;
7502
7503 // BRC history buffer
7504 size = ENCODE_VP8_BRC_HISTORY_BUFFER_SIZE;
7505 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7506 surfaceCodecParams.bIsWritable = true;
7507 surfaceCodecParams.presBuffer = params->presBrcHistoryBuffer;
7508 surfaceCodecParams.dwSize = size;
7509 surfaceCodecParams.dwBindingTableOffset = CODECHAL_VP8_BRC_INIT_RESET_HISTORY_G11;
7510 surfaceCodecParams.bRenderTarget = true;
7511 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7512 m_hwInterface,
7513 cmdBuffer,
7514 &surfaceCodecParams,
7515 kernelState));
7516
7517 // Distortion Surface (output)
7518 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7519 surfaceCodecParams.bIs2DSurface = true;
7520 surfaceCodecParams.bMediaBlockRW = true;
7521 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
7522 surfaceCodecParams.dwBindingTableOffset = CODECHAL_VP8_BRC_INIT_RESET_DISTORTION_G11;
7523 surfaceCodecParams.bIsWritable = true;
7524 surfaceCodecParams.bRenderTarget = true;
7525 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7526 m_hwInterface,
7527 cmdBuffer,
7528 &surfaceCodecParams,
7529 kernelState));
7530
7531 return status;
7532 }
7533
SetBrcUpdateCurbe(struct CodechalVp8BrcUpdateCurbeParams * params)7534 MOS_STATUS CodechalEncodeVp8G11::SetBrcUpdateCurbe(struct CodechalVp8BrcUpdateCurbeParams* params)
7535 {
7536 struct Vp8BrcUpdateCurbeG11 cmd;
7537 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
7538 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
7539 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
7540 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
7541 MOS_STATUS status = MOS_STATUS_SUCCESS;
7542 uint32_t i;
7543
7544 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
7545 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7546 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
7547 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7548 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
7549
7550 stateHeapInterface =
7551 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7552 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
7553
7554 picParams = params->pPicParams;
7555 seqParams = params->pSeqParams;
7556 vp8QuantData = params->pVp8QuantData;
7557
7558 MOS_ZeroMemory(&cmd, sizeof(cmd));
7559
7560 cmd.DW0.TargetSize = 0;
7561 cmd.DW2.PictureHeaderSize = 0; // matching kernel value
7562 cmd.DW5.TargetSizeFlag = 0;
7563
7564 if (*params->pdBrcInitCurrentTargetBufFullInBits > (double)params->dwBrcInitResetBufSizeInBits)
7565 {
7566 *params->pdBrcInitCurrentTargetBufFullInBits -= (double)params->dwBrcInitResetBufSizeInBits;
7567 cmd.DW5.TargetSizeFlag = 1;
7568 }
7569
7570 cmd.DW0.TargetSize = (uint32_t)(*params->pdBrcInitCurrentTargetBufFullInBits);
7571
7572 cmd.DW5.CurrFrameType = (params->wPictureCodingType == I_TYPE) ? 2 : 0;
7573 cmd.DW5.BRCFlag = 16 * seqParams->RateControlMethod;
7574 cmd.DW5.MaxNumPAKs = params->dwVp8BrcNumPakPasses;
7575
7576 cmd.DW6.TID = picParams->temporal_id; // Default: 0 - if temporal scalability is not supported
7577 cmd.DW6.NumTLevels = seqParams->NumTemporalLayersMinus1 + 1; // Default: 1 - if temporal scalability is not supported
7578
7579 cmd.DW8.StartGlobalAdjustMult0 = 1;
7580 cmd.DW8.StartGlobalAdjustMult1 = 1;
7581 cmd.DW8.StartGlobalAdjustMult2 = 3;
7582 cmd.DW8.StartGlobalAdjustMult3 = 2;
7583
7584 cmd.DW9.StartGlobalAdjustDiv0 = 40;
7585 cmd.DW9.StartGlobalAdjustDiv1 = 5;
7586 cmd.DW9.StartGlobalAdjustDiv2 = 5;
7587 cmd.DW9.StartGlobalAdjustMult4 = 1;
7588
7589 cmd.DW10.StartGlobalAdjustDiv3 = 3;
7590 cmd.DW10.StartGlobalAdjustDiv4 = 1;
7591 cmd.DW10.QPThreshold0 = 20;//7;
7592 cmd.DW10.QPThreshold1 = 40;//18;
7593
7594 cmd.DW11.QPThreshold2 = 60;//25;
7595 cmd.DW11.QPThreshold3 = 90;//37;
7596 cmd.DW11.gRateRatioThreshold0 = 40;
7597 cmd.DW11.gRateRatioThreshold1 = 75;
7598
7599 cmd.DW12.gRateRatioThreshold2 = 97;
7600 cmd.DW12.gRateRatioThreshold3 = 103;
7601 cmd.DW12.gRateRatioThreshold4 = 125;
7602 cmd.DW12.gRateRatioThreshold5 = 160;
7603
7604 cmd.DW13.gRateRatioThresholdQP0 = MOS_BITFIELD_VALUE((uint32_t)-3, 8);
7605 cmd.DW13.gRateRatioThresholdQP1 = MOS_BITFIELD_VALUE((uint32_t)-2, 8);
7606 cmd.DW13.gRateRatioThresholdQP2 = MOS_BITFIELD_VALUE((uint32_t)-1, 8);
7607 cmd.DW13.gRateRatioThresholdQP3 = 0;
7608
7609 cmd.DW14.gRateRatioThresholdQP4 = 1;
7610 cmd.DW14.gRateRatioThresholdQP5 = 2;
7611 cmd.DW14.gRateRatioThresholdQP6 = 3;
7612 cmd.DW14.IndexOfPreviousQP = 0;
7613
7614 *params->pdBrcInitCurrentTargetBufFullInBits += params->dBrcInitResetInputBitsPerFrame;
7615
7616 cmd.DW3.startGAdjFrame0 = 10;
7617 cmd.DW3.startGAdjFrame1 = 50;
7618 cmd.DW4.startGAdjFrame2 = 100;
7619 cmd.DW4.startGAdjFrame3 = 150;
7620 cmd.DW11.gRateRatioThreshold0 = 40;
7621
7622 cmd.DW11.gRateRatioThreshold1 = 75;
7623
7624 cmd.DW12.gRateRatioThreshold2 = 97;
7625 cmd.DW12.gRateRatioThreshold3 = 103;
7626 cmd.DW12.gRateRatioThreshold4 = 125;
7627 cmd.DW12.gRateRatioThreshold5 = 160;
7628
7629 cmd.DW13.gRateRatioThresholdQP0 = MOS_BITFIELD_VALUE((uint32_t)-3, 8);
7630 cmd.DW13.gRateRatioThresholdQP1 = MOS_BITFIELD_VALUE((uint32_t)-2, 8);
7631 cmd.DW13.gRateRatioThresholdQP2 = MOS_BITFIELD_VALUE((uint32_t)-1, 8);
7632 cmd.DW13.gRateRatioThresholdQP3 = 0;
7633
7634 cmd.DW14.gRateRatioThresholdQP4 = 1;
7635 cmd.DW14.gRateRatioThresholdQP5 = 2;
7636 cmd.DW14.gRateRatioThresholdQP6 = 3;
7637 cmd.DW14.IndexOfPreviousQP = 0;
7638
7639 // 16bits are used instead of 8bits to fix 4K related issue
7640 cmd.DW15.FrameWidthInMB = params->dwFrameWidthInMB;
7641 cmd.DW15.FrameHeightInMB = params->dwFrameHeightInMB;
7642
7643 cmd.DW16.PFrameQPSeg0 = vp8QuantData->QIndex[0];
7644 cmd.DW16.PFrameQPSeg1 = vp8QuantData->QIndex[1];
7645 cmd.DW16.PFrameQPSeg2 = vp8QuantData->QIndex[2];
7646 cmd.DW16.PFrameQPSeg3 = vp8QuantData->QIndex[3];
7647
7648 cmd.DW17.KeyFrameQPSeg0 = vp8QuantData->QIndex[0];
7649 cmd.DW17.KeyFrameQPSeg1 = vp8QuantData->QIndex[1];
7650 cmd.DW17.KeyFrameQPSeg2 = vp8QuantData->QIndex[2];
7651 cmd.DW17.KeyFrameQPSeg3 = vp8QuantData->QIndex[3];
7652
7653 cmd.DW18.QDeltaPlane0 = vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7654 cmd.DW18.QDeltaPlane1 = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_AC];
7655 cmd.DW18.QDeltaPlane2 = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_DC];
7656 cmd.DW18.QDeltaPlane3 = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7657
7658 cmd.DW19.QDeltaPlane4 = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7659
7660 // temporal scaliability is enable
7661 cmd.DW19.MainRef = 0;
7662 cmd.DW19.RefFrameFlags = 0;
7663
7664 if (params->wPictureCodingType == P_TYPE) // P frame
7665 {
7666 if (seqParams->NumTemporalLayersMinus1 > 0)
7667 {
7668 uint32_t m_ref_frame_flags = picParams->ref_frame_ctrl;
7669 uint8_t m_rfo[3];
7670
7671 m_rfo[2] = picParams->first_ref;
7672 m_rfo[1] = picParams->second_ref;
7673 m_rfo[0] = 6 - m_rfo[2] - m_rfo[1];
7674
7675 uint32_t MainRef = 0;
7676 uint32_t k = 0;
7677
7678 for (i = 0; i <3; i++)
7679 {
7680 if (m_ref_frame_flags & (0x1 << (m_rfo[i] - 1))) {
7681 MainRef |= (m_rfo[i] << (2 * k));
7682 k++;
7683 }
7684 }
7685
7686 cmd.DW19.MainRef = MainRef;
7687 cmd.DW19.RefFrameFlags = m_ref_frame_flags;
7688 }
7689 else {
7690 // original one for MainRef and RefFlag
7691 cmd.DW19.MainRef = VP8_MAINREF_TABLE_G11[picParams->ref_frame_ctrl];
7692 cmd.DW19.RefFrameFlags = picParams->ref_frame_ctrl;
7693 }
7694 }
7695
7696 cmd.DW20.SegOn = picParams->segmentation_enabled;
7697 cmd.DW20.BRCMethod = seqParams->RateControlMethod;
7698 // DDI Seq Parameter
7699 // 0: Default, decided internally based on target usage.
7700 // 1: MB BRC enabled.
7701 // 2: MB BRC disabled.
7702 // Curbe 1: MBRC on, 0: MBRC off
7703 cmd.DW20.MBRC = (seqParams->MBBRC == 1)? 1 : 0;
7704 cmd.DW20.VMEIntraPrediction = (params->ucKernelMode == encodePerformanceMode) ? 1 : 0;
7705
7706 cmd.DW22.HistorytBufferBTI = CODECHAL_VP8_BRC_UPDATE_HISTORY_G11;
7707 cmd.DW23.PakStatisticsBTI = CODECHAL_VP8_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G11;
7708 cmd.DW24.MfxVp8EncoderCfgReadBTI = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_READ_G11;
7709 cmd.DW25.MfxVp8EncoderCfgWriteBTI = CODECHAL_VP8_BRC_UPDATE_MFX_ENCODER_CFG_WRITE_G11;
7710 cmd.DW26.MBEncCurbeReadBTI = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_READ_G11;
7711 cmd.DW27.MBEncCurbeWriteBTI = CODECHAL_VP8_BRC_UPDATE_MBENC_CURBE_WRITE_G11;
7712 cmd.DW28.DistortionBTI = CODECHAL_VP8_BRC_UPDATE_DISTORTION_SURFACE_G11;
7713 cmd.DW29.ConstantDataBTI = CODECHAL_VP8_BRC_UPDATE_CONSTANT_DATA_G11;
7714 cmd.DW30.SegmentMapBTI = CODECHAL_VP8_BRC_UPDATE_SEGMENT_MAP_G11;
7715 cmd.DW31.MpuCurbeReadBTI = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_READ_G11;
7716 cmd.DW32.MpuCurbeWriteBTI = CODECHAL_VP8_BRC_UPDATE_MPU_CURBE_WRITE_G11;
7717 cmd.DW33.TpuCurbeReadBTI = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_READ_G11;
7718 cmd.DW34.TpuCurbeWriteBTI = CODECHAL_VP8_BRC_UPDATE_TPU_CURBE_WRITE_G11;
7719
7720 CODECHAL_ENCODE_CHK_STATUS_RETURN(
7721 m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_UPDATE].m_dshRegion.AddData(
7722 &cmd,
7723 m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_UPDATE].dwCurbeOffset,
7724 sizeof(cmd)));
7725
7726 return status;
7727 }
7728
SetMbEncCurbe(struct CodechalVp8MbencCurbeParams * params)7729 MOS_STATUS CodechalEncodeVp8G11::SetMbEncCurbe(struct CodechalVp8MbencCurbeParams* params)
7730 {
7731 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
7732 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
7733 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
7734 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
7735 MOS_STATUS status = MOS_STATUS_SUCCESS;
7736
7737 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
7738 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7739 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
7740 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7741 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
7742 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7743
7744 stateHeapInterface =
7745 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
7746 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
7747
7748 picParams = params->pPicParams;
7749 seqParams = params->pSeqParams;
7750 vp8QuantData = params->pVp8QuantData;
7751
7752 if (params->wPictureCodingType == I_TYPE)
7753 {
7754 struct Vp8MbencICurbeG11 cmd;
7755 int16_t usQi_Y_Dc, usQi_UV_Dc, usQi_UV_Ac;
7756
7757 MOS_ZeroMemory(&cmd, sizeof(cmd));
7758
7759 cmd.DW0.FrameWidth = (seqParams->FrameWidth + 15) & (~0xF); /* Kernel require MB boundary aligned dimensions */
7760 cmd.DW0.FrameHeight = (seqParams->FrameHeight + 15) & (~0xF);
7761
7762 cmd.DW1.FrameType = 0; /* key frame I-Frame */
7763 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
7764 cmd.DW1.EnableHWIntraPrediction = (params->ucKernelMode == encodePerformanceMode) ? 1 : 0;
7765 cmd.DW1.EnableEnableChromaIPEnhancement = 1; /* Always enabled and cannot be disabled */
7766 cmd.DW1.EnableDebugDumps = 0;
7767 cmd.DW1.EnableMPUHistogramUpdate = 1;
7768 cmd.DW1.VMEDistortionMeasure = 2;
7769 cmd.DW1.VMEEnableTMCheck = 0;
7770
7771 usQi_Y_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7772 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7773 cmd.DW2.LambdaSegment0 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
7774 if (picParams->segmentation_enabled)
7775 {
7776 usQi_Y_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7777 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7778 cmd.DW2.LambdaSegment1 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
7779
7780 usQi_Y_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7781 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7782 cmd.DW3.LambdaSegment2 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
7783
7784 usQi_Y_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7785 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7786 cmd.DW3.LambdaSegment3 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
7787 }
7788
7789 cmd.DW4.AllDCBiasSegment0 = VP8_ALL_DC_BIAS_DEFAULT;
7790 if (picParams->segmentation_enabled)
7791 {
7792 cmd.DW4.AllDCBiasSegment1 = VP8_ALL_DC_BIAS_DEFAULT;
7793 cmd.DW5.AllDCBiasSegment2 = VP8_ALL_DC_BIAS_DEFAULT;
7794 cmd.DW5.AllDCBiasSegment3 = VP8_ALL_DC_BIAS_DEFAULT;
7795 }
7796
7797 usQi_UV_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7798 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7799 cmd.DW6.ChromaDCDeQuantSegment0 = VP8_QUANT_DC_G11[usQi_UV_Dc];
7800 if (picParams->segmentation_enabled)
7801 {
7802 usQi_UV_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7803 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7804 cmd.DW6.ChromaDCDeQuantSegment1 = VP8_QUANT_DC_G11[usQi_UV_Dc];
7805 usQi_UV_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7806 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7807 cmd.DW7.ChromaDCDeQuantSegment2 = VP8_QUANT_DC_G11[usQi_UV_Dc];
7808 usQi_UV_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7809 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7810 cmd.DW7.ChromaDCDeQuantSegment3 = VP8_QUANT_DC_G11[usQi_UV_Dc];
7811 }
7812
7813 usQi_UV_Ac = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7814 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7815 cmd.DW8.ChromaACDeQuantSegment0 = VP8_QUANT_AC_G11[usQi_UV_Ac];
7816 cmd.DW10.ChromaAC0Threshold0Segment0 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7817 cmd.DW10.ChromaAC0Threshold1Segment0 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7818 if (picParams->segmentation_enabled)
7819 {
7820 usQi_UV_Ac = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7821 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7822 cmd.DW8.ChromaACDeQuantSegment1 = VP8_QUANT_AC_G11[usQi_UV_Ac];
7823 cmd.DW11.ChromaAC0Threshold0Segment1 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7824 cmd.DW11.ChromaAC0Threshold1Segment1 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7825
7826 usQi_UV_Ac = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7827 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7828 cmd.DW9.ChromaACDeQuantSegment2 = VP8_QUANT_AC_G11[usQi_UV_Ac];
7829 cmd.DW12.ChromaAC0Threshold0Segment2 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7830 cmd.DW12.ChromaAC0Threshold1Segment2 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7831
7832 usQi_UV_Ac = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7833 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7834 cmd.DW9.ChromaACDeQuantSegment3 = VP8_QUANT_AC_G11[usQi_UV_Ac];
7835 cmd.DW13.ChromaAC0Threshold0Segment3 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7836 cmd.DW13.ChromaAC0Threshold1Segment3 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
7837 }
7838
7839 usQi_UV_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7840 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7841 cmd.DW14.ChromaDCThreshold0Segment0 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7842 cmd.DW14.ChromaDCThreshold1Segment0 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7843 cmd.DW15.ChromaDCThreshold2Segment0 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7844 cmd.DW15.ChromaDCThreshold3Segment0 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7845 if (picParams->segmentation_enabled)
7846 {
7847 usQi_UV_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7848 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7849 cmd.DW16.ChromaDCThreshold0Segment1 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7850 cmd.DW16.ChromaDCThreshold1Segment1 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7851 cmd.DW17.ChromaDCThreshold2Segment1 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7852 cmd.DW17.ChromaDCThreshold3Segment1 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7853
7854 usQi_UV_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7855 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7856 cmd.DW18.ChromaDCThreshold0Segment2 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7857 cmd.DW18.ChromaDCThreshold1Segment2 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7858 cmd.DW19.ChromaDCThreshold2Segment2 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7859 cmd.DW19.ChromaDCThreshold3Segment2 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7860
7861 usQi_UV_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
7862 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
7863 cmd.DW20.ChromaDCThreshold0Segment3 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7864 cmd.DW20.ChromaDCThreshold1Segment3 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7865 cmd.DW21.ChromaDCThreshold2Segment3 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7866 cmd.DW21.ChromaDCThreshold3Segment3 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
7867 }
7868
7869 usQi_UV_Ac = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7870 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7871 cmd.DW22.ChromaAC1ThresholdSegment0 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
7872 if (picParams->segmentation_enabled)
7873 {
7874 usQi_UV_Ac = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7875 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7876 cmd.DW22.ChromaAC1ThresholdSegment1 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
7877
7878 usQi_UV_Ac = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7879 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7880 cmd.DW23.ChromaAC1ThresholdSegment2 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
7881 usQi_UV_Ac = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
7882 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
7883 cmd.DW23.ChromaAC1ThresholdSegment3 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
7884 }
7885
7886 usQi_Y_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7887 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7888 cmd.DW24.VME16x16CostSegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
7889 cmd.DW25.VME4x4CostSegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
7890 cmd.DW26.VME16x16NonDCPenaltySegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
7891 cmd.DW27.VME4x4NonDCPenaltySegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
7892 if (picParams->segmentation_enabled)
7893 {
7894 usQi_Y_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7895 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7896 cmd.DW24.VME16x16CostSegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
7897 cmd.DW25.VME4x4CostSegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
7898 cmd.DW26.VME16x16NonDCPenaltySegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
7899 cmd.DW27.VME4x4NonDCPenaltySegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
7900
7901 usQi_Y_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7902 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7903 cmd.DW24.VME16x16CostSegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
7904 cmd.DW25.VME4x4CostSegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
7905 cmd.DW26.VME16x16NonDCPenaltySegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
7906 cmd.DW27.VME4x4NonDCPenaltySegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
7907
7908 usQi_Y_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7909 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
7910 cmd.DW24.VME16x16CostSegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
7911 cmd.DW25.VME4x4CostSegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
7912 cmd.DW26.VME16x16NonDCPenaltySegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
7913 cmd.DW27.VME4x4NonDCPenaltySegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
7914 }
7915
7916 cmd.DW32.MBEncPerMBOutDataSurfBTI = CODECHAL_VP8_MBENC_PER_MB_OUT_G11;
7917
7918 /* For CM kernels the Surface index of UV surface gets incremented by 1, so the Luma surface index itself is programmed in the Curbe data */
7919 cmd.DW33.MBEncCurrYBTI = CODECHAL_VP8_MBENC_CURR_Y_G11;
7920 cmd.DW34.MBEncCurrUVBTI = CODECHAL_VP8_MBENC_CURR_Y_G11;//CODECHAL_VP8_MBENC_CURR_UV_G11;
7921 cmd.DW35.MBModeCostLumaBTI = CODECHAL_VP8_MBENC_MB_MODE_COST_LUMA_G11;
7922 cmd.DW36.MBEncBlockModeCostBTI = CODECHAL_VP8_MBENC_BLOCK_MODE_COST_G11;
7923 cmd.DW37.ChromaReconSurfBTI = CODECHAL_VP8_MBENC_CHROMA_RECON_G11;
7924 cmd.DW38.SegmentationMapBTI = CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G11;
7925 cmd.DW39.HistogramBTI = CODECHAL_VP8_MBENC_HISTOGRAM_G11;
7926 cmd.DW40.MBEncVMEDebugStreamOutBTI = CODECHAL_VP8_MBENC_I_VME_DEBUG_STREAMOUT_G11;
7927 cmd.DW41.VmeBTI = CODECHAL_VP8_MBENC_VME_G11;
7928 cmd.DW42.SWScoreboardIndex = CODECHAL_VP8_MBENC_I_SWSCOREBOARD_G11;
7929 cmd.DW43.IDistortionSurfaceBTI = CODECHAL_VP8_MBENC_IDIST_G11;
7930 cmd.DW44.MBEncCurrYDownScaledBTI = CODECHAL_VP8_MBENC_CURR_Y_DOWNSCALED_G11;
7931 cmd.DW45.MBEncVMECoarseIntraBTI = CODECHAL_VP8_MBENC_VME_Coarse_Intra_G11;
7932
7933 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7934 &cmd,
7935 params->pKernelState->dwCurbeOffset,
7936 sizeof(cmd)));
7937 }
7938 else
7939 {
7940 //P frame CURBE
7941 struct Vp8MbencPCurbeG11 cmd;
7942 int16_t usQi_Y_Dc_Seg0, usQi_Y_Dc_Seg1, usQi_Y_Dc_Seg2, usQi_Y_Dc_Seg3;
7943 int16_t usQp_Seg0, usQp_Seg1, usQp_Seg2, usQp_Seg3;
7944
7945 MOS_ZeroMemory(&cmd, sizeof(cmd));
7946
7947 usQi_Y_Dc_Seg0 = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];/* TBC */
7948 usQi_Y_Dc_Seg1 = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7949 usQi_Y_Dc_Seg2 = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7950 usQi_Y_Dc_Seg3 = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
7951
7952 usQp_Seg0 = usQi_Y_Dc_Seg0 < 0 ? 0 : (usQi_Y_Dc_Seg0 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg0);
7953 usQp_Seg1 = usQi_Y_Dc_Seg1 < 0 ? 0 : (usQi_Y_Dc_Seg1 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg1);
7954 usQp_Seg2 = usQi_Y_Dc_Seg2 < 0 ? 0 : (usQi_Y_Dc_Seg2 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg2);
7955 usQp_Seg3 = usQi_Y_Dc_Seg3 < 0 ? 0 : (usQi_Y_Dc_Seg3 > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc_Seg3);
7956
7957 uint8_t MEMethod = (params->ucKernelMode == encodeNormalMode) ? 6 : 4;
7958
7959 //DW0
7960 cmd.DW0.FrameWidth = (seqParams->FrameWidth + 15) & (~0xF); /* Kernel require MB boundary aligned dimensions */
7961 cmd.DW0.FrameHeight = (seqParams->FrameHeight + 15) & (~0xF);
7962 // DW1
7963 cmd.DW1.FrameType = 1; // P-frame
7964 cmd.DW1.MultiplePred = (params->ucKernelMode == encodeNormalMode) ? 1 : ((params->ucKernelMode == encodePerformanceMode) ? 0 : 2);
7965 cmd.DW1.HMEEnable = params->bHmeEnabled;
7966 cmd.DW1.HMECombineOverlap = 1;
7967 cmd.DW1.EnableTemporalScalability = 0;
7968 cmd.DW1.RefFrameFlags = picParams->ref_frame_ctrl;
7969 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
7970 cmd.DW1.EnableSegmentationInfoUpdate = 1;//dont care field hardcoding to match kernel- picParams->update_mb_segmentation_map;
7971 cmd.DW1.MultiReferenceQPCheck = false;
7972 cmd.DW1.ModecostEnableFlag = 1;
7973
7974 // temporal scaliability is enable
7975 cmd.DW1.MainRef = 0;
7976
7977 if (seqParams->NumTemporalLayersMinus1 > 0)
7978 {
7979 uint32_t m_ref_frame_flags = picParams->ref_frame_ctrl;
7980 uint8_t m_rfo[3];
7981
7982 m_rfo[2] = picParams->first_ref;
7983 m_rfo[1] = picParams->second_ref;
7984 m_rfo[0] = 6 - m_rfo[2] - m_rfo[1];
7985
7986 uint32_t MainRef = 0;
7987 uint32_t k = 0;
7988 uint32_t i;
7989
7990 for (i = 0; i <3; i++)
7991 {
7992 if (m_ref_frame_flags & (0x1 << (m_rfo[i] - 1))) {
7993 MainRef |= (m_rfo[i] << (2 * k));
7994 k++;
7995 }
7996 }
7997
7998 cmd.DW1.MainRef = MainRef;
7999 }
8000 else {
8001 // original one for MainRef and RefFlag
8002 cmd.DW1.MainRef = VP8_MAINREF_TABLE_G11[picParams->ref_frame_ctrl];
8003 }
8004
8005 //DW2
8006 cmd.DW2.LambdaIntraSegment0 = VP8_QUANT_DC_G11[usQp_Seg0];
8007 cmd.DW2.LambdaInterSegment0 = (VP8_QUANT_DC_G11[usQp_Seg0] >> 2);
8008 //DW3
8009 cmd.DW3.LambdaIntraSegment1 = (VP8_QUANT_DC_G11[usQp_Seg1]);
8010 cmd.DW3.LambdaInterSegment1 = (VP8_QUANT_DC_G11[usQp_Seg1] >> 2);
8011 //DW4
8012 cmd.DW4.LambdaIntraSegment2 = (VP8_QUANT_DC_G11[usQp_Seg2]);
8013 cmd.DW4.LambdaInterSegment2 = (VP8_QUANT_DC_G11[usQp_Seg2] >> 2);
8014 //DW5
8015 cmd.DW5.LambdaIntraSegment3 = (VP8_QUANT_DC_G11[usQp_Seg3]);
8016 cmd.DW5.LambdaInterSegment3 = (VP8_QUANT_DC_G11[usQp_Seg3] >> 2);
8017 //DW6
8018 cmd.DW6.ReferenceFrameSignBias_3 = picParams->sign_bias_golden;
8019 cmd.DW6.ReferenceFrameSignBias_2 = picParams->sign_bias_alternate;
8020 cmd.DW6.ReferenceFrameSignBias_1 = picParams->sign_bias_golden ^ picParams->sign_bias_alternate;
8021 cmd.DW6.ReferenceFrameSignBias_0 = 0;
8022 //DW7
8023 cmd.DW7.RawDistThreshold = (params->ucKernelMode == encodeNormalMode) ? 50 : ((params->ucKernelMode == encodePerformanceMode) ? 0 : 100);
8024 cmd.DW7.TemporalLayerID = picParams->temporal_id;
8025 //DW8
8026 cmd.DW8.EarlyIMESuccessfulStopThreshold = 0;
8027 cmd.DW8.AdaptiveSearchEnable = (params->ucKernelMode != encodePerformanceMode) ? 1 : 0;
8028 cmd.DW8.SkipModeEnable = 1;
8029 cmd.DW8.BidirectionalMixDisbale = 0;
8030 cmd.DW8.Transform8x8FlagForInterEnable = 0;
8031 cmd.DW8.EarlyIMESuccessEnable = 0;
8032 //DW9
8033 cmd.DW9.RefPixelBiasEnable = 0;
8034 cmd.DW9.UnidirectionMixEnable = 0;
8035 cmd.DW9.BidirectionalWeight = 0;
8036 cmd.DW9.RefIDPolarityBits = 0;
8037 cmd.DW9.MaximumNumberOfMotionVectors = 0 /* 32 */; // from BDW
8038 //DW10
8039 cmd.DW10.MaxFixedSearchPathLength = (params->ucKernelMode == encodeNormalMode) ? 25 : ((params->ucKernelMode == encodePerformanceMode) ? 9 : 57);
8040 cmd.DW10.MaximumSearchPathLength = 57;
8041 //DW11
8042 cmd.DW11.SubMacroBlockSubPartitionMask = 0 /* 0x30 */; //from BDW
8043 cmd.DW11.IntraSADMeasureAdjustment = 2;
8044 cmd.DW11.InterSADMeasureAdjustment = 2;
8045 cmd.DW11.BlockBasedSkipEnable = 0;
8046 cmd.DW11.BMEdisableforFBRMessage = 0 /* 1 */; // from BDW
8047 cmd.DW11.ForwardTransformSkipCheckEnable = 0;
8048 cmd.DW11.ProcessInterChromaPixelsMode = 0;
8049 cmd.DW11.DisableFieldCacheAllocation = 0;
8050 cmd.DW11.SkipModeType = 0;
8051 cmd.DW11.SubPelMode = 3;
8052 cmd.DW11.DualSearchPathOption = 0;
8053 cmd.DW11.SearchControl = 0;
8054 cmd.DW11.ReferenceAccess = 0;
8055 cmd.DW11.SourceAccess = 0;
8056 cmd.DW11.InterMbTypeRoadMap = 0;
8057 cmd.DW11.SourceBlockSize = 0;
8058 //DW12
8059 cmd.DW12.ReferenceSearchWindowsHeight = (params->ucKernelMode != encodePerformanceMode) ? 40 : 28;
8060 cmd.DW12.ReferenceSearchWindowsWidth = (params->ucKernelMode != encodePerformanceMode) ? 48 : 28;
8061 //DW13
8062 cmd.DW13.Value = VP8_COST_TABLE_G11[usQp_Seg0][0];
8063 cmd.DW14.Value = VP8_COST_TABLE_G11[usQp_Seg0][1];
8064 cmd.DW15.Value = VP8_COST_TABLE_G11[usQp_Seg0][2];
8065 // which table to load is selected by MEMethod parameter determined by the driver based on the usage model (normal/quality/performance)
8066 switch (MEMethod)
8067 {
8068 case 2:
8069 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_SINGLESU), VP8_SINGLESU, sizeof(VP8_SINGLESU)));
8070 break;
8071
8072 case 3:
8073 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_RASTERSCAN_48x40), VP8_RASTERSCAN_48x40, sizeof(VP8_RASTERSCAN_48x40)));
8074 break;
8075
8076 case 4:
8077 case 5:
8078 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_FULLSPIRAL_48x40), VP8_FULLSPIRAL_48x40, sizeof(VP8_FULLSPIRAL_48x40)));
8079 break;
8080
8081 case 6:
8082 default:
8083 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW16), sizeof(VP8_DIAMOND), VP8_DIAMOND, sizeof(VP8_DIAMOND)));
8084 break;
8085 }
8086 //DW30
8087 cmd.DW30.Value = VP8_COST_TABLE_G11[usQp_Seg0][3];
8088 //DW31
8089 cmd.DW31.Value = VP8_COST_TABLE_G11[usQp_Seg0][4];
8090 //DW32
8091 cmd.DW32.BilinearEnable = 0;
8092 cmd.DW32.Intra16x16NoDCPenaltySegment0 = VP8_COST_TABLE_G11[usQp_Seg0][5];
8093 cmd.DW32.Intra16x16NoDCPenaltySegment1 = VP8_COST_TABLE_G11[usQp_Seg1][5];
8094 //DW33
8095 cmd.DW33.Intra16x16NoDCPenaltySegment2 = VP8_COST_TABLE_G11[usQp_Seg2][5];
8096 cmd.DW33.Intra16x16NoDCPenaltySegment3 = VP8_COST_TABLE_G11[usQp_Seg3][5];
8097 cmd.DW33.HMECombineLen = 8;//based on target usage part of par file param
8098 //DW34 to DW57
8099 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(&(cmd.DW34), 24 * sizeof(uint32_t), VP8_MvRefCostContext_G11, 24 * sizeof(uint32_t)));
8100 //DW58
8101 cmd.DW58.EncCost16x16 = 0;
8102 cmd.DW58.EncCost16x8 = 0x73C;
8103 //DW59
8104 cmd.DW59.EncCost8x8 = 0x365;
8105 cmd.DW59.EncCost4x4 = 0xDC9;
8106 //DW60
8107 cmd.DW60.FrameCountProbabilityRefFrameCost_0 = 516;
8108 cmd.DW60.FrameCountProbabilityRefFrameCost_1 = 106;
8109 //DW61
8110 cmd.DW61.FrameCountProbabilityRefFrameCost_2 = 2407;
8111 cmd.DW61.FrameCountProbabilityRefFrameCost_3 = 2409;
8112 //DW62
8113 switch (m_pFramePositionInGop)
8114 {
8115 case 1:
8116 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G11[m_averageKeyFrameQp];
8117 cmd.DW62.AverageQPOfGoldRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
8118 cmd.DW62.AverageQPOfAltRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
8119 break;
8120 case 2:
8121 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G11[m_averagePFrameQp];
8122 cmd.DW62.AverageQPOfGoldRefFrame = VP8_QUANT_DC_G11[m_averageKeyFrameQp];
8123 cmd.DW62.AverageQPOfAltRefFrame = cmd.DW62.AverageQPOfGoldRefFrame;
8124 break;
8125 case 3:
8126 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G11[m_averagePFrameQp];
8127 cmd.DW62.AverageQPOfGoldRefFrame = VP8_QUANT_DC_G11[m_averagePFrameQp];
8128 cmd.DW62.AverageQPOfAltRefFrame = VP8_QUANT_DC_G11[m_averageKeyFrameQp];
8129 break;
8130 default:
8131 cmd.DW62.AverageQPOfLastRefFrame = VP8_QUANT_DC_G11[m_averagePFrameQp];
8132 cmd.DW62.AverageQPOfGoldRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
8133 cmd.DW62.AverageQPOfAltRefFrame = cmd.DW62.AverageQPOfLastRefFrame;
8134 break;
8135 }
8136
8137 //DW63
8138 cmd.DW63.Intra4x4NoDCPenaltySegment0 = VP8_COST_TABLE_G11[usQp_Seg0][6];
8139 cmd.DW63.Intra4x4NoDCPenaltySegment1 = VP8_COST_TABLE_G11[usQp_Seg1][6];
8140 cmd.DW63.Intra4x4NoDCPenaltySegment2 = VP8_COST_TABLE_G11[usQp_Seg2][6];
8141 cmd.DW63.Intra4x4NoDCPenaltySegment3 = VP8_COST_TABLE_G11[usQp_Seg3][6];
8142 //DW64
8143 cmd.DW64.Value = VP8_COST_TABLE_G11[usQp_Seg1][0];
8144 //DW65
8145 cmd.DW65.Value = VP8_COST_TABLE_G11[usQp_Seg1][1];
8146 //DW66
8147 cmd.DW66.Value = VP8_COST_TABLE_G11[usQp_Seg1][2];
8148 //DW67
8149 cmd.DW67.Value = VP8_COST_TABLE_G11[usQp_Seg1][3];
8150 //DW68
8151 cmd.DW68.Value = VP8_COST_TABLE_G11[usQp_Seg1][4];
8152 //DW69
8153 cmd.DW69.Value = VP8_COST_TABLE_G11[usQp_Seg2][0];
8154 //DW70
8155 cmd.DW70.Value = VP8_COST_TABLE_G11[usQp_Seg2][1];
8156 //DW71
8157 cmd.DW71.Value = VP8_COST_TABLE_G11[usQp_Seg2][2];
8158 //DW72
8159 cmd.DW72.Value = VP8_COST_TABLE_G11[usQp_Seg2][3];
8160 //DW73
8161 cmd.DW73.Value = VP8_COST_TABLE_G11[usQp_Seg2][4];
8162 //DW74
8163 cmd.DW74.Value = VP8_COST_TABLE_G11[usQp_Seg3][0];
8164 //DW75
8165 cmd.DW75.Value = VP8_COST_TABLE_G11[usQp_Seg3][1];
8166 //DW76
8167 cmd.DW76.Value = VP8_COST_TABLE_G11[usQp_Seg3][2];
8168 //DW77
8169 cmd.DW77.Value = VP8_COST_TABLE_G11[usQp_Seg3][3];
8170 //DW78
8171 cmd.DW78.Value = VP8_COST_TABLE_G11[usQp_Seg3][4];
8172 //DW79
8173 cmd.DW79.NewMVSkipThresholdSegment0 = VP8_NewMVSkipThreshold_G11[usQp_Seg0];
8174 cmd.DW79.NewMVSkipThresholdSegment1 = VP8_NewMVSkipThreshold_G11[usQp_Seg1];
8175 //DW80
8176 cmd.DW80.NewMVSkipThresholdSegment2 = VP8_NewMVSkipThreshold_G11[usQp_Seg2];
8177 cmd.DW80.NewMVSkipThresholdSegment3 = VP8_NewMVSkipThreshold_G11[usQp_Seg3];
8178
8179 //setup binding table index entries
8180 cmd.DW81.PerMbOutputDataSurfaceBTI = CODECHAL_VP8_MBENC_PER_MB_OUT_G11;
8181 cmd.DW82.CurrentPictureYSurfaceBTI = CODECHAL_VP8_MBENC_CURR_Y_G11;
8182 cmd.DW83.CurrentPictureInterleavedUVSurfaceBTI = CODECHAL_VP8_MBENC_CURR_Y_G11;
8183 cmd.DW84.HMEMVDataSurfaceBTI = CODECHAL_VP8_MBENC_MV_DATA_FROM_ME_G11;
8184 cmd.DW85.MVDataSurfaceBTI = CODECHAL_VP8_MBENC_IND_MV_DATA_G11;
8185 cmd.DW86.MbCountPerReferenceFrameBTI = CODECHAL_VP8_MBENC_REF_MB_COUNT_G11;
8186 cmd.DW87.VMEInterPredictionBTI = CODECHAL_VP8_MBENC_INTER_PRED_G11;
8187 cmd.DW88.ActiveRef1BTI = CODECHAL_VP8_MBENC_REF1_PIC_G11;
8188 cmd.DW89.ActiveRef2BTI = CODECHAL_VP8_MBENC_REF2_PIC_G11;
8189 cmd.DW90.ActiveRef3BTI = CODECHAL_VP8_MBENC_REF3_PIC_G11;
8190 cmd.DW91.PerMbQuantDataBTI = CODECHAL_VP8_MBENC_P_PER_MB_QUANT_G11;
8191 cmd.DW92.SegmentMapBTI = CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G11;
8192 cmd.DW93.InterPredictionDistortionBTI = CODECHAL_VP8_MBEBC_INTER_PRED_DISTORTION_G11;
8193 cmd.DW94.HistogramBTI = CODECHAL_VP8_MBENC_HISTOGRAM_G11;
8194 cmd.DW95.PredMVDataBTI = CODECHAL_VP8_MBEBC_PER_MV_DATA_G11;
8195 cmd.DW96.ModeCostUpdateBTI = CODECHAL_VP8_MBENC_MODE_COST_UPDATE_G11;
8196 cmd.DW97.SWScoreboardIndex = CODECHAL_VP8_MBENC_P_SWSCOREBOARD_G11;
8197 cmd.DW98.KernelDebugDumpBTI = CODECHAL_VP8_MBENC_P_VME_DEBUG_STREAMOUT_G11;
8198
8199 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
8200 &cmd,
8201 params->pKernelState->dwCurbeOffset,
8202 sizeof(cmd)));
8203 }
8204
8205 return status;
8206 }
8207
SetIntrDistCurbe(struct CodechalVp8MbencCurbeParams * params)8208 MOS_STATUS CodechalEncodeVp8G11::SetIntrDistCurbe(struct CodechalVp8MbencCurbeParams* params)
8209 {
8210 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
8211 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
8212 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
8213 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
8214 MOS_STATUS status = MOS_STATUS_SUCCESS;
8215
8216 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
8217 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
8218 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
8219 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
8220 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
8221 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
8222
8223 stateHeapInterface =
8224 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
8225 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
8226
8227 picParams = params->pPicParams;
8228 seqParams = params->pSeqParams;
8229 vp8QuantData = params->pVp8QuantData;
8230
8231 struct Vp8MbencICurbeG11 cmd;
8232 int16_t usQi_Y_Dc, usQi_UV_Dc, usQi_UV_Ac;
8233
8234 MOS_ZeroMemory(&cmd, sizeof(cmd));
8235
8236 cmd.DW0.FrameWidth = (seqParams->FrameWidth + 15) & (~0xF); /* Kernel require MB boundary aligned dimensions */
8237 cmd.DW0.FrameHeight = (seqParams->FrameHeight + 15) & (~0xF);
8238
8239 cmd.DW1.FrameType = 0; /* key frame I-Frame */
8240 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
8241 cmd.DW1.EnableHWIntraPrediction = (params->ucKernelMode == encodePerformanceMode) ? 1 : 0;
8242 cmd.DW1.EnableEnableChromaIPEnhancement = 1; /* Always enabled and cannot be disabled */
8243 cmd.DW1.EnableDebugDumps = 0;
8244 cmd.DW1.EnableMPUHistogramUpdate = 1;
8245 cmd.DW1.VMEDistortionMeasure = 2;
8246 cmd.DW1.VMEEnableTMCheck = 0;
8247
8248 usQi_Y_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8249 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8250 cmd.DW2.LambdaSegment0 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
8251 if (picParams->segmentation_enabled)
8252 {
8253 usQi_Y_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8254 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8255 cmd.DW2.LambdaSegment1 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
8256
8257 usQi_Y_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8258 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8259 cmd.DW3.LambdaSegment2 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
8260
8261 usQi_Y_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8262 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8263 cmd.DW3.LambdaSegment3 = (uint16_t)((VP8_QUANT_DC_G11[usQi_Y_Dc] * VP8_QUANT_DC_G11[usQi_Y_Dc]) / 4);
8264 }
8265
8266 cmd.DW4.AllDCBiasSegment0 = VP8_ALL_DC_BIAS_DEFAULT;
8267 if (picParams->segmentation_enabled)
8268 {
8269 cmd.DW4.AllDCBiasSegment1 = VP8_ALL_DC_BIAS_DEFAULT;
8270 cmd.DW5.AllDCBiasSegment2 = VP8_ALL_DC_BIAS_DEFAULT;
8271 cmd.DW5.AllDCBiasSegment3 = VP8_ALL_DC_BIAS_DEFAULT;
8272 }
8273
8274 usQi_UV_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8275 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8276 cmd.DW6.ChromaDCDeQuantSegment0 = VP8_QUANT_DC_G11[usQi_UV_Dc];
8277 if (picParams->segmentation_enabled)
8278 {
8279 usQi_UV_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8280 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8281 cmd.DW6.ChromaDCDeQuantSegment1 = VP8_QUANT_DC_G11[usQi_UV_Dc];
8282 usQi_UV_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8283 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8284 cmd.DW7.ChromaDCDeQuantSegment2 = VP8_QUANT_DC_G11[usQi_UV_Dc];
8285 usQi_UV_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8286 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8287 cmd.DW7.ChromaDCDeQuantSegment3 = VP8_QUANT_DC_G11[usQi_UV_Dc];
8288 }
8289
8290 usQi_UV_Ac = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8291 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8292 cmd.DW8.ChromaACDeQuantSegment0 = VP8_QUANT_AC_G11[usQi_UV_Ac];
8293 cmd.DW10.ChromaAC0Threshold0Segment0 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8294 cmd.DW10.ChromaAC0Threshold1Segment0 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8295 if (picParams->segmentation_enabled)
8296 {
8297 usQi_UV_Ac = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8298 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8299 cmd.DW8.ChromaACDeQuantSegment1 = VP8_QUANT_AC_G11[usQi_UV_Ac];
8300 cmd.DW11.ChromaAC0Threshold0Segment1 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8301 cmd.DW11.ChromaAC0Threshold1Segment1 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8302
8303 usQi_UV_Ac = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8304 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8305 cmd.DW9.ChromaACDeQuantSegment2 = VP8_QUANT_AC_G11[usQi_UV_Ac];
8306 cmd.DW12.ChromaAC0Threshold0Segment2 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8307 cmd.DW12.ChromaAC0Threshold1Segment2 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8308
8309 usQi_UV_Ac = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8310 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8311 cmd.DW9.ChromaACDeQuantSegment3 = VP8_QUANT_AC_G11[usQi_UV_Ac];
8312 cmd.DW13.ChromaAC0Threshold0Segment3 = (uint16_t)((((((1) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8313 cmd.DW13.ChromaAC0Threshold1Segment3 = (uint16_t)((((((2) << 16) - 1)*1.0 / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7))* (1 << 13) + 3400) / 2217.0);
8314 }
8315
8316 usQi_UV_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8317 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8318 cmd.DW14.ChromaDCThreshold0Segment0 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8319 cmd.DW14.ChromaDCThreshold1Segment0 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8320 cmd.DW15.ChromaDCThreshold2Segment0 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8321 cmd.DW15.ChromaDCThreshold3Segment0 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8322 if (picParams->segmentation_enabled)
8323 {
8324 usQi_UV_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8325 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8326 cmd.DW16.ChromaDCThreshold0Segment1 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8327 cmd.DW16.ChromaDCThreshold1Segment1 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8328 cmd.DW17.ChromaDCThreshold2Segment1 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8329 cmd.DW17.ChromaDCThreshold3Segment1 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8330
8331 usQi_UV_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8332 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8333 cmd.DW18.ChromaDCThreshold0Segment2 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8334 cmd.DW18.ChromaDCThreshold1Segment2 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8335 cmd.DW19.ChromaDCThreshold2Segment2 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8336 cmd.DW19.ChromaDCThreshold3Segment2 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8337
8338 usQi_UV_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8339 usQi_UV_Dc = usQi_UV_Dc < 0 ? 0 : (usQi_UV_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Dc);
8340 cmd.DW20.ChromaDCThreshold0Segment3 = (((1) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8341 cmd.DW20.ChromaDCThreshold1Segment3 = (((2) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8342 cmd.DW21.ChromaDCThreshold2Segment3 = (((3) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8343 cmd.DW21.ChromaDCThreshold3Segment3 = (((4) << 16) - 1) / ((1 << 16) / VP8_QUANT_DC_G11[usQi_UV_Dc]) - ((48 * VP8_QUANT_DC_G11[usQi_UV_Dc]) >> 7);
8344 }
8345
8346 usQi_UV_Ac = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8347 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8348 cmd.DW22.ChromaAC1ThresholdSegment0 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
8349 if (picParams->segmentation_enabled)
8350 {
8351 usQi_UV_Ac = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8352 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8353 cmd.DW22.ChromaAC1ThresholdSegment1 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
8354
8355 usQi_UV_Ac = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8356 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8357 cmd.DW23.ChromaAC1ThresholdSegment2 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
8358 usQi_UV_Ac = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8359 usQi_UV_Ac = usQi_UV_Ac < 0 ? 0 : (usQi_UV_Ac > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_UV_Ac);
8360 cmd.DW23.ChromaAC1ThresholdSegment3 = ((1 << (16)) - 1) / ((1 << 16) / VP8_QUANT_AC_G11[usQi_UV_Ac]) - ((48 * VP8_QUANT_AC_G11[usQi_UV_Ac]) >> 7);
8361 }
8362
8363 usQi_Y_Dc = vp8QuantData->QIndex[0] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8364 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8365 cmd.DW24.VME16x16CostSegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
8366 cmd.DW25.VME4x4CostSegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
8367 cmd.DW26.VME16x16NonDCPenaltySegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
8368 cmd.DW27.VME4x4NonDCPenaltySegment0 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
8369 if (picParams->segmentation_enabled)
8370 {
8371 usQi_Y_Dc = vp8QuantData->QIndex[1] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8372 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8373 cmd.DW24.VME16x16CostSegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
8374 cmd.DW25.VME4x4CostSegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
8375 cmd.DW26.VME16x16NonDCPenaltySegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
8376 cmd.DW27.VME4x4NonDCPenaltySegment1 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
8377
8378 usQi_Y_Dc = vp8QuantData->QIndex[2] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8379 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8380 cmd.DW24.VME16x16CostSegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
8381 cmd.DW25.VME4x4CostSegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
8382 cmd.DW26.VME16x16NonDCPenaltySegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
8383 cmd.DW27.VME4x4NonDCPenaltySegment2 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
8384
8385 usQi_Y_Dc = vp8QuantData->QIndex[3] + vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8386 usQi_Y_Dc = usQi_Y_Dc < 0 ? 0 : (usQi_Y_Dc > CODECHAL_VP8_QP_MAX ? CODECHAL_VP8_QP_MAX : usQi_Y_Dc);
8387 cmd.DW24.VME16x16CostSegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][0];
8388 cmd.DW25.VME4x4CostSegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][1];
8389 cmd.DW26.VME16x16NonDCPenaltySegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][2];
8390 cmd.DW27.VME4x4NonDCPenaltySegment3 = VP8_IFRAME_VME_COSTS_G11[usQi_Y_Dc & 0x7F][3];
8391 }
8392
8393 cmd.DW32.MBEncPerMBOutDataSurfBTI = CODECHAL_VP8_MBENC_PER_MB_OUT_G11;
8394
8395 /* For CM kernels the Surface index of UV surface gets incremented by 1, so the Luma surface index itself is programmed in the Curbe data */
8396 cmd.DW33.MBEncCurrYBTI = CODECHAL_VP8_MBENC_CURR_Y_G11;
8397 cmd.DW34.MBEncCurrUVBTI = CODECHAL_VP8_MBENC_CURR_Y_G11;//CODECHAL_VP8_MBENC_CURR_UV_G11;
8398 cmd.DW35.MBModeCostLumaBTI = CODECHAL_VP8_MBENC_MB_MODE_COST_LUMA_G11;
8399 cmd.DW36.MBEncBlockModeCostBTI = CODECHAL_VP8_MBENC_BLOCK_MODE_COST_G11;
8400 cmd.DW37.ChromaReconSurfBTI = CODECHAL_VP8_MBENC_CHROMA_RECON_G11;
8401 cmd.DW38.SegmentationMapBTI = CODECHAL_VP8_MBENC_SEGMENTATION_MAP_G11;
8402 cmd.DW39.HistogramBTI = CODECHAL_VP8_MBENC_HISTOGRAM_G11;
8403 cmd.DW40.MBEncVMEDebugStreamOutBTI = CODECHAL_VP8_MBENC_I_VME_DEBUG_STREAMOUT_G11;
8404 cmd.DW41.VmeBTI = CODECHAL_VP8_MBENC_VME_G11;
8405 cmd.DW42.SWScoreboardIndex = CODECHAL_VP8_MBENC_I_SWSCOREBOARD_G11;
8406 cmd.DW43.IDistortionSurfaceBTI = CODECHAL_VP8_MBENC_IDIST_G11;
8407 cmd.DW44.MBEncCurrYDownScaledBTI = CODECHAL_VP8_MBENC_CURR_Y_DOWNSCALED_G11;
8408 cmd.DW45.MBEncVMECoarseIntraBTI = CODECHAL_VP8_MBENC_VME_Coarse_Intra_G11;
8409
8410 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
8411 &cmd,
8412 params->pKernelState->dwCurbeOffset,
8413 sizeof(cmd)));
8414
8415 return status;
8416 }
8417
SetMeCurbe(struct CodechalVp8MeCurbeParams * params)8418 MOS_STATUS CodechalEncodeVp8G11::SetMeCurbe(struct CodechalVp8MeCurbeParams* params)
8419 {
8420 struct Vp8MeCurbeG11 cmd;
8421 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
8422 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
8423 CODECHAL_MEDIA_STATE_TYPE encMediaStateType;
8424 uint8_t meMode, meMethod, tableIdx;
8425 uint32_t scaleFactor;
8426 MOS_STATUS status = MOS_STATUS_SUCCESS;
8427
8428 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
8429 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
8430 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
8431
8432 stateHeapInterface =
8433 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
8434 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
8435
8436 seqParams = params->pSeqParams;
8437
8438 MOS_ZeroMemory(&cmd, sizeof(cmd));
8439
8440 meMode = params->b16xMeEnabled ? (params->b16xME ? CODECHAL_ENCODE_ME16X_BEFORE_ME4X : CODECHAL_ENCODE_ME4X_AFTER_ME16X) : CODECHAL_ENCODE_ME4X_ONLY;
8441 scaleFactor = (meMode == CODECHAL_ENCODE_ME16X_BEFORE_ME4X) ? 16 : 4;
8442 encMediaStateType = params->b16xME ? CODECHAL_MEDIA_STATE_16X_ME : CODECHAL_MEDIA_STATE_4X_ME;
8443
8444 CODECHAL_ENCODE_ASSERT(seqParams->TargetUsage < NUM_TARGET_USAGE_MODES);
8445
8446 cmd.DW1.MaxNumMVs = 0x10;
8447 cmd.DW1.BiWeight = 0;
8448
8449 cmd.DW2.MaxNumSU = 57;
8450 // For Enc_P kernel MaxLenSP is supposed to have the following values
8451 // Normal mode = 25
8452 // Perf mode = 9
8453 // Quality mode = 57
8454 // For ME kernel, MaxLenSP is supposed to have the value 57 for all modes
8455 cmd.DW2.MaxLenSP = 57;
8456
8457 cmd.DW3.SubMbPartMask = 0x77;
8458 cmd.DW3.InterSAD = 0;
8459 cmd.DW3.IntraSAD = 0;
8460 cmd.DW3.BMEDisableFBR = 1;
8461 cmd.DW3.SubPelMode = 3;
8462
8463 cmd.DW4.PictureHeightMinus1 = CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(params->dwFrameFieldHeight / scaleFactor) - 1;
8464 cmd.DW4.PictureWidth = CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(params->dwFrameWidth / scaleFactor);
8465
8466 cmd.DW4.PictureHeightMinus1 = cmd.DW4.PictureHeightMinus1 < 2 ? 2 : cmd.DW4.PictureHeightMinus1;
8467 cmd.DW4.PictureWidth = cmd.DW4.PictureWidth < 3 ? 3 : cmd.DW4.PictureWidth;
8468
8469 cmd.DW5.RefHeight = 40;
8470 cmd.DW5.RefWidth = 48;
8471
8472 cmd.DW6.MEModes = meMode;
8473 cmd.DW6.SuperCombineDist = (params->ucKernelMode == encodeNormalMode) ? 5 : ((params->ucKernelMode == encodePerformanceMode) ? 0 : 1);
8474 cmd.DW6.MaxVmvR = 0x7fc; /* For VP8, Luma motion vectors in the range -2046 to +2046 (1/8 pel) */
8475
8476 cmd.DW13.NumRefIdxL0MinusOne = VP8_NUM_REFS_G11[params->pPicParams->ref_frame_ctrl] - 1;
8477 cmd.DW13.NumRefIdxL1MinusOne = 0;
8478
8479 tableIdx = 0; /* Only P pictures in VP8, no B pictures */
8480 meMethod = (params->ucKernelMode == encodeNormalMode) ? 6 : 4;
8481 status = MOS_SecureMemcpy((uint32_t*)(&cmd.SpDelta),
8482 14 * sizeof(uint32_t),
8483 m_encodeSearchPath[tableIdx][meMethod],
8484 14 * sizeof(uint32_t));
8485
8486 if (status != MOS_STATUS_SUCCESS)
8487 {
8488 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
8489 return status;
8490 }
8491 cmd.DW32.VP8MeMVOutputDataBTI = CODECHAL_VP8_ME_MV_DATA_G11;
8492 cmd.DW33.VP8MeMVInputDataBTI = CODECHAL_VP8_16xME_MV_DATA_G11;
8493 cmd.DW34.VP8MeDistortionBTI = CODECHAL_VP8_ME_DISTORTION_G11;
8494 cmd.DW35.VP8MeMinDistBrcBTI = CODECHAL_VP8_ME_MIN_DIST_BRC_DATA_G11;
8495 cmd.DW36.ForwardRefBTI = CODECHAL_VP8_VME_INTER_PRED_G11;
8496
8497 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_meKernelState.m_dshRegion.AddData(
8498 &cmd,
8499 m_meKernelState.dwCurbeOffset,
8500 sizeof(cmd)));
8501
8502 return status;
8503 }
8504
SetMpuCurbe(struct CodechalVp8MpuCurbeParams * params)8505 MOS_STATUS CodechalEncodeVp8G11::SetMpuCurbe(struct CodechalVp8MpuCurbeParams* params)
8506 {
8507 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
8508 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
8509 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
8510 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
8511 struct Vp8MpuFhbCurbeG11 cmd;
8512 MOS_STATUS status = MOS_STATUS_SUCCESS;
8513
8514 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
8515 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
8516 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
8517 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
8518 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
8519
8520 stateHeapInterface =
8521 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
8522 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
8523
8524 picParams = params->pPicParams;
8525 seqParams = params->pSeqParams;
8526 vp8QuantData = params->pVp8QuantData;
8527
8528 MOS_ZeroMemory(&cmd, sizeof(cmd));
8529
8530 cmd.DW0.FrameWidth = (seqParams->FrameWidth + 15) & (~0xF); /* Kernel require MB boundary aligned dimensions */
8531 cmd.DW0.FrameHeight = (seqParams->FrameHeight + 15) & (~0xF);
8532
8533 cmd.DW1.FrameType = picParams->frame_type;
8534 cmd.DW1.Version = picParams->version;
8535 cmd.DW1.ShowFrame = picParams->show_frame;
8536 cmd.DW1.HorizontalScaleCode = seqParams->FrameWidthScale;
8537 cmd.DW1.VerticalScaleCode = seqParams->FrameHeightScale;
8538 cmd.DW1.ColorSpaceType = picParams->color_space;
8539 cmd.DW1.ClampType = picParams->clamping_type;
8540 cmd.DW1.PartitionNumL2 = picParams->CodedCoeffTokenPartition;
8541 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
8542 cmd.DW1.SegMapUpdate =
8543 (picParams->segmentation_enabled) ? picParams->update_mb_segmentation_map : 0;
8544 cmd.DW1.SegmentationFeatureUpdate = picParams->update_segment_feature_data; // setup whenever segmentation is 1
8545 cmd.DW1.SegmentationFeatureMode = 1; // delta mode
8546 cmd.DW1.LoopFilterType = picParams->filter_type;
8547 cmd.DW1.SharpnessLevel = picParams->sharpness_level;
8548 cmd.DW1.LoopFilterAdjustmentOn = picParams->loop_filter_adj_enable;
8549 cmd.DW1.MBNoCoeffiscientSkip = picParams->mb_no_coeff_skip;
8550 cmd.DW1.ForcedLFUpdateForKeyFrame = picParams->forced_lf_adjustment;
8551
8552 // DDI spec is not mapping to codechal directly. It should be mapping as below
8553 if (picParams->refresh_golden_frame == 1)
8554 {
8555 cmd.DW1.GoldenReferenceCopyFlag = 3;
8556 }
8557 else {
8558 cmd.DW1.GoldenReferenceCopyFlag = picParams->copy_buffer_to_golden;
8559 }
8560 if (picParams->refresh_alternate_frame == 1)
8561 {
8562 cmd.DW1.AlternateReferenceCopyFlag = 3;
8563 }
8564 else {
8565 cmd.DW1.AlternateReferenceCopyFlag = picParams->copy_buffer_to_alternate;
8566 }
8567
8568 cmd.DW1.LastFrameUpdate = picParams->refresh_last;
8569 cmd.DW1.SignBiasGolden = picParams->sign_bias_golden;
8570 cmd.DW1.SignBiasAltRef = picParams->sign_bias_alternate;
8571 cmd.DW1.RefreshEntropyP = picParams->refresh_entropy_probs;
8572
8573 cmd.DW2.LoopFilterLevel = picParams->version > 1 ? 0 : picParams->loop_filter_level[0];
8574 cmd.DW2.Qindex = vp8QuantData->QIndex[0];
8575 cmd.DW2.Y1DCQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
8576 cmd.DW2.Y2DCQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_DC];
8577
8578 cmd.DW3.Y2ACQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_AC];
8579 cmd.DW3.UVDCQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
8580 cmd.DW3.UVACQindex = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
8581 cmd.DW3.FeatureData0Segment0 = vp8QuantData->QIndex[0];
8582
8583 cmd.DW4.FeatureData0Segment1 = vp8QuantData->QIndex[1];
8584 cmd.DW4.FeatureData0Segment2 = vp8QuantData->QIndex[2];
8585 cmd.DW4.FeatureData0Segment3 = vp8QuantData->QIndex[3];
8586 cmd.DW4.FeatureData1Segment0 = picParams->loop_filter_level[0];
8587
8588 cmd.DW5.FeatureData1Segment1 = picParams->loop_filter_level[1];
8589 cmd.DW5.FeatureData1Segment2 = picParams->loop_filter_level[2];
8590 cmd.DW5.FeatureData1Segment3 = picParams->loop_filter_level[3];
8591 cmd.DW5.RefLFDelta0 = picParams->ref_lf_delta[0];
8592
8593 cmd.DW6.RefLFDelta1 = picParams->ref_lf_delta[1];
8594 cmd.DW6.RefLFDelta2 = picParams->ref_lf_delta[2];
8595 cmd.DW6.RefLFDelta3 = picParams->ref_lf_delta[3];
8596 cmd.DW6.ModeLFDelta0 = picParams->mode_lf_delta[0];
8597
8598 cmd.DW7.ModeLFDelta1 = picParams->mode_lf_delta[1];
8599 cmd.DW7.ModeLFDelta2 = picParams->mode_lf_delta[2];
8600 cmd.DW7.ModeLFDelta3 = picParams->mode_lf_delta[3];
8601 cmd.DW7.MCFilterSelect = picParams->version > 0 ? 1 : 0;
8602 cmd.DW7.ChromaFullPixelMCFilterMode = picParams->version < 3 ? 0 : 1;
8603 cmd.DW7.MaxNumPakPasses = m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses(); // Multi-Pass BRC
8604 cmd.DW7.ForcedTokenSurfaceRead = 1;
8605
8606 cmd.DW7.ModecostEnableFlag = 1;
8607 cmd.DW8.NumTLevels = seqParams->NumTemporalLayersMinus1 + 1;
8608 cmd.DW8.TemporalLayerID = picParams->temporal_id;
8609
8610 cmd.DW12.HistogramBTI = CODECHAL_VP8_MPU_FHB_HISTOGRAM_G11;
8611 cmd.DW13.ReferenceModeProbabilityBTI = CODECHAL_VP8_MPU_FHB_REF_MODE_PROBABILITY_G11;
8612 cmd.DW14.ModeProbabilityBTI = CODECHAL_VP8_MPU_FHB_CURR_MODE_PROBABILITY_G11;
8613 cmd.DW15.ReferenceTokenProbabilityBTI = CODECHAL_VP8_MPU_FHB_REF_TOKEN_PROBABILITY_G11;
8614 cmd.DW16.TokenProbabilityBTI = CODECHAL_VP8_MPU_FHB_CURR_TOKEN_PROBABILITY_G11;
8615 cmd.DW17.FrameHeaderBitstreamBTI = CODECHAL_VP8_MPU_FHB_HEADER_BITSTREAM_G11;
8616 cmd.DW18.HeaderMetaDataBTI = CODECHAL_VP8_MPU_FHB_HEADER_METADATA_G11;
8617 cmd.DW19.PictureStateBTI = CODECHAL_VP8_MPU_FHB_PICTURE_STATE_G11;
8618 cmd.DW20.MPUBitStreamBTI = CODECHAL_VP8_MPU_FHB_MPU_BITSTREAM_G11;
8619 cmd.DW21.TokenBitsDataBTI = CODECHAL_VP8_MPU_FHB_TOKEN_BITS_DATA_TABLE_G11;
8620 cmd.DW22.KernelDebugDumpBTI = CODECHAL_VP8_MPU_FHB_VME_DEBUG_STREAMOUT_G11;
8621 cmd.DW23.EntropyCostBTI = CODECHAL_VP8_MPU_FHB_ENTROPY_COST_TABLE_G11;
8622 cmd.DW24.ModeCostUpdateBTI = CODECHAL_VP8_MPU_MODE_COST_UPDATE_G11;
8623
8624 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mpuKernelState.m_dshRegion.AddData(
8625 &cmd,
8626 m_mpuKernelState.dwCurbeOffset,
8627 sizeof(cmd)));
8628
8629 return status;
8630 }
8631
SendMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8MbencSurfaceParams * params)8632 MOS_STATUS CodechalEncodeVp8G11::SendMbEncSurfaces(
8633 PMOS_COMMAND_BUFFER cmdBuffer,
8634 struct CodechalVp8MbencSurfaceParams* params)
8635 {
8636 uint32_t size;
8637 uint8_t lastRefPicIdx, goldenRefPicIdx, alternateRefPicIdx;
8638 PMHW_KERNEL_STATE kernelState;
8639 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
8640 struct CodechalBindingTableVp8Mbenc* vp8MbEncBindingTable;
8641 MOS_STATUS status = MOS_STATUS_SUCCESS;
8642 uint8_t vdirection, scaledIdx;
8643
8644 CODECHAL_ENCODE_FUNCTION_ENTER;
8645
8646 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
8647 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
8648 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psCurrPicSurface);
8649 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMbEncBindingTable);
8650 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
8651
8652 lastRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
8653 goldenRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
8654 alternateRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
8655
8656 vp8MbEncBindingTable = params->pMbEncBindingTable;
8657
8658 m_osInterface = m_hwInterface->GetOsInterface();
8659 kernelState = params->pKernelState;
8660
8661 vdirection = CODECHAL_VDIRECTION_FRAME;
8662
8663 // Per-MB output data buffer
8664 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16;
8665 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8666 surfaceCodecParams.dwSize = size;
8667 surfaceCodecParams.bMediaBlockRW = true;
8668 surfaceCodecParams.presBuffer = params->presPerMB_MBCodeOpData;
8669 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncMBOut;
8670 surfaceCodecParams.bRenderTarget = true;
8671 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8672 m_hwInterface,
8673 cmdBuffer,
8674 &surfaceCodecParams,
8675 kernelState));
8676
8677 // Current Picture Y
8678 CodecHalGetResourceInfo(m_osInterface, params->psCurrPicSurface);
8679
8680 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8681 surfaceCodecParams.bIs2DSurface = true;
8682 surfaceCodecParams.bMediaBlockRW = true;
8683 surfaceCodecParams.bUseUVPlane = true;
8684 surfaceCodecParams.psSurface = params->psCurrPicSurface;
8685 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
8686 surfaceCodecParams.dwCacheabilityControl =
8687 m_hwInterface->ComposeSurfaceCacheabilityControl(
8688 MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE,
8689 (codechalL3 | codechalLLC));
8690 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncCurrY;
8691 surfaceCodecParams.dwUVBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncCurrUV;
8692 surfaceCodecParams.dwVerticalLineStride = params->dwVerticalLineStride;
8693 surfaceCodecParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
8694
8695 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8696 m_hwInterface,
8697 cmdBuffer,
8698 &surfaceCodecParams,
8699 kernelState));
8700
8701 // Current Picture - VME Prediction Surface
8702 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8703 surfaceCodecParams.bUseAdvState = true;
8704 surfaceCodecParams.psSurface = params->psCurrPicSurface;
8705 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
8706 surfaceCodecParams.dwCacheabilityControl =
8707 m_hwInterface->ComposeSurfaceCacheabilityControl(
8708 MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE,
8709 (codechalL3 | codechalLLC));
8710 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncVME;
8711 surfaceCodecParams.ucVDirection = vdirection;
8712
8713 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8714 m_hwInterface,
8715 cmdBuffer,
8716 &surfaceCodecParams,
8717 kernelState));
8718
8719 if (params->wPictureCodingType == I_TYPE)
8720 {
8721 // MB Mode Cost Luma buffer
8722 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8723 surfaceCodecParams.bIs2DSurface = true;
8724 surfaceCodecParams.psSurface = params->psMBModeCostLumaBuffer;
8725 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
8726 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncMBModeCostLuma;
8727 surfaceCodecParams.bRenderTarget = true;
8728 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8729 m_hwInterface,
8730 cmdBuffer,
8731 &surfaceCodecParams,
8732 kernelState));
8733
8734 // Block Mode Cost buffer
8735 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8736 surfaceCodecParams.bIs2DSurface = true;
8737 surfaceCodecParams.psSurface = params->psBlockModeCostBuffer;
8738 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
8739 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncBlockModeCost;
8740 surfaceCodecParams.bRenderTarget = true;
8741 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8742 m_hwInterface,
8743 cmdBuffer,
8744 &surfaceCodecParams,
8745 kernelState));
8746
8747 // Chroma Recon Buffer
8748 size = 64 * params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb;
8749 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8750 surfaceCodecParams.dwSize = size;
8751 surfaceCodecParams.presBuffer = params->psChromaReconBuffer;
8752 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
8753 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncChromaRecon;
8754 surfaceCodecParams.bRenderTarget = true;
8755 surfaceCodecParams.bIsWritable = true;
8756 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8757 m_hwInterface,
8758 cmdBuffer,
8759 &surfaceCodecParams,
8760 kernelState));
8761
8762 // Histogram
8763 size = params->dwHistogramSize;
8764 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8765 surfaceCodecParams.dwSize = size;
8766 //surfaceCodecParams.bMediaBlockRW = true;
8767 surfaceCodecParams.presBuffer = params->presHistogram;
8768 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_HISTOGRAM_ENCODE].Value;
8769 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncHistogram;
8770 surfaceCodecParams.bRenderTarget = true;
8771 surfaceCodecParams.bRawSurface = true;
8772 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8773 m_hwInterface,
8774 cmdBuffer,
8775 &surfaceCodecParams,
8776 kernelState));
8777
8778 if (params->bSegmentationEnabled)
8779 {
8780 // Segmentation map
8781 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8782 surfaceCodecParams.bIs2DSurface = true;
8783 surfaceCodecParams.psSurface = params->psSegmentationMap;
8784 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncSegmentationMap;
8785 surfaceCodecParams.bRenderTarget = true;
8786 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8787 m_hwInterface,
8788 cmdBuffer,
8789 &surfaceCodecParams,
8790 kernelState));
8791 }
8792
8793 // BRC distortion data buffer for I frame
8794 if (params->bMbEncIFrameDistInUse)
8795 {
8796 // Distortion Surface (output)
8797 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8798 surfaceCodecParams.bIs2DSurface = true;
8799 surfaceCodecParams.bMediaBlockRW = true;
8800 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
8801 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
8802 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncBRCDist;
8803 surfaceCodecParams.bIsWritable = true;
8804 surfaceCodecParams.bRenderTarget = true;
8805 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8806 m_hwInterface,
8807 cmdBuffer,
8808 &surfaceCodecParams,
8809 kernelState));
8810
8811 // Curr Y downscaled (input)
8812 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8813 surfaceCodecParams.bIs2DSurface = true;
8814 surfaceCodecParams.psSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
8815 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
8816 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MbEncCurrYDownscaled;
8817 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
8818 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8819 m_hwInterface,
8820 cmdBuffer,
8821 &surfaceCodecParams,
8822 kernelState));
8823
8824 // VME Coarse Intra downscaled (input)
8825 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8826 surfaceCodecParams.bUseAdvState = true;
8827 surfaceCodecParams.psSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
8828 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
8829 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncVMECoarseIntra;
8830 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
8831 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8832 m_hwInterface,
8833 cmdBuffer,
8834 &surfaceCodecParams,
8835 kernelState));
8836 }
8837
8838 if (!params->bMbEncIFrameDistInUse)
8839 {
8840 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8841 surfaceCodecParams.bIs2DSurface = true;
8842 surfaceCodecParams.bMediaBlockRW = true;
8843 surfaceCodecParams.psSurface = m_swScoreboardState->GetCurSwScoreboardSurface();
8844 surfaceCodecParams.bRenderTarget = true;
8845 surfaceCodecParams.bIsWritable = true;
8846 surfaceCodecParams.dwOffset = 0;
8847 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_SOFTWARE_SCOREBOARD_ENCODE].Value;
8848 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MbEncSwscoreboardI;
8849 surfaceCodecParams.bUse32UINTSurfaceFormat = true;
8850 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8851 m_hwInterface,
8852 cmdBuffer,
8853 &surfaceCodecParams,
8854 kernelState));
8855
8856 CODECHAL_DEBUG_TOOL(
8857 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
8858 surfaceCodecParams.psSurface,
8859 "SWScoreboardSurface",
8860 "SWscoreboardISurf"));
8861 )
8862 }
8863 }
8864 else
8865 {
8866 // P_TYPE
8867 // MV data buffer
8868 size = CODECHAL_GET_WIDTH_IN_MACROBLOCKS(params->dwOriFrameWidth) * CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(params->dwOriFrameHeight) * 64 /*64 * NumMBInFrame*/;
8869 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8870 surfaceCodecParams.dwSize = size;
8871 surfaceCodecParams.presBuffer = params->presPerMB_MBCodeOpData;
8872 surfaceCodecParams.bMediaBlockRW = true;
8873 surfaceCodecParams.dwOffset = params->dwMvOffset;
8874 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
8875 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncIndMVData;
8876 surfaceCodecParams.bRenderTarget = true;
8877 surfaceCodecParams.bIsWritable = true;
8878 surfaceCodecParams.bRawSurface = true;
8879 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8880 m_hwInterface,
8881 cmdBuffer,
8882 &surfaceCodecParams,
8883 kernelState));
8884
8885 // VP8_ME MV data buffer
8886 if (params->bHmeEnabled)
8887 {
8888 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
8889
8890 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8891 surfaceCodecParams.bIs2DSurface = true;
8892 surfaceCodecParams.bMediaBlockRW = true;
8893 surfaceCodecParams.psSurface = params->ps4xMeMvDataBuffer;
8894 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
8895 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncMVDataFromME;
8896 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8897 m_hwInterface,
8898 cmdBuffer,
8899 &surfaceCodecParams,
8900 kernelState));
8901 }
8902
8903 //Reference Frame MB Count
8904 size = sizeof(uint32_t) * 8;
8905 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8906 surfaceCodecParams.dwSize = size;
8907 surfaceCodecParams.bMediaBlockRW = true;
8908 surfaceCodecParams.presBuffer = params->presRefMbCountSurface;
8909 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRefMBCount;
8910 surfaceCodecParams.bRenderTarget = true;
8911 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8912 m_hwInterface,
8913 cmdBuffer,
8914 &surfaceCodecParams,
8915 kernelState));
8916
8917 // VME Inter Prediction Surface
8918 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8919 surfaceCodecParams.bUseAdvState = true;
8920 surfaceCodecParams.psSurface = params->psCurrPicSurface;
8921 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
8922 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
8923 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncVMEInterPred;
8924 surfaceCodecParams.ucVDirection = vdirection;
8925 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8926 m_hwInterface,
8927 cmdBuffer,
8928 &surfaceCodecParams,
8929 kernelState));
8930
8931 if (!CodecHal_PictureIsInvalid(*params->pLastRefPic))
8932 {
8933 lastRefPicIdx = params->pLastRefPic->FrameIdx;
8934 }
8935
8936 if (!CodecHal_PictureIsInvalid(*params->pGoldenRefPic))
8937 {
8938 goldenRefPicIdx = params->pGoldenRefPic->FrameIdx;
8939 }
8940
8941 if (!CodecHal_PictureIsInvalid(*params->pAlternateRefPic))
8942 {
8943 alternateRefPicIdx = params->pAlternateRefPic->FrameIdx;
8944 }
8945
8946 // Last reference
8947 if (lastRefPicIdx != CODECHAL_ENCODE_VP8_INVALID_PIC_ID)
8948 {
8949 // Picture Y VME
8950 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8951 surfaceCodecParams.bUseAdvState = true;
8952 surfaceCodecParams.psSurface = ¶ms->ppRefList[lastRefPicIdx]->sRefBuffer;
8953 surfaceCodecParams.ucVDirection = vdirection;
8954 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
8955
8956 switch (params->uiRefCtrl)
8957 {
8958 case 1:
8959 case 3:
8960 case 5:
8961 case 7:
8962 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef1Pic;
8963 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8964 m_hwInterface,
8965 cmdBuffer,
8966 &surfaceCodecParams,
8967 kernelState));
8968 break;
8969 }
8970
8971 }
8972
8973 // Golden reference
8974 if (goldenRefPicIdx != CODECHAL_ENCODE_VP8_INVALID_PIC_ID)
8975 {
8976 // Picture Y VME
8977 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8978 surfaceCodecParams.bUseAdvState = true;
8979 surfaceCodecParams.psSurface = ¶ms->ppRefList[goldenRefPicIdx]->sRefBuffer;
8980 surfaceCodecParams.ucVDirection = vdirection;
8981 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
8982
8983 switch (params->uiRefCtrl)
8984 {
8985 case 2:
8986 case 6:
8987 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef1Pic;
8988 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8989 m_hwInterface,
8990 cmdBuffer,
8991 &surfaceCodecParams,
8992 kernelState));
8993 break;
8994 case 3:
8995 case 7:
8996 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef2Pic;
8997 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8998 m_hwInterface,
8999 cmdBuffer,
9000 &surfaceCodecParams,
9001 kernelState));
9002 break;
9003 }
9004
9005 }
9006
9007 // Alternate reference
9008 if (alternateRefPicIdx != CODECHAL_ENCODE_VP8_INVALID_PIC_ID)
9009 {
9010 // Picture Y VME
9011 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9012 surfaceCodecParams.bUseAdvState = true;
9013 surfaceCodecParams.psSurface = ¶ms->ppRefList[alternateRefPicIdx]->sRefBuffer;
9014 surfaceCodecParams.ucVDirection = vdirection;
9015 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
9016
9017 switch (params->uiRefCtrl)
9018 {
9019 case 4:
9020 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef1Pic;
9021 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9022 m_hwInterface,
9023 cmdBuffer,
9024 &surfaceCodecParams,
9025 kernelState));
9026 break;
9027 case 5:
9028 case 6:
9029 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef2Pic;
9030 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9031 m_hwInterface,
9032 cmdBuffer,
9033 &surfaceCodecParams,
9034 kernelState));
9035 break;
9036 case 7:
9037 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef3Pic;
9038 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9039 m_hwInterface,
9040 cmdBuffer,
9041 &surfaceCodecParams,
9042 kernelState));
9043 break;
9044 }
9045 }
9046
9047 //Per MB Quant Data Surface
9048 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9049 surfaceCodecParams.bIs2DSurface = true;
9050 surfaceCodecParams.bMediaBlockRW = true;
9051 surfaceCodecParams.psSurface = params->psPerMBQuantDataBuffer;
9052 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncPerMBQuantDataP;
9053 surfaceCodecParams.bRenderTarget = true;
9054 surfaceCodecParams.bIsWritable = true;
9055 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9056 m_hwInterface,
9057 cmdBuffer,
9058 &surfaceCodecParams,
9059 kernelState));
9060
9061 if (params->bSegmentationEnabled)
9062 {
9063 //Per Segmentation Map
9064 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9065 surfaceCodecParams.bIs2DSurface = true;
9066 surfaceCodecParams.psSurface = params->psSegmentationMap;
9067 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncSegmentationMap;
9068 surfaceCodecParams.bRenderTarget = true;
9069 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9070 m_hwInterface,
9071 cmdBuffer,
9072 &surfaceCodecParams,
9073 kernelState));
9074 }
9075
9076 //Inter Prediction Distortion Surface
9077 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9078 surfaceCodecParams.bIs2DSurface = true;
9079 surfaceCodecParams.psSurface = params->psInterPredictionDistortionSurface;
9080 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8InterPredDistortion;
9081 surfaceCodecParams.bRenderTarget = true;
9082 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9083 m_hwInterface,
9084 cmdBuffer,
9085 &surfaceCodecParams,
9086 kernelState));
9087
9088 //Per MV Data Surface
9089 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16;
9090 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9091 surfaceCodecParams.dwSize = size;
9092 surfaceCodecParams.bMediaBlockRW = true;
9093 surfaceCodecParams.presBuffer = params->presPerMVDataSurface;
9094 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8PerMVDataSurface;
9095 surfaceCodecParams.bRenderTarget = true;
9096 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9097 m_hwInterface,
9098 cmdBuffer,
9099 &surfaceCodecParams,
9100 kernelState));
9101
9102 //MB/MV Counter Surface, initialize to zero
9103 size = params->dwHistogramSize;
9104 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9105 surfaceCodecParams.dwSize = size;
9106 surfaceCodecParams.presBuffer = params->presHistogram;
9107 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_HISTOGRAM_ENCODE].Value;
9108 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncHistogram;
9109 surfaceCodecParams.bRenderTarget = true;
9110 surfaceCodecParams.bRawSurface = true;
9111 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9112 m_hwInterface,
9113 cmdBuffer,
9114 &surfaceCodecParams,
9115 kernelState));
9116
9117 //Mode Cost Update Surface, 64 bytes
9118 size = CODECHAL_VP8_MODE_COST_SURFACE_SIZE;
9119 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9120 surfaceCodecParams.dwSize = size;
9121 surfaceCodecParams.presBuffer = params->presModeCostUpdateSurface;
9122 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBModeCostUpdateSurface;
9123 surfaceCodecParams.bRenderTarget = true;
9124 surfaceCodecParams.bRawSurface = true;
9125 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9126 m_hwInterface,
9127 cmdBuffer,
9128 &surfaceCodecParams,
9129 kernelState));
9130
9131 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9132 surfaceCodecParams.bIs2DSurface = true;
9133 surfaceCodecParams.bMediaBlockRW = true;
9134 surfaceCodecParams.psSurface = m_swScoreboardState->GetCurSwScoreboardSurface();
9135 surfaceCodecParams.bRenderTarget = true;
9136 surfaceCodecParams.bIsWritable = true;
9137 surfaceCodecParams.dwOffset = 0;
9138 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_SOFTWARE_SCOREBOARD_ENCODE].Value;
9139 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MbEncSwscoreboardP;
9140 surfaceCodecParams.bUse32UINTSurfaceFormat = true;
9141 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9142 m_hwInterface,
9143 cmdBuffer,
9144 &surfaceCodecParams,
9145 kernelState));
9146
9147 CODECHAL_DEBUG_TOOL(
9148 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
9149 surfaceCodecParams.psSurface,
9150 "SWScoreboardSurface",
9151 "SWScoreboardPSurf"));)
9152
9153 }
9154 // Kernel Debug Dump surface
9155 if (params->bVMEKernelDump)
9156 {
9157 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32;
9158 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9159 surfaceCodecParams.presBuffer = params->presVmeKernelDumpBuffer;
9160 surfaceCodecParams.dwSize = size;
9161 surfaceCodecParams.dwOffset = params->dwMvOffset;
9162 surfaceCodecParams.dwBindingTableOffset = (params->wPictureCodingType == I_TYPE) ?
9163 vp8MbEncBindingTable->dwVp8MBEncVMEDebugStreamoutI : vp8MbEncBindingTable->dwVp8MBEncVMEDebugStreamoutP;
9164 surfaceCodecParams.bRenderTarget = true;
9165 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9166 m_hwInterface,
9167 cmdBuffer,
9168 &surfaceCodecParams,
9169 kernelState));
9170 }
9171
9172 return status;
9173 }
9174
SendIntrDistSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8MbencSurfaceParams * params)9175 MOS_STATUS CodechalEncodeVp8G11::SendIntrDistSurfaces(
9176 PMOS_COMMAND_BUFFER cmdBuffer,
9177 struct CodechalVp8MbencSurfaceParams* params)
9178 {
9179 uint32_t size;
9180 PMHW_KERNEL_STATE kernelState;
9181 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
9182 struct CodechalBindingTableVp8Mbenc* vp8MbEncBindingTable;
9183 MOS_STATUS status = MOS_STATUS_SUCCESS;
9184
9185 CODECHAL_ENCODE_FUNCTION_ENTER;
9186
9187 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
9188 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
9189 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMbEncBindingTable);
9190 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
9191
9192 vp8MbEncBindingTable = params->pMbEncBindingTable;
9193
9194 m_osInterface = m_hwInterface->GetOsInterface();
9195 kernelState = params->pKernelState;
9196
9197 // Per-MB output data buffer
9198 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16;
9199 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9200 surfaceCodecParams.dwSize = size;
9201 surfaceCodecParams.bMediaBlockRW = true;
9202 surfaceCodecParams.presBuffer = params->presPerMB_MBCodeOpData;
9203 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncMBOut;
9204 surfaceCodecParams.bRenderTarget = true;
9205 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9206 m_hwInterface,
9207 cmdBuffer,
9208 &surfaceCodecParams,
9209 kernelState));
9210
9211 // Distortion Surface (output)
9212 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9213 surfaceCodecParams.bIs2DSurface = true;
9214 surfaceCodecParams.bMediaBlockRW = true;
9215 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
9216 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
9217 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncBRCDist;
9218 surfaceCodecParams.bIsWritable = true;
9219 surfaceCodecParams.bRenderTarget = true;
9220 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9221 m_hwInterface,
9222 cmdBuffer,
9223 &surfaceCodecParams,
9224 kernelState));
9225
9226 // Curr Y downscaled (input)
9227 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9228 surfaceCodecParams.bIs2DSurface = true;
9229 surfaceCodecParams.psSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
9230 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
9231 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MbEncCurrYDownscaled;
9232 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
9233 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9234 m_hwInterface,
9235 cmdBuffer,
9236 &surfaceCodecParams,
9237 kernelState));
9238
9239 // VME Coarse Intra downscaled (input)
9240 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9241 surfaceCodecParams.bUseAdvState = true;
9242 surfaceCodecParams.psSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
9243 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
9244 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncVMECoarseIntra;
9245 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
9246 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9247 m_hwInterface,
9248 cmdBuffer,
9249 &surfaceCodecParams,
9250 kernelState));
9251
9252 return status;
9253 }
9254
SendMpuSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8MpuSurfaceParams * params)9255 MOS_STATUS CodechalEncodeVp8G11::SendMpuSurfaces(
9256 PMOS_COMMAND_BUFFER cmdBuffer,
9257 struct CodechalVp8MpuSurfaceParams* params)
9258 {
9259 uint32_t size;
9260 PMHW_KERNEL_STATE kernelState;
9261 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
9262 struct CodechalBindingTableVp8Mpu* vp8MpuBindingTable;
9263 MOS_STATUS status = MOS_STATUS_SUCCESS;
9264
9265 CODECHAL_ENCODE_FUNCTION_ENTER;
9266
9267 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
9268 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
9269 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
9270
9271 kernelState = params->pKernelState;
9272 vp8MpuBindingTable = &m_mpuBindingTable;
9273
9274 // Histogram
9275 size = params->dwHistogramSize;
9276 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9277 surfaceCodecParams.dwSize = size;
9278 surfaceCodecParams.presBuffer = params->presHistogram;
9279 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuHistogram;
9280 surfaceCodecParams.bRenderTarget = true;
9281 surfaceCodecParams.bRawSurface = true;
9282 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9283 m_hwInterface,
9284 cmdBuffer,
9285 &surfaceCodecParams,
9286 kernelState));
9287
9288 // Reference mode probability
9289 size = params->dwModeProbabilitySize;
9290 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9291 surfaceCodecParams.dwSize = size;
9292 surfaceCodecParams.presBuffer = params->presRefModeProbability;
9293 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuReferenceModeProbability;
9294 surfaceCodecParams.bRenderTarget = true;
9295 surfaceCodecParams.bRawSurface = true;
9296 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9297 m_hwInterface,
9298 cmdBuffer,
9299 &surfaceCodecParams,
9300 kernelState));
9301
9302 // Mode probability
9303 size = params->dwModeProbabilitySize;
9304 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9305 surfaceCodecParams.dwSize = size;
9306 //surfaceCodecParams.bMediaBlockRW = true;
9307 surfaceCodecParams.presBuffer = params->presModeProbability;
9308 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuModeProbability;
9309 surfaceCodecParams.bRenderTarget = true;
9310 surfaceCodecParams.bRawSurface = true;
9311 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9312 m_hwInterface,
9313 cmdBuffer,
9314 &surfaceCodecParams,
9315 kernelState));
9316
9317 // Reference Token probability
9318 size = params->dwTokenProbabilitySize;
9319 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9320 surfaceCodecParams.dwSize = size;
9321 //surfaceCodecParams.bMediaBlockRW = true;
9322 surfaceCodecParams.presBuffer = params->presRefTokenProbability;
9323 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuReferenceTokenProbability;
9324 surfaceCodecParams.bRenderTarget = true;
9325 surfaceCodecParams.bRawSurface = true;
9326 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9327 m_hwInterface,
9328 cmdBuffer,
9329 &surfaceCodecParams,
9330 kernelState));
9331
9332 // Token probability
9333 size = params->dwTokenProbabilitySize;
9334 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9335 surfaceCodecParams.dwSize = size;
9336 //surfaceCodecParams.bMediaBlockRW = true;
9337 surfaceCodecParams.presBuffer = params->presTokenProbability;
9338 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuTokenProbability;
9339 surfaceCodecParams.bRenderTarget = true;
9340 surfaceCodecParams.bRawSurface = true;
9341 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9342 m_hwInterface,
9343 cmdBuffer,
9344 &surfaceCodecParams,
9345 kernelState));
9346
9347 // Frame header
9348 size = params->dwFrameHeaderSize;
9349 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9350 surfaceCodecParams.dwSize = size;
9351 //surfaceCodecParams.bMediaBlockRW = true;
9352 surfaceCodecParams.presBuffer = params->presFrameHeader;
9353 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuFrameHeaderBitstream;
9354 surfaceCodecParams.bRenderTarget = true;
9355 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9356 m_hwInterface,
9357 cmdBuffer,
9358 &surfaceCodecParams,
9359 kernelState));
9360
9361 // Header Metadata
9362 size = params->dwHeaderMetadataSize;
9363 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9364 surfaceCodecParams.dwSize = size;
9365 surfaceCodecParams.dwOffset = params->dwHeaderMetaDataOffset;
9366 //surfaceCodecParams.bMediaBlockRW = true;
9367 surfaceCodecParams.presBuffer = params->presHeaderMetadata;
9368 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuHeaderMetaData;
9369 surfaceCodecParams.bRenderTarget = true;
9370 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9371 m_hwInterface,
9372 cmdBuffer,
9373 &surfaceCodecParams,
9374 kernelState));
9375
9376 // Picture state
9377 size = mhw_vdbox_mfx_g11_X::MFX_VP8_PIC_STATE_CMD::byteSize;
9378 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9379 surfaceCodecParams.dwSize = size;
9380 surfaceCodecParams.presBuffer = params->presPictureState;
9381 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuPictureState;
9382 surfaceCodecParams.bRenderTarget = true;
9383 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9384 m_hwInterface,
9385 cmdBuffer,
9386 &surfaceCodecParams,
9387 kernelState));
9388
9389 // Mpu Bitstream
9390 size = params->dwMpuBitstreamSize;
9391 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9392 surfaceCodecParams.dwSize = size;
9393 //surfaceCodecParams.bMediaBlockRW = true;
9394 surfaceCodecParams.presBuffer = params->presMpuBitstream;
9395 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuMpuBitstream;
9396 surfaceCodecParams.bRenderTarget = true;
9397 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9398 m_hwInterface,
9399 cmdBuffer,
9400 &surfaceCodecParams,
9401 kernelState));
9402
9403 // Token bits Data Surface
9404 size = params->dwTokenBitsDataSize;
9405 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9406 surfaceCodecParams.dwSize = size;
9407 surfaceCodecParams.presBuffer = params->presTokenBitsData;
9408 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuTokenBitsData;
9409 surfaceCodecParams.bRenderTarget = true;
9410 surfaceCodecParams.bRawSurface = true;
9411 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9412 m_hwInterface,
9413 cmdBuffer,
9414 &surfaceCodecParams,
9415 kernelState));
9416
9417 // Entropy cost table
9418 size = params->dwEntropyCostTableSize;
9419 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9420 surfaceCodecParams.dwSize = size;
9421 //surfaceCodecParams.bMediaBlockRW = true;
9422 surfaceCodecParams.presBuffer = params->presEntropyCostTable;
9423 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuEntropyCost;
9424 surfaceCodecParams.bRenderTarget = true;
9425 surfaceCodecParams.bRawSurface = true;
9426 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9427 m_hwInterface,
9428 cmdBuffer,
9429 &surfaceCodecParams,
9430 kernelState));
9431
9432 //Mode Cost Update Surface
9433 size = sizeof(uint32_t)* 16;
9434 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9435 surfaceCodecParams.dwSize = size;
9436 surfaceCodecParams.presBuffer = params->presModeCostUpdateBuffer;
9437 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuModeCostUpdateSurface;
9438 surfaceCodecParams.bRenderTarget = true;
9439 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9440 m_hwInterface,
9441 cmdBuffer,
9442 &surfaceCodecParams,
9443 kernelState));
9444
9445 // Kernel Debug Dump surface
9446 if (params->bVMEKernelDump)
9447 {
9448 size = params->dwKernelDumpSize;
9449 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
9450 surfaceCodecParams.presBuffer = params->presVmeKernelDumpBuffer;
9451 surfaceCodecParams.dwSize = size;
9452 surfaceCodecParams.dwBindingTableOffset = vp8MpuBindingTable->dwVp8MpuKernelDebugDump;
9453 surfaceCodecParams.bRenderTarget = true;
9454 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
9455 m_hwInterface,
9456 cmdBuffer,
9457 &surfaceCodecParams,
9458 kernelState));
9459 }
9460
9461 return status;
9462 }
9463
SetTpuCurbe(struct CodechalVp8TpuCurbeParams * params)9464 MOS_STATUS CodechalEncodeVp8G11::SetTpuCurbe(struct CodechalVp8TpuCurbeParams* params)
9465 {
9466 PCODEC_VP8_ENCODE_PIC_PARAMS picParams;
9467 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams;
9468 PCODEC_VP8_ENCODE_QUANT_DATA vp8QuantData;
9469 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
9470 struct Vp8TpuFhbCurbeG11 cmd;
9471 MOS_STATUS status = MOS_STATUS_SUCCESS;
9472
9473 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
9474 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
9475 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
9476 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
9477 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pVp8QuantData);
9478
9479 stateHeapInterface =
9480 m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
9481 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
9482
9483 picParams = params->pPicParams;
9484 seqParams = params->pSeqParams;
9485 vp8QuantData = params->pVp8QuantData;
9486
9487 MOS_ZeroMemory(&cmd, sizeof(cmd));
9488
9489 cmd.DW0.MBsInFrame = (uint32_t)params->wPicWidthInMb * (uint32_t)params->wFieldFrameHeightInMb;
9490
9491 cmd.DW1.FrameType = picParams->frame_type;
9492 cmd.DW1.EnableSegmentation = picParams->segmentation_enabled;
9493 cmd.DW1.RebinarizationFrameHdr = (params->bRebinarizationFrameHdr ? 1 : 0);
9494
9495 cmd.DW1.RefreshEntropyP = picParams->refresh_entropy_probs;
9496 cmd.DW1.MBNoCoeffiscientSkip = picParams->mb_no_coeff_skip;
9497
9498 cmd.DW3.MaxQP = picParams->ClampQindexHigh;
9499 cmd.DW3.MinQP = picParams->ClampQindexLow;
9500
9501 cmd.DW4.LoopFilterLevelSegment0 = picParams->loop_filter_level[0];
9502 cmd.DW4.LoopFilterLevelSegment1 = picParams->loop_filter_level[1];
9503 cmd.DW4.LoopFilterLevelSegment2 = picParams->loop_filter_level[2];
9504 cmd.DW4.LoopFilterLevelSegment3 = picParams->loop_filter_level[3];
9505
9506 cmd.DW5.QuantizationIndexSegment0 = vp8QuantData->QIndex[0];
9507 cmd.DW5.QuantizationIndexSegment1 = vp8QuantData->QIndex[1];
9508 cmd.DW5.QuantizationIndexSegment2 = vp8QuantData->QIndex[2];
9509 cmd.DW5.QuantizationIndexSegment3 = vp8QuantData->QIndex[3];
9510
9511 // This setup is only used for CQP = 1 << 8 (15:8 bits)
9512 // For BRC, this will be overwritten after Pak execution
9513 cmd.DW6.PakPassNum = m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses() << 8;
9514
9515 if (params->bAdaptiveRePak)
9516 {
9517 cmd.DW7.SkipCostDeltaThreshold = 100;
9518 cmd.DW7.TokenCostDeltaThreshold = 50;
9519 }
9520 else
9521 {
9522 cmd.DW7.SkipCostDeltaThreshold = 0; // change to 1 when temporal scalability is enabled
9523 cmd.DW7.TokenCostDeltaThreshold = 0; // change to 1 when temporal scalability is enabled
9524 }
9525
9526 cmd.DW12.PakTokenStatisticsBTI = CODECHAL_VP8_TPU_FHB_PAK_TOKEN_STATISTICS_G11;
9527 cmd.DW13.TokenUpdateFlagsBTI = CODECHAL_VP8_TPU_FHB_TOKEN_UPDATE_FLAGS_G11;
9528 cmd.DW14.EntropyCostTableBTI = CODECHAL_VP8_TPU_FHB_ENTROPY_COST_TABLE_G11;
9529 cmd.DW15.FrameHeaderBitstreamBTI = CODECHAL_VP8_TPU_FHB_HEADER_BITSTREAM_G11;
9530 cmd.DW16.DefaultTokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_DEFAULT_TOKEN_PROBABILITY_G11;
9531 cmd.DW17.PictureStateBTI = CODECHAL_VP8_TPU_FHB_PICTURE_STATE_G11;
9532 cmd.DW18.MpuCurbeDataBTI = CODECHAL_VP8_TPU_FHB_MPU_CURBE_DATA_G11;
9533 cmd.DW19.HeaderMetaDataBTI = CODECHAL_VP8_TPU_FHB_HEADER_METADATA_G11;
9534 cmd.DW20.TokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_TOKEN_PROBABILITY_G11;
9535 cmd.DW21.PakHardwareTokenProbabilityPass1BTI = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS1_PROBABILITY_G11;
9536 cmd.DW22.KeyFrameTokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_KEY_TOKEN_PROBABILITY_G11;
9537 cmd.DW23.UpdatedTokenProbabilityBTI = CODECHAL_VP8_TPU_FHB_UPDATED_TOKEN_PROBABILITY_G11;
9538 cmd.DW24.PakHardwareTokenProbabilityPass2BTI = CODECHAL_VP8_TPU_FHB_PAK_HW_PASS2_PROBABILITY_G11;
9539 cmd.DW25.KernelDebugDumpBTI = CODECHAL_VP8_TPU_FHB_VME_DEBUG_STREAMOUT_G11;
9540 cmd.DW26.RepakDecisionSurfaceBTI = CODECHAL_VP8_TPU_FHB_REPAK_DECISION_G11;
9541
9542 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_tpuKernelState.m_dshRegion.AddData(
9543 &cmd,
9544 m_tpuKernelState.dwCurbeOffset,
9545 sizeof(cmd)));
9546
9547 return status;
9548 }
9549
CalMaxLevelRatioForTL(uint16_t * framesPer100Sec,uint32_t * targetBitRate,uint32_t numTemporalLayersMinus1,uint32_t * tempBitRate)9550 MOS_STATUS CodechalEncodeVp8G11::CalMaxLevelRatioForTL(
9551 uint16_t *framesPer100Sec,
9552 uint32_t *targetBitRate,
9553 uint32_t numTemporalLayersMinus1,
9554 uint32_t *tempBitRate)
9555 {
9556 MOS_STATUS status = MOS_STATUS_SUCCESS;
9557
9558 CODECHAL_ENCODE_FUNCTION_ENTER;
9559
9560 uint32_t ti, tj;
9561 uint32_t numLevel[NAX_NUM_TEMPORAL_LAYERS];
9562 uint32_t atempRatios[NAX_NUM_TEMPORAL_LAYERS];
9563 int acculateTempBitRate;
9564
9565 for( ti= 0;ti < numTemporalLayersMinus1+1;ti++)
9566 {
9567 atempRatios[ti]= (uint32_t)framesPer100Sec[numTemporalLayersMinus1]/(uint32_t)framesPer100Sec[ti]; // it should be integer
9568 }
9569
9570 for( ti=0; ti < numTemporalLayersMinus1+1; ti++){
9571 numLevel[ti]= 0;
9572 for( tj=0; tj < atempRatios[0]; tj++)
9573 {
9574 if(tj%atempRatios[ti]==0)
9575 numLevel[ti] += 1; // ratio of framerate
9576 }
9577 }
9578
9579 tempBitRate[0]= targetBitRate[0]*64/targetBitRate[numTemporalLayersMinus1];
9580
9581 acculateTempBitRate= tempBitRate[0];
9582 for (ti=1; ti < (uint32_t)numTemporalLayersMinus1; ti++)
9583 {
9584 tempBitRate[ti]= (targetBitRate[ti] - targetBitRate[ti-1])*64/targetBitRate[numTemporalLayersMinus1];
9585 acculateTempBitRate += tempBitRate[ti];
9586 }
9587
9588 tempBitRate[numTemporalLayersMinus1]= 64-acculateTempBitRate; // The sum of tempBitRate must be 64 because this will affect the QP directly
9589
9590 for( ti=0; ti<numTemporalLayersMinus1+1; ti++)
9591 {
9592 int tem_level;
9593 if(ti==0)
9594 tem_level = numLevel[0];
9595 else
9596 tem_level = numLevel[ti] - numLevel[ti - 1];
9597
9598 tempBitRate[ti] = atempRatios[0] * tempBitRate[ti]/tem_level;
9599 }
9600
9601 return status;
9602 }
9603