1 /*
2 * Copyright (c) 2017-2021, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file cm_hal_g12.cpp
24 //! \brief Common HAL CM Gen12 (TGL) function implementations.
25 //!
26
27 #include "cm_hal_g12.h"
28 #include "mhw_render_hwcmd_g12_X.h"
29 #include "mhw_state_heap_hwcmd_g12_X.h"
30 #include "mhw_mi_g12_X.h"
31 #include "mhw_render_g12_X.h"
32 #include "cm_def.h"
33 #include "renderhal_platform_interface.h"
34 #include "renderhal_g12_base.h"
35 #include "hal_oca_interface.h"
36 #include "mhw_mmio_g12.h"
37 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
38 #include "cm_gpucopy_kernel_g12lp.h"
39 #include "cm_gpuinit_kernel_g12lp.h"
40 #else // #ifdef ENABLE_KERNELS
41 unsigned int iGPUCopy_kernel_isa_size_gen12lp = 0;
42 unsigned int iGPUInit_kernel_isa_size_gen12lp = 0;
43 unsigned char *pGPUCopy_kernel_isa_gen12lp = nullptr;
44 unsigned char *pGPUInit_kernel_isa_gen12lp = nullptr;
45 #endif // #ifdef ENABLE_KERNELS
46
47 typedef enum _CM_HAL_MEMORY_OBJECT_CONTROL_G12
48 {
49 CM_MEMORY_OBJECT_CONTROL_TGL_DEFAULT = 0x0,
50 CM_MEMORY_OBJECT_CONTROL_TGL_L1_ENABLED = 0x1,
51 }CM_HAL_MEMORY_OBJECT_CONTROL_G12;
52
53 // Gen10 Surface state tokenized commands - a SURFACE_STATE_G10 command and
54 // a surface state command, either SURFACE_STATE_G12 or SURFACE_STATE_ADV_G12
55 struct PACKET_SURFACE_STATE
56 {
57 SURFACE_STATE_TOKEN_COMMON token;
58 union
59 {
60 mhw_state_heap_g12_X::RENDER_SURFACE_STATE_CMD cmdSurfaceState;
61 mhw_state_heap_g12_X::MEDIA_SURFACE_STATE_CMD cmdSurfaceStateAdv;
62 };
63 };
64
CM_HAL_G12_X(CM_HAL_STATE * cmState)65 CM_HAL_G12_X::CM_HAL_G12_X(CM_HAL_STATE *cmState): CM_HAL_GENERIC(cmState)
66 { // Enables scheduling based on virtual enngine.
67 if (m_cmState && m_cmState->osInterface)
68 {
69 m_cmState->osInterface->pfnVirtualEngineSupported(m_cmState->osInterface, false, true);
70 }
71 return;
72 }
73
GetCopyKernelIsa(void * & isa,uint32_t & isaSize)74 MOS_STATUS CM_HAL_G12_X::GetCopyKernelIsa(void *&isa, uint32_t &isaSize)
75 {
76 isa = (void *)pGPUCopy_kernel_isa_gen12lp;
77 isaSize = iGPUCopy_kernel_isa_size_gen12lp;
78 return MOS_STATUS_SUCCESS;
79 }
80
GetInitKernelIsa(void * & isa,uint32_t & isaSize)81 MOS_STATUS CM_HAL_G12_X::GetInitKernelIsa(void *&isa, uint32_t &isaSize)
82 {
83 isa = (void *)pGPUInit_kernel_isa_gen12lp;
84 isaSize = iGPUInit_kernel_isa_size_gen12lp;
85 return MOS_STATUS_SUCCESS;
86 }
87
SetMediaWalkerParams(CM_WALKING_PARAMETERS engineeringParams,PCM_HAL_WALKER_PARAMS walkerParams)88 MOS_STATUS CM_HAL_G12_X::SetMediaWalkerParams(
89 CM_WALKING_PARAMETERS engineeringParams,
90 PCM_HAL_WALKER_PARAMS walkerParams)
91 {
92 mhw_render_g12_X::MEDIA_OBJECT_WALKER_CMD mediaWalkerCmd;
93 mediaWalkerCmd.DW5.Value = engineeringParams.Value[0];
94
95 mediaWalkerCmd.DW6.Value = engineeringParams.Value[1];
96 walkerParams->colorCountMinusOne = mediaWalkerCmd.DW6.ColorCountMinusOne;
97 walkerParams->midLoopUnitX = mediaWalkerCmd.DW6.MidLoopUnitX;
98 walkerParams->midLoopUnitY = mediaWalkerCmd.DW6.LocalMidLoopUnitY;
99 walkerParams->middleLoopExtraSteps = mediaWalkerCmd.DW6.MiddleLoopExtraSteps;
100
101 mediaWalkerCmd.DW7.Value = engineeringParams.Value[2];
102 walkerParams->localLoopExecCount = mediaWalkerCmd.DW7.LocalLoopExecCount;
103 walkerParams->globalLoopExecCount = mediaWalkerCmd.DW7.GlobalLoopExecCount;
104
105 mediaWalkerCmd.DW8.Value = engineeringParams.Value[3];
106 walkerParams->blockResolution.x = mediaWalkerCmd.DW8.BlockResolutionX;
107 walkerParams->blockResolution.y = mediaWalkerCmd.DW8.BlockResolutionY;
108
109 mediaWalkerCmd.DW9.Value = engineeringParams.Value[4];
110 walkerParams->localStart.x = mediaWalkerCmd.DW9.LocalStartX;
111 walkerParams->localStart.y = mediaWalkerCmd.DW9.LocalStartY;
112
113 mediaWalkerCmd.DW11.Value = engineeringParams.Value[6];
114 walkerParams->localOutLoopStride.x = mediaWalkerCmd.DW11.LocalOuterLoopStrideX;
115 walkerParams->localOutLoopStride.y = mediaWalkerCmd.DW11.LocalOuterLoopStrideY;
116
117 mediaWalkerCmd.DW12.Value = engineeringParams.Value[7];
118 walkerParams->localInnerLoopUnit.x = mediaWalkerCmd.DW12.LocalInnerLoopUnitX;
119 walkerParams->localInnerLoopUnit.y = mediaWalkerCmd.DW12.LocalInnerLoopUnitY;
120
121 mediaWalkerCmd.DW13.Value = engineeringParams.Value[8];
122 walkerParams->globalResolution.x = mediaWalkerCmd.DW13.GlobalResolutionX;
123 walkerParams->globalResolution.y = mediaWalkerCmd.DW13.GlobalResolutionY;
124
125 mediaWalkerCmd.DW14.Value = engineeringParams.Value[9];
126 walkerParams->globalStart.x = mediaWalkerCmd.DW14.GlobalStartX;
127 walkerParams->globalStart.y = mediaWalkerCmd.DW14.GlobalStartY;
128
129 mediaWalkerCmd.DW15.Value = engineeringParams.Value[10];
130 walkerParams->globalOutlerLoopStride.x = mediaWalkerCmd.DW15.GlobalOuterLoopStrideX;
131 walkerParams->globalOutlerLoopStride.y = mediaWalkerCmd.DW15.GlobalOuterLoopStrideY;
132
133 mediaWalkerCmd.DW16.Value = engineeringParams.Value[11];
134 walkerParams->globalInnerLoopUnit.x = mediaWalkerCmd.DW16.GlobalInnerLoopUnitX;
135 walkerParams->globalInnerLoopUnit.y = mediaWalkerCmd.DW16.GlobalInnerLoopUnitY;
136
137 walkerParams->localEnd.x = 0;
138 walkerParams->localEnd.y = 0;
139
140 return MOS_STATUS_SUCCESS;
141 }
142
143
HwSetSurfaceMemoryObjectControl(uint16_t memObjCtl,PRENDERHAL_SURFACE_STATE_PARAMS surfStateParams)144 MOS_STATUS CM_HAL_G12_X::HwSetSurfaceMemoryObjectControl(
145 uint16_t memObjCtl,
146 PRENDERHAL_SURFACE_STATE_PARAMS surfStateParams)
147 {
148 PRENDERHAL_INTERFACE renderHal = m_cmState->renderHal;
149 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
150 MOS_HW_RESOURCE_DEF mosUsage;
151 // The memory object control uint16_t is composed with cache type(8:15), memory type(4:7), ages(0:3)
152 mosUsage = (MOS_HW_RESOURCE_DEF)((memObjCtl & CM_MEMOBJCTL_CACHE_MASK) >> 8);
153 if (mosUsage >= MOS_HW_RESOURCE_DEF_MAX)
154 mosUsage = GetDefaultMOCS();
155
156 surfStateParams->MemObjCtl = renderHal->pOsInterface->pfnCachePolicyGetMemoryObject(
157 mosUsage,
158 renderHal->pOsInterface->pfnGetGmmClientContext(renderHal->pOsInterface)).DwordValue;
159
160 return eStatus;
161 }
162
RegisterSampler8x8AVSTable(PCM_HAL_SAMPLER_8X8_TABLE sampler8x8AvsTable,PCM_AVS_TABLE_STATE_PARAMS avsTable)163 MOS_STATUS CM_HAL_G12_X::RegisterSampler8x8AVSTable(
164 PCM_HAL_SAMPLER_8X8_TABLE sampler8x8AvsTable,
165 PCM_AVS_TABLE_STATE_PARAMS avsTable)
166 {
167 MOS_ZeroMemory(&sampler8x8AvsTable->mhwSamplerAvsTableParam,
168 sizeof(sampler8x8AvsTable->mhwSamplerAvsTableParam));
169
170 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteTransitionArea8Pixels =
171 MEDIASTATE_AVS_TRANSITION_AREA_8_PIXELS;
172 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteTransitionArea4Pixels =
173 MEDIASTATE_AVS_TRANSITION_AREA_4_PIXELS;
174 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteMaxDerivative8Pixels =
175 MEDIASTATE_AVS_MAX_DERIVATIVE_8_PIXELS;
176 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteMaxDerivative4Pixels =
177 MEDIASTATE_AVS_MAX_DERIVATIVE_4_PIXELS;
178
179 sampler8x8AvsTable->mhwSamplerAvsTableParam.bEnableRGBAdaptive =
180 avsTable->enableRgbAdaptive;
181 sampler8x8AvsTable->mhwSamplerAvsTableParam.bAdaptiveFilterAllChannels =
182 avsTable->adaptiveFilterAllChannels;
183
184 // Assign the coefficient table;
185 for (uint32_t i = 0; i < CM_NUM_HW_POLYPHASE_TABLES_G12; i++)
186 {
187 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
188 .ZeroXFilterCoefficient[0] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_0;
189 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
190 .ZeroXFilterCoefficient[1] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_1;
191
192 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
193 .ZeroXFilterCoefficient[2] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_2;
194 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
195 .ZeroXFilterCoefficient[3] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_3;
196
197 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
198 .ZeroXFilterCoefficient[4] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_4;
199 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
200 .ZeroXFilterCoefficient[5] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_5;
201
202 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
203 .ZeroXFilterCoefficient[6] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_6;
204 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
205 .ZeroXFilterCoefficient[7] = (uint8_t)avsTable->tbl0X[i].FilterCoeff_0_7;
206
207 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
208 .ZeroYFilterCoefficient[0] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_0;
209 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
210 .ZeroYFilterCoefficient[1] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_1;
211
212 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
213 .ZeroYFilterCoefficient[2] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_2;
214 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
215 .ZeroYFilterCoefficient[3] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_3;
216
217
218 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
219 .ZeroYFilterCoefficient[4] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_4;
220 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
221 .ZeroYFilterCoefficient[5] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_5;
222
223 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
224 .ZeroYFilterCoefficient[6] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_6;
225 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
226 .ZeroYFilterCoefficient[7] = (uint8_t)avsTable->tbl0Y[i].FilterCoeff_0_7;
227
228 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
229 .OneXFilterCoefficient[0] = (uint8_t)avsTable->tbl1X[i].FilterCoeff_0_2;
230 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
231 .OneXFilterCoefficient[1] = (uint8_t)avsTable->tbl1X[i].FilterCoeff_0_3;
232 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
233 .OneXFilterCoefficient[2] = (uint8_t)avsTable->tbl1X[i].FilterCoeff_0_4;
234 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
235 .OneXFilterCoefficient[3] = (uint8_t)avsTable->tbl1X[i].FilterCoeff_0_5;
236
237 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
238 .OneYFilterCoefficient[0] = (uint8_t)avsTable->tbl1Y[i].FilterCoeff_0_2;
239 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
240 .OneYFilterCoefficient[1] = (uint8_t)avsTable->tbl1Y[i].FilterCoeff_0_3;
241 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
242 .OneYFilterCoefficient[2] = (uint8_t)avsTable->tbl1Y[i].FilterCoeff_0_4;
243 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParam[i]
244 .OneYFilterCoefficient[3] = (uint8_t)avsTable->tbl1Y[i].FilterCoeff_0_5;
245 }
246
247 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteDefaultSharpnessLevel
248 = avsTable->defaultSharpLevel;
249 sampler8x8AvsTable->mhwSamplerAvsTableParam.bBypassXAdaptiveFiltering = avsTable->bypassXAF;
250 sampler8x8AvsTable->mhwSamplerAvsTableParam.bBypassYAdaptiveFiltering = avsTable->bypassYAF;
251
252 if (!avsTable->bypassXAF && !avsTable->bypassYAF)
253 {
254 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteMaxDerivative8Pixels
255 = avsTable->maxDerivative8Pixels;
256 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteMaxDerivative4Pixels
257 = avsTable->maxDerivative4Pixels;
258 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteTransitionArea8Pixels
259 = avsTable->transitionArea8Pixels;
260 sampler8x8AvsTable->mhwSamplerAvsTableParam.byteTransitionArea4Pixels
261 = avsTable->transitionArea4Pixels;
262 }
263
264 for (int i = 0; i < CM_NUM_HW_POLYPHASE_EXTRA_TABLES_G12; i++)
265 {
266 int src = i + CM_NUM_HW_POLYPHASE_TABLES_G12;
267 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
268 .ZeroXFilterCoefficient[0] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_0;
269 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
270 .ZeroXFilterCoefficient[1] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_1;
271
272 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
273 .ZeroXFilterCoefficient[2] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_2;
274 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
275 .ZeroXFilterCoefficient[3] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_3;
276
277 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
278 .ZeroXFilterCoefficient[4] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_4;
279 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
280 .ZeroXFilterCoefficient[5] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_5;
281
282 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
283 .ZeroXFilterCoefficient[6] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_6;
284 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
285 .ZeroXFilterCoefficient[7] = (uint8_t)avsTable->tbl0X[src].FilterCoeff_0_7;
286
287 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
288 .ZeroYFilterCoefficient[0] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_0;
289 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
290 .ZeroYFilterCoefficient[1] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_1;
291
292 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
293 .ZeroYFilterCoefficient[2] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_2;
294 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
295 .ZeroYFilterCoefficient[3] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_3;
296
297 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
298 .ZeroYFilterCoefficient[4] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_4;
299 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
300 .ZeroYFilterCoefficient[5] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_5;
301
302 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
303 .ZeroYFilterCoefficient[6] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_6;
304 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
305 .ZeroYFilterCoefficient[7] = (uint8_t)avsTable->tbl0Y[src].FilterCoeff_0_7;
306
307 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
308 .OneXFilterCoefficient[0] = (uint8_t)avsTable->tbl1X[src].FilterCoeff_0_2;
309 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
310 .OneXFilterCoefficient[1] = (uint8_t)avsTable->tbl1X[src].FilterCoeff_0_3;
311 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
312 .OneXFilterCoefficient[2] = (uint8_t)avsTable->tbl1X[src].FilterCoeff_0_4;
313 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
314 .OneXFilterCoefficient[3] = (uint8_t)avsTable->tbl1X[src].FilterCoeff_0_5;
315
316 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
317 .OneYFilterCoefficient[0] = (uint8_t)avsTable->tbl1Y[src].FilterCoeff_0_2;
318 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
319 .OneYFilterCoefficient[1] = (uint8_t)avsTable->tbl1Y[src].FilterCoeff_0_3;
320 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
321 .OneYFilterCoefficient[2] = (uint8_t)avsTable->tbl1Y[src].FilterCoeff_0_4;
322 sampler8x8AvsTable->mhwSamplerAvsTableParam.paMhwAvsCoeffParamExtra[i]
323 .OneYFilterCoefficient[3] = (uint8_t)avsTable->tbl1Y[src].FilterCoeff_0_5;
324
325 }
326
327 return MOS_STATUS_SUCCESS;
328 }
329
RegisterSampler8x8(PCM_HAL_SAMPLER_8X8_PARAM param)330 MOS_STATUS CM_HAL_G12_X::RegisterSampler8x8(
331 PCM_HAL_SAMPLER_8X8_PARAM param)
332 {
333 PCM_HAL_STATE state = m_cmState;
334 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
335 int16_t samplerIndex = 0;
336 PMHW_SAMPLER_STATE_PARAM samplerEntry = nullptr;
337 PCM_HAL_SAMPLER_8X8_ENTRY sampler8x8Entry = nullptr;
338
339 if (param->sampler8x8State.stateType == CM_SAMPLER8X8_AVS)
340 {
341 for (uint32_t i = 0; i < state->cmDeviceParam.maxSamplerTableSize; i++) {
342 if (!state->samplerTable[i].bInUse) {
343 samplerEntry = &state->samplerTable[i];
344 param->handle = (uint32_t)i << 16;
345 samplerEntry->bInUse = true;
346 break;
347 }
348 }
349
350 for (uint32_t i = 0; i < state->cmDeviceParam.maxSampler8x8TableSize; i++) {
351 if (!state->sampler8x8Table[i].inUse) {
352 sampler8x8Entry = &state->sampler8x8Table[i];
353 samplerIndex = (int16_t)i;
354 param->handle |= (uint32_t)(i & 0xffff);
355 sampler8x8Entry->inUse = true;
356 break;
357 }
358 }
359
360 if (!samplerEntry || !sampler8x8Entry) {
361 eStatus = MOS_STATUS_INVALID_PARAMETER;
362 CM_ASSERTMESSAGE("Sampler or AVS table is full");
363 goto finish;
364 }
365
366 //State data from application
367 samplerEntry->SamplerType = MHW_SAMPLER_TYPE_AVS;
368 samplerEntry->ElementType = MHW_Sampler128Elements;
369 samplerEntry->Avs = param->sampler8x8State.avsParam.avsState;
370 samplerEntry->Avs.stateID = samplerIndex;
371 samplerEntry->Avs.iTable8x8_Index = samplerIndex; // Used for calculating the Media offset of 8x8 table
372 samplerEntry->Avs.pMhwSamplerAvsTableParam = &sampler8x8Entry->sampler8x8State.mhwSamplerAvsTableParam;
373
374 if (samplerEntry->Avs.EightTapAFEnable)
375 param->sampler8x8State.avsParam.avsTable.adaptiveFilterAllChannels = true;
376 else
377 param->sampler8x8State.avsParam.avsTable.adaptiveFilterAllChannels = false;
378
379 CM_CHK_MOSSTATUS_GOTOFINISH(RegisterSampler8x8AVSTable(&sampler8x8Entry->sampler8x8State,
380 ¶m->sampler8x8State.avsParam.avsTable));
381
382 sampler8x8Entry->sampler8x8State.stateType = CM_SAMPLER8X8_AVS;
383 }
384
385 finish:
386 return eStatus;
387 }
388
389 #if (_RELEASE_INTERNAL || _DEBUG)
390 #if defined(CM_DIRECT_GUC_SUPPORT)
SubmitDummyCommands(PMHW_BATCH_BUFFER batchBuffer,int32_t taskId,PCM_HAL_KERNEL_PARAM * kernelParam,void ** cmdBuffer)391 MOS_STATUS CM_HAL_G12_X::SubmitDummyCommands(
392 PMHW_BATCH_BUFFER batchBuffer,
393 int32_t taskId,
394 PCM_HAL_KERNEL_PARAM *kernelParam,
395 void **cmdBuffer)
396 {
397 return MOS_STATUS_UNIMPLEMENTED;
398 }
399 #endif
400 #endif
401
SubmitCommands(PMHW_BATCH_BUFFER batchBuffer,int32_t taskId,PCM_HAL_KERNEL_PARAM * kernelParam,void ** cmdBuffer)402 MOS_STATUS CM_HAL_G12_X::SubmitCommands(
403 PMHW_BATCH_BUFFER batchBuffer,
404 int32_t taskId,
405 PCM_HAL_KERNEL_PARAM *kernelParam,
406 void **cmdBuffer)
407 {
408 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
409 PCM_HAL_STATE state = m_cmState;
410 PRENDERHAL_INTERFACE_LEGACY renderHal = state->renderHal;
411 PMOS_INTERFACE osInterface = renderHal->pOsInterface;
412 MhwRenderInterface *mhwRender = renderHal->pMhwRenderInterface;
413 PMHW_MI_INTERFACE mhwMiInterface = renderHal->pMhwMiInterface;
414 PRENDERHAL_STATE_HEAP stateHeap = renderHal->pStateHeap;
415 MHW_PIPE_CONTROL_PARAMS pipeCtlParams = g_cRenderHal_InitPipeControlParams;
416 MHW_MEDIA_STATE_FLUSH_PARAM flushParam = g_cRenderHal_InitMediaStateFlushParams;
417 MHW_ID_LOAD_PARAMS idLoadParams;
418 int32_t remaining = 0;
419 bool enableWalker = state->walkerParams.CmWalkerEnable;
420 bool enableGpGpu = state->taskParam->blGpGpuWalkerEnabled;
421 CM_TASK_CONFIG *taskConfigEx = (CM_TASK_CONFIG *)&state->taskParam->taskConfig;
422 uint32_t enableFusedEu = taskConfigEx->fusedEuDispatchFlag;
423 PCM_HAL_TASK_PARAM taskParam = state->taskParam;
424 PCM_HAL_BB_ARGS bbCmArgs;
425 MOS_COMMAND_BUFFER mosCmdBuffer;
426 uint32_t syncTag;
427 int64_t *taskSyncLocation;
428 int32_t syncOffset;
429 int32_t tmp;
430 bool sipEnable = renderHal->bSIPKernel ? true: false;
431 bool csrEnable = renderHal->bCSRKernel ? true : false;
432 RENDERHAL_GENERIC_PROLOG_PARAMS_G12 genericPrologParams = {};
433 MOS_RESOURCE *osResource;
434 uint32_t tag;
435 uint32_t tagOffset = 0;
436 MHW_RENDER_ENGINE_L3_CACHE_SETTINGS_G12 cacheSettings = {};
437 XRenderHal_Interface_G12_Base *renderHalG12 = nullptr;
438
439 MOS_CONTEXT *pOsContext = renderHal->pOsInterface->pOsContext;
440 PMHW_MI_MMIOREGISTERS pMmioRegisters = renderHal->pMhwRenderInterface->GetMmioRegisters();
441 CM_HAL_MI_REG_OFFSETS miRegG12 = { REG_TIMESTAMP_BASE_G12, REG_GPR_BASE_G12 };
442
443 MOS_ZeroMemory(&mosCmdBuffer, sizeof(MOS_COMMAND_BUFFER));
444
445 // get the tag
446 tag = renderHal->trackerProducer.GetNextTracker(renderHal->currentTrackerIndex);
447
448 // Get the task sync offset
449 syncOffset = state->pfnGetTaskSyncLocation(state, taskId);
450
451 // Initialize the location
452 taskSyncLocation = (int64_t*)(state->renderTimeStampResource.data + syncOffset);
453 *taskSyncLocation = CM_INVALID_INDEX;
454 *(taskSyncLocation + 1) = CM_INVALID_INDEX;
455 if (state->cbbEnabled)
456 {
457 *(taskSyncLocation + 2) = tag;
458 *(taskSyncLocation + 3) = state->renderHal->currentTrackerIndex;
459 }
460
461 // Register batch buffer for rendering
462 if (!enableWalker && !enableGpGpu)
463 {
464 CM_CHK_MOSSTATUS_GOTOFINISH(osInterface->pfnRegisterResource(
465 osInterface,
466 &batchBuffer->OsResource,
467 true,
468 true));
469 }
470
471 // Register Timestamp Buffer
472 CM_CHK_MOSSTATUS_GOTOFINISH(osInterface->pfnRegisterResource(
473 osInterface,
474 &state->renderTimeStampResource.osResource,
475 true,
476 true));
477
478 // Allocate all available space, unused buffer will be returned later
479 CM_CHK_HRESULT_GOTOFINISH_MOSERROR(osInterface->pfnGetCommandBuffer(osInterface, &mosCmdBuffer, 0));
480 remaining = mosCmdBuffer.iRemaining;
481
482 // Update power option of this command;
483 CM_CHK_MOSSTATUS_GOTOFINISH(state->pfnUpdatePowerOption(state, &state->powerOption));
484
485 // use frame tracking to write the tracker ID to CM tracker resource
486 renderHal->trackerProducer.GetLatestTrackerResource(renderHal->currentTrackerIndex,
487 &osResource, &tagOffset);
488 renderHal->pfnSetupPrologParams(renderHal, &genericPrologParams, osResource, tagOffset, tag);
489 if (state->taskParam->mosVeHintParams != nullptr)
490 {
491 MOS_SecureMemcpy(&genericPrologParams.VEngineHintParams, sizeof(MOS_VIRTUALENGINE_HINT_PARAMS),
492 state->taskParam->mosVeHintParams, sizeof(MOS_VIRTUALENGINE_HINT_PARAMS));
493 }
494 FrameTrackerTokenFlat_SetProducer(&stateHeap->pCurMediaState->trackerToken,
495 &renderHal->trackerProducer);
496 FrameTrackerTokenFlat_Merge(&stateHeap->pCurMediaState->trackerToken,
497 renderHal->currentTrackerIndex, tag);
498
499 // Record registers by unified media profiler in the beginning
500 if (state->perfProfiler != nullptr)
501 {
502 CM_CHK_MOSSTATUS_GOTOFINISH(state->perfProfiler->AddPerfCollectStartCmd(
503 (void *)state,
504 state->osInterface,
505 mhwMiInterface,
506 &mosCmdBuffer));
507 }
508
509 //Send the First PipeControl Command to indicate the beginning of execution
510 pipeCtlParams = g_cRenderHal_InitPipeControlParams;
511 pipeCtlParams.presDest = &state->renderTimeStampResource.osResource;
512 pipeCtlParams.dwResourceOffset = syncOffset;
513 pipeCtlParams.dwPostSyncOp = MHW_FLUSH_WRITE_TIMESTAMP_REG;
514 pipeCtlParams.dwFlushMode = MHW_FLUSH_WRITE_CACHE;
515 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddPipeControl(&mosCmdBuffer,
516 nullptr,
517 &pipeCtlParams));
518
519 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnInitCommandBuffer(renderHal,
520 &mosCmdBuffer,
521 (PRENDERHAL_GENERIC_PROLOG_PARAMS)&genericPrologParams));
522
523 HalOcaInterface::On1stLevelBBStart(mosCmdBuffer, *pOsContext,
524 osInterface->CurrentGpuContextHandle,
525 *renderHal->pMhwMiInterface,
526 *pMmioRegisters);
527
528 // update tracker tag used with CM tracker resource
529 renderHal->trackerProducer.StepForward(renderHal->currentTrackerIndex);
530
531 // Increment sync tag
532 syncTag = stateHeap->dwNextTag++;
533
534 //enable TGL L3 config
535 if (state->l3Settings.overrideSettings != 0)
536 {
537 cacheSettings.dwTcCntlReg = state->l3Settings.tcCntlReg;
538 cacheSettings.dwAllocReg = state->l3Settings.allocReg;
539 }
540 else
541 {
542 cacheSettings.dwAllocReg = m_l3Plane[0].config_register0;
543 cacheSettings.dwTcCntlReg = m_l3Plane[0].config_register1;
544 }
545 mhwRender->EnableL3Caching(&cacheSettings);
546 mhwRender->SetL3Cache(&mosCmdBuffer);
547
548 if (sipEnable)
549 {
550 CM_CHK_MOSSTATUS_GOTOFINISH(SetupHwDebugControl(renderHal, &mosCmdBuffer));
551 }
552 // add granularity control for preemption for TGL
553 // Supporting Preemption granularity control reg for 3D and GPGPU mode
554 // for per ctx and with non-privileged access
555 if (MEDIA_IS_SKU(state->skuTable, FtrPerCtxtPreemptionGranularityControl))
556 {
557 MHW_MI_LOAD_REGISTER_IMM_PARAMS loadRegImm;
558 MOS_ZeroMemory(&loadRegImm, sizeof(MHW_MI_LOAD_REGISTER_IMM_PARAMS));
559
560 loadRegImm.dwRegister = MHW_RENDER_ENGINE_PREEMPTION_CONTROL_OFFSET;
561
562 // Same reg offset and value for gpgpu pipe and media pipe
563 if (enableGpGpu)
564 {
565 if (MEDIA_IS_SKU(state->skuTable, FtrGpGpuMidThreadLevelPreempt))
566 {
567 if (csrEnable)
568 loadRegImm.dwData = MHW_RENDER_ENGINE_MID_THREAD_PREEMPT_VALUE;
569 else
570 loadRegImm.dwData = MHW_RENDER_ENGINE_THREAD_GROUP_PREEMPT_VALUE;
571 }
572 else if (MEDIA_IS_SKU(state->skuTable, FtrGpGpuThreadGroupLevelPreempt))
573 {
574 loadRegImm.dwData = MHW_RENDER_ENGINE_THREAD_GROUP_PREEMPT_VALUE;
575 state->renderHal->pfnEnableGpgpuMiddleBatchBufferPreemption(state->renderHal);
576 }
577 else if (MEDIA_IS_SKU(state->skuTable, FtrGpGpuMidBatchPreempt))
578 {
579 loadRegImm.dwData = MHW_RENDER_ENGINE_MID_BATCH_PREEMPT_VALUE;
580 state->renderHal->pfnEnableGpgpuMiddleBatchBufferPreemption(state->renderHal);
581 }
582 else
583 {
584 // if hit this branch then platform does not support any media
585 //preemption in render engine. Still program the register to avoid GPU hang
586 loadRegImm.dwData = MHW_RENDER_ENGINE_MID_BATCH_PREEMPT_VALUE;
587 }
588 }
589 else
590 {
591 if (MEDIA_IS_SKU(state->skuTable, FtrMediaMidThreadLevelPreempt))
592 {
593 loadRegImm.dwData = MHW_RENDER_ENGINE_MID_THREAD_PREEMPT_VALUE;
594 }
595 else if (MEDIA_IS_SKU(state->skuTable, FtrMediaThreadGroupLevelPreempt))
596 {
597 loadRegImm.dwData = MHW_RENDER_ENGINE_THREAD_GROUP_PREEMPT_VALUE;
598 }
599 else if (MEDIA_IS_SKU(state->skuTable, FtrMediaMidBatchPreempt))
600 {
601 loadRegImm.dwData = MHW_RENDER_ENGINE_MID_BATCH_PREEMPT_VALUE;
602 }
603 else
604 {
605 // if hit this branch then platform does not support any media
606 // preemption in render engine. Still program the register to avoid GPU hang
607 loadRegImm.dwData = MHW_RENDER_ENGINE_MID_BATCH_PREEMPT_VALUE;
608 }
609 }
610 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddMiLoadRegisterImmCmd(&mosCmdBuffer, &loadRegImm));
611 }
612
613 // Send Pipeline Select command
614 CM_CHK_MOSSTATUS_GOTOFINISH(mhwRender->AddPipelineSelectCmd(&mosCmdBuffer, enableGpGpu));
615 //update MOCS for Instruction Cache
616 renderHal->StateBaseAddressParams.mocs4InstructionCache =
617 renderHal->pOsInterface->pfnCachePolicyGetMemoryObject(MOS_CM_RESOURCE_USAGE_StateHeap,
618 renderHal->pOsInterface->pfnGetGmmClientContext(renderHal->pOsInterface)).DwordValue;
619 //update MOCS for General state
620 renderHal->StateBaseAddressParams.mocs4GeneralState =
621 renderHal->pOsInterface->pfnCachePolicyGetMemoryObject(MOS_CM_RESOURCE_USAGE_StateHeap,
622 renderHal->pOsInterface->pfnGetGmmClientContext(renderHal->pOsInterface)).DwordValue;
623 //update MOCS for Dynamic state
624 renderHal->StateBaseAddressParams.mocs4DynamicState =
625 renderHal->pOsInterface->pfnCachePolicyGetMemoryObject(MOS_CM_RESOURCE_USAGE_StateHeap,
626 renderHal->pOsInterface->pfnGetGmmClientContext(renderHal->pOsInterface)).DwordValue;
627 //update MOCS for Surface state
628 renderHal->StateBaseAddressParams.mocs4SurfaceState =
629 renderHal->pOsInterface->pfnCachePolicyGetMemoryObject(MOS_CM_RESOURCE_USAGE_StateHeap,
630 renderHal->pOsInterface->pfnGetGmmClientContext(renderHal->pOsInterface)).DwordValue;
631 //update MOCS for Indirect Object
632 renderHal->StateBaseAddressParams.mocs4IndirectObjectBuffer =
633 renderHal->pOsInterface->pfnCachePolicyGetMemoryObject(MOS_CM_RESOURCE_USAGE_StateHeap,
634 renderHal->pOsInterface->pfnGetGmmClientContext(renderHal->pOsInterface)).DwordValue;
635 //update MOCS for Stateless Dataport access
636 renderHal->StateBaseAddressParams.mocs4StatelessDataport =
637 renderHal->pOsInterface->pfnCachePolicyGetMemoryObject(MOS_CM_RESOURCE_USAGE_StateHeap,
638 renderHal->pOsInterface->pfnGetGmmClientContext(renderHal->pOsInterface)).DwordValue;
639
640 // Send State Base Address command
641 CM_CHK_MOSSTATUS_GOTOFINISH( renderHal->pfnSendStateBaseAddress( renderHal, &mosCmdBuffer ) );
642
643 if (enableGpGpu)
644 {
645 if (csrEnable)
646 {
647 // Send CS_STALL pipe control
648 //Insert a pipe control as synchronization
649 pipeCtlParams = g_cRenderHal_InitPipeControlParams;
650 pipeCtlParams.presDest = &state->renderTimeStampResource.osResource;
651 pipeCtlParams.dwPostSyncOp = MHW_FLUSH_NOWRITE;
652 pipeCtlParams.dwFlushMode = MHW_FLUSH_WRITE_CACHE;
653 pipeCtlParams.bDisableCSStall = 0;
654 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddPipeControl(&mosCmdBuffer,
655 nullptr, &pipeCtlParams));
656 }
657
658 if (sipEnable || csrEnable)
659 {
660 // Send SIP State
661 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnSendSipStateCmd(renderHal, &mosCmdBuffer));
662
663 CM_CHK_HRESULT_GOTOFINISH_MOSERROR(osInterface->pfnRegisterResource(
664 osInterface,
665 &state->csrResource,
666 true,
667 true));
668
669 // Send csr base addr command
670 CM_CHK_MOSSTATUS_GOTOFINISH(mhwRender->AddGpgpuCsrBaseAddrCmd(&mosCmdBuffer,
671 &state->csrResource));
672 }
673 }
674 // Setup VFE State params. Each Renderer MUST call pfnSetVfeStateParams().
675 // See comment in VpHal_HwSetVfeStateParams() for details.
676 tmp = RENDERHAL_USE_MEDIA_THREADS_MAX;
677 if (state->maxHWThreadValues.userFeatureValue != 0)
678 {
679 if (state->maxHWThreadValues.userFeatureValue < renderHal->pHwCaps->dwMaxThreads)
680 {
681 tmp = state->maxHWThreadValues.userFeatureValue;
682 }
683 }
684 else if (state->maxHWThreadValues.apiValue != 0)
685 {
686 if (state->maxHWThreadValues.apiValue < renderHal->pHwCaps->dwMaxThreads)
687 {
688 tmp = state->maxHWThreadValues.apiValue;
689 }
690 }
691
692 renderHalG12 =
693 static_cast<XRenderHal_Interface_G12_Base *>(renderHal->pRenderHalPltInterface);
694
695 CM_CHK_NULL_GOTOFINISH_MOSERROR(renderHalG12);
696
697 renderHalG12->SetFusedEUDispatch(enableFusedEu == CM_FUSED_EU_ENABLE);
698
699 renderHal->pfnSetVfeStateParams(
700 renderHal,
701 MEDIASTATE_DEBUG_COUNTER_FREE_RUNNING,
702 tmp,
703 state->taskParam->vfeCurbeSize,
704 state->taskParam->urbEntrySize,
705 nullptr);
706
707 // Send VFE State
708 CM_CHK_MOSSTATUS_GOTOFINISH(mhwRender->AddMediaVfeCmd(&mosCmdBuffer,
709 renderHal->pRenderHalPltInterface->GetVfeStateParameters()));
710
711 // reset the fusedEuDispath flag
712 renderHalG12->SetFusedEUDispatch(false);
713
714 // Send CURBE Load
715 if (state->taskParam->vfeCurbeSize > 0)
716 {
717 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnSendCurbeLoad(renderHal, &mosCmdBuffer));
718 }
719
720 // Send Interface Descriptor Load
721 if (state->dshEnabled)
722 {
723 PRENDERHAL_DYNAMIC_STATE dynamicState = ((PRENDERHAL_MEDIA_STATE_LEGACY)stateHeap->pCurMediaState)->pDynamicState;
724 idLoadParams.dwInterfaceDescriptorStartOffset = dynamicState->memoryBlock.GetOffset() +
725 dynamicState->MediaID.dwOffset;
726 idLoadParams.dwInterfaceDescriptorLength = dynamicState->MediaID.iCount * stateHeap->dwSizeMediaID;
727 }
728 else
729 {
730 idLoadParams.dwInterfaceDescriptorStartOffset = stateHeap->pCurMediaState->dwOffset
731 + stateHeap->dwOffsetMediaID;
732 idLoadParams.dwInterfaceDescriptorLength = renderHal->StateHeapSettings.iMediaIDs
733 * stateHeap->dwSizeMediaID;
734 }
735
736 idLoadParams.pKernelState = nullptr;
737 CM_CHK_MOSSTATUS_GOTOFINISH(mhwRender->AddMediaIDLoadCmd(&mosCmdBuffer, &idLoadParams));
738 HalOcaInterface::OnDispatch(mosCmdBuffer, *renderHal->pOsInterface, *renderHal->pMhwMiInterface, *pMmioRegisters);
739 if (enableWalker)
740 {
741 // send media walker command, if required
742
743 for (uint32_t i = 0; i < state->taskParam->numKernels; i++)
744 {
745 // Insert CONDITIONAL_BATCH_BUFFER_END
746 if (taskParam->conditionalEndBitmap & ((uint64_t)1 << (i)))
747 {
748 // this could be batch buffer end so need to update sync tag, media state flush, write end timestamp
749
750 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnSendSyncTag(renderHal, &mosCmdBuffer));
751
752 // conditionally write timestamp
753 CM_CHK_MOSSTATUS_GOTOFINISH(HalCm_OsAddArtifactConditionalPipeControl(
754 &miRegG12,
755 state,
756 &mosCmdBuffer,
757 syncOffset,
758 &taskParam->conditionalBBEndParams[i],
759 tag));
760
761 // Insert conditional batch buffer end
762 mhwMiInterface->AddMiConditionalBatchBufferEndCmd(&mosCmdBuffer,
763 &taskParam->conditionalBBEndParams[i]);
764 }
765
766 //Insert PIPE_CONTROL at two cases:
767 // 1. synchronization is set
768 // 2. the next kernel has dependency pattern
769 if ((i > 0) && ((taskParam->syncBitmap & ((uint64_t)1 << (i - 1))) ||
770 (kernelParam[i]->kernelThreadSpaceParam.patternType != CM_NONE_DEPENDENCY)))
771 {
772 //Insert a pipe control as synchronization
773 pipeCtlParams = g_cRenderHal_InitPipeControlParams;
774 pipeCtlParams.presDest = &state->renderTimeStampResource.osResource;
775 pipeCtlParams.dwPostSyncOp = MHW_FLUSH_NOWRITE;
776 pipeCtlParams.dwFlushMode = MHW_FLUSH_CUSTOM;
777 if (taskParam->taskConfig.enableFenceFlag)
778 {
779 pipeCtlParams.bFlushRenderTargetCache = false;
780 pipeCtlParams.bKernelFenceEnabled = true;
781 }
782 else
783 {
784 pipeCtlParams.bInvalidateTextureCache = true;
785 pipeCtlParams.bFlushRenderTargetCache = true;
786 }
787
788 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddPipeControl(&mosCmdBuffer,
789 nullptr,
790 &pipeCtlParams));
791 }
792
793 // send media walker command, if required
794 CM_CHK_MOSSTATUS_GOTOFINISH(state->pfnSendMediaWalkerState(state,
795 kernelParam[i], &mosCmdBuffer));
796 }
797 }
798 else if (enableGpGpu)
799 {
800 // send GPGPU walker command, if required
801 CM_KERNEL_EXEC_MODE curKrnExecMode = CM_KERNEL_EXECUTION_MODE_MONOPOLIZED;
802
803 for (uint32_t i = 0; i < state->taskParam->numKernels; i++)
804 {
805 // Insert CONDITIONAL_BATCH_BUFFER_END
806 if (taskParam->conditionalEndBitmap & ((uint64_t)1 << (i)))
807 {
808 // this could be batch buffer end so need to update sync tag, media state flush, write end timestamp
809
810 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnSendSyncTag(renderHal,
811 &mosCmdBuffer));
812
813 // conditionally write timestamp
814 CM_CHK_MOSSTATUS_GOTOFINISH(HalCm_OsAddArtifactConditionalPipeControl(
815 &miRegG12,
816 state,
817 &mosCmdBuffer,
818 syncOffset,
819 &taskParam->conditionalBBEndParams[i],
820 tag));
821
822 // Insert conditional batch buffer end
823 mhwMiInterface->AddMiConditionalBatchBufferEndCmd(&mosCmdBuffer,
824 &taskParam->conditionalBBEndParams[i]);
825 }
826
827 MHW_GPGPU_WALKER_PARAMS gpGpuWalkerParams;
828 MOS_ZeroMemory(&gpGpuWalkerParams, sizeof(MHW_GPGPU_WALKER_PARAMS));
829
830 gpGpuWalkerParams.InterfaceDescriptorOffset = kernelParam[i]->gpgpuWalkerParams.interfaceDescriptorOffset;
831 gpGpuWalkerParams.GpGpuEnable = kernelParam[i]->gpgpuWalkerParams.gpgpuEnabled;
832 gpGpuWalkerParams.GroupWidth = kernelParam[i]->gpgpuWalkerParams.groupWidth;
833 gpGpuWalkerParams.GroupHeight = kernelParam[i]->gpgpuWalkerParams.groupHeight;
834 gpGpuWalkerParams.GroupDepth = kernelParam[i]->gpgpuWalkerParams.groupDepth;
835 gpGpuWalkerParams.ThreadWidth = kernelParam[i]->gpgpuWalkerParams.threadWidth;
836 gpGpuWalkerParams.ThreadHeight = kernelParam[i]->gpgpuWalkerParams.threadHeight;
837 gpGpuWalkerParams.ThreadDepth = kernelParam[i]->gpgpuWalkerParams.threadDepth;
838 gpGpuWalkerParams.SLMSize = kernelParam[i]->slmSize;
839
840 //Insert PIPE_CONTROL at two cases:
841 // 1. synchronization is set
842 // 2. the next kernel has dependency pattern
843 if ((i > 0) && ((taskParam->syncBitmap & ((uint64_t)1 << (i - 1))) ||
844 (kernelParam[i]->kernelThreadSpaceParam.patternType != CM_NONE_DEPENDENCY)))
845 {
846 //Insert a pipe control as synchronization
847 pipeCtlParams = g_cRenderHal_InitPipeControlParams;
848 pipeCtlParams.presDest = &state->renderTimeStampResource.osResource;
849 pipeCtlParams.dwPostSyncOp = MHW_FLUSH_NOWRITE;
850 pipeCtlParams.dwFlushMode = MHW_FLUSH_CUSTOM;
851 pipeCtlParams.bInvalidateTextureCache = true;
852 pipeCtlParams.bFlushRenderTargetCache = true;
853 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddPipeControl(&mosCmdBuffer,
854 nullptr, &pipeCtlParams));
855 }
856
857 // send GPGPU/compute walker command, if required
858 MOS_SecureMemcpy(&state->walkerParams, sizeof(MHW_WALKER_PARAMS),
859 &kernelParam[i]->walkerParams, sizeof(CM_HAL_WALKER_PARAMS));
860 CM_CHK_MOSSTATUS_GOTOFINISH(mhwRender->AddGpGpuWalkerStateCmd(&mosCmdBuffer, &gpGpuWalkerParams));
861 }
862 }
863 else
864 {
865 // Send Start batch buffer command
866 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddMiBatchBufferStartCmd(
867 &mosCmdBuffer,
868 batchBuffer));
869
870 CM_CHK_NULL_GOTOFINISH_MOSERROR(batchBuffer->pPrivateData);
871 bbCmArgs = (PCM_HAL_BB_ARGS)batchBuffer->pPrivateData;
872
873 if ((bbCmArgs->refCount == 1) ||
874 (state->taskParam->reuseBBUpdateMask == 1))
875 {
876 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddMiBatchBufferEnd(nullptr, batchBuffer));
877 }
878 else
879 {
880 // Skip BB end command
881 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->SkipMiBatchBufferEndBb(batchBuffer));
882 }
883
884 // UnLock the batch buffer
885 if ((bbCmArgs->refCount == 1) ||
886 (state->taskParam->reuseBBUpdateMask == 1))
887 {
888 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnUnlockBB(renderHal, batchBuffer));
889 }
890 }
891
892 // Send Surface States
893 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnSendSurfaces(renderHal,
894 &mosCmdBuffer));
895
896 // issue a PIPE_CONTROL to flush all caches and the stall the CS before
897 // issuing a PIPE_CONTROL to write the timestamp
898 pipeCtlParams = g_cRenderHal_InitPipeControlParams;
899 pipeCtlParams.presDest = &state->renderTimeStampResource.osResource;
900 pipeCtlParams.dwPostSyncOp = MHW_FLUSH_NOWRITE;
901 pipeCtlParams.dwFlushMode = MHW_FLUSH_WRITE_CACHE;
902 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddPipeControl(&mosCmdBuffer, nullptr, &pipeCtlParams));
903
904 if (state->svmBufferUsed || state->statelessBufferUsed)
905 {
906 // Find the SVM slot, patch it into this dummy pipe_control
907 for (uint32_t i = 0; i < state->cmDeviceParam.maxBufferTableSize; i++)
908 {
909 //register resource here
910 if (state->bufferTable[i].address)
911 {
912 CM_CHK_HRESULT_GOTOFINISH_MOSERROR(osInterface->pfnRegisterResource(
913 osInterface,
914 &state->bufferTable[i].osResource,
915 true,
916 false));
917 }
918
919 // sync resource
920 MOS_SURFACE mosSurface;
921 MOS_ZeroMemory(&mosSurface, sizeof(mosSurface));
922 CM_CHK_HRESULT_GOTOFINISH_MOSERROR(osInterface->pfnGetResourceInfo(
923 osInterface,
924 &state->bufferTable[i].osResource,
925 &mosSurface));
926 mosSurface.OsResource = state->bufferTable[i].osResource;
927
928 CM_CHK_HRESULT_GOTOFINISH_MOSERROR(state->pfnSurfaceSync(state, &mosSurface, false));
929 }
930 }
931
932 // Send Sync Tag
933 if (!state->dshEnabled || !(enableWalker || enableGpGpu))
934 {
935 CM_CHK_MOSSTATUS_GOTOFINISH(renderHal->pfnSendSyncTag(renderHal, &mosCmdBuffer));
936 }
937
938 // Update tracker resource
939 CM_CHK_MOSSTATUS_GOTOFINISH(state->pfnUpdateTrackerResource(state, &mosCmdBuffer, tag));
940
941 // issue a PIPE_CONTROL to write timestamp
942 syncOffset += sizeof(uint64_t);
943 pipeCtlParams = g_cRenderHal_InitPipeControlParams;
944 pipeCtlParams.presDest = &state->renderTimeStampResource.osResource;
945 pipeCtlParams.dwResourceOffset = syncOffset;
946 pipeCtlParams.dwPostSyncOp = MHW_FLUSH_WRITE_TIMESTAMP_REG;
947 pipeCtlParams.dwFlushMode = MHW_FLUSH_READ_CACHE;
948 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddPipeControl(&mosCmdBuffer, nullptr, &pipeCtlParams));
949
950 // Record registers by unified media profiler in the end
951 if (state->perfProfiler != nullptr)
952 {
953 CM_CHK_MOSSTATUS_GOTOFINISH(state->perfProfiler->AddPerfCollectEndCmd(
954 ( void *)state,
955 state->osInterface,
956 mhwMiInterface,
957 &mosCmdBuffer));
958 }
959
960 // Add PipeControl to invalidate ISP and MediaState to avoid PageFault issue
961 MHW_PIPE_CONTROL_PARAMS pipeControlParams;
962
963 MOS_ZeroMemory(&pipeControlParams, sizeof(pipeControlParams));
964 pipeControlParams.dwFlushMode = MHW_FLUSH_WRITE_CACHE;
965 pipeControlParams.bGenericMediaStateClear = true;
966 pipeControlParams.bIndirectStatePointersDisable = true;
967 pipeControlParams.bDisableCSStall = false;
968 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddPipeControl(&mosCmdBuffer,
969 nullptr,
970 &pipeControlParams));
971
972 HalOcaInterface::On1stLevelBBEnd(mosCmdBuffer, *osInterface);
973 //Couple to the BB_START
974 CM_CHK_MOSSTATUS_GOTOFINISH(mhwMiInterface->AddMiBatchBufferEnd(&mosCmdBuffer, nullptr));
975
976 // Return unused command buffer space to OS
977 osInterface->pfnReturnCommandBuffer(osInterface, &mosCmdBuffer, 0);
978
979 #if MDF_COMMAND_BUFFER_DUMP
980 if (state->dumpCommandBuffer)
981 {
982 state->pfnDumpCommadBuffer(
983 state,
984 &mosCmdBuffer,
985 offsetof(PACKET_SURFACE_STATE, cmdSurfaceState),
986 mhw_state_heap_g12_X::RENDER_SURFACE_STATE_CMD::byteSize);
987 }
988 #endif
989
990
991 #if MDF_SURFACE_STATE_DUMP
992 if (state->dumpSurfaceState)
993 {
994 state->pfnDumpSurfaceState(
995 state,
996 offsetof(PACKET_SURFACE_STATE, cmdSurfaceState),
997 mhw_state_heap_g12_X::RENDER_SURFACE_STATE_CMD::byteSize);
998 }
999 #endif
1000
1001 CM_CHK_MOSSTATUS_GOTOFINISH( state->pfnGetGlobalTime( &state->taskTimeStamp->submitTimeInCpu[ taskId ] ) );
1002 CM_CHK_MOSSTATUS_GOTOFINISH( state->pfnGetGpuTime( state, &state->taskTimeStamp->submitTimeInGpu[ taskId ] ) );
1003
1004 // Submit command buffer
1005 CM_CHK_HRESULT_GOTOFINISH_MOSERROR(osInterface->pfnSubmitCommandBuffer(osInterface,
1006 &mosCmdBuffer,
1007 state->nullHwRenderCm));
1008
1009 if (state->nullHwRenderCm == false)
1010 {
1011 stateHeap->pCurMediaState->bBusy = true;
1012 if (!enableWalker && !enableGpGpu)
1013 {
1014 batchBuffer->bBusy = true;
1015 batchBuffer->dwSyncTag = syncTag;
1016 }
1017 }
1018
1019 // reset API call number of HW threads
1020 state->maxHWThreadValues.apiValue = 0;
1021
1022 state->pfnReferenceCommandBuffer( &mosCmdBuffer.OsResource, cmdBuffer );
1023
1024 eStatus = MOS_STATUS_SUCCESS;
1025
1026 finish:
1027 // Failed -> discard all changes in Command Buffer
1028 if (eStatus != MOS_STATUS_SUCCESS)
1029 {
1030 // Buffer overflow - display overflow size
1031 if (mosCmdBuffer.iRemaining < 0)
1032 {
1033 CM_ASSERTMESSAGE("Command Buffer overflow by %d bytes.", -mosCmdBuffer.iRemaining);
1034 }
1035
1036 // Move command buffer back to beginning
1037 tmp = remaining - mosCmdBuffer.iRemaining;
1038 mosCmdBuffer.iRemaining = remaining;
1039 mosCmdBuffer.iOffset -= tmp;
1040 mosCmdBuffer.pCmdPtr = mosCmdBuffer.pCmdBase + mosCmdBuffer.iOffset / sizeof(uint32_t);
1041
1042 // Return unused command buffer space to OS
1043 osInterface->pfnReturnCommandBuffer(osInterface, &mosCmdBuffer, 0);
1044 }
1045
1046 return eStatus;
1047 }
1048
GetMediaWalkerMaxThreadWidth()1049 uint32_t CM_HAL_G12_X::GetMediaWalkerMaxThreadWidth()
1050 {
1051 return CM_MAX_THREADSPACE_WIDTH_SKLUP_FOR_MW;
1052 }
1053
GetMediaWalkerMaxThreadHeight()1054 uint32_t CM_HAL_G12_X::GetMediaWalkerMaxThreadHeight()
1055 {
1056 return CM_MAX_THREADSPACE_HEIGHT_SKLUP_FOR_MW;
1057 }
1058
GetHwSurfaceBTIInfo(PCM_SURFACE_BTI_INFO btiInfo)1059 MOS_STATUS CM_HAL_G12_X::GetHwSurfaceBTIInfo(
1060 PCM_SURFACE_BTI_INFO btiInfo)
1061 {
1062
1063 if (btiInfo == nullptr)
1064 {
1065 return MOS_STATUS_NULL_POINTER;
1066 }
1067
1068 btiInfo->normalSurfaceStart = CM_GLOBAL_SURFACE_INDEX_START_GEN9_PLUS + \
1069 CM_GLOBAL_SURFACE_NUMBER + CM_GTPIN_SURFACE_NUMBER;
1070 btiInfo->normalSurfaceEnd = GT_RESERVED_INDEX_START_GEN9_PLUS - 1;
1071 btiInfo->reservedSurfaceStart = CM_GLOBAL_SURFACE_INDEX_START_GEN9_PLUS;
1072 btiInfo->reservedSurfaceEnd = CM_GLOBAL_SURFACE_NUMBER + CM_GTPIN_SURFACE_NUMBER;
1073
1074 return MOS_STATUS_SUCCESS;
1075 }
1076
UpdatePlatformInfoFromPower(PCM_PLATFORM_INFO platformInfo,bool euSaturated)1077 MOS_STATUS CM_HAL_G12_X::UpdatePlatformInfoFromPower(
1078 PCM_PLATFORM_INFO platformInfo,
1079 bool euSaturated)
1080 {
1081 UNUSED( platformInfo );
1082 UNUSED( euSaturated );
1083 // needs to be implemented
1084 return MOS_STATUS_SUCCESS;
1085 }
1086
SetupHwDebugControl(PRENDERHAL_INTERFACE renderHal,PMOS_COMMAND_BUFFER cmdBuffer)1087 MOS_STATUS CM_HAL_G12_X::SetupHwDebugControl(
1088 PRENDERHAL_INTERFACE renderHal,
1089 PMOS_COMMAND_BUFFER cmdBuffer)
1090 {
1091 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1092 MHW_MI_LOAD_REGISTER_IMM_PARAMS loadRegImm;
1093
1094 //---------------------------------------
1095 CM_CHK_NULL_RETURN_MOSERROR( renderHal );
1096 CM_CHK_NULL_RETURN_MOSERROR( renderHal->pMhwMiInterface );
1097 CM_CHK_NULL_RETURN_MOSERROR( cmdBuffer );
1098 //---------------------------------------
1099
1100 MOS_ZeroMemory( &loadRegImm, sizeof( MHW_MI_LOAD_REGISTER_IMM_PARAMS ) );
1101
1102 // CS_DEBUG_MODE2, global debug enable
1103 loadRegImm.dwRegister = CS_DEBUG_MODE2;
1104 loadRegImm.dwData = ( CS_DEBUG_MODE2_GLOBAL_DEBUG << 16 ) | CS_DEBUG_MODE2_GLOBAL_DEBUG;
1105 CM_CHK_MOSSTATUS_RETURN( renderHal->pMhwMiInterface->AddMiLoadRegisterImmCmd( cmdBuffer, &loadRegImm ) );
1106
1107 // TD_CTL, force thread breakpoint enable
1108 // Also enable external exception, because the source-level debugger has to
1109 // be able to interrupt runing EU threads.
1110 loadRegImm.dwRegister = TD_CTL;
1111 loadRegImm.dwData = TD_CTL_FORCE_THREAD_BKPT_ENABLE | TD_CTL_FORCE_EXT_EXCEPTION_ENABLE;
1112 CM_CHK_MOSSTATUS_RETURN( renderHal->pMhwMiInterface->AddMiLoadRegisterImmCmd( cmdBuffer, &loadRegImm ) );
1113
1114 return eStatus;
1115 }
1116
SetSuggestedL3Conf(L3_SUGGEST_CONFIG l3Config)1117 MOS_STATUS CM_HAL_G12_X::SetSuggestedL3Conf(L3_SUGGEST_CONFIG l3Config)
1118 {
1119 if (static_cast<size_t>(l3Config) >= m_l3ConfigCount)
1120 {
1121 return MOS_STATUS_INVALID_PARAMETER;
1122 }
1123 return SetL3CacheConfig(m_l3Plane + l3Config, &m_cmState->l3Settings);
1124 }
1125
AllocateSIPCSRResource()1126 MOS_STATUS CM_HAL_G12_X::AllocateSIPCSRResource()
1127 {
1128 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1129 if (Mos_ResourceIsNull(&m_cmState->sipResource.osResource))
1130 {
1131 // create sip resource if it does not exist
1132 CM_CHK_MOSSTATUS_RETURN(HalCm_AllocateSipResource(m_cmState));
1133 CM_CHK_MOSSTATUS_RETURN(HalCm_AllocateCSRResource(m_cmState));
1134 }
1135 return eStatus;
1136 }
1137
GetGenStepInfo(char * & stepinfostr)1138 MOS_STATUS CM_HAL_G12_X::GetGenStepInfo(char*& stepinfostr)
1139 {
1140 const char *cmSteppingInfoTGL[] = { "A0" };
1141
1142 uint32_t genStepId = m_cmState->platform.usRevId;
1143
1144 uint32_t tablesize = sizeof(cmSteppingInfoTGL) / sizeof(char *);
1145
1146 if (genStepId < tablesize)
1147 {
1148 stepinfostr = (char *)cmSteppingInfoTGL[genStepId];
1149 }
1150 else
1151 {
1152 stepinfostr = nullptr;
1153 }
1154
1155 return MOS_STATUS_SUCCESS;
1156 }
1157
ColorCountSanityCheck(uint32_t colorCount)1158 int32_t CM_HAL_G12_X::ColorCountSanityCheck(uint32_t colorCount)
1159 {
1160 if (colorCount == CM_INVALID_COLOR_COUNT || colorCount > CM_THREADSPACE_MAX_COLOR_COUNT_GEN12)
1161 {
1162 CM_ASSERTMESSAGE("Error: Invalid color count.");
1163 return CM_INVALID_ARG_VALUE;
1164 }
1165 return CM_SUCCESS;
1166 }
1167
MemoryObjectCtrlPolicyCheck(uint32_t memCtrl)1168 bool CM_HAL_G12_X::MemoryObjectCtrlPolicyCheck(uint32_t memCtrl)
1169 {
1170 if (memCtrl >= MEMORY_OBJECT_CONTROL_TOTAL)
1171 {
1172 return false;
1173 }
1174 return true;
1175 }
1176
GetConvSamplerIndex(PMHW_SAMPLER_STATE_PARAM samplerParam,char * samplerIndexTable,int32_t nSamp8X8Num,int32_t nSampConvNum)1177 int32_t CM_HAL_G12_X::GetConvSamplerIndex(
1178 PMHW_SAMPLER_STATE_PARAM samplerParam,
1179 char *samplerIndexTable,
1180 int32_t nSamp8X8Num,
1181 int32_t nSampConvNum)
1182 {
1183 int32_t samplerIndex = 0;
1184
1185 if ((samplerParam->Convolve.ui8ConvolveType == CM_CONVOLVE_SKL_TYPE_2D) &&
1186 (samplerParam->Convolve.skl_mode))
1187 {
1188 // 2D convolve & SKL+
1189 samplerIndex = 1 + nSampConvNum + nSamp8X8Num;
1190 }
1191 else if (samplerParam->Convolve.ui8ConvolveType == CM_CONVOLVE_SKL_TYPE_1D)
1192 {
1193 // 1D convolve & SKL+
1194 samplerIndex = nSampConvNum;
1195 }
1196 else
1197 {
1198 // 1P convolve SKL+
1199 samplerIndex = 1 + (nSamp8X8Num + nSampConvNum) * 2;
1200 while (samplerIndexTable[samplerIndex] != CM_INVALID_INDEX)
1201 {
1202 samplerIndex += 2;
1203 }
1204
1205 }
1206 return samplerIndex;
1207 }
1208
SetL3CacheConfig(const L3ConfigRegisterValues * values,PCmHalL3Settings cmHalL3Setting)1209 MOS_STATUS CM_HAL_G12_X::SetL3CacheConfig(
1210 const L3ConfigRegisterValues *values,
1211 PCmHalL3Settings cmHalL3Setting)
1212 {
1213 // currently we have the following mapping for gen12:
1214 // config_register0->L3AllocReg
1215 // config_register1->L3TcCntlReg
1216
1217 cmHalL3Setting->overrideSettings = ( values->config_register0 || values->config_register1 );
1218 cmHalL3Setting->allocRegOverride = ( values->config_register0 != 0 );
1219 cmHalL3Setting->tcCntlRegOverride = ( values->config_register1 != 0 );
1220 cmHalL3Setting->allocReg = values->config_register0;
1221 cmHalL3Setting->tcCntlReg = values->config_register1;
1222
1223 return MOS_STATUS_SUCCESS;
1224 }
1225
GetSamplerParamInfoForSamplerType(PMHW_SAMPLER_STATE_PARAM mhwSamplerParam,SamplerParam & samplerParam)1226 MOS_STATUS CM_HAL_G12_X::GetSamplerParamInfoForSamplerType(
1227 PMHW_SAMPLER_STATE_PARAM mhwSamplerParam,
1228 SamplerParam &samplerParam)
1229 {
1230 const unsigned int samplerElementSize[MAX_ELEMENT_TYPE_COUNT] = {16, 32, 64, 128, 1024, 2048};
1231
1232 // gets element_type
1233 switch (mhwSamplerParam->SamplerType)
1234 {
1235 case MHW_SAMPLER_TYPE_3D:
1236 samplerParam.elementType = MHW_Sampler1Element;
1237 break;
1238 case MHW_SAMPLER_TYPE_AVS:
1239 samplerParam.elementType = MHW_Sampler128Elements;
1240 break;
1241 default:
1242 return MOS_STATUS_UNIMPLEMENTED;
1243 break;
1244 }
1245
1246 samplerParam.btiStepping = 1;
1247 samplerParam.btiMultiplier = samplerElementSize[samplerParam.elementType] / samplerParam.btiStepping;
1248 samplerParam.size = samplerElementSize[samplerParam.elementType];
1249
1250 return MOS_STATUS_SUCCESS;
1251 }
1252
GetExpectedGtSystemConfig(PCM_EXPECTED_GT_SYSTEM_INFO expectedConfig)1253 MOS_STATUS CM_HAL_G12_X::GetExpectedGtSystemConfig(
1254 PCM_EXPECTED_GT_SYSTEM_INFO expectedConfig)
1255 {
1256 expectedConfig->numSlices = 0;
1257 expectedConfig->numSubSlices = 0;
1258
1259 return MOS_STATUS_UNIMPLEMENTED;
1260 }
1261