1 /*
2 * Copyright (c) 2017-2019, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encode_mpeg2_g12.cpp
24 //! \brief MPEG2 dual-pipe encoder for GEN12.
25 //!
26
27 #include "codechal_encode_mpeg2_g12.h"
28 #include "codechal_kernel_hme_g12.h"
29 #include "codechal_kernel_header_g12.h"
30 #include "codechal_mmc_encode_mpeg2_g12.h"
31 #include "mhw_render_g12_X.h"
32 #include "igcodeckrn_g12.h"
33 #include "codeckrnheader.h"
34
35 struct KernelHeaderMpegG12
36 {
37 uint32_t m_kernelCount;
38
39 // MBEnc Norm/Perf/Quality moes for frame
40 CODECHAL_KERNEL_HEADER m_mpeg2MbEncI;
41 CODECHAL_KERNEL_HEADER m_mpeg2MbEncP;
42 CODECHAL_KERNEL_HEADER m_mpeg2MbEncB;
43
44 CODECHAL_KERNEL_HEADER m_mpeg2InitFrameBrc;
45 CODECHAL_KERNEL_HEADER m_mpeg2FrameEncUpdate;
46 CODECHAL_KERNEL_HEADER m_mpeg2BrcResetFrame;
47 };
48
49 enum BindingTableOffsetMbEncG12
50 {
51 mbEncPakObj = 0,
52 mbEncPakObjPrev = 1,
53 mbEncCurrentY = 3,
54 mbEncBrcDistortionSurface = 8,
55 mbEncCurrentPic = 9,
56 mbEncForwardPic = 10,
57 mbEncBackwardPic = 11,
58 mbEncInterlaceFrameCurrentPic = 14,
59 mbEncInterlaceFrameBackwardPic = 15,
60 mbEncMbControl = 18,
61 mbEncSwScoreboard = 19,
62 mbEncNumBindingTableEntries = 20
63 };
64
65 class MbEncCurbeG12
66 {
67 public:
68 struct CurbeData
69 {
70 union
71 {
72 struct
73 {
74 uint32_t m_skipModeEn : MOS_BITFIELD_BIT(0);
75 uint32_t m_adaptiveEn : MOS_BITFIELD_BIT(1);
76 uint32_t m_biMixDis : MOS_BITFIELD_BIT(2);
77 uint32_t m_isInterlacedFrameFlag : MOS_BITFIELD_BIT(3);
78 uint32_t m_isTopFieldFirst : MOS_BITFIELD_BIT(4);
79 uint32_t m_earlyImeSuccessEn : MOS_BITFIELD_BIT(5);
80 uint32_t m_forceToSkip : MOS_BITFIELD_BIT(6);
81 uint32_t m_t8x8FlagForInterEn : MOS_BITFIELD_BIT(7);
82 uint32_t m_refPixOff : MOS_BITFIELD_RANGE(8,15);
83 uint32_t m_reserved1 : MOS_BITFIELD_RANGE(16,23);
84 uint32_t m_earlyImeStop : MOS_BITFIELD_RANGE(24,31);
85 };
86 struct
87 {
88 uint32_t m_value;
89 };
90 } DW0;
91
92 union
93 {
94 struct
95 {
96 uint32_t m_maxNumMVs : MOS_BITFIELD_RANGE(0,5);
97 uint32_t m_reserved0 : MOS_BITFIELD_RANGE(6,7);
98 uint32_t m_refIDPolBits : MOS_BITFIELD_RANGE(8,15);
99 uint32_t m_biWeight : MOS_BITFIELD_RANGE(16,21);
100 uint32_t m_gxMask : MOS_BITFIELD_BIT(22);
101 uint32_t m_gyMask : MOS_BITFIELD_BIT(23);
102 uint32_t m_refPixShift : MOS_BITFIELD_RANGE(24,27);
103 uint32_t m_uniMixDisable : MOS_BITFIELD_BIT(28);
104 uint32_t m_refPixBiasEn : MOS_BITFIELD_BIT(29); // m_refPixBiasEn (MBZ)
105 uint32_t m_idmShapeModeExt7x7 : MOS_BITFIELD_BIT(30);
106 uint32_t m_idmShapeModeExt5x5 : MOS_BITFIELD_BIT(31);
107 };
108 struct
109 {
110 uint32_t m_value;
111 };
112 } DW1;
113
114 union
115 {
116 struct
117 {
118 uint32_t m_maxLenSP : MOS_BITFIELD_RANGE(0,7);
119 uint32_t m_maxNumSU : MOS_BITFIELD_RANGE(8,15);
120 uint32_t m_start0X : MOS_BITFIELD_RANGE(16,19);
121 uint32_t m_start0Y : MOS_BITFIELD_RANGE(20,23);
122 uint32_t m_start1X : MOS_BITFIELD_RANGE(24,27);
123 uint32_t m_start1Y : MOS_BITFIELD_RANGE(28,31);
124 };
125 struct
126 {
127 uint32_t m_value;
128 };
129 } DW2;
130
131 union
132 {
133 struct
134 {
135 uint32_t m_fieldBias : MOS_BITFIELD_RANGE(0,7);
136 uint32_t m_oppFieldBias : MOS_BITFIELD_RANGE(8,15);
137 uint32_t m_fieldSkipThr : MOS_BITFIELD_RANGE(16,31);
138 };
139 struct
140 {
141 uint32_t m_value;
142 };
143 } DW3;
144
145 union
146 {
147 struct
148 {
149 uint32_t m_reserved0 : MOS_BITFIELD_RANGE(0,7);
150 uint32_t m_picHeightMinus1 : MOS_BITFIELD_RANGE(8,15);
151 uint32_t m_picWidth : MOS_BITFIELD_RANGE(16,23);
152 uint32_t m_reserved24 : MOS_BITFIELD_BIT(24); // WalkerType
153 uint32_t m_motionSeeding : MOS_BITFIELD_BIT(25);
154 uint32_t m_kernelMBModeDecision : MOS_BITFIELD_BIT(26);
155 uint32_t m_iFrameMBDistortionDumpEnable : MOS_BITFIELD_BIT(27);
156 uint32_t m_fieldFlag : MOS_BITFIELD_BIT(28);
157 uint32_t m_pictureType : MOS_BITFIELD_RANGE(29,30);
158 uint32_t m_reserved1 : MOS_BITFIELD_BIT(31);
159 };
160 struct
161 {
162 uint32_t m_value;
163 };
164 } DW4;
165
166 struct
167 {
168 union
169 {
170 struct
171 {
172 uint32_t m_mv0Cost : MOS_BITFIELD_RANGE(0, 7);
173 uint32_t m_mv1Cost : MOS_BITFIELD_RANGE(8, 15);
174 uint32_t m_mv2Cost : MOS_BITFIELD_RANGE(16, 23);
175 uint32_t m_mv3Cost : MOS_BITFIELD_RANGE(24, 31);
176 };
177 struct
178 {
179 uint32_t m_value;
180 };
181 } DW5;
182
183 union
184 {
185 struct
186 {
187 uint32_t m_mv4Cost : MOS_BITFIELD_RANGE(0, 7);
188 uint32_t m_mv5Cost : MOS_BITFIELD_RANGE(8, 15);
189 uint32_t m_mv6Cost : MOS_BITFIELD_RANGE(16, 23);
190 uint32_t m_mv7Cost : MOS_BITFIELD_RANGE(24, 31);
191 };
192 struct
193 {
194 uint32_t m_value;
195 };
196 } DW6;
197 } MvCost;
198
199 union
200 {
201 struct
202 {
203 uint32_t m_intraPartMask : MOS_BITFIELD_RANGE(0,4);
204 uint32_t m_nonSkipZMvAdded : MOS_BITFIELD_BIT(5);
205 uint32_t m_nonSkipModeAdded : MOS_BITFIELD_BIT(6);
206 uint32_t m_reserved7 : MOS_BITFIELD_BIT(7);
207 uint32_t m_reserved8 : MOS_BITFIELD_RANGE(8,15);
208 uint32_t m_mvCostScaleFactor : MOS_BITFIELD_RANGE(16,17);
209 uint32_t m_bilinearEnable : MOS_BITFIELD_BIT(18);
210 uint32_t m_srcFieldPolarity : MOS_BITFIELD_BIT(19);
211 uint32_t m_weightedSADHAAR : MOS_BITFIELD_BIT(20);
212 uint32_t m_acOnlyHAAR : MOS_BITFIELD_BIT(21);
213 uint32_t m_refIDCostMode : MOS_BITFIELD_BIT(22);
214 uint32_t m_idmShapeMode : MOS_BITFIELD_BIT(23);
215 uint32_t m_skipCenterMask : MOS_BITFIELD_RANGE(24,31);
216 };
217 struct
218 {
219 uint32_t m_value;
220 };
221 } DW7;
222
223 union
224 {
225 struct
226 {
227 uint32_t m_mode8Cost : MOS_BITFIELD_RANGE(0,7);
228 uint32_t m_mode9Cost : MOS_BITFIELD_RANGE(8,15);
229 uint32_t m_refIDCost : MOS_BITFIELD_RANGE(16,23);
230 uint32_t m_chromaIntraModeCost : MOS_BITFIELD_RANGE(24,31);
231 };
232 struct
233 {
234 uint32_t m_value;
235 };
236 } DW8;
237
238 union
239 {
240 struct
241 {
242 uint32_t m_srcSize : MOS_BITFIELD_RANGE(0,1);
243 uint32_t m_mbQPEnable : MOS_BITFIELD_BIT(2);
244 uint32_t m_mbSkipEnable : MOS_BITFIELD_BIT(3);
245 uint32_t m_mbNonSkipEnable : MOS_BITFIELD_BIT(4);
246 uint32_t m_reserved5 : MOS_BITFIELD_BIT(5);
247 uint32_t m_srcAccess : MOS_BITFIELD_BIT(6);
248 uint32_t m_refAccess : MOS_BITFIELD_BIT(7);
249 uint32_t m_searchCtrl : MOS_BITFIELD_RANGE(8,10);
250 uint32_t m_dualSearchOpt : MOS_BITFIELD_BIT(11);
251 uint32_t m_subPelMode : MOS_BITFIELD_RANGE(12,13);
252 uint32_t m_skipType : MOS_BITFIELD_BIT(14);
253 uint32_t m_fieldCacheAllocationDis : MOS_BITFIELD_BIT(15);
254 uint32_t m_interChromaMode : MOS_BITFIELD_BIT(16);
255 uint32_t m_ftEnable : MOS_BITFIELD_BIT(17);
256 uint32_t m_bmeDisableFBR : MOS_BITFIELD_BIT(18);
257 uint32_t m_reserved19 : MOS_BITFIELD_BIT(19);
258 uint32_t m_interSAD : MOS_BITFIELD_RANGE(20,21);
259 uint32_t m_intraSAD : MOS_BITFIELD_RANGE(22,23);
260 uint32_t m_subMbPartMask : MOS_BITFIELD_RANGE(24,30);
261 uint32_t m_reserved31 : MOS_BITFIELD_BIT(31);
262 };
263 struct
264 {
265 uint32_t m_value;
266 };
267 } DW9;
268
269 union
270 {
271 struct
272 {
273 uint32_t m_dispatchID : MOS_BITFIELD_RANGE(0,7);
274 uint32_t m_largeMbSizeInWord : MOS_BITFIELD_RANGE(8,15);
275 uint32_t m_refWidth : MOS_BITFIELD_RANGE(16,23);
276 uint32_t m_refHeight : MOS_BITFIELD_RANGE(24,31);
277 };
278 struct
279 {
280 uint32_t m_value;
281 };
282 } DW10;
283
284 union
285 {
286 struct
287 {
288 uint32_t m_qpScaleCode : MOS_BITFIELD_RANGE(0,7);
289 uint32_t m_intraFactor : MOS_BITFIELD_RANGE(8,11);
290 uint32_t m_intraMulFact : MOS_BITFIELD_RANGE(12,15);
291 uint32_t m_intraBiasFF : MOS_BITFIELD_RANGE(16,23);
292 uint32_t m_intraBiasFrame : MOS_BITFIELD_RANGE(24,31);
293 };
294 struct
295 {
296 uint32_t m_value;
297 };
298 } DW11;
299
300 union
301 {
302 struct
303 {
304 uint32_t m_isFastMode : MOS_BITFIELD_RANGE(0,7);
305 uint32_t m_smallMbSizeInWord : MOS_BITFIELD_RANGE(8,15);
306 uint32_t m_distScaleFactor : MOS_BITFIELD_RANGE(16,31);
307 };
308 struct
309 {
310 uint32_t m_value;
311 };
312 } DW12;
313
314 union
315 {
316 struct
317 {
318 uint32_t m_panicModeMBThreshold : MOS_BITFIELD_RANGE(0,15);
319 uint32_t m_targetSizeInWord : MOS_BITFIELD_RANGE(16,23);
320 uint32_t m_reserved14 : MOS_BITFIELD_RANGE(24,31);
321 };
322 struct
323 {
324 uint32_t m_value;
325 };
326 } DW13;
327
328 union
329 {
330 struct
331 {
332 uint32_t m_forwardHorizontalSearchRange : MOS_BITFIELD_RANGE(0,15);
333 uint32_t m_forwardVerticalSearchRange : MOS_BITFIELD_RANGE(16,31);
334 };
335 struct
336 {
337 uint32_t m_value;
338 };
339 } DW14;
340
341 union
342 {
343 struct
344 {
345 uint32_t m_backwardHorizontalSearchRange : MOS_BITFIELD_RANGE(0,15);
346 uint32_t m_backwardVerticalSearchRange : MOS_BITFIELD_RANGE(16,31);
347 };
348 struct
349 {
350 uint32_t m_value;
351 };
352 } DW15;
353
354 struct
355 {
356 union
357 {
358 struct
359 {
360 uint32_t m_meDelta0to3;
361 };
362 struct
363 {
364 uint32_t m_value;
365 };
366 } DW16;
367
368 union
369 {
370 struct
371 {
372 uint32_t m_meDelta4to7;
373 };
374 struct
375 {
376 uint32_t m_value;
377 };
378 } DW17;
379
380 union
381 {
382 struct
383 {
384 uint32_t m_meDelta8to11;
385 };
386 struct
387 {
388 uint32_t m_value;
389 };
390 } DW18;
391
392 union
393 {
394 struct
395 {
396 uint32_t m_meDelta12to15;
397 };
398 struct
399 {
400 uint32_t m_value;
401 };
402 } DW19;
403
404 union
405 {
406 struct
407 {
408 uint32_t m_meDelta16to19;
409 };
410 struct
411 {
412 uint32_t m_value;
413 };
414 } DW20;
415
416 union
417 {
418 struct
419 {
420 uint32_t m_meDelta20to23;
421 };
422 struct
423 {
424 uint32_t m_value;
425 };
426 } DW21;
427
428 union
429 {
430 struct
431 {
432 uint32_t m_meDelta24to27;
433 };
434 struct
435 {
436 uint32_t m_value;
437 };
438 } DW22;
439
440 union
441 {
442 struct
443 {
444 uint32_t m_meDelta28to31;
445 };
446 struct
447 {
448 uint32_t m_value;
449 };
450 } DW23;
451
452 union
453 {
454 struct
455 {
456 uint32_t m_meDelta32to35;
457 };
458 struct
459 {
460 uint32_t m_value;
461 };
462 } DW24;
463
464 union
465 {
466 struct
467 {
468 uint32_t m_meDelta36to39;
469 };
470 struct
471 {
472 uint32_t m_value;
473 };
474 } DW25;
475
476 union
477 {
478 struct
479 {
480 uint32_t m_meDelta40to43;
481 };
482 struct
483 {
484 uint32_t m_value;
485 };
486 } DW26;
487
488 union
489 {
490 struct
491 {
492 uint32_t m_meDelta44to47;
493 };
494 struct
495 {
496 uint32_t m_value;
497 };
498 } DW27;
499
500 union
501 {
502 struct
503 {
504 uint32_t m_meDelta48to51;
505 };
506 struct
507 {
508 uint32_t m_value;
509 };
510 } DW28;
511
512 union
513 {
514 struct
515 {
516 uint32_t m_meDelta52to55;
517 };
518 struct
519 {
520 uint32_t m_value;
521 };
522 } DW29;
523
524 union
525 {
526 struct
527 {
528 uint32_t m_mode0Cost : MOS_BITFIELD_RANGE(0,7);
529 uint32_t m_mode1Cost : MOS_BITFIELD_RANGE(8,15);
530 uint32_t m_mode2Cost : MOS_BITFIELD_RANGE(16,23);
531 uint32_t m_mode3Cost : MOS_BITFIELD_RANGE(24,31);
532 };
533 struct
534 {
535 uint32_t m_value;
536 };
537 } DW30;
538
539 union
540 {
541 struct
542 {
543 uint32_t m_mode4Cost : MOS_BITFIELD_RANGE(0,7);
544 uint32_t m_mode5Cost : MOS_BITFIELD_RANGE(8,15);
545 uint32_t m_mode6Cost : MOS_BITFIELD_RANGE(16,23);
546 uint32_t m_mode7Cost : MOS_BITFIELD_RANGE(24,31);
547 };
548 struct
549 {
550 uint32_t m_value;
551 };
552 } DW31;
553 } VmeSPath0;
554
555 struct
556 {
557 union
558 {
559 struct
560 {
561 uint32_t m_meDelta0to3;
562 };
563 struct
564 {
565 uint32_t m_value;
566 };
567 } DW32;
568
569 union
570 {
571 struct
572 {
573 uint32_t m_meDelta4to7;
574 };
575 struct
576 {
577 uint32_t m_value;
578 };
579 } DW33;
580
581 union
582 {
583 struct
584 {
585 uint32_t m_meDelta8to11;
586 };
587 struct
588 {
589 uint32_t m_value;
590 };
591 } DW34;
592
593 union
594 {
595 struct
596 {
597 uint32_t m_meDelta12to15;
598 };
599 struct
600 {
601 uint32_t m_value;
602 };
603 } DW35;
604
605 union
606 {
607 struct
608 {
609 uint32_t m_meDelta16to19;
610 };
611 struct
612 {
613 uint32_t m_value;
614 };
615 } DW36;
616
617 union
618 {
619 struct
620 {
621 uint32_t m_meDelta20to23;
622 };
623 struct
624 {
625 uint32_t m_value;
626 };
627 } DW37;
628
629 union
630 {
631 struct
632 {
633 uint32_t m_meDelta24to27;
634 };
635 struct
636 {
637 uint32_t m_value;
638 };
639 } DW38;
640
641 union
642 {
643 struct
644 {
645 uint32_t m_meDelta28to31;
646 };
647 struct
648 {
649 uint32_t m_value;
650 };
651 } DW39;
652
653 union
654 {
655 struct
656 {
657 uint32_t m_meDelta32to35;
658 };
659 struct
660 {
661 uint32_t m_value;
662 };
663 } DW40;
664
665 union
666 {
667 struct
668 {
669 uint32_t m_meDelta36to39;
670 };
671 struct
672 {
673 uint32_t m_value;
674 };
675 } DW41;
676
677 union
678 {
679 struct
680 {
681 uint32_t m_meDelta40to43;
682 };
683 struct
684 {
685 uint32_t m_value;
686 };
687 } DW42;
688
689 union
690 {
691 struct
692 {
693 uint32_t m_meDelta44to47;
694 };
695 struct
696 {
697 uint32_t m_value;
698 };
699 } DW43;
700
701 union
702 {
703 struct
704 {
705 uint32_t m_meDelta48to51;
706 };
707 struct
708 {
709 uint32_t m_value;
710 };
711 } DW44;
712
713 union
714 {
715 struct
716 {
717 uint32_t m_meDelta52to55;
718 };
719 struct
720 {
721 uint32_t m_value;
722 };
723 } DW45;
724
725 struct
726 {
727 union
728 {
729 struct
730 {
731 uint32_t m_mv0Cost_Interlaced : MOS_BITFIELD_RANGE(0, 7);
732 uint32_t m_mv1Cost_Interlaced : MOS_BITFIELD_RANGE(8, 15);
733 uint32_t m_mv2Cost_Interlaced : MOS_BITFIELD_RANGE(16, 23);
734 uint32_t m_mv3Cost_Interlaced : MOS_BITFIELD_RANGE(24, 31);
735 };
736 struct
737 {
738 uint32_t m_value;
739 };
740 } DW46;
741
742 union
743 {
744 struct
745 {
746 uint32_t m_mv4Cost_Interlaced : MOS_BITFIELD_RANGE(0, 7);
747 uint32_t m_mv5Cost_Interlaced : MOS_BITFIELD_RANGE(8, 15);
748 uint32_t m_mv6Cost_Interlaced : MOS_BITFIELD_RANGE(16, 23);
749 uint32_t m_mv7Cost_Interlaced : MOS_BITFIELD_RANGE(24, 31);
750 };
751 struct
752 {
753 uint32_t m_value;
754 };
755 } DW47;
756 } MvCostInterlace;
757 } VmeSPath1;
758
759 union
760 {
761 struct
762 {
763 uint32_t m_batchBufferEnd;
764 };
765 struct
766 {
767 uint32_t m_value;
768 };
769 } DW48;
770
771 union
772 {
773 struct
774 {
775 uint32_t m_pakObjCmds;
776 };
777 struct
778 {
779 uint32_t m_value;
780 };
781 } DW49;
782
783 union
784 {
785 struct
786 {
787 uint32_t m_prevmPakObjCmds;
788 };
789 struct
790 {
791 uint32_t m_value;
792 };
793 } DW50;
794
795 union
796 {
797 struct
798 {
799 uint32_t m_currPicY;
800 };
801 struct
802 {
803 uint32_t m_value;
804 };
805 } DW51;
806
807 union
808 {
809 struct
810 {
811 uint32_t m_currFwdBwdRef;
812 };
813 struct
814 {
815 uint32_t m_value;
816 };
817 } DW52;
818
819 union
820 {
821 struct
822 {
823 uint32_t m_currBwdRef;
824 };
825 struct
826 {
827 uint32_t m_value;
828 };
829 } DW53;
830
831 union
832 {
833 struct
834 {
835 uint32_t m_distSurf4x;
836 };
837 struct
838 {
839 uint32_t m_value;
840 };
841 } DW54;
842
843 union
844 {
845 struct
846 {
847 uint32_t m_mbControl;
848 };
849 struct
850 {
851 uint32_t m_value;
852 };
853 } DW55;
854
855 union
856 {
857 struct
858 {
859 uint32_t softwareScoreboard;
860 };
861 struct
862 {
863 uint32_t m_value;
864 };
865 } DW56;
866
867 union
868 {
869 struct
870 {
871 uint32_t m_reserved;
872 };
873 struct
874 {
875 uint32_t m_value;
876 };
877 } DW57;
878
879 union
880 {
881 struct
882 {
883 uint32_t m_reserved;
884 };
885 struct
886 {
887 uint32_t m_value;
888 };
889 } DW58;
890
891 union
892 {
893 struct
894 {
895 uint32_t m_reserved;
896 };
897 struct
898 {
899 uint32_t m_value;
900 };
901 } DW59;
902
903 union
904 {
905 struct
906 {
907 uint32_t m_reserved;
908 };
909 struct
910 {
911 uint32_t m_value;
912 };
913 } DW60;
914
915 union
916 {
917 struct
918 {
919 uint32_t m_reserved;
920 };
921 struct
922 {
923 uint32_t m_value;
924 };
925 } DW61;
926
927 union
928 {
929 struct
930 {
931 uint32_t m_reserved;
932 };
933 struct
934 {
935 uint32_t m_value;
936 };
937 } DW62;
938
939 union
940 {
941 struct
942 {
943 uint32_t m_reserved;
944 };
945 struct
946 {
947 uint32_t m_value;
948 };
949 } DW63;
950 }m_curbeData;
951
952 //!
953 //! \brief Constructor
954 //!
955 MbEncCurbeG12(uint8_t codingType);
956
957 //!
958 //! \brief Destructor
959 //!
~MbEncCurbeG12()960 ~MbEncCurbeG12(){};
961
962 static const size_t m_byteSize = sizeof(CurbeData);
963 };
964
MbEncCurbeG12(uint8_t codingType)965 MbEncCurbeG12::MbEncCurbeG12(uint8_t codingType)
966 {
967 CODECHAL_ENCODE_FUNCTION_ENTER;
968
969 MOS_ZeroMemory(&m_curbeData, m_byteSize);
970
971 m_curbeData.DW0.m_value = 0x00000023;
972 switch (codingType)
973 {
974 case I_TYPE:
975 m_curbeData.DW1.m_value = 0x00200020;
976 m_curbeData.DW2.m_value = 0x00000000;
977 m_curbeData.DW4.m_value = 0x00000000;
978 m_curbeData.DW7.m_value = 0x00050066;
979 m_curbeData.DW8.m_value = 0x00000000;
980 m_curbeData.DW9.m_value = 0x7EA41000;
981 m_curbeData.DW10.m_value = 0x0000FF00;
982 break;
983 case P_TYPE:
984 m_curbeData.DW1.m_value = 0x00200020;
985 m_curbeData.DW2.m_value = 0x00001009;
986 m_curbeData.DW4.m_value = 0x20000000;
987 m_curbeData.DW7.m_value = 0x00050066;
988 m_curbeData.DW8.m_value = 0x00000041;
989 m_curbeData.DW9.m_value = 0x7EA41000;
990 m_curbeData.DW10.m_value = 0x2830FF00;
991 break;
992 case B_TYPE:
993 default:
994 m_curbeData.DW1.m_value = 0x10200010;
995 m_curbeData.DW2.m_value = 0x00001005;
996 m_curbeData.DW4.m_value = 0x40000000;
997 m_curbeData.DW7.m_value = 0xFF050066;
998 m_curbeData.DW8.m_value = 0x00000041;
999 m_curbeData.DW9.m_value = 0x7EA01000;
1000 m_curbeData.DW10.m_value = 0x2020FF00;
1001 break;
1002
1003 }
1004
1005 m_curbeData.DW3.m_value = 0xFE0C0000;
1006 m_curbeData.MvCost.DW5.m_value = 0x00000000;
1007 m_curbeData.MvCost.DW6.m_value = 0x00000000;
1008 m_curbeData.DW11.m_value = 0x5A325300;
1009 m_curbeData.DW12.m_value = 0x0000FF00;
1010 m_curbeData.DW13.m_value = 0x00FF0000;
1011
1012 }
1013
CodechalEncodeMpeg2G12(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)1014 CodechalEncodeMpeg2G12::CodechalEncodeMpeg2G12(
1015 CodechalHwInterface* hwInterface,
1016 CodechalDebugInterface* debugInterface,
1017 PCODECHAL_STANDARD_INFO standardInfo)
1018 :CodechalEncodeMpeg2(hwInterface, debugInterface, standardInfo),
1019 m_sinlgePipeVeState(nullptr)
1020 {
1021 CODECHAL_ENCODE_FUNCTION_ENTER;
1022
1023 CODECHAL_ENCODE_CHK_NULL_NO_STATUS_RETURN(m_osInterface);
1024
1025 m_kuidCommon = IDR_CODEC_HME_DS_SCOREBOARD_KERNEL;
1026
1027 m_osInterface->pfnVirtualEngineSupported(m_osInterface, false, true);
1028
1029 pfnGetKernelHeaderAndSize = GetKernelHeaderAndSize;
1030
1031 m_useHwScoreboard = false;
1032 m_useCommonKernel = true;
1033
1034 MOS_STATUS eStatus = CodecHalGetKernelBinaryAndSize(
1035 (uint8_t *)IGCODECKRN_G12,
1036 m_kuid,
1037 &m_kernelBinary,
1038 &m_combinedKernelSize);
1039
1040 // Virtual Engine is enabled in default
1041 Mos_SetVirtualEngineSupported(m_osInterface, true);
1042
1043 CODECHAL_ENCODE_ASSERT(eStatus == MOS_STATUS_SUCCESS);
1044
1045 m_hwInterface->GetStateHeapSettings()->dwIshSize +=
1046 MOS_ALIGN_CEIL(m_combinedKernelSize, (1 << MHW_KERNEL_OFFSET_SHIFT));
1047
1048 m_vdboxOneDefaultUsed = true;
1049 }
1050
~CodechalEncodeMpeg2G12()1051 CodechalEncodeMpeg2G12::~CodechalEncodeMpeg2G12()
1052 {
1053 CODECHAL_ENCODE_FUNCTION_ENTER;
1054
1055 if (m_swScoreboardState)
1056 {
1057 MOS_Delete(m_swScoreboardState);
1058 m_swScoreboardState = nullptr;
1059 }
1060
1061 if (m_sinlgePipeVeState)
1062 {
1063 MOS_FreeMemAndSetNull(m_sinlgePipeVeState);
1064 }
1065 }
1066
Initialize(CodechalSetting * codecHalSettings)1067 MOS_STATUS CodechalEncodeMpeg2G12::Initialize(CodechalSetting * codecHalSettings)
1068 {
1069 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1070
1071 CODECHAL_ENCODE_FUNCTION_ENTER;
1072
1073 // common initilization
1074 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeMpeg2::Initialize(codecHalSettings));
1075
1076 if (MOS_VE_SUPPORTED(m_osInterface))
1077 {
1078 m_sinlgePipeVeState = (PCODECHAL_ENCODE_SINGLEPIPE_VIRTUALENGINE_STATE)MOS_AllocAndZeroMemory(sizeof(CODECHAL_ENCODE_SINGLEPIPE_VIRTUALENGINE_STATE));
1079 CODECHAL_ENCODE_CHK_NULL_RETURN(m_sinlgePipeVeState);
1080 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_InitInterface(m_hwInterface, m_sinlgePipeVeState));
1081 }
1082
1083 return eStatus;
1084 }
1085
SetAndPopulateVEHintParams(PMOS_COMMAND_BUFFER cmdBuffer)1086 MOS_STATUS CodechalEncodeMpeg2G12::SetAndPopulateVEHintParams(
1087 PMOS_COMMAND_BUFFER cmdBuffer)
1088 {
1089 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1090
1091 CODECHAL_ENCODE_FUNCTION_ENTER;
1092
1093 if (!MOS_VE_SUPPORTED(m_osInterface))
1094 {
1095 return eStatus;
1096 }
1097
1098 if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(m_osInterface))
1099 {
1100 MOS_VIRTUALENGINE_SET_PARAMS vesetParams;
1101 MOS_ZeroMemory(&vesetParams, sizeof(vesetParams));
1102 vesetParams.bNeedSyncWithPrevious = true;
1103 vesetParams.bSFCInUse = false;
1104 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_SetHintParams(m_sinlgePipeVeState, &vesetParams));
1105 }
1106 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_PopulateHintParams(m_sinlgePipeVeState, cmdBuffer, true));
1107
1108 return eStatus;
1109 }
1110
SubmitCommandBuffer(PMOS_COMMAND_BUFFER cmdBuffer,bool bNullRendering)1111 MOS_STATUS CodechalEncodeMpeg2G12::SubmitCommandBuffer(
1112 PMOS_COMMAND_BUFFER cmdBuffer,
1113 bool bNullRendering)
1114 {
1115 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1116
1117 CODECHAL_ENCODE_FUNCTION_ENTER;
1118
1119 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
1120
1121 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetAndPopulateVEHintParams(cmdBuffer));
1122 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnSubmitCommandBuffer(
1123 m_osInterface,
1124 cmdBuffer,
1125 bNullRendering));
1126
1127 return eStatus;
1128 }
1129
GetKernelHeaderAndSize(void * binary,EncOperation operation,uint32_t krnStateIdx,void * krnHeader,uint32_t * krnSize)1130 MOS_STATUS CodechalEncodeMpeg2G12::GetKernelHeaderAndSize(
1131 void *binary,
1132 EncOperation operation,
1133 uint32_t krnStateIdx,
1134 void *krnHeader,
1135 uint32_t *krnSize)
1136 {
1137 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1138
1139 CODECHAL_ENCODE_FUNCTION_ENTER;
1140
1141 CODECHAL_ENCODE_CHK_NULL_RETURN(binary);
1142 CODECHAL_ENCODE_CHK_NULL_RETURN(krnHeader);
1143 CODECHAL_ENCODE_CHK_NULL_RETURN(krnSize);
1144
1145 auto kernelHeaderTable = (KernelHeaderMpegG12 *)binary;
1146 PCODECHAL_KERNEL_HEADER currKrnHeader;
1147
1148 if (operation == ENC_BRC)
1149 {
1150 currKrnHeader = &kernelHeaderTable->m_mpeg2InitFrameBrc;
1151 }
1152 else if (operation == ENC_MBENC)
1153 {
1154 currKrnHeader = &kernelHeaderTable->m_mpeg2MbEncI;
1155 }
1156 else
1157 {
1158 CODECHAL_ENCODE_ASSERTMESSAGE("Unsupported ENC mode requested");
1159 eStatus = MOS_STATUS_INVALID_PARAMETER;
1160 return eStatus;
1161 }
1162
1163 currKrnHeader += krnStateIdx;
1164 *((PCODECHAL_KERNEL_HEADER)krnHeader) = *currKrnHeader;
1165
1166 PCODECHAL_KERNEL_HEADER invalidEntry = &(kernelHeaderTable->m_mpeg2BrcResetFrame) + 1;
1167 PCODECHAL_KERNEL_HEADER nextKrnHeader = (currKrnHeader + 1);
1168 uint32_t nextKrnOffset = *krnSize;
1169
1170 if (nextKrnHeader < invalidEntry)
1171 {
1172 nextKrnOffset = nextKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT;
1173 }
1174 *krnSize = nextKrnOffset - (currKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
1175
1176 return eStatus;
1177 }
1178
GetMaxBtCount()1179 uint32_t CodechalEncodeMpeg2G12::GetMaxBtCount()
1180 {
1181 uint32_t scalingBtCount = MOS_ALIGN_CEIL(
1182 m_scaling4xKernelStates[0].KernelParams.iBTCount,
1183 m_stateHeapInterface->pStateHeapInterface->GetBtIdxAlignment());
1184 uint32_t meBtCount = MOS_ALIGN_CEIL(
1185 m_hmeKernel ? m_hmeKernel->GetBTCount() : 0,
1186 m_stateHeapInterface->pStateHeapInterface->GetBtIdxAlignment());
1187 uint32_t mbEncBtCount = MOS_ALIGN_CEIL(
1188 m_mbEncKernelStates[0].KernelParams.iBTCount,
1189 m_stateHeapInterface->pStateHeapInterface->GetBtIdxAlignment());
1190
1191 uint32_t brcBtCount = 0;
1192 for (uint32_t i = 0; i < CODECHAL_ENCODE_BRC_IDX_NUM; i++)
1193 {
1194 brcBtCount += MOS_ALIGN_CEIL(
1195 m_brcKernelStates[i].KernelParams.iBTCount,
1196 m_stateHeapInterface->pStateHeapInterface->GetBtIdxAlignment());
1197 }
1198
1199 uint32_t swScoreboardBtCount = 0;
1200 if (!m_useHwScoreboard)
1201 {
1202 swScoreboardBtCount = MOS_ALIGN_CEIL(
1203 m_swScoreboardState->GetBTCount(),
1204 m_stateHeapInterface->pStateHeapInterface->GetBtIdxAlignment());
1205 }
1206
1207 return MOS_MAX(scalingBtCount + meBtCount, mbEncBtCount + brcBtCount + swScoreboardBtCount);
1208 }
1209
InitKernelState()1210 MOS_STATUS CodechalEncodeMpeg2G12::InitKernelState()
1211 {
1212 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1213
1214 CODECHAL_ENCODE_FUNCTION_ENTER;
1215
1216 // Init kernel state
1217 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateMbEnc());
1218 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelStateBrc());
1219
1220 // Create SW scoreboard init kernel state
1221 CODECHAL_ENCODE_CHK_NULL_RETURN(m_swScoreboardState = MOS_New(CodechalEncodeSwScoreboardG12, this));
1222 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_swScoreboardState->InitKernelState());
1223
1224 // Create hme kernel
1225 m_hmeKernel = MOS_New(CodechalKernelHmeG12, this, true);
1226 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hmeKernel);
1227 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hmeKernel->Initialize(
1228 GetCommonKernelHeaderAndSizeG12,
1229 m_kernelBase,
1230 m_kuidCommon));
1231
1232 return eStatus;
1233 }
1234
InitKernelStateMbEnc()1235 MOS_STATUS CodechalEncodeMpeg2G12::InitKernelStateMbEnc()
1236 {
1237 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1238
1239 CODECHAL_ENCODE_FUNCTION_ENTER;
1240
1241 for (uint8_t krnStateIdx = 0; krnStateIdx < mbEncKernelIdxNum; krnStateIdx++)
1242 {
1243 auto kernelStatePtr = &m_mbEncKernelStates[krnStateIdx];
1244 auto kernelSize = m_combinedKernelSize;
1245
1246 CODECHAL_KERNEL_HEADER currKrnHeader;
1247 CODECHAL_ENCODE_CHK_STATUS_RETURN(pfnGetKernelHeaderAndSize(
1248 m_kernelBinary,
1249 ENC_MBENC,
1250 krnStateIdx,
1251 &currKrnHeader,
1252 &kernelSize));
1253
1254 kernelStatePtr->KernelParams.iBTCount = mbEncNumBindingTableEntries;
1255 kernelStatePtr->KernelParams.iThreadCount = m_hwInterface->GetRenderInterface()->GetHwCaps()->dwMaxThreads;
1256 kernelStatePtr->KernelParams.iCurbeLength = MbEncCurbeG12::m_byteSize;
1257 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
1258 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
1259 kernelStatePtr->KernelParams.iIdCount = 1;
1260
1261 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
1262 kernelStatePtr->KernelParams.pBinary = m_kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
1263 kernelStatePtr->KernelParams.iSize = kernelSize;
1264
1265 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
1266 m_stateHeapInterface,
1267 kernelStatePtr->KernelParams.iBTCount,
1268 &kernelStatePtr->dwSshSize,
1269 &kernelStatePtr->dwBindingTableSize));
1270
1271 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
1272 }
1273
1274 m_mbEncBindingTable.m_mbEncPakObj = mbEncPakObj;
1275 m_mbEncBindingTable.m_mbEncPakObjPrev = mbEncPakObjPrev;
1276 m_mbEncBindingTable.m_mbEncCurrentY = mbEncCurrentY;
1277 m_mbEncBindingTable.m_mbEncBrcDistortionSurface = mbEncBrcDistortionSurface;
1278 m_mbEncBindingTable.m_mbEncCurrentPic = mbEncCurrentPic;
1279 m_mbEncBindingTable.m_mbEncForwardPic = mbEncForwardPic;
1280 m_mbEncBindingTable.m_mbEncBackwardPic = mbEncBackwardPic;
1281 m_mbEncBindingTable.m_mbEncInterlaceFrameCurrentPic = mbEncInterlaceFrameCurrentPic;
1282 m_mbEncBindingTable.m_mbEncInterlaceFrameBackwardPic = mbEncInterlaceFrameBackwardPic;
1283 m_mbEncBindingTable.m_mbEncMbControl = mbEncMbControl;
1284 m_mbEncBindingTable.m_mbEncScoreboard = mbEncSwScoreboard;
1285
1286 return eStatus;
1287 }
1288
EncodeMeKernel()1289 MOS_STATUS CodechalEncodeMpeg2G12::EncodeMeKernel()
1290 {
1291 CodechalKernelHme::CurbeParam curbeParam = {};
1292 curbeParam.subPelMode = 3;
1293 curbeParam.currOriginalPic = m_picParams->m_currOriginalPic;
1294 curbeParam.qpPrimeY = m_mvCostTableOffset;
1295 // This parameter is used to select correct mode mv cost
1296 // and search path from the predefined tables specifically
1297 // for Mpeg2 BRC encoding path
1298 curbeParam.targetUsage = 8;
1299 curbeParam.maxMvLen = 128; // refer to m_maxVmvr/4
1300 curbeParam.numRefIdxL0Minus1 = 0;
1301 curbeParam.numRefIdxL1Minus1 = 0;
1302
1303 CODEC_PICTURE l0RefFrameList = m_picParams->m_refFrameList[0];
1304 // no need to modify index if picture is invalid
1305 if (l0RefFrameList.PicFlags != PICTURE_INVALID)
1306 {
1307 l0RefFrameList.FrameIdx = 0;
1308 }
1309
1310 CODEC_PICTURE l1RefFrameList = m_picParams->m_refFrameList[1];
1311 // no need to modify index if picture is invalid
1312 if (l1RefFrameList.PicFlags != PICTURE_INVALID)
1313 {
1314 l1RefFrameList.FrameIdx = 1;
1315 }
1316 CodechalKernelHme::SurfaceParams surfaceParam = {};
1317 surfaceParam.numRefIdxL0ActiveMinus1 = 0;
1318 surfaceParam.numRefIdxL1ActiveMinus1 = 0;
1319 surfaceParam.refList = &m_refList[0];
1320 surfaceParam.picIdx = &m_picIdx[0];
1321 surfaceParam.currOriginalPic = &m_currOriginalPic;
1322 surfaceParam.refL0List = &l0RefFrameList;
1323 surfaceParam.refL1List = &l1RefFrameList;
1324 surfaceParam.meBrcDistortionBuffer = &m_brcBuffers.sMeBrcDistortionBuffer;
1325 surfaceParam.meBrcDistortionBottomFieldOffset = m_brcBuffers.dwMeBrcDistortionBottomFieldOffset;
1326 surfaceParam.downScaledWidthInMb = m_downscaledWidthInMb4x;
1327 surfaceParam.downScaledHeightInMb = m_downscaledHeightInMb4x;
1328 surfaceParam.downScaledBottomFieldOffset = m_scaledBottomFieldOffset;
1329 surfaceParam.verticalLineStride = m_verticalLineStride;
1330 surfaceParam.verticalLineStrideOffset = m_verticalLineStrideOffset;
1331
1332 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hmeKernel->Execute(curbeParam, surfaceParam, CodechalKernelHme::HmeLevel::hmeLevel4x));
1333 return MOS_STATUS_SUCCESS;
1334 }
1335
SetGpuCtxCreatOption()1336 MOS_STATUS CodechalEncodeMpeg2G12::SetGpuCtxCreatOption()
1337 {
1338 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1339
1340 CODECHAL_ENCODE_FUNCTION_ENTER;
1341
1342 if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(m_osInterface))
1343 {
1344 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncoderState::SetGpuCtxCreatOption());
1345 }
1346 else
1347 {
1348 m_gpuCtxCreatOpt = MOS_New(MOS_GPUCTX_CREATOPTIONS_ENHANCED);
1349 CODECHAL_ENCODE_CHK_NULL_RETURN(m_gpuCtxCreatOpt);
1350
1351 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncodeSinglePipeVE_ConstructParmsForGpuCtxCreation(
1352 m_sinlgePipeVeState,
1353 (PMOS_GPUCTX_CREATOPTIONS_ENHANCED)m_gpuCtxCreatOpt));
1354 }
1355
1356 return eStatus;
1357 }
1358
UserFeatureKeyReport()1359 MOS_STATUS CodechalEncodeMpeg2G12::UserFeatureKeyReport()
1360 {
1361 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1362
1363 CODECHAL_ENCODE_FUNCTION_ENTER;
1364
1365 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncoderState::UserFeatureKeyReport());
1366
1367 #if (_DEBUG || _RELEASE_INTERNAL)
1368
1369 // VE2.0 Reporting
1370 CodecHalEncode_WriteKey(__MEDIA_USER_FEATURE_VALUE_ENABLE_ENCODE_VE_CTXSCHEDULING_ID, MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(m_osInterface), m_osInterface->pOsContext);
1371
1372 #endif // _DEBUG || _RELEASE_INTERNAL
1373
1374 return eStatus;
1375 }
1376
SetCurbeMbEnc(bool mbEncIFrameDistEnabled,bool mbQpDataEnabled)1377 MOS_STATUS CodechalEncodeMpeg2G12::SetCurbeMbEnc(
1378 bool mbEncIFrameDistEnabled,
1379 bool mbQpDataEnabled)
1380 {
1381 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1382
1383 CODECHAL_ENCODE_FUNCTION_ENTER;
1384
1385 uint16_t picWidthInMb = mbEncIFrameDistEnabled ?
1386 (uint16_t)m_downscaledWidthInMb4x : m_picWidthInMb;
1387 uint16_t fieldFrameHeightInMb = mbEncIFrameDistEnabled ?
1388 (uint16_t)m_downscaledFrameFieldHeightInMb4x : m_frameFieldHeightInMb;
1389
1390 MbEncCurbeG12 cmd(m_picParams->m_pictureCodingType);
1391
1392 cmd.m_curbeData.DW0.m_isInterlacedFrameFlag =
1393 (CodecHal_PictureIsFrame(m_picParams->m_currOriginalPic)) ? (m_picParams->m_fieldCodingFlag || m_picParams->m_fieldFrameCodingFlag) : 0;
1394 cmd.m_curbeData.DW0.m_isTopFieldFirst = cmd.m_curbeData.DW0.m_isInterlacedFrameFlag ? !m_picParams->m_interleavedFieldBFF : 0;
1395 cmd.m_curbeData.DW0.m_forceToSkip = 0;
1396 cmd.m_curbeData.DW4.m_pictureType = m_picParams->m_pictureCodingType;
1397 cmd.m_curbeData.DW4.m_fieldFlag = (CodecHal_PictureIsFrame(m_picParams->m_currOriginalPic)) ? 0 : 1;
1398 cmd.m_curbeData.DW4.m_picWidth = picWidthInMb;
1399 cmd.m_curbeData.DW4.m_picHeightMinus1 = fieldFrameHeightInMb - 1;
1400
1401 cmd.m_curbeData.DW7.m_bilinearEnable = 1;
1402 cmd.m_curbeData.DW7.m_mvCostScaleFactor = 1; // half-pel
1403 cmd.m_curbeData.DW7.m_idmShapeMode = 0;
1404
1405 cmd.m_curbeData.DW9.m_srcAccess = cmd.m_curbeData.DW9.m_refAccess = 0;
1406 cmd.m_curbeData.DW9.m_fieldCacheAllocationDis = 0;
1407
1408 // This is approximation using first slice
1409 // MPEG2 quantiser_scale_code legal range is [1, 31] inclusive
1410 if (m_sliceParams->m_quantiserScaleCode < 1)
1411 {
1412 m_sliceParams->m_quantiserScaleCode = 1;
1413 }
1414 else if (m_sliceParams->m_quantiserScaleCode > 31)
1415 {
1416 m_sliceParams->m_quantiserScaleCode = 31;
1417 }
1418
1419 cmd.m_curbeData.DW9.m_mbQPEnable = mbQpDataEnabled;
1420 cmd.m_curbeData.DW11.m_qpScaleCode = m_sliceParams->m_quantiserScaleCode;
1421 cmd.m_curbeData.DW2.m_maxNumSU = 0x10;
1422 cmd.m_curbeData.DW12.m_isFastMode = 0;
1423
1424 if (m_seqParams ->m_rateControlMethod == RATECONTROL_CQP)
1425 {
1426 cmd.m_curbeData.DW13.m_panicModeMBThreshold = 0xFFFF;
1427 }
1428
1429 cmd.m_curbeData.DW14.m_forwardHorizontalSearchRange = 4 << m_picParams->m_fcode00;
1430 cmd.m_curbeData.DW14.m_forwardVerticalSearchRange = 4 << m_picParams->m_fcode01;
1431 cmd.m_curbeData.DW15.m_backwardHorizontalSearchRange = 4 << m_picParams->m_fcode10;
1432 cmd.m_curbeData.DW15.m_backwardVerticalSearchRange = 4 << m_picParams->m_fcode11;
1433
1434 if (m_picParams->m_pictureCodingType == I_TYPE)
1435 {
1436 cmd.m_curbeData.DW2.m_value = 0;
1437 cmd.m_curbeData.DW4.m_pictureType = 0;
1438 cmd.m_curbeData.DW9.m_intraSAD = 0x2;
1439
1440 // Modify CURBE for distortion calculation.
1441 if (mbEncIFrameDistEnabled)
1442 {
1443 cmd.m_curbeData.DW4.m_iFrameMBDistortionDumpEnable = true;
1444 }
1445 else
1446 {
1447 // Make sure the distortion dump flag is disabled for the normal MBEnc case.
1448 // No need to reset the height and width since they are set
1449 // correctly above this if-else and not modified after.
1450 cmd.m_curbeData.DW4.m_iFrameMBDistortionDumpEnable = false;
1451 }
1452 }
1453 else if (m_picParams->m_pictureCodingType == P_TYPE)
1454 {
1455 cmd.m_curbeData.DW1.m_uniMixDisable = 0;
1456 cmd.m_curbeData.DW1.m_biWeight = 32;
1457 cmd.m_curbeData.DW2.m_maxLenSP = 0x09;
1458 cmd.m_curbeData.DW4.m_pictureType = 1;
1459 cmd.m_curbeData.DW9.m_interSAD = 2;
1460 cmd.m_curbeData.DW9.m_intraSAD = 2;
1461 cmd.m_curbeData.DW9.m_searchCtrl = 0;
1462 cmd.m_curbeData.DW9.m_subPelMode = 1;
1463 cmd.m_curbeData.DW9.m_skipType = 0;
1464 cmd.m_curbeData.DW9.m_subMbPartMask = 0x7E;
1465 cmd.m_curbeData.DW10.m_refWidth = 48;
1466 cmd.m_curbeData.DW10.m_refHeight = 40;
1467 cmd.m_curbeData.DW12.m_distScaleFactor = 0;
1468 cmd.m_curbeData.DW7.m_skipCenterMask = 0x55;
1469
1470 //Motion vector cost is taken from VME_LUTXY
1471 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1472 &(cmd.m_curbeData.MvCost),
1473 sizeof(uint32_t)* 2,
1474 m_vmeLutXyP,
1475 sizeof(uint32_t)* 2));
1476
1477 //VME_SEARCH_PATH
1478 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1479 &(cmd.m_curbeData.VmeSPath0),
1480 sizeof(uint32_t)* 16,
1481 m_vmeSPathP0,
1482 sizeof(uint32_t)* 16));
1483
1484 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1485 &(cmd.m_curbeData.VmeSPath1),
1486 sizeof(uint32_t)* 16,
1487 m_vmeSPathP1,
1488 sizeof(uint32_t)* 16));
1489
1490 //Interlaced motion vector cost is the same as progressive P frame
1491 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1492 &(cmd.m_curbeData.VmeSPath1.MvCostInterlace),
1493 sizeof(uint32_t)* 2,
1494 m_vmeLutXyP,
1495 sizeof(uint32_t)* 2));
1496
1497 }
1498 else// B_TYPE
1499 {
1500 cmd.m_curbeData.DW1.m_biWeight = 32;
1501 cmd.m_curbeData.DW1.m_refPixShift = 0;
1502 cmd.m_curbeData.DW2.m_maxLenSP = 0x05;
1503 cmd.m_curbeData.DW4.m_pictureType = 2;
1504 cmd.m_curbeData.DW9.m_subMbPartMask = 0x7E;
1505 cmd.m_curbeData.DW9.m_subPelMode = 1;
1506 cmd.m_curbeData.DW9.m_skipType = 0;
1507 cmd.m_curbeData.DW9.m_searchCtrl = 7;
1508 cmd.m_curbeData.DW9.m_interSAD = 2;
1509 cmd.m_curbeData.DW9.m_intraSAD = 2;
1510 cmd.m_curbeData.DW10.m_refWidth = 32;
1511 cmd.m_curbeData.DW10.m_refHeight = 32;
1512 cmd.m_curbeData.DW7.m_skipCenterMask = 0xFF;
1513
1514 switch (m_picParams->m_gopRefDist)
1515 {
1516 case 3:
1517 cmd.m_curbeData.DW12.m_distScaleFactor = (m_frameNumB > 1) ? 43 : 21;
1518 break;
1519 case 4:
1520 cmd.m_curbeData.DW12.m_distScaleFactor = (m_frameNumB << 4);
1521 break;
1522 default:
1523 cmd.m_curbeData.DW12.m_distScaleFactor = 32;
1524 break;
1525 }
1526
1527 //Motion vector cost is taken from VME_LUTXY
1528 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1529 &(cmd.m_curbeData.MvCost), sizeof(uint32_t)* 2,
1530 m_vmeLutXyB,
1531 sizeof(uint32_t)* 2));
1532
1533 //VME_SEARCH_PATH
1534 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1535 &(cmd.m_curbeData.VmeSPath0),
1536 sizeof(uint32_t)* 16,
1537 m_vmeSPathB0,
1538 sizeof(uint32_t)* 16));
1539
1540 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1541 &(cmd.m_curbeData.VmeSPath1),
1542 sizeof(uint32_t)* 16,
1543 m_vmeSPathB1,
1544 sizeof(uint32_t)* 16));
1545
1546 //Interlaced motion vector cost is the same as progressive P frame
1547 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1548 &(cmd.m_curbeData.VmeSPath1.MvCostInterlace),
1549 sizeof(uint32_t)* 2,
1550 m_vmeLutXyP,
1551 sizeof(uint32_t)* 2));
1552
1553 }
1554
1555 //ModeCost for P/B pictures
1556 if (m_picParams->m_pictureCodingType != I_TYPE)
1557 {
1558 cmd.m_curbeData.VmeSPath0.DW30.m_value = 0x83; // Setting mode 0 cost to 0x83 (131)
1559 cmd.m_curbeData.VmeSPath0.DW31.m_value = 0x41414141; // Set mode 4, 5, 6, 7 costs to 0x41 (67)
1560 cmd.m_curbeData.DW8.m_mode8Cost = 0x41;
1561 }
1562
1563 cmd.m_curbeData.DW48.m_value = 0x05000000; // BB-End Command
1564 cmd.m_curbeData.DW49.m_value = m_mbEncBindingTable.m_mbEncPakObj;
1565 cmd.m_curbeData.DW50.m_value = m_mbEncBindingTable.m_mbEncPakObjPrev;
1566 cmd.m_curbeData.DW51.m_value = m_mbEncBindingTable.m_mbEncCurrentY;
1567 cmd.m_curbeData.DW52.m_value = m_mbEncBindingTable.m_mbEncCurrentPic; // Also FWD REF & BWD REF too, +1, +2 respectively
1568 cmd.m_curbeData.DW53.m_value = m_mbEncBindingTable.m_mbEncInterlaceFrameCurrentPic; // Also Int BWD Ref (+1)
1569 cmd.m_curbeData.DW54.m_value = m_mbEncBindingTable.m_mbEncBrcDistortionSurface;
1570 cmd.m_curbeData.DW55.m_value = m_mbEncBindingTable.m_mbEncMbControl;
1571 // P/B frames need software score board
1572 if (m_picParams->m_pictureCodingType != I_TYPE)
1573 {
1574 cmd.m_curbeData.DW56.m_value = m_mbEncBindingTable.m_mbEncScoreboard;
1575 }
1576
1577 PMHW_KERNEL_STATE kernelState;
1578 // Initialize DSH kernel region
1579 if (mbEncIFrameDistEnabled)
1580 {
1581 kernelState = &m_brcKernelStates[CODECHAL_ENCODE_BRC_IDX_IFRAMEDIST];
1582 }
1583 else
1584 {
1585 // wPictureCodingType: I_TYPE = 1, P_TYPE = 2, B_TYPE = 3
1586 // KernelStates are I: 0, P: 1, B: 2
1587 // m_mbEncKernelStates: I: m_mbEncKernelStates[0], P: m_mbEncKernelStates[1], B: m_mbEncKernelStates[2]
1588 uint32_t krnStateIdx = m_pictureCodingType - 1;
1589 kernelState = &m_mbEncKernelStates[krnStateIdx];
1590 }
1591 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernelState->m_dshRegion.AddData(
1592 &cmd,
1593 kernelState->dwCurbeOffset,
1594 cmd.m_byteSize));
1595
1596 return eStatus;
1597
1598 }
1599
SendMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,bool mbEncIFrameDistEnabled)1600 MOS_STATUS CodechalEncodeMpeg2G12::SendMbEncSurfaces(
1601 PMOS_COMMAND_BUFFER cmdBuffer,
1602 bool mbEncIFrameDistEnabled)
1603 {
1604 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1605
1606 CODECHAL_ENCODE_FUNCTION_ENTER;
1607
1608 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
1609
1610 auto currPicSurface = mbEncIFrameDistEnabled ? m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER) : m_rawSurfaceToEnc;
1611
1612 // forward reference
1613 if (m_picIdx[0].bValid)
1614 {
1615 uint8_t picIdx0 = m_picIdx[0].ucPicIdx;
1616
1617 if (picIdx0 < CODECHAL_NUM_UNCOMPRESSED_SURFACE_MPEG2)
1618 {
1619 CodecHalGetResourceInfo(m_osInterface, &m_refList[picIdx0]->sRefBuffer);
1620 }
1621 }
1622
1623 // backward reference
1624 if (m_picIdx[1].bValid)
1625 {
1626 uint8_t picIdx1 = m_picIdx[1].ucPicIdx;
1627 if (picIdx1 < CODECHAL_NUM_UNCOMPRESSED_SURFACE_MPEG2)
1628 {
1629 CodecHalGetResourceInfo(m_osInterface, &m_refList[picIdx1]->sRefBuffer);
1630 }
1631 }
1632
1633 PMHW_KERNEL_STATE kernelState;
1634 if (mbEncIFrameDistEnabled)
1635 {
1636 kernelState = &m_brcKernelStates[CODECHAL_ENCODE_BRC_IDX_IFRAMEDIST];
1637 }
1638 else
1639 {
1640 // wPictureCodingType: I_TYPE = 1, P_TYPE = 2, B_TYPE = 3
1641 // KernelStates are I: 0, P: 1, B: 2
1642 // m_mbEncKernelStates: I: m_mbEncKernelStates[0], P: m_mbEncKernelStates[1], B: m_mbEncKernelStates[2]
1643 uint32_t krnStateIdx = m_pictureCodingType - 1;
1644
1645 kernelState = &m_mbEncKernelStates[krnStateIdx];
1646 }
1647
1648 auto presMbCodeBuffer = &m_refList[m_currReconstructedPic.FrameIdx]->resRefMbCodeBuffer;
1649 auto presPrevMbCodeBuffer = &m_refList[m_prevMBCodeIdx]->resRefMbCodeBuffer;
1650
1651 // Caution: if PAFF supports added, need to make sure each field get correct surface pointer
1652 // PAK Obj command buffer
1653 uint32_t pakSize = (uint32_t)m_picWidthInMb * m_frameFieldHeightInMb * 16 * 4; // 12 DW for MB + 4 DW for MV
1654 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
1655
1656 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1657 surfaceCodecParams.presBuffer = presMbCodeBuffer;
1658 surfaceCodecParams.dwSize = pakSize;
1659 surfaceCodecParams.dwOffset = (uint32_t)m_mbcodeBottomFieldOffset;
1660 surfaceCodecParams.dwCacheabilityControl =
1661 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
1662 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncPakObj;
1663 surfaceCodecParams.bRenderTarget = true;
1664 surfaceCodecParams.bIsWritable = true;
1665 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1666 m_hwInterface,
1667 cmdBuffer,
1668 &surfaceCodecParams,
1669 kernelState));
1670
1671 // Prev PAK Obj command buffer
1672 pakSize = (uint32_t)m_picWidthInMb * m_frameFieldHeightInMb * 16 * 4; // 12 DW for MB + 4 DW for MV
1673
1674 // verify if the current frame is not the first frame
1675 if (!Mos_ResourceIsNull(presPrevMbCodeBuffer) &&
1676 !m_firstFrame)
1677 {
1678 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1679 surfaceCodecParams.presBuffer = presPrevMbCodeBuffer;
1680 surfaceCodecParams.dwSize = pakSize;
1681 surfaceCodecParams.dwOffset = (uint32_t)m_mbcodeBottomFieldOffset;
1682 surfaceCodecParams.dwCacheabilityControl =
1683 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
1684 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncPakObjPrev;
1685 surfaceCodecParams.bRenderTarget = true;
1686 surfaceCodecParams.bIsWritable = true;
1687 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1688 m_hwInterface,
1689 cmdBuffer,
1690 &surfaceCodecParams,
1691 kernelState));
1692 }
1693
1694 // Current Picture Y
1695 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1696 surfaceCodecParams.bIs2DSurface = true;
1697 surfaceCodecParams.psSurface = currPicSurface;
1698 surfaceCodecParams.dwCacheabilityControl =
1699 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
1700 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncCurrentY;
1701 surfaceCodecParams.dwVerticalLineStride = m_verticalLineStride;
1702 surfaceCodecParams.dwVerticalLineStrideOffset = m_verticalLineStrideOffset;
1703
1704 #ifdef _MMC_SUPPORTED
1705 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1706 #endif
1707 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1708 m_hwInterface,
1709 cmdBuffer,
1710 &surfaceCodecParams,
1711 kernelState));
1712
1713 bool currBottomField = CodecHal_PictureIsBottomField(m_currOriginalPic) ? 1 : 0;
1714 uint8_t vDirection = (CodecHal_PictureIsFrame(m_currOriginalPic)) ? CODECHAL_VDIRECTION_FRAME :
1715 (currBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD;
1716
1717 // Current Picture
1718 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1719 surfaceCodecParams.bUseAdvState = true;
1720 surfaceCodecParams.psSurface = currPicSurface;
1721 surfaceCodecParams.dwCacheabilityControl =
1722 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
1723 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncCurrentPic;
1724 surfaceCodecParams.ucVDirection = vDirection;
1725
1726 #ifdef _MMC_SUPPORTED
1727 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1728 #endif
1729 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1730 m_hwInterface,
1731 cmdBuffer,
1732 &surfaceCodecParams,
1733 kernelState));
1734
1735 uint8_t picIdx0 = CODECHAL_NUM_UNCOMPRESSED_SURFACE_MPEG2;
1736 uint8_t picIdx1 = CODECHAL_NUM_UNCOMPRESSED_SURFACE_MPEG2;
1737 bool refL0BottomField = false;
1738 bool refL1BottomField = false;
1739
1740 if (m_picIdx[0].bValid)
1741 {
1742 picIdx0 = m_picIdx[0].ucPicIdx;
1743 refL0BottomField = (CodecHal_PictureIsBottomField(m_currOriginalPic)) ? 1 : 0;
1744 }
1745
1746 if (m_picIdx[1].bValid)
1747 {
1748 picIdx1 = m_picIdx[1].ucPicIdx;
1749 refL1BottomField = (CodecHal_PictureIsBottomField(m_currOriginalPic)) ? 1 : 0;
1750 }
1751
1752 // forward reference
1753 if (picIdx0 < CODECHAL_NUM_UNCOMPRESSED_SURFACE_MPEG2)
1754 {
1755 if (m_verticalLineStride == CODECHAL_VLINESTRIDE_FIELD)
1756 {
1757 vDirection = (refL0BottomField ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD);
1758 }
1759
1760 // Picture Y
1761 CodecHalGetResourceInfo(m_osInterface, &m_refList[picIdx0]->sRefBuffer);
1762
1763 // Picture Y VME
1764 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1765 surfaceCodecParams.bUseAdvState = true;
1766 surfaceCodecParams.psSurface = &m_refList[picIdx0]->sRefBuffer;
1767 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncForwardPic;
1768 surfaceCodecParams.ucVDirection = vDirection;
1769 surfaceCodecParams.dwCacheabilityControl =
1770 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
1771
1772 #ifdef _MMC_SUPPORTED
1773 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1774 #endif
1775 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1776 m_hwInterface,
1777 cmdBuffer,
1778 &surfaceCodecParams,
1779 kernelState));
1780
1781 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncForwardPic + 1;
1782 #ifdef _MMC_SUPPORTED
1783 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1784 #endif
1785 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1786 m_hwInterface,
1787 cmdBuffer,
1788 &surfaceCodecParams,
1789 kernelState));
1790
1791 }
1792
1793 // backward reference
1794 if (picIdx1 < CODECHAL_NUM_UNCOMPRESSED_SURFACE_MPEG2)
1795 {
1796 if (m_verticalLineStride == CODECHAL_VLINESTRIDE_FIELD)
1797 {
1798 vDirection = (refL1BottomField ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD);
1799 }
1800
1801 CodecHalGetResourceInfo(m_osInterface, &m_refList[picIdx1]->sRefBuffer);
1802
1803 // Picture Y VME
1804 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1805 surfaceCodecParams.bUseAdvState = true;
1806 surfaceCodecParams.psSurface = &m_refList[picIdx1]->sRefBuffer;
1807 surfaceCodecParams.dwCacheabilityControl =
1808 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
1809 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncBackwardPic;
1810 surfaceCodecParams.ucVDirection = vDirection;
1811
1812 #ifdef _MMC_SUPPORTED
1813 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1814 #endif
1815 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1816 m_hwInterface,
1817 cmdBuffer,
1818 &surfaceCodecParams,
1819 kernelState));
1820
1821 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncBackwardPic + 1;
1822 #ifdef _MMC_SUPPORTED
1823 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1824 #endif
1825 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1826 m_hwInterface,
1827 cmdBuffer,
1828 &surfaceCodecParams,
1829 kernelState));
1830 }
1831
1832 // Interlace Frame
1833 if ((CodecHal_PictureIsFrame(m_picParams->m_currOriginalPic)) &&
1834 (m_picParams->m_fieldCodingFlag || m_picParams->m_fieldFrameCodingFlag))
1835 {
1836 // Current Picture Interlace
1837 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1838 surfaceCodecParams.bUseAdvState = true;
1839 surfaceCodecParams.psSurface = currPicSurface;
1840 surfaceCodecParams.dwCacheabilityControl =
1841 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
1842 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncInterlaceFrameCurrentPic;
1843 surfaceCodecParams.ucVDirection = vDirection;
1844
1845 #ifdef _MMC_SUPPORTED
1846 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1847 #endif
1848 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1849 m_hwInterface,
1850 cmdBuffer,
1851 &surfaceCodecParams,
1852 kernelState));
1853
1854 if (picIdx1 < CODECHAL_NUM_UNCOMPRESSED_SURFACE_MPEG2)
1855 {
1856 // Picture Y VME
1857 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1858 surfaceCodecParams.bUseAdvState = true;
1859 surfaceCodecParams.psSurface = &m_refList[picIdx1]->sRefBuffer;
1860 surfaceCodecParams.dwCacheabilityControl =
1861 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
1862 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncInterlaceFrameBackwardPic;
1863 surfaceCodecParams.ucVDirection = vDirection;
1864
1865 #ifdef _MMC_SUPPORTED
1866 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1867 #endif
1868 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1869 m_hwInterface,
1870 cmdBuffer,
1871 &surfaceCodecParams,
1872 kernelState));
1873
1874 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncInterlaceFrameBackwardPic + 1;
1875
1876 #ifdef _MMC_SUPPORTED
1877 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetSurfaceParams(&surfaceCodecParams));
1878 #endif
1879 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1880 m_hwInterface,
1881 cmdBuffer,
1882 &surfaceCodecParams,
1883 kernelState));
1884 }
1885 }
1886
1887 // BRC distortion data buffer for I frame
1888 if (mbEncIFrameDistEnabled)
1889 {
1890 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1891 surfaceCodecParams.bIs2DSurface = true;
1892 surfaceCodecParams.bMediaBlockRW = true;
1893 surfaceCodecParams.psSurface = &m_brcBuffers.sMeBrcDistortionBuffer;
1894 surfaceCodecParams.dwOffset = m_brcBuffers.dwMeBrcDistortionBottomFieldOffset;
1895 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncBrcDistortionSurface;
1896 surfaceCodecParams.bRenderTarget = true;
1897 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1898 m_hwInterface,
1899 cmdBuffer,
1900 &surfaceCodecParams,
1901 kernelState));
1902 }
1903
1904 // MB-control surface for MB level QP, SkipEnable and NonSkipEnable
1905 if (m_mbQpDataEnabled)
1906 {
1907 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1908 surfaceCodecParams.bIs2DSurface = true;
1909 surfaceCodecParams.bMediaBlockRW = true;
1910 surfaceCodecParams.psSurface = &m_mbQpDataSurface;
1911 surfaceCodecParams.dwCacheabilityControl =
1912 m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MB_QP_CODEC].Value;
1913 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncMbControl;
1914 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1915 m_hwInterface,
1916 cmdBuffer,
1917 &surfaceCodecParams,
1918 kernelState));
1919 }
1920
1921 if (!m_useHwScoreboard &&
1922 m_pictureCodingType != I_TYPE)
1923 {
1924 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1925 surfaceCodecParams.bIs2DSurface = true;
1926 surfaceCodecParams.bMediaBlockRW = true;
1927 surfaceCodecParams.psSurface = m_swScoreboardState->GetCurSwScoreboardSurface();
1928 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MB_QP_CODEC].Value;
1929 surfaceCodecParams.dwBindingTableOffset = m_mbEncBindingTable.m_mbEncScoreboard;
1930 surfaceCodecParams.bUse32UINTSurfaceFormat = true;
1931 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1932 m_hwInterface,
1933 cmdBuffer,
1934 &surfaceCodecParams,
1935 kernelState));
1936 }
1937 return eStatus;
1938 }
1939
SendPrologWithFrameTracking(PMOS_COMMAND_BUFFER cmdBuffer,bool frameTracking,MHW_MI_MMIOREGISTERS * mmioRegister)1940 MOS_STATUS CodechalEncodeMpeg2G12::SendPrologWithFrameTracking(
1941 PMOS_COMMAND_BUFFER cmdBuffer,
1942 bool frameTracking,
1943 MHW_MI_MMIOREGISTERS *mmioRegister)
1944 {
1945 if (MOS_VE_SUPPORTED(m_osInterface) && cmdBuffer->Attributes.pAttriVe)
1946 {
1947 PMOS_CMD_BUF_ATTRI_VE attriExt =
1948 (PMOS_CMD_BUF_ATTRI_VE)(cmdBuffer->Attributes.pAttriVe);
1949 attriExt->bUseVirtualEngineHint = true;
1950 attriExt->VEngineHintParams.NeedSyncWithPrevious = 1;
1951 }
1952
1953 MHW_MI_FORCE_WAKEUP_PARAMS forceWakeupParams;
1954 MOS_ZeroMemory(&forceWakeupParams, sizeof(MHW_MI_FORCE_WAKEUP_PARAMS));
1955 forceWakeupParams.bMFXPowerWellControl = true;
1956 forceWakeupParams.bMFXPowerWellControlMask = true;
1957 forceWakeupParams.bHEVCPowerWellControl = false;
1958 forceWakeupParams.bHEVCPowerWellControlMask = true;
1959 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiForceWakeupCmd(
1960 cmdBuffer,
1961 &forceWakeupParams));
1962
1963 return CodechalEncoderState::SendPrologWithFrameTracking(cmdBuffer, frameTracking, mmioRegister);
1964 }
1965
InitMmcState()1966 MOS_STATUS CodechalEncodeMpeg2G12::InitMmcState()
1967 {
1968 CODECHAL_ENCODE_FUNCTION_ENTER;
1969 #ifdef _MMC_SUPPORTED
1970 m_mmcState = MOS_New(CodechalMmcEncodeMpeg2G12, m_hwInterface, this);
1971 CODECHAL_ENCODE_CHK_NULL_RETURN(m_mmcState);
1972 #endif
1973 return MOS_STATUS_SUCCESS;
1974 }
1975
ExecuteKernelFunctions()1976 MOS_STATUS CodechalEncodeMpeg2G12::ExecuteKernelFunctions()
1977 {
1978 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1979
1980 CODECHAL_ENCODE_FUNCTION_ENTER;
1981
1982 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
1983 m_rawSurfaceToEnc,
1984 CodechalDbgAttr::attrEncodeRawInputSurface,
1985 "SrcSurf")));
1986
1987 m_firstTaskInPhase = true;
1988 m_lastTaskInPhase = !m_singleTaskPhaseSupported;
1989 m_lastEncPhase = false;
1990
1991 m_setRequestedEUSlices = (m_brcEnabled &&
1992 m_sliceStateEnable &&
1993 (m_frameHeight * m_frameWidth) >= m_hwInterface->m_mpeg2SSDResolutionThreshold) ? true : false;
1994
1995 m_hwInterface->m_numRequestedEuSlices = (m_setRequestedEUSlices) ?
1996 m_sliceShutdownRequestState : m_sliceShutdownDefaultState;
1997
1998 // Csc, Downscaling, and/or 10-bit to 8-bit conversion
1999 // Scaling is only used to calculate distortions in case of Mpeg2
2000 CODECHAL_ENCODE_CHK_NULL_RETURN(m_cscDsState);
2001
2002 CodechalEncodeCscDs::KernelParams cscScalingKernelParams;
2003 MOS_ZeroMemory(&cscScalingKernelParams, sizeof(cscScalingKernelParams));
2004 cscScalingKernelParams.bLastTaskInPhaseCSC =
2005 cscScalingKernelParams.bLastTaskInPhase4xDS = m_pictureCodingType == I_TYPE;
2006
2007 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cscDsState->KernelFunctions(&cscScalingKernelParams));
2008
2009 // P and B frames distortion calculations
2010 if (m_hmeSupported && (m_pictureCodingType != I_TYPE))
2011 {
2012 m_firstTaskInPhase = !m_singleTaskPhaseSupported;
2013 m_lastTaskInPhase = true;
2014
2015 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeMeKernel());
2016 }
2017
2018 MOS_SYNC_PARAMS syncParams;
2019
2020 // Scaling and HME are not dependent on the output from PAK
2021 if (m_waitForPak &&
2022 m_semaphoreObjCount &&
2023 !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
2024 {
2025 // Wait on PAK
2026 syncParams = g_cInitSyncParams;
2027 syncParams.GpuContext = m_renderContext;
2028 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
2029 syncParams.uiSemaphoreCount = m_semaphoreObjCount;
2030
2031 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
2032 m_semaphoreObjCount = 0; //reset
2033 }
2034
2035 m_firstTaskInPhase = true;
2036 if (m_brcEnabled)
2037 {
2038 if (m_pictureCodingType == I_TYPE)
2039 {
2040 // The reset/init is only valid for I frames
2041 if (m_brcInit || m_brcReset)
2042 {
2043 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeBrcInitResetKernel());
2044 m_firstTaskInPhase = !m_singleTaskPhaseSupported;
2045 }
2046
2047 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeMbEncKernel(true));
2048 m_firstTaskInPhase = !m_singleTaskPhaseSupported;
2049 }
2050
2051 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeBrcUpdateKernel());
2052 m_firstTaskInPhase = !m_singleTaskPhaseSupported;
2053 }
2054
2055 if (!m_useHwScoreboard && m_pictureCodingType != I_TYPE)
2056 {
2057 CodechalEncodeSwScoreboard::KernelParams swScoreboardKernelParames;
2058 MOS_ZeroMemory(&swScoreboardKernelParames, sizeof(swScoreboardKernelParames));
2059
2060 m_swScoreboardState->SetDependencyPattern(m_pictureCodingType == P_TYPE ?
2061 dependencyWavefront45Degree : dependencyWavefrontHorizontal);
2062 swScoreboardKernelParames.surfaceIndex = m_swScoreboardState->GetDependencyPattern();
2063
2064 m_swScoreboardState->SetCurSwScoreboardSurfaceIndex(swScoreboardKernelParames.surfaceIndex);
2065
2066 if (Mos_ResourceIsNull(&m_swScoreboardState->GetCurSwScoreboardSurface()->OsResource))
2067 {
2068 swScoreboardKernelParames.scoreboardWidth = m_picWidthInMb;
2069 swScoreboardKernelParames.scoreboardHeight = m_frameFieldHeightInMb;
2070 swScoreboardKernelParames.swScoreboardSurfaceWidth = swScoreboardKernelParames.scoreboardWidth * 4;
2071 swScoreboardKernelParames.swScoreboardSurfaceHeight = swScoreboardKernelParames.scoreboardHeight;
2072
2073 m_swScoreboardState->Execute(&swScoreboardKernelParames);
2074 }
2075
2076 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2077 &(m_swScoreboardState->GetCurSwScoreboardSurface())->OsResource,
2078 CodechalDbgAttr::attrOutput,
2079 "Out",
2080 (m_swScoreboardState->GetCurSwScoreboardSurface())->dwHeight * (m_swScoreboardState->GetCurSwScoreboardSurface())->dwPitch,
2081 0,
2082 CODECHAL_MEDIA_STATE_SW_SCOREBOARD_INIT)));
2083 }
2084
2085 m_lastTaskInPhase = true;
2086 m_lastEncPhase = true;
2087 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeMbEncKernel(false));
2088
2089 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
2090 {
2091 syncParams = g_cInitSyncParams;
2092 syncParams.GpuContext = m_renderContext;
2093 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
2094
2095 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
2096 }
2097
2098 CODECHAL_DEBUG_TOOL(
2099 if (m_hmeEnabled && m_brcEnabled)
2100 {
2101 CODECHAL_ME_OUTPUT_PARAMS meOutputParams;
2102 MOS_ZeroMemory(&meOutputParams, sizeof(CODECHAL_ME_OUTPUT_PARAMS));
2103 meOutputParams.psMeMvBuffer = m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me4xMvDataBuffer);
2104 meOutputParams.psMeBrcDistortionBuffer =
2105 m_brcDistortionBufferSupported ? &m_brcBuffers.sMeBrcDistortionBuffer : nullptr;
2106 meOutputParams.psMeDistortionBuffer = m_hmeKernel->GetSurface(CodechalKernelHme::SurfaceId::me4xDistortionBuffer);
2107 meOutputParams.b16xMeInUse = false;
2108 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2109 &meOutputParams.psMeMvBuffer->OsResource,
2110 CodechalDbgAttr::attrOutput,
2111 "MvData",
2112 meOutputParams.psMeMvBuffer->dwHeight *meOutputParams.psMeMvBuffer->dwPitch,
2113 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 32), 64) * (m_downscaledFrameFieldHeightInMb4x * 4) : 0,
2114 CODECHAL_MEDIA_STATE_4X_ME));
2115 if (!m_vdencStreamInEnabled && meOutputParams.psMeBrcDistortionBuffer)
2116 {
2117 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2118 &meOutputParams.psMeBrcDistortionBuffer->OsResource,
2119 CodechalDbgAttr::attrOutput,
2120 "BrcDist",
2121 meOutputParams.psMeBrcDistortionBuffer->dwHeight *meOutputParams.psMeBrcDistortionBuffer->dwPitch,
2122 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64) * MOS_ALIGN_CEIL((m_downscaledFrameFieldHeightInMb4x * 4), 8) : 0,
2123 CODECHAL_MEDIA_STATE_4X_ME));
2124 if (meOutputParams.psMeDistortionBuffer)
2125 {
2126 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2127 &meOutputParams.psMeDistortionBuffer->OsResource,
2128 CodechalDbgAttr::attrOutput,
2129 "MeDist",
2130 meOutputParams.psMeDistortionBuffer->dwHeight *meOutputParams.psMeDistortionBuffer->dwPitch,
2131 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64) * MOS_ALIGN_CEIL((m_downscaledFrameFieldHeightInMb4x * 4 * 10), 8) : 0,
2132 CODECHAL_MEDIA_STATE_4X_ME));
2133 }
2134 }
2135 // dump VDEncStreamin
2136 if (m_vdencStreamInEnabled)
2137 {
2138 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2139 &m_resVdencStreamInBuffer[m_currRecycledBufIdx],
2140 CodechalDbgAttr::attrOutput,
2141 "MvData",
2142 m_picWidthInMb * m_picHeightInMb* CODECHAL_CACHELINE_SIZE,
2143 0,
2144 CODECHAL_MEDIA_STATE_ME_VDENC_STREAMIN));
2145 }
2146 }
2147
2148 if (m_mbQpDataEnabled)
2149 {
2150 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2151 &m_mbQpDataSurface.OsResource,
2152 CodechalDbgAttr::attrInput,
2153 "MbQp",
2154 m_mbQpDataSurface.dwHeight*m_mbQpDataSurface.dwPitch,
2155 0,
2156 CODECHAL_MEDIA_STATE_ENC_QUALITY));
2157 }
2158 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2159 &m_brcBuffers.resBrcImageStatesWriteBuffer,
2160 CodechalDbgAttr::attrOutput,
2161 "ImgStateWrite",
2162 BRC_IMG_STATE_SIZE_PER_PASS * m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses(),
2163 0,
2164 CODECHAL_MEDIA_STATE_BRC_UPDATE));
2165
2166 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2167 &m_brcBuffers.resBrcHistoryBuffer,
2168 CodechalDbgAttr::attrOutput,
2169 "HistoryWrite",
2170 m_brcHistoryBufferSize,
2171 0,
2172 CODECHAL_MEDIA_STATE_BRC_UPDATE));
2173
2174 if (m_brcBuffers.pMbEncKernelStateInUse)
2175 {
2176 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
2177 CODECHAL_MEDIA_STATE_ENC_NORMAL,
2178 m_brcBuffers.pMbEncKernelStateInUse));
2179 }
2180 if (m_mbencBrcBufferSize>0)
2181 {
2182 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2183 &m_brcBuffers.resMbEncBrcBuffer,
2184 CodechalDbgAttr::attrOutput,
2185 "MbEncBRCWrite",
2186 m_mbencBrcBufferSize,
2187 0,
2188 CODECHAL_MEDIA_STATE_BRC_UPDATE));
2189 }
2190
2191 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2192 &m_brcBuffers.resBrcPicHeaderOutputBuffer,
2193 CodechalDbgAttr::attrOutput,
2194 "PicHeaderWrite",
2195 CODEC_ENCODE_MPEG2_BRC_PIC_HEADER_SURFACE_SIZE,
2196 0,
2197 CODECHAL_MEDIA_STATE_BRC_UPDATE));
2198 )
2199
2200 // Reset after BRC Init has been processed
2201 m_brcInit = false;
2202
2203 m_setRequestedEUSlices = false;
2204
2205 // Reset indices for next frame
2206 if (m_brcEnabled)
2207 {
2208 m_mbEncCurbeSetInBrcUpdate = false;
2209 }
2210
2211 return eStatus;
2212 }
2213
ResizeOnResChange()2214 void CodechalEncodeMpeg2G12::ResizeOnResChange()
2215 {
2216 CODECHAL_ENCODE_FUNCTION_ENTER;
2217
2218 CodechalEncoderState::ResizeOnResChange();
2219
2220 // need to re-allocate surfaces according to resolution
2221 m_swScoreboardState->ReleaseResources();
2222 }
2223
UpdateCmdBufAttribute(PMOS_COMMAND_BUFFER cmdBuffer,bool renderEngineInUse)2224 MOS_STATUS CodechalEncodeMpeg2G12::UpdateCmdBufAttribute(
2225 PMOS_COMMAND_BUFFER cmdBuffer,
2226 bool renderEngineInUse)
2227 {
2228 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2229
2230 // should not be there. Will remove it in the next change
2231 CODECHAL_ENCODE_FUNCTION_ENTER;
2232 if (MOS_VE_SUPPORTED(m_osInterface) && cmdBuffer->Attributes.pAttriVe)
2233 {
2234 PMOS_CMD_BUF_ATTRI_VE attriExt =
2235 (PMOS_CMD_BUF_ATTRI_VE)(cmdBuffer->Attributes.pAttriVe);
2236
2237 memset(attriExt, 0, sizeof(MOS_CMD_BUF_ATTRI_VE));
2238 attriExt->bUseVirtualEngineHint =
2239 attriExt->VEngineHintParams.NeedSyncWithPrevious = !renderEngineInUse;
2240 }
2241
2242 return eStatus;
2243 }
2244
AddMediaVfeCmd(PMOS_COMMAND_BUFFER cmdBuffer,SendKernelCmdsParams * params)2245 MOS_STATUS CodechalEncodeMpeg2G12::AddMediaVfeCmd(
2246 PMOS_COMMAND_BUFFER cmdBuffer,
2247 SendKernelCmdsParams *params)
2248 {
2249 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
2250
2251 MHW_VFE_PARAMS_G12 vfeParams = {};
2252 vfeParams.pKernelState = params->pKernelState;
2253 vfeParams.eVfeSliceDisable = MHW_VFE_SLICE_ALL;
2254 vfeParams.dwMaximumNumberofThreads = m_encodeVfeMaxThreads;
2255 vfeParams.bFusedEuDispatch = false; // legacy mode
2256
2257 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_renderEngineInterface->AddMediaVfeCmd(cmdBuffer, &vfeParams));
2258
2259 return MOS_STATUS_SUCCESS;
2260 }
2261