1 /*
2 * Copyright (c) 2011-2019, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encode_avc_g9.cpp
24 //! \brief This file implements the C++ class/interface for Gen9 platform's AVC
25 //! DualPipe encoding to be used across CODECHAL components.
26 //!
27
28 #include "codechal_encode_avc_g9.h"
29 #include "igcodeckrn_g9.h"
30 #if USE_CODECHAL_DEBUG_TOOL
31 #include "codechal_debug_encode_par_g9.h"
32 #endif
33
34 #define CODECHAL_ENCODE_AVC_NUM_MBENC_CURBE_SIZE_G9 88
35 #define CODECHAL_ENCODE_AVC_SFD_OUTPUT_BUFFER_SIZE_G9 128
36
37 #define CODECHAL_ENCODE_AVC_SEI_BUFFER_SIZE 10240 // 10K is just estimation
38 #define CODECHAL_ENCODE_AVC_BRC_HISTORY_BUFFER_OFFSET_SCENE_CHANGED 0x2F8 // (368 + 12)*2 = 760
39
40 typedef enum _CODECHAL_BINDING_TABLE_OFFSET_2xSCALING_CM_G9
41 {
42 CODECHAL_2xSCALING_FRAME_SRC_Y_CM_G9 = 0,
43 CODECHAL_2xSCALING_FRAME_DST_Y_CM_G9 = 1,
44 CODECHAL_2xSCALING_FIELD_TOP_SRC_Y_CM_G9 = 0,
45 CODECHAL_2xSCALING_FIELD_TOP_DST_Y_CM_G9 = 1,
46 CODECHAL_2xSCALING_FIELD_BOT_SRC_Y_CM_G9 = 2,
47 CODECHAL_2xSCALING_FIELD_BOT_DST_Y_CM_G9 = 3,
48 CODECHAL_2xSCALING_NUM_SURFACES_CM_G9 = 4
49 }CODECHAL_BINDING_TABLE_OFFSET_2xSCALING_CM_G9;
50
51 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_BRC_UPDATE_G9
52 {
53 CODECHAL_ENCODE_AVC_BRC_UPDATE_HISTORY_G9 = 0,
54 CODECHAL_ENCODE_AVC_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G9 = 1,
55 CODECHAL_ENCODE_AVC_BRC_UPDATE_IMAGE_STATE_READ_G9 = 2,
56 CODECHAL_ENCODE_AVC_BRC_UPDATE_IMAGE_STATE_WRITE_G9 = 3,
57 CODECHAL_ENCODE_AVC_BRC_UPDATE_MBENC_CURBE_READ_G9 = 4,
58 CODECHAL_ENCODE_AVC_BRC_UPDATE_MBENC_CURBE_WRITE_G9 = 5,
59 CODECHAL_ENCODE_AVC_BRC_UPDATE_DISTORTION_G9 = 6,
60 CODECHAL_ENCODE_AVC_BRC_UPDATE_CONSTANT_DATA_G9 = 7,
61 CODECHAL_ENCODE_AVC_BRC_UPDATE_MB_QP_G9 = 8,
62 CODECHAL_ENCODE_AVC_BRC_UPDATE_NUM_SURFACES_G9 = 9
63 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_BRC_UPDATE_G9;
64
65 const CODECHAL_ENCODE_AVC_IPCM_THRESHOLD CodechalEncodeAvcEncG9::IPCM_Threshold_Table[5] =
66 {
67 { 2, 3000 },
68 { 4, 3600 },
69 { 6, 5000 },
70 { 10, 7500 },
71 { 18, 9000 },
72 };
73
74 typedef struct _CODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_CM_G9
75 {
76 // uint32_t 0
77 union
78 {
79 struct
80 {
81 uint32_t BlockHeight : 16;
82 uint32_t BufferOffset : 16;
83 };
84 struct
85 {
86 uint32_t Value;
87 };
88 } DW0;
89
90 // uint32_t 1
91 union
92 {
93 struct
94 {
95 uint32_t SrcSurfaceIndex;
96 };
97 struct
98 {
99 uint32_t Value;
100 };
101 } DW1;
102
103 // uint32_t 2
104 union
105 {
106 struct
107 {
108 uint32_t DstSurfaceIndex;
109 };
110 struct
111 {
112 uint32_t Value;
113 };
114 } DW2;
115
116 // uint64_t PADDING
117 struct
118 {
119 uint32_t Reserved;
120 } PADDING;
121 } CODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_CM_G9, *PCODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_CM_G9;
122
123 static const CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9 g_cInit_CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9 =
124 {
125 // uint32_t 0
126 {
127 {
128 0
129 }
130 },
131
132 // uint32_t 1
133 {
134 {
135 0
136 }
137 },
138
139 // uint32_t 2
140 {
141 {
142 0
143 }
144 },
145
146 // uint32_t 3
147 {
148 {
149 0
150 }
151 },
152
153 // uint32_t 4
154 {
155 {
156 0
157 }
158 },
159
160 // uint32_t 5
161 {
162 {
163 0
164 }
165 },
166
167 // uint32_t 6
168 {
169 {
170 0
171 }
172 },
173
174 // uint32_t 7
175 {
176 {
177 0
178 }
179 },
180
181 // uint32_t 8
182 {
183 {
184 0,
185 0
186 }
187 },
188
189 // uint32_t 9
190 {
191 {
192 0,
193 0
194 }
195 },
196
197 // uint32_t 10
198 {
199 {
200 0,
201 0
202 }
203 },
204
205 // uint32_t 11
206 {
207 {
208 0,
209 1
210 }
211 },
212
213 // uint32_t 12
214 {
215 {
216 51,
217 0
218 }
219 },
220
221 // uint32_t 13
222 {
223 {
224 40,
225 60,
226 80,
227 120
228 }
229 },
230
231 // uint32_t 14
232 {
233 {
234 35,
235 60,
236 80,
237 120
238 }
239 },
240
241 // uint32_t 15
242 {
243 {
244 40,
245 60,
246 90,
247 115
248 }
249 },
250
251 // uint32_t 16
252 {
253 {
254 0,
255 0,
256 0,
257 0
258 }
259 },
260
261 // uint32_t 17
262 {
263 {
264 0,
265 0,
266 0,
267 0
268 }
269 },
270
271 // uint32_t 18
272 {
273 {
274 0,
275 0,
276 0,
277 0
278 }
279 },
280
281 // uint32_t 19
282 {
283 {
284 0,
285 0,
286 0,
287 0
288 }
289 },
290
291 // uint32_t 20
292 {
293 {
294 0,
295 0,
296 0,
297 0
298 }
299 },
300
301 // uint32_t 21
302 {
303 {
304 0,
305 0,
306 0,
307 0
308 }
309 },
310
311 // uint32_t 22
312 {
313 {
314 0,
315 0,
316 0,
317 0
318 }
319 },
320
321 // uint32_t 23
322 {
323 {
324 0
325 }
326 }
327 };
328
329 typedef struct _CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9
330 {
331 union
332 {
333 struct
334 {
335 uint32_t TargetSize : MOS_BITFIELD_RANGE(0, 31);
336 };
337 struct
338 {
339 uint32_t Value;
340 };
341 } DW0;
342
343 union
344 {
345 struct
346 {
347 uint32_t FrameNumber : MOS_BITFIELD_RANGE(0, 31);
348 };
349 struct
350 {
351 uint32_t Value;
352 };
353 } DW1;
354
355 union
356 {
357 struct
358 {
359 uint32_t SizeofPicHeaders : MOS_BITFIELD_RANGE(0, 31);
360 };
361 struct
362 {
363 uint32_t Value;
364 };
365 } DW2;
366
367 union
368 {
369 struct
370 {
371 uint32_t startGAdjFrame0 : MOS_BITFIELD_RANGE(0, 15);
372 uint32_t startGAdjFrame1 : MOS_BITFIELD_RANGE(16, 31);
373 };
374 struct
375 {
376 uint32_t Value;
377 };
378 } DW3;
379
380 union
381 {
382 struct
383 {
384 uint32_t startGAdjFrame2 : MOS_BITFIELD_RANGE(0, 15);
385 uint32_t startGAdjFrame3 : MOS_BITFIELD_RANGE(16, 31);
386 };
387 struct
388 {
389 uint32_t Value;
390 };
391 } DW4;
392
393 union
394 {
395 struct
396 {
397 uint32_t TargetSizeFlag : MOS_BITFIELD_RANGE(0, 7);
398 uint32_t BRCFlag : MOS_BITFIELD_RANGE(8, 15);
399 uint32_t MaxNumPAKs : MOS_BITFIELD_RANGE(16, 23);
400 uint32_t CurrFrameType : MOS_BITFIELD_RANGE(24, 31);
401 };
402 struct
403 {
404 uint32_t Value;
405 };
406 } DW5;
407
408 union
409 {
410 struct
411 {
412 uint32_t NumSkipFrames : MOS_BITFIELD_RANGE(0, 7);
413 uint32_t MinimumQP : MOS_BITFIELD_RANGE(8, 15);
414 uint32_t MaximumQP : MOS_BITFIELD_RANGE(16, 23);
415 uint32_t EnableForceToSkip : MOS_BITFIELD_BIT(24);
416 uint32_t EnableSlidingWindow : MOS_BITFIELD_BIT(25);
417 uint32_t Reserved : MOS_BITFIELD_RANGE(26, 31);
418 };
419 struct
420 {
421 uint32_t Value;
422 };
423 } DW6;
424
425 union
426 {
427 struct
428 {
429 uint32_t SizeSkipFrames : MOS_BITFIELD_RANGE(0, 31);
430 };
431 struct
432 {
433 uint32_t Value;
434 };
435 } DW7;
436
437 union
438 {
439 struct
440 {
441 uint32_t StartGlobalAdjustMult0 : MOS_BITFIELD_RANGE(0, 7);
442 uint32_t StartGlobalAdjustMult1 : MOS_BITFIELD_RANGE(8, 15);
443 uint32_t StartGlobalAdjustMult2 : MOS_BITFIELD_RANGE(16, 23);
444 uint32_t StartGlobalAdjustMult3 : MOS_BITFIELD_RANGE(24, 31);
445 };
446 struct
447 {
448 uint32_t Value;
449 };
450 } DW8;
451
452 union
453 {
454 struct
455 {
456 uint32_t StartGlobalAdjustMult4 : MOS_BITFIELD_RANGE(0, 7);
457 uint32_t StartGlobalAdjustDiv0 : MOS_BITFIELD_RANGE(8, 15);
458 uint32_t StartGlobalAdjustDiv1 : MOS_BITFIELD_RANGE(16, 23);
459 uint32_t StartGlobalAdjustDiv2 : MOS_BITFIELD_RANGE(24, 31);
460 };
461 struct
462 {
463 uint32_t Value;
464 };
465 } DW9;
466
467 union
468 {
469 struct
470 {
471 uint32_t StartGlobalAdjustDiv3 : MOS_BITFIELD_RANGE(0, 7);
472 uint32_t StartGlobalAdjustDiv4 : MOS_BITFIELD_RANGE(8, 15);
473 uint32_t QPThreshold0 : MOS_BITFIELD_RANGE(16, 23);
474 uint32_t QPThreshold1 : MOS_BITFIELD_RANGE(24, 31);
475 };
476 struct
477 {
478 uint32_t Value;
479 };
480 } DW10;
481
482 union
483 {
484 struct
485 {
486 uint32_t QPThreshold2 : MOS_BITFIELD_RANGE(0, 7);
487 uint32_t QPThreshold3 : MOS_BITFIELD_RANGE(8, 15);
488 uint32_t gRateRatioThreshold0 : MOS_BITFIELD_RANGE(16, 23);
489 uint32_t gRateRatioThreshold1 : MOS_BITFIELD_RANGE(24, 31);
490 };
491 struct
492 {
493 uint32_t Value;
494 };
495 } DW11;
496
497 union
498 {
499 struct
500 {
501 uint32_t gRateRatioThreshold2 : MOS_BITFIELD_RANGE(0, 7);
502 uint32_t gRateRatioThreshold3 : MOS_BITFIELD_RANGE(8, 15);
503 uint32_t gRateRatioThreshold4 : MOS_BITFIELD_RANGE(16, 23);
504 uint32_t gRateRatioThreshold5 : MOS_BITFIELD_RANGE(24, 31);
505 };
506 struct
507 {
508 uint32_t Value;
509 };
510 } DW12;
511
512 union
513 {
514 struct
515 {
516 uint32_t gRateRatioThresholdQP0 : MOS_BITFIELD_RANGE(0, 7);
517 uint32_t gRateRatioThresholdQP1 : MOS_BITFIELD_RANGE(8, 15);
518 uint32_t gRateRatioThresholdQP2 : MOS_BITFIELD_RANGE(16, 23);
519 uint32_t gRateRatioThresholdQP3 : MOS_BITFIELD_RANGE(24, 31);
520 };
521 struct
522 {
523 uint32_t Value;
524 };
525 } DW13;
526
527 union
528 {
529 struct
530 {
531 uint32_t gRateRatioThresholdQP4 : MOS_BITFIELD_RANGE(0, 7);
532 uint32_t gRateRatioThresholdQP5 : MOS_BITFIELD_RANGE(8, 15);
533 uint32_t gRateRatioThresholdQP6 : MOS_BITFIELD_RANGE(16, 23);
534 uint32_t QPIndexOfCurPic : MOS_BITFIELD_RANGE(24, 31);
535 };
536 struct
537 {
538 uint32_t Value;
539 };
540 } DW14;
541
542 union
543 {
544 struct
545 {
546 uint32_t QPIntraRefresh : MOS_BITFIELD_RANGE(0, 7);
547 uint32_t IntraRefreshMode : MOS_BITFIELD_RANGE(8, 15);
548 uint32_t Reserved1 : MOS_BITFIELD_RANGE(16, 23);
549 uint32_t Reserved2 : MOS_BITFIELD_RANGE(24, 31);
550 };
551 struct
552 {
553 uint32_t Value;
554 };
555 } DW15;
556
557 union
558 {
559 struct
560 {
561 uint32_t IntraRefreshYPos : MOS_BITFIELD_RANGE(0, 15);
562 uint32_t IntraRefreshXPos : MOS_BITFIELD_RANGE(16, 31);
563 };
564 struct
565 {
566 uint32_t Value;
567 };
568 } DW16;
569
570 union
571 {
572 struct
573 {
574 uint32_t IntraRefreshHeight : MOS_BITFIELD_RANGE(0, 15);
575 uint32_t IntraRefreshWidth : MOS_BITFIELD_RANGE(16, 31);
576 };
577 struct
578 {
579 uint32_t Value;
580 };
581 } DW17;
582
583 union
584 {
585 struct
586 {
587 uint32_t IntraRefreshOffFrames : MOS_BITFIELD_RANGE(0, 15);
588 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 31);
589 };
590 struct
591 {
592 uint32_t Value;
593 };
594 } DW18;
595
596 union
597 {
598 struct
599 {
600 uint32_t UserMaxFrame : MOS_BITFIELD_RANGE(0, 31);
601 };
602 struct
603 {
604 uint32_t Value;
605 };
606 } DW19;
607
608 union
609 {
610 struct
611 {
612 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31);
613 };
614 struct
615 {
616 uint32_t Value;
617 };
618 } DW20;
619
620 union
621 {
622 struct
623 {
624 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31);
625 };
626 struct
627 {
628 uint32_t Value;
629 };
630 } DW21;
631
632 union
633 {
634 struct
635 {
636 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31);
637 };
638 struct
639 {
640 uint32_t Value;
641 };
642 } DW22;
643
644 union
645 {
646 struct
647 {
648 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31);
649 };
650 struct
651 {
652 uint32_t Value;
653 };
654 } DW23;
655 } CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9, *PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9;
656 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9)) == 24);
657
658 static const CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9 g_cInit_CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9 =
659 {
660 // uint32_t 0
661 {
662 {
663 0
664 }
665 },
666
667 // uint32_t 1
668 {
669 {
670 0
671 }
672 },
673
674 // uint32_t 2
675 {
676 {
677 0
678 }
679 },
680
681 // uint32_t 3
682 {
683 {
684 10,
685 50
686 }
687 },
688
689 // uint32_t 4
690 {
691 {
692 100,
693 150
694 }
695 },
696
697 // uint32_t 5
698 {
699 {
700 0,
701 0,
702 0,
703 0
704 }
705 },
706
707 // uint32_t 6
708 {
709 {
710 0,
711 0,
712 0,
713 0,
714 0,
715 0
716 }
717 },
718
719 // uint32_t 7
720 {
721 {
722 0
723 }
724 },
725
726 // uint32_t 8
727 {
728 {
729 1,
730 1,
731 3,
732 2
733 }
734 },
735
736 // uint32_t 9
737 {
738 {
739 1,
740 40,
741 5,
742 5
743 }
744 },
745
746 // uint32_t 10
747 {
748 {
749 3,
750 1,
751 7,
752 18
753 }
754 },
755
756 // uint32_t 11
757 {
758 {
759 25,
760 37,
761 40,
762 75
763 }
764 },
765
766 // uint32_t 12
767 {
768 {
769 97,
770 103,
771 125,
772 160
773 }
774 },
775
776 // uint32_t 13
777 {
778 {
779 MOS_BITFIELD_VALUE((uint32_t)-3, 8),
780 MOS_BITFIELD_VALUE((uint32_t)-2, 8),
781 MOS_BITFIELD_VALUE((uint32_t)-1, 8),
782 0
783 }
784 },
785
786 // uint32_t 14
787 {
788 {
789 1,
790 2,
791 3,
792 0xff
793 }
794 },
795
796 // uint32_t 15
797 {
798 {
799 0,
800 0,
801 0,
802 0
803 }
804 },
805
806 // uint32_t 16
807 {
808 {
809 0,
810 0
811 }
812 },
813
814 // uint32_t 17
815 {
816 {
817 0,
818 0
819 }
820 },
821
822 // uint32_t 18
823 {
824 {
825 0,
826 0
827 }
828 },
829
830 // uint32_t 19
831 {
832 {
833 0
834 }
835 },
836
837 // uint32_t 20
838 {
839 {
840 0
841 }
842 },
843
844 // uint32_t 21
845 {
846 {
847 0
848 }
849 },
850
851 // uint32_t 22
852 {
853 {
854 0
855 }
856 },
857
858 // uint32_t 23
859 {
860 {
861 0
862 }
863 },
864 };
865
866 const uint32_t CodechalEncodeAvcEncG9::IntraModeCostForHighTextureMB[CODEC_AVC_NUM_QP]
867 {
868 0x00000303, 0x00000304, 0x00000404, 0x00000405, 0x00000505, 0x00000506, 0x00000607, 0x00000708,
869 0x00000809, 0x0000090a, 0x00000a0b, 0x00000b0c, 0x00000c0e, 0x00000e18, 0x00001819, 0x00001918,
870 0x00001a19, 0x00001b19, 0x00001d19, 0x00001e18, 0x00002818, 0x00002918, 0x00002a18, 0x00002b19,
871 0x00002d18, 0x00002e18, 0x00003818, 0x00003918, 0x00003a18, 0x00003b0f, 0x00003d0e, 0x00003e0e,
872 0x0000480e, 0x0000490e, 0x00004a0e, 0x00004b0d, 0x00004d0d, 0x00004e0d, 0x0000580e, 0x0000590e,
873 0x00005a0e, 0x00005b0d, 0x00005d0c, 0x00005e0b, 0x0000680a, 0x00006908, 0x00006a09, 0x00006b0a,
874 0x00006d0b, 0x00006e0d, 0x0000780e, 0x00007918
875 };
876
877 static const CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9 g_cInit_CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9 =
878 {
879 // uint32_t 0
880 {
881 {
882 0
883 }
884 },
885
886 // uint32_t 1
887 {
888 {
889 0
890 }
891 },
892
893 // uint32_t 2
894 {
895 {
896 0
897 }
898 },
899
900 // uint32_t 3
901 {
902 {
903 10,
904 50
905 }
906 },
907
908 // uint32_t 4
909 {
910 {
911 100,
912 150
913 }
914 },
915
916 // uint32_t 5
917 {
918 {
919 0,
920 0,
921 0,
922 0
923 }
924 },
925
926 // uint32_t 6
927 {
928 {
929 0,
930 0,
931 0,
932 0,
933 0,
934 0
935 }
936 },
937
938 // uint32_t 7
939 {
940 {
941 0
942 }
943 },
944
945 // uint32_t 8
946 {
947 {
948 1,
949 1,
950 3,
951 2
952 }
953 },
954
955 // uint32_t 9
956 {
957 {
958 1,
959 40,
960 5,
961 5
962 }
963 },
964
965 // uint32_t 10
966 {
967 {
968 3,
969 1,
970 7,
971 18
972 }
973 },
974
975 // uint32_t 11
976 {
977 {
978 25,
979 37,
980 40,
981 75
982 }
983 },
984
985 // uint32_t 12
986 {
987 {
988 97,
989 103,
990 125,
991 160
992 }
993 },
994
995 // uint32_t 13
996 {
997 {
998 MOS_BITFIELD_VALUE((uint32_t)-3, 8),
999 MOS_BITFIELD_VALUE((uint32_t)-2, 8),
1000 MOS_BITFIELD_VALUE((uint32_t)-1, 8),
1001 0
1002 }
1003 },
1004
1005 // uint32_t 14
1006 {
1007 {
1008 1,
1009 2,
1010 3,
1011 0xff
1012 }
1013 },
1014
1015 // uint32_t 15
1016 {
1017 {
1018 0,
1019 0,
1020 0,
1021 0
1022 }
1023 },
1024
1025 // uint32_t 16
1026 {
1027 {
1028 0
1029 }
1030 },
1031
1032 // uint32_t 17
1033 {
1034 {
1035 0
1036 }
1037 },
1038
1039 // uint32_t 18
1040 {
1041 {
1042 0
1043 }
1044 },
1045
1046 // uint32_t 19
1047 {
1048 {
1049 0
1050 }
1051 },
1052
1053 // uint32_t 20
1054 {
1055 {
1056 0
1057 }
1058 },
1059
1060 // uint32_t 21
1061 {
1062 {
1063 0
1064 }
1065 },
1066
1067 // uint32_t 22
1068 {
1069 {
1070 0
1071 }
1072 },
1073
1074 // uint32_t 23
1075 {
1076 {
1077 0
1078 }
1079 },
1080 };
1081
1082 static const CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9 g_cInit_CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9 =
1083 {
1084 // uint32_t 0
1085 {
1086 {
1087 0,
1088 0,
1089 0,
1090 0
1091 }
1092 },
1093
1094 // uint32_t 1
1095 {
1096 {
1097 0
1098 }
1099 },
1100
1101 // uint32_t 2
1102 {
1103 {
1104 0
1105 }
1106 },
1107
1108 // uint32_t 3
1109 {
1110 {
1111 0
1112 }
1113 },
1114
1115 // uint32_t 4
1116 {
1117 {
1118 0
1119 }
1120 },
1121
1122 // uint32_t 5
1123 {
1124 {
1125 0
1126 }
1127 },
1128
1129 // uint32_t 6
1130 {
1131 {
1132 0
1133 }
1134 }
1135 };
1136
CodechalEncodeAvcEncG9(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)1137 CodechalEncodeAvcEncG9::CodechalEncodeAvcEncG9(
1138 CodechalHwInterface * hwInterface,
1139 CodechalDebugInterface *debugInterface,
1140 PCODECHAL_STANDARD_INFO standardInfo) : CodechalEncodeAvcEnc(hwInterface, debugInterface, standardInfo)
1141 {
1142 CODECHAL_ENCODE_FUNCTION_ENTER;
1143
1144 m_needCheckCpEnabled = true;
1145
1146 CODECHAL_DEBUG_TOOL(
1147 CODECHAL_ENCODE_CHK_NULL_NO_STATUS_RETURN(m_encodeParState = MOS_New(CodechalDebugEncodeParG9, this));
1148 CreateAvcPar();
1149 )
1150 }
1151
~CodechalEncodeAvcEncG9()1152 CodechalEncodeAvcEncG9::~CodechalEncodeAvcEncG9()
1153 {
1154 CODECHAL_ENCODE_FUNCTION_ENTER;
1155
1156 CODECHAL_DEBUG_TOOL(
1157 DestroyAvcPar();
1158 MOS_Delete(m_encodeParState);
1159 )
1160 }
1161
InitializeState()1162 MOS_STATUS CodechalEncodeAvcEncG9::InitializeState()
1163 {
1164 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1165 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeAvcEnc::InitializeState());
1166
1167 m_brcHistoryBufferSize = CODECHAL_ENCODE_AVC_BRC_HISTORY_BUFFER_SIZE_G9;
1168 dwBrcConstantSurfaceWidth = CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_WIDTH_G9;
1169 dwBrcConstantSurfaceHeight = CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_HEIGHT_G9;
1170
1171 return eStatus;
1172 }
1173
InitMbBrcConstantDataBuffer(PCODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS params)1174 MOS_STATUS CodechalEncodeAvcEncG9::InitMbBrcConstantDataBuffer(PCODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS params)
1175
1176 {
1177 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1178
1179 CODECHAL_ENCODE_FUNCTION_ENTER;
1180
1181 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1182 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pOsInterface);
1183 CODECHAL_ENCODE_CHK_NULL_RETURN(params->presBrcConstantDataBuffer);
1184
1185 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeAvcEnc::InitMbBrcConstantDataBuffer(params));
1186
1187 if (params->wPictureCodingType == I_TYPE)
1188 {
1189 MOS_LOCK_PARAMS lockFlags;
1190 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
1191 lockFlags.WriteOnly = 1;
1192
1193 uint32_t* pData = (uint32_t*)params->pOsInterface->pfnLockResource(
1194 params->pOsInterface,
1195 params->presBrcConstantDataBuffer,
1196 &lockFlags);
1197 if (pData == nullptr)
1198 {
1199 eStatus = MOS_STATUS_UNKNOWN;
1200 return eStatus;
1201 }
1202
1203 // Update MbBrcConstantDataBuffer with high texture cost
1204 for (uint8_t qp = 0; qp < CODEC_AVC_NUM_QP; qp++)
1205 {
1206 // Writing to DW13 in each sub-array of 16 DWs
1207 *(pData + 13) = (uint32_t)IntraModeCostForHighTextureMB[qp];
1208 // 16 DWs per QP value
1209 pData += 16;
1210 }
1211
1212 params->pOsInterface->pfnUnlockResource(
1213 params->pOsInterface,
1214 params->presBrcConstantDataBuffer);
1215 }
1216
1217 return eStatus;
1218 }
1219
InitKernelStateWP()1220 MOS_STATUS CodechalEncodeAvcEncG9::InitKernelStateWP()
1221 {
1222 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1223
1224 CODECHAL_ENCODE_FUNCTION_ENTER;
1225
1226 pWPKernelState = MOS_New(MHW_KERNEL_STATE);
1227 CODECHAL_ENCODE_CHK_NULL_RETURN(pWPKernelState);
1228
1229 auto kernelStatePtr = pWPKernelState;
1230
1231 uint8_t* kernelBinary;
1232 uint32_t kernelSize;
1233
1234 MOS_STATUS status = CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize);
1235 CODECHAL_ENCODE_CHK_STATUS_RETURN(status);
1236
1237 CODECHAL_KERNEL_HEADER currKrnHeader;
1238 CODECHAL_ENCODE_CHK_STATUS_RETURN(pfnGetKernelHeaderAndSize(
1239 kernelBinary,
1240 ENC_WP,
1241 0,
1242 &currKrnHeader,
1243 &kernelSize));
1244 kernelStatePtr->KernelParams.iBTCount = CODECHAL_ENCODE_AVC_WP_NUM_SURFACES_G9;
1245 kernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
1246 kernelStatePtr->KernelParams.iCurbeLength = sizeof(CODECHAL_ENCODE_AVC_WP_CURBE_G9);
1247 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
1248 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
1249 kernelStatePtr->KernelParams.iIdCount = 1;
1250 kernelStatePtr->KernelParams.iInlineDataLength = 0;
1251
1252 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
1253 kernelStatePtr->KernelParams.pBinary = kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
1254 kernelStatePtr->KernelParams.iSize = kernelSize;
1255 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
1256 m_stateHeapInterface,
1257 kernelStatePtr->KernelParams.iBTCount,
1258 &kernelStatePtr->dwSshSize,
1259 &kernelStatePtr->dwBindingTableSize));
1260
1261 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
1262
1263 return eStatus;
1264 }
1265
GetMbEncKernelStateIdx(CodechalEncodeIdOffsetParams * params,uint32_t * kernelOffset)1266 MOS_STATUS CodechalEncodeAvcEncG9::GetMbEncKernelStateIdx(CodechalEncodeIdOffsetParams* params, uint32_t* kernelOffset)
1267 {
1268 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1269
1270 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1271 CODECHAL_ENCODE_CHK_NULL_RETURN(kernelOffset);
1272
1273 *kernelOffset = MBENC_I_OFFSET_CM;
1274
1275 if (params->EncFunctionType == CODECHAL_MEDIA_STATE_ENC_ADV)
1276 {
1277 *kernelOffset +=
1278 MBENC_TARGET_USAGE_CM * m_mbencNumTargetUsages;
1279 }
1280 else
1281 {
1282 if (params->EncFunctionType == CODECHAL_MEDIA_STATE_ENC_NORMAL)
1283 {
1284 *kernelOffset += MBENC_TARGET_USAGE_CM;
1285 }
1286 else if (params->EncFunctionType == CODECHAL_MEDIA_STATE_ENC_PERFORMANCE)
1287 {
1288 *kernelOffset += MBENC_TARGET_USAGE_CM * 2;
1289 }
1290 }
1291
1292 if (params->wPictureCodingType == P_TYPE)
1293 {
1294 *kernelOffset += MBENC_P_OFFSET_CM;
1295 }
1296 else if (params->wPictureCodingType == B_TYPE)
1297 {
1298 *kernelOffset += MBENC_B_OFFSET_CM;
1299 }
1300
1301 return eStatus;
1302 }
1303
SetCurbeAvcWP(PCODECHAL_ENCODE_AVC_WP_CURBE_PARAMS params)1304 MOS_STATUS CodechalEncodeAvcEncG9::SetCurbeAvcWP(PCODECHAL_ENCODE_AVC_WP_CURBE_PARAMS params)
1305 {
1306 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1307
1308 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1309
1310 auto slcParams = m_avcSliceParams;
1311 auto seqParams = m_avcSeqParam;
1312 auto kernelState = pWPKernelState;
1313 CODECHAL_ENCODE_ASSERT(seqParams->TargetUsage < NUM_TARGET_USAGE_MODES);
1314
1315 CODECHAL_ENCODE_AVC_WP_CURBE_G9 cmd;
1316 MOS_ZeroMemory(&cmd, sizeof(CODECHAL_ENCODE_AVC_WP_CURBE_G9));
1317
1318 /* Weights[i][j][k][m] is interpreted as:
1319
1320 i refers to reference picture list 0 or 1;
1321 j refers to reference list entry 0-31;
1322 k refers to data for the luma (Y) component when it is 0, the Cb chroma component when it is 1 and the Cr chroma component when it is 2;
1323 m refers to weight when it is 0 and offset when it is 1
1324 */
1325 cmd.DW0.DefaultWeight = slcParams->Weights[params->RefPicListIdx][params->WPIdx][0][0];
1326 cmd.DW0.DefaultOffset = slcParams->Weights[params->RefPicListIdx][params->WPIdx][0][1];
1327
1328 cmd.DW49.Log2WeightDenom = slcParams->luma_log2_weight_denom;
1329 cmd.DW49.ROI_enabled = 0;
1330
1331 cmd.DW50.InputSurface = CODECHAL_ENCODE_AVC_WP_INPUT_REF_SURFACE_G9;
1332 cmd.DW51.OutputSurface = CODECHAL_ENCODE_AVC_WP_OUTPUT_SCALED_SURFACE_G9;
1333
1334 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernelState->m_dshRegion.AddData(
1335 &cmd,
1336 kernelState->dwCurbeOffset,
1337 sizeof(cmd)));
1338
1339 return eStatus;
1340 }
1341
SetCurbeAvcBrcInitReset(PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS params)1342 MOS_STATUS CodechalEncodeAvcEncG9::SetCurbeAvcBrcInitReset(PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS params)
1343 {
1344 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1345
1346 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1347
1348 auto picParams = m_avcPicParam;
1349 auto seqParams = m_avcSeqParam;
1350 auto vuiParams = m_avcVuiParams;
1351 uint32_t profileLevelMaxFrame;
1352 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalAvcEncode_GetProfileLevelMaxFrameSize(
1353 seqParams,
1354 this,
1355 (uint32_t*)&profileLevelMaxFrame));
1356
1357 CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9 cmd = g_cInit_CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9;
1358 cmd.DW0.ProfileLevelMaxFrame = profileLevelMaxFrame;
1359 cmd.DW1.InitBufFullInBits = seqParams->InitVBVBufferFullnessInBit;
1360 cmd.DW2.BufSizeInBits = seqParams->VBVBufferSizeInBit;
1361 cmd.DW3.AverageBitRate = seqParams->TargetBitRate;
1362 cmd.DW4.MaxBitRate = seqParams->MaxBitRate;
1363 cmd.DW8.GopP =
1364 (seqParams->GopRefDist) ? ((seqParams->GopPicSize - 1) / seqParams->GopRefDist) : 0;
1365 cmd.DW9.GopB = seqParams->GopPicSize - 1 - cmd.DW8.GopP;
1366 cmd.DW9.FrameWidthInBytes = m_frameWidth;
1367 cmd.DW10.FrameHeightInBytes = m_frameHeight;
1368 cmd.DW12.NoSlices = m_numSlices;
1369
1370 // if VUI present, VUI data has high priority
1371 if (seqParams->vui_parameters_present_flag && seqParams->RateControlMethod != RATECONTROL_AVBR)
1372 {
1373 cmd.DW4.MaxBitRate =
1374 ((vuiParams->bit_rate_value_minus1[0] + 1) << (6 + vuiParams->bit_rate_scale));
1375
1376 if (seqParams->RateControlMethod == RATECONTROL_CBR)
1377 {
1378 cmd.DW3.AverageBitRate = cmd.DW4.MaxBitRate;
1379 }
1380 }
1381
1382 cmd.DW6.FrameRateM = seqParams->FramesPer100Sec;
1383 cmd.DW7.FrameRateD = 100;
1384 cmd.DW8.BRCFlag = (CodecHal_PictureIsFrame(m_currOriginalPic)) ? 0 : CODECHAL_ENCODE_BRCINIT_FIELD_PIC;
1385 // MBBRC should be skipped when BRC ROI is on
1386 cmd.DW8.BRCFlag |= (bMbBrcEnabled && !bBrcRoiEnabled) ? 0 : CODECHAL_ENCODE_BRCINIT_DISABLE_MBBRC;
1387
1388 if (seqParams->RateControlMethod == RATECONTROL_CBR)
1389 {
1390 cmd.DW4.MaxBitRate = cmd.DW3.AverageBitRate;
1391 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISCBR;
1392 }
1393 else if (seqParams->RateControlMethod == RATECONTROL_VBR)
1394 {
1395 if (cmd.DW4.MaxBitRate < cmd.DW3.AverageBitRate)
1396 {
1397 cmd.DW3.AverageBitRate = cmd.DW4.MaxBitRate; // Use max bit rate for HRD compliance
1398 }
1399 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISVBR;
1400 }
1401 else if (seqParams->RateControlMethod == RATECONTROL_AVBR)
1402 {
1403 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISAVBR;
1404 // For AVBR, max bitrate = target bitrate,
1405 cmd.DW4.MaxBitRate = cmd.DW3.AverageBitRate;
1406 }
1407 else if (seqParams->RateControlMethod == RATECONTROL_ICQ)
1408 {
1409 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISICQ;
1410 cmd.DW23.ACQP = seqParams->ICQQualityFactor;
1411 }
1412 else if (seqParams->RateControlMethod == RATECONTROL_VCM)
1413 {
1414 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISVCM;
1415 }
1416 else if (seqParams->RateControlMethod == RATECONTROL_QVBR)
1417 {
1418 if (cmd.DW4.MaxBitRate < cmd.DW3.AverageBitRate)
1419 {
1420 cmd.DW3.AverageBitRate = cmd.DW4.MaxBitRate; // Use max bit rate for HRD compliance
1421 }
1422 cmd.DW8.BRCFlag = cmd.DW8.BRCFlag | CODECHAL_ENCODE_BRCINIT_ISQVBR;
1423 // use ICQQualityFactor to determine the larger Qp for each MB
1424 cmd.DW23.ACQP = seqParams->ICQQualityFactor;
1425 }
1426
1427 cmd.DW10.AVBRAccuracy = usAVBRAccuracy;
1428 cmd.DW11.AVBRConvergence = usAVBRConvergence;
1429
1430 // Set dynamic thresholds
1431 double dInputBitsPerFrame =
1432 ((double)(cmd.DW4.MaxBitRate) * (double)(cmd.DW7.FrameRateD) /
1433 (double)(cmd.DW6.FrameRateM));
1434 if (CodecHal_PictureIsField(m_currOriginalPic))
1435 {
1436 dInputBitsPerFrame *= 0.5;
1437 }
1438
1439 if (cmd.DW2.BufSizeInBits == 0)
1440 {
1441 cmd.DW2.BufSizeInBits = (uint32_t)dInputBitsPerFrame * 4;
1442 }
1443
1444 if (cmd.DW1.InitBufFullInBits == 0)
1445 {
1446 cmd.DW1.InitBufFullInBits = 7 * cmd.DW2.BufSizeInBits / 8;
1447 }
1448 if (cmd.DW1.InitBufFullInBits < (uint32_t)(dInputBitsPerFrame * 2))
1449 {
1450 cmd.DW1.InitBufFullInBits = (uint32_t)(dInputBitsPerFrame * 2);
1451 }
1452 if (cmd.DW1.InitBufFullInBits > cmd.DW2.BufSizeInBits)
1453 {
1454 cmd.DW1.InitBufFullInBits = cmd.DW2.BufSizeInBits;
1455 }
1456
1457 if (seqParams->RateControlMethod == RATECONTROL_AVBR)
1458 {
1459 // For AVBR, Buffer size = 2*Bitrate, InitVBV = 0.75 * BufferSize
1460 cmd.DW2.BufSizeInBits = 2 * seqParams->TargetBitRate;
1461 cmd.DW1.InitBufFullInBits = (uint32_t)(0.75 * cmd.DW2.BufSizeInBits);
1462 }
1463
1464 double dBpsRatio = dInputBitsPerFrame / ((double)(cmd.DW2.BufSizeInBits) / 30);
1465 dBpsRatio = (dBpsRatio < 0.1) ? 0.1 : (dBpsRatio > 3.5) ? 3.5 : dBpsRatio;
1466
1467 cmd.DW16.DeviationThreshold0ForPandB = (uint32_t)(-50 * pow(0.90, dBpsRatio));
1468 cmd.DW16.DeviationThreshold1ForPandB = (uint32_t)(-50 * pow(0.66, dBpsRatio));
1469 cmd.DW16.DeviationThreshold2ForPandB = (uint32_t)(-50 * pow(0.46, dBpsRatio));
1470 cmd.DW16.DeviationThreshold3ForPandB = (uint32_t)(-50 * pow(0.3, dBpsRatio));
1471 cmd.DW17.DeviationThreshold4ForPandB = (uint32_t)(50 * pow(0.3, dBpsRatio));
1472 cmd.DW17.DeviationThreshold5ForPandB = (uint32_t)(50 * pow(0.46, dBpsRatio));
1473 cmd.DW17.DeviationThreshold6ForPandB = (uint32_t)(50 * pow(0.7, dBpsRatio));
1474 cmd.DW17.DeviationThreshold7ForPandB = (uint32_t)(50 * pow(0.9, dBpsRatio));
1475 cmd.DW18.DeviationThreshold0ForVBR = (uint32_t)(-50 * pow(0.9, dBpsRatio));
1476 cmd.DW18.DeviationThreshold1ForVBR = (uint32_t)(-50 * pow(0.7, dBpsRatio));
1477 cmd.DW18.DeviationThreshold2ForVBR = (uint32_t)(-50 * pow(0.5, dBpsRatio));
1478 cmd.DW18.DeviationThreshold3ForVBR = (uint32_t)(-50 * pow(0.3, dBpsRatio));
1479 cmd.DW19.DeviationThreshold4ForVBR = (uint32_t)(100 * pow(0.4, dBpsRatio));
1480 cmd.DW19.DeviationThreshold5ForVBR = (uint32_t)(100 * pow(0.5, dBpsRatio));
1481 cmd.DW19.DeviationThreshold6ForVBR = (uint32_t)(100 * pow(0.75, dBpsRatio));
1482 cmd.DW19.DeviationThreshold7ForVBR = (uint32_t)(100 * pow(0.9, dBpsRatio));
1483 cmd.DW20.DeviationThreshold0ForI = (uint32_t)(-50 * pow(0.8, dBpsRatio));
1484 cmd.DW20.DeviationThreshold1ForI = (uint32_t)(-50 * pow(0.6, dBpsRatio));
1485 cmd.DW20.DeviationThreshold2ForI = (uint32_t)(-50 * pow(0.34, dBpsRatio));
1486 cmd.DW20.DeviationThreshold3ForI = (uint32_t)(-50 * pow(0.2, dBpsRatio));
1487 cmd.DW21.DeviationThreshold4ForI = (uint32_t)(50 * pow(0.2, dBpsRatio));
1488 cmd.DW21.DeviationThreshold5ForI = (uint32_t)(50 * pow(0.4, dBpsRatio));
1489 cmd.DW21.DeviationThreshold6ForI = (uint32_t)(50 * pow(0.66, dBpsRatio));
1490 cmd.DW21.DeviationThreshold7ForI = (uint32_t)(50 * pow(0.9, dBpsRatio));
1491
1492 cmd.DW22.SlidingWindowSize = dwSlidingWindowSize;
1493
1494 if (bBrcInit)
1495 {
1496 *params->pdBrcInitCurrentTargetBufFullInBits = cmd.DW1.InitBufFullInBits;
1497 }
1498
1499 *params->pdwBrcInitResetBufSizeInBits = cmd.DW2.BufSizeInBits;
1500 *params->pdBrcInitResetInputBitsPerFrame = dInputBitsPerFrame;
1501
1502 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
1503 &cmd,
1504 params->pKernelState->dwCurbeOffset,
1505 sizeof(cmd)));
1506
1507 CODECHAL_DEBUG_TOOL(
1508 CODECHAL_ENCODE_CHK_STATUS_RETURN(PopulateBrcInitParam(
1509 &cmd));
1510 )
1511
1512 return eStatus;
1513 }
1514
SetCurbeAvcFrameBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)1515 MOS_STATUS CodechalEncodeAvcEncG9::SetCurbeAvcFrameBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)
1516 {
1517 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1518
1519 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1520 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
1521
1522 auto seqParams = m_avcSeqParam;
1523 auto picParams = m_avcPicParam;
1524 auto slcParams = m_avcSliceParams;
1525
1526 MHW_VDBOX_AVC_SLICE_STATE sliceState;
1527 MOS_ZeroMemory(&sliceState, sizeof(sliceState));
1528 sliceState.pEncodeAvcSeqParams = seqParams;
1529 sliceState.pEncodeAvcPicParams = picParams;
1530 sliceState.pEncodeAvcSliceParams = slcParams;
1531
1532 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9 cmd = g_cInit_CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9;
1533 cmd.DW5.TargetSizeFlag = 0;
1534 if (*params->pdBrcInitCurrentTargetBufFullInBits > (double)dwBrcInitResetBufSizeInBits)
1535 {
1536 *params->pdBrcInitCurrentTargetBufFullInBits -= (double)dwBrcInitResetBufSizeInBits;
1537 cmd.DW5.TargetSizeFlag = 1;
1538 }
1539
1540 // skipped frame handling
1541 if (params->dwNumSkipFrames)
1542 {
1543 // pass num/size of skipped frames to update BRC
1544 cmd.DW6.NumSkipFrames = params->dwNumSkipFrames;
1545 cmd.DW7.SizeSkipFrames = params->dwSizeSkipFrames;
1546
1547 // account for skipped frame in calculating CurrentTargetBufFullInBits
1548 *params->pdBrcInitCurrentTargetBufFullInBits += dBrcInitResetInputBitsPerFrame * params->dwNumSkipFrames;
1549 }
1550
1551 cmd.DW0.TargetSize = (uint32_t)(*params->pdBrcInitCurrentTargetBufFullInBits);
1552 cmd.DW1.FrameNumber = m_storeData - 1;
1553 cmd.DW2.SizeofPicHeaders = m_headerBytesInserted << 3; // kernel uses how many bits instead of bytes
1554 cmd.DW5.CurrFrameType =
1555 ((m_pictureCodingType - 2) < 0) ? 2 : (m_pictureCodingType - 2);
1556 cmd.DW5.BRCFlag =
1557 (CodecHal_PictureIsTopField(m_currOriginalPic)) ? brcUpdateIsField :
1558 ((CodecHal_PictureIsBottomField(m_currOriginalPic)) ? (brcUpdateIsField | brcUpdateIsBottomField) : 0);
1559 cmd.DW5.BRCFlag |= (m_refList[m_currReconstructedPic.FrameIdx]->bUsedAsRef) ?
1560 brcUpdateIsReference : 0;
1561
1562 if (bMultiRefQpEnabled)
1563 {
1564 cmd.DW5.BRCFlag |= brcUpdateIsActualQp;
1565 cmd.DW14.QPIndexOfCurPic = m_currOriginalPic.FrameIdx;
1566 }
1567
1568 cmd.DW5.BRCFlag |= seqParams->bAutoMaxPBFrameSizeForSceneChange?
1569 brcUpdateAutoPbFrameSize : 0;
1570
1571 cmd.DW5.MaxNumPAKs = m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses();
1572
1573 cmd.DW6.MinimumQP = params->ucMinQP;
1574 cmd.DW6.MaximumQP = params->ucMaxQP;
1575 cmd.DW6.EnableForceToSkip = (bForceToSkipEnable && !m_avcPicParam->bDisableFrameSkip);
1576 cmd.DW6.EnableSlidingWindow = (seqParams->FrameSizeTolerance == EFRAMESIZETOL_LOW);
1577 cmd.DW6.EnableExtremLowDelay = (seqParams->FrameSizeTolerance == EFRAMESIZETOL_EXTREMELY_LOW);
1578
1579 *params->pdBrcInitCurrentTargetBufFullInBits += dBrcInitResetInputBitsPerFrame;
1580
1581 if (seqParams->RateControlMethod == RATECONTROL_AVBR)
1582 {
1583 cmd.DW3.startGAdjFrame0 = (uint32_t)((10 * usAVBRConvergence) / (double)150);
1584 cmd.DW3.startGAdjFrame1 = (uint32_t)((50 * usAVBRConvergence) / (double)150);
1585 cmd.DW4.startGAdjFrame2 = (uint32_t)((100 * usAVBRConvergence) / (double)150);
1586 cmd.DW4.startGAdjFrame3 = (uint32_t)((150 * usAVBRConvergence) / (double)150);
1587 cmd.DW11.gRateRatioThreshold0 =
1588 (uint32_t)((100 - (usAVBRAccuracy / (double)30)*(100 - 40)));
1589 cmd.DW11.gRateRatioThreshold1 =
1590 (uint32_t)((100 - (usAVBRAccuracy / (double)30)*(100 - 75)));
1591 cmd.DW12.gRateRatioThreshold2 = (uint32_t)((100 - (usAVBRAccuracy / (double)30)*(100 - 97)));
1592 cmd.DW12.gRateRatioThreshold3 = (uint32_t)((100 + (usAVBRAccuracy / (double)30)*(103 - 100)));
1593 cmd.DW12.gRateRatioThreshold4 = (uint32_t)((100 + (usAVBRAccuracy / (double)30)*(125 - 100)));
1594 cmd.DW12.gRateRatioThreshold5 = (uint32_t)((100 + (usAVBRAccuracy / (double)30)*(160 - 100)));
1595 }
1596
1597 cmd.DW15.EnableROI = params->ucEnableROI;
1598
1599 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetInterRounding(&sliceState));
1600
1601 cmd.DW15.RoundingIntra = 5;
1602 cmd.DW15.RoundingInter = sliceState.dwRoundingValue;
1603
1604 uint32_t profileLevelMaxFrame;
1605 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalAvcEncode_GetProfileLevelMaxFrameSize(
1606 seqParams,
1607 this,
1608 (uint32_t*)&profileLevelMaxFrame));
1609
1610 cmd.DW19.UserMaxFrame = profileLevelMaxFrame;
1611
1612 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
1613 &cmd,
1614 params->pKernelState->dwCurbeOffset,
1615 sizeof(cmd)));
1616
1617 CODECHAL_DEBUG_TOOL(
1618 CODECHAL_ENCODE_CHK_STATUS_RETURN(PopulateBrcUpdateParam(
1619 &cmd));
1620 )
1621
1622 return eStatus;
1623 }
1624
SetCurbeAvcMbBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)1625 MOS_STATUS CodechalEncodeAvcEncG9::SetCurbeAvcMbBrcUpdate(PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params)
1626 {
1627 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1628
1629 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1630 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
1631
1632 auto curbe = g_cInit_CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9;
1633
1634 // BRC curbe requires: 2 for I-frame, 0 for P-frame, 1 for B-frame
1635 curbe.DW0.CurrFrameType = (m_pictureCodingType + 1) % 3;
1636 if( params->ucEnableROI )
1637 {
1638 if (bROIValueInDeltaQP)
1639 {
1640 curbe.DW0.EnableROI = 2; // 1-Enabled ROI priority, 2-Enable ROI QP Delta, 0- disabled
1641 curbe.DW0.ROIRatio = 0;
1642 }
1643 else
1644 {
1645 curbe.DW0.EnableROI = 1; // 1-Enabled ROI priority, 2-Enable ROI QP Delta, 0- disabled
1646
1647 uint32_t roisize = 0;
1648 uint32_t roiratio = 0;
1649
1650 for (uint32_t i = 0 ; i < m_avcPicParam->NumROI ; ++i)
1651 {
1652 CODECHAL_ENCODE_VERBOSEMESSAGE("ROI[%d] = {%d, %d, %d, %d} {%d}, size = %d", i,
1653 m_avcPicParam->ROI[i].Left, m_avcPicParam->ROI[i].Top,
1654 m_avcPicParam->ROI[i].Bottom, m_avcPicParam->ROI[i].Right,
1655 m_avcPicParam->ROI[i].PriorityLevelOrDQp,
1656 (CODECHAL_MACROBLOCK_HEIGHT * MOS_ABS(m_avcPicParam->ROI[i].Top - m_avcPicParam->ROI[i].Bottom)) *
1657 (CODECHAL_MACROBLOCK_WIDTH * MOS_ABS(m_avcPicParam->ROI[i].Right - m_avcPicParam->ROI[i].Left)));
1658 roisize += (CODECHAL_MACROBLOCK_HEIGHT * MOS_ABS(m_avcPicParam->ROI[i].Top - m_avcPicParam->ROI[i].Bottom)) *
1659 (CODECHAL_MACROBLOCK_WIDTH * MOS_ABS(m_avcPicParam->ROI[i].Right - m_avcPicParam->ROI[i].Left));
1660 }
1661
1662 if (roisize)
1663 {
1664 uint32_t numMBs = m_picWidthInMb * m_picHeightInMb;
1665 roiratio = 2 * (numMBs * 256 / roisize - 1);
1666 roiratio = MOS_MIN(51, roiratio); // clip QP from 0-51
1667 }
1668 CODECHAL_ENCODE_VERBOSEMESSAGE("ROIRatio = %d", roiratio);
1669 curbe.DW0.ROIRatio = roiratio;
1670 }
1671 }
1672 else
1673 {
1674 curbe.DW0.ROIRatio = 0;
1675 }
1676
1677 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
1678 &curbe,
1679 params->pKernelState->dwCurbeOffset,
1680 sizeof(curbe)));
1681
1682 return eStatus;
1683 }
1684
SetCurbeAvcBrcBlockCopy(PCODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_PARAMS params)1685 MOS_STATUS CodechalEncodeAvcEncG9::SetCurbeAvcBrcBlockCopy(PCODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_PARAMS params)
1686 {
1687 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1688
1689 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1690 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
1691
1692 CODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_CURBE_CM_G9 cmd;
1693 MOS_ZeroMemory(&cmd, sizeof(cmd));
1694 cmd.DW0.BufferOffset = params->dwBufferOffset;
1695 cmd.DW0.BlockHeight = params->dwBlockHeight;
1696 cmd.DW1.SrcSurfaceIndex = 0x00;
1697 cmd.DW2.DstSurfaceIndex = 0x01;
1698
1699 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
1700 &cmd,
1701 params->pKernelState->dwCurbeOffset,
1702 sizeof(cmd)));
1703
1704 return eStatus;
1705 }
1706
SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)1707 MOS_STATUS CodechalEncodeAvcEncG9::SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)
1708 {
1709 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1710
1711 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
1712 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
1713 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pAvcSlcParams);
1714 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ppRefList);
1715 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrOriginalPic);
1716 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrReconstructedPic);
1717 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psCurrPicSurface);
1718 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pAvcPicIdx);
1719 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMbEncBindingTable);
1720 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
1721
1722 auto kernelState = params->pKernelState;
1723 auto avcMbEncBindingTable = params->pMbEncBindingTable;
1724 bool currFieldPicture = CodecHal_PictureIsField(*(params->pCurrOriginalPic)) ? 1 : 0;
1725 bool currBottomField = CodecHal_PictureIsBottomField(*(params->pCurrOriginalPic)) ? 1 : 0;
1726 auto currPicRefListEntry = params->ppRefList[params->pCurrReconstructedPic->FrameIdx];
1727 auto mbCodeBuffer = &currPicRefListEntry->resRefMbCodeBuffer;
1728 auto mvDataBuffer = &currPicRefListEntry->resRefMvDataBuffer;
1729 uint32_t refMbCodeBottomFieldOffset =
1730 params->dwFrameFieldHeightInMb * params->dwFrameWidthInMb * 64;
1731 uint32_t refMvBottomFieldOffset =
1732 MOS_ALIGN_CEIL(params->dwFrameFieldHeightInMb * params->dwFrameWidthInMb * (32 * 4), 0x1000);
1733
1734 uint8_t vdirection, refVDirection;
1735 if (params->bMbEncIFrameDistInUse)
1736 {
1737 vdirection = CODECHAL_VDIRECTION_FRAME;
1738 }
1739 else
1740 {
1741 vdirection = (CodecHal_PictureIsFrame(*(params->pCurrOriginalPic))) ? CODECHAL_VDIRECTION_FRAME :
1742 (currBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD;
1743 }
1744
1745 // PAK Obj command buffer
1746 uint32_t size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4; // 11DW + 5DW padding
1747 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
1748 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1749 surfaceCodecParams.presBuffer = mbCodeBuffer;
1750 surfaceCodecParams.dwSize = size;
1751 surfaceCodecParams.dwOffset = params->dwMbCodeBottomFieldOffset;
1752 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMfcAvcPakObj;
1753 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
1754 surfaceCodecParams.bRenderTarget = true;
1755 surfaceCodecParams.bIsWritable = true;
1756 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1757 m_hwInterface,
1758 cmdBuffer,
1759 &surfaceCodecParams,
1760 kernelState));
1761
1762 // MV data buffer
1763 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
1764 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1765 surfaceCodecParams.presBuffer = mvDataBuffer;
1766 surfaceCodecParams.dwSize = size;
1767 surfaceCodecParams.dwOffset = params->dwMvBottomFieldOffset;
1768 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
1769 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncIndMVData;
1770 surfaceCodecParams.bRenderTarget = true;
1771 surfaceCodecParams.bIsWritable = true;
1772 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1773 m_hwInterface,
1774 cmdBuffer,
1775 &surfaceCodecParams,
1776 kernelState));
1777
1778 // Current Picture Y
1779 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1780 surfaceCodecParams.bIs2DSurface = true;
1781 surfaceCodecParams.bMediaBlockRW = true; // Use media block RW for DP 2D surface access
1782 surfaceCodecParams.bUseUVPlane = true;
1783 surfaceCodecParams.psSurface = params->psCurrPicSurface;
1784 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
1785 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
1786 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncCurrY;
1787 surfaceCodecParams.dwUVBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncCurrUV;
1788 surfaceCodecParams.dwVerticalLineStride = params->dwVerticalLineStride;
1789 surfaceCodecParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
1790
1791 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1792 m_hwInterface,
1793 cmdBuffer,
1794 &surfaceCodecParams,
1795 kernelState));
1796
1797 // AVC_ME MV data buffer
1798 if (params->bHmeEnabled)
1799 {
1800 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
1801
1802 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1803 surfaceCodecParams.bIs2DSurface = true;
1804 surfaceCodecParams.bMediaBlockRW = true;
1805 surfaceCodecParams.psSurface = params->ps4xMeMvDataBuffer;
1806 surfaceCodecParams.dwOffset = params->dwMeMvBottomFieldOffset;
1807 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
1808 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMVDataFromME;
1809 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1810 m_hwInterface,
1811 cmdBuffer,
1812 &surfaceCodecParams,
1813 kernelState));
1814
1815 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeDistortionBuffer);
1816
1817 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1818 surfaceCodecParams.bIs2DSurface = true;
1819 surfaceCodecParams.bMediaBlockRW = true;
1820 surfaceCodecParams.psSurface = params->ps4xMeDistortionBuffer;
1821 surfaceCodecParams.dwOffset = params->dwMeDistortionBottomFieldOffset;
1822 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
1823 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMEDist;
1824 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1825 m_hwInterface,
1826 cmdBuffer,
1827 &surfaceCodecParams,
1828 kernelState));
1829 }
1830
1831 if (params->bMbConstDataBufferInUse)
1832 {
1833 // 16 DWs per QP value
1834 size = 16 * 52 * sizeof(uint32_t);
1835
1836 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1837 surfaceCodecParams.presBuffer = params->presMbBrcConstDataBuffer;
1838 surfaceCodecParams.dwSize = size;
1839 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbBrcConstData;
1840 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1841 m_hwInterface,
1842 cmdBuffer,
1843 &surfaceCodecParams,
1844 kernelState));
1845 }
1846
1847 if (params->bMbQpBufferInUse)
1848 {
1849 // AVC MB BRC QP buffer
1850 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1851 surfaceCodecParams.bIs2DSurface = true;
1852 surfaceCodecParams.bMediaBlockRW = true;
1853 surfaceCodecParams.psSurface = params->psMbQpBuffer;
1854 surfaceCodecParams.dwOffset = params->dwMbQpBottomFieldOffset;
1855 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ? avcMbEncBindingTable->dwAvcMBEncMbQpField :
1856 avcMbEncBindingTable->dwAvcMBEncMbQpFrame;
1857 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1858 m_hwInterface,
1859 cmdBuffer,
1860 &surfaceCodecParams,
1861 kernelState));
1862 }
1863
1864 if (params->bMbSpecificDataEnabled)
1865 {
1866 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * sizeof(CODECHAL_ENCODE_AVC_MB_SPECIFIC_PARAMS);
1867 CODECHAL_ENCODE_VERBOSEMESSAGE("Send MB specific surface, size = %d", size);
1868 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1869 surfaceCodecParams.dwSize = size;
1870 surfaceCodecParams.presBuffer = params->presMbSpecificDataBuffer;
1871 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbSpecificData;
1872 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1873 m_hwInterface,
1874 cmdBuffer,
1875 &surfaceCodecParams,
1876 kernelState));
1877 }
1878
1879 // Current Picture Y - VME
1880 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1881 surfaceCodecParams.bUseAdvState = true;
1882 surfaceCodecParams.psSurface = params->psCurrPicSurface;
1883 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
1884 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
1885 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ?
1886 avcMbEncBindingTable->dwAvcMBEncFieldCurrPic[0] : avcMbEncBindingTable->dwAvcMBEncCurrPicFrame[0];
1887 surfaceCodecParams.ucVDirection = vdirection;
1888
1889 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1890 m_hwInterface,
1891 cmdBuffer,
1892 &surfaceCodecParams,
1893 kernelState));
1894
1895 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ?
1896 avcMbEncBindingTable->dwAvcMBEncFieldCurrPic[1] : avcMbEncBindingTable->dwAvcMBEncCurrPicFrame[1];
1897 surfaceCodecParams.ucVDirection = vdirection;
1898 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1899 m_hwInterface,
1900 cmdBuffer,
1901 &surfaceCodecParams,
1902 kernelState));
1903
1904 // Setup references 1...n
1905 // LIST 0 references
1906 uint8_t refIdx;
1907 for (refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l0_active_minus1; refIdx++)
1908 {
1909 auto refPic = params->pAvcSlcParams->RefPicList[LIST_0][refIdx];
1910 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
1911 {
1912 uint8_t refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
1913 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
1914 uint32_t refBindingTableOffset;
1915 // Program the surface based on current picture's field/frame mode
1916 if (currFieldPicture) // if current picture is field
1917 {
1918 if (refBottomField)
1919 {
1920 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
1921 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicBotField[refIdx];
1922 }
1923 else
1924 {
1925 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
1926 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicTopField[refIdx];
1927 }
1928 }
1929 else // if current picture is frame
1930 {
1931 refVDirection = CODECHAL_VDIRECTION_FRAME;
1932 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicFrame[refIdx];
1933 }
1934
1935 // Picture Y VME
1936 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
1937 surfaceCodecParams.bUseAdvState = true;
1938 if((params->bUseWeightedSurfaceForL0) &&
1939 (params->pAvcSlcParams->luma_weight_flag[LIST_0] & (1 << refIdx)) &&
1940 (refIdx < CODEC_AVC_MAX_FORWARD_WP_FRAME))
1941 {
1942 surfaceCodecParams.psSurface = ¶ms->pWeightedPredOutputPicSelectList[CODEC_AVC_WP_OUTPUT_L0_START + refIdx].sBuffer;
1943 }
1944 else
1945 {
1946 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
1947 }
1948 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
1949 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
1950
1951 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
1952 surfaceCodecParams.ucVDirection = refVDirection;
1953 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
1954
1955 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
1956 m_hwInterface,
1957 cmdBuffer,
1958 &surfaceCodecParams,
1959 kernelState));
1960 }
1961 }
1962
1963 // Setup references 1...n
1964 // LIST 1 references
1965 for (refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l1_active_minus1; refIdx++)
1966 {
1967 if (!currFieldPicture && refIdx > 0)
1968 {
1969 // Only 1 LIST 1 reference required here since only single ref is supported in frame case
1970 break;
1971 }
1972
1973 auto refPic = params->pAvcSlcParams->RefPicList[LIST_1][refIdx];
1974 uint32_t refMbCodeBottomFieldOffsetUsed;
1975 uint32_t refMvBottomFieldOffsetUsed;
1976 uint32_t refBindingTableOffset;
1977 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
1978 {
1979 uint8_t refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
1980 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
1981 // Program the surface based on current picture's field/frame mode
1982 if (currFieldPicture) // if current picture is field
1983 {
1984 if (refBottomField)
1985 {
1986 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
1987 refMbCodeBottomFieldOffsetUsed = refMbCodeBottomFieldOffset;
1988 refMvBottomFieldOffsetUsed = refMvBottomFieldOffset;
1989 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicBotField[refIdx];
1990 }
1991 else
1992 {
1993 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
1994 refMbCodeBottomFieldOffsetUsed = 0;
1995 refMvBottomFieldOffsetUsed = 0;
1996 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicTopField[refIdx];
1997 }
1998 }
1999 else // if current picture is frame
2000 {
2001 refVDirection = CODECHAL_VDIRECTION_FRAME;
2002 refMbCodeBottomFieldOffsetUsed = 0;
2003 refMvBottomFieldOffsetUsed = 0;
2004 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicFrame[refIdx];
2005 }
2006
2007 // Picture Y VME
2008 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2009 surfaceCodecParams.bUseAdvState = true;
2010 if((params->bUseWeightedSurfaceForL1) &&
2011 (params->pAvcSlcParams->luma_weight_flag[LIST_1] & (1 << refIdx)) &&
2012 (refIdx < CODEC_AVC_MAX_BACKWARD_WP_FRAME))
2013 {
2014 surfaceCodecParams.psSurface = ¶ms->pWeightedPredOutputPicSelectList[CODEC_AVC_WP_OUTPUT_L1_START + refIdx].sBuffer;
2015 }
2016 else
2017 {
2018 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
2019 }
2020
2021 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
2022 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
2023 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
2024 surfaceCodecParams.ucVDirection = refVDirection;
2025 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
2026
2027 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2028 m_hwInterface,
2029 cmdBuffer,
2030 &surfaceCodecParams,
2031 kernelState));
2032
2033 if (refIdx == 0)
2034 {
2035 if(currFieldPicture && (params->ppRefList[refPicIdx]->ucAvcPictureCodingType == CODEC_AVC_PIC_CODING_TYPE_FRAME || params->ppRefList[refPicIdx]->ucAvcPictureCodingType == CODEC_AVC_PIC_CODING_TYPE_INVALID))
2036 {
2037 refMbCodeBottomFieldOffsetUsed = 0;
2038 refMvBottomFieldOffsetUsed = 0;
2039 }
2040 // MB data buffer
2041 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4;
2042 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2043 surfaceCodecParams.dwSize = size;
2044 surfaceCodecParams.presBuffer = ¶ms->ppRefList[refPicIdx]->resRefMbCodeBuffer;
2045 surfaceCodecParams.dwOffset = refMbCodeBottomFieldOffsetUsed;
2046 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
2047 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdRefMBData;
2048 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2049 m_hwInterface,
2050 cmdBuffer,
2051 &surfaceCodecParams,
2052 kernelState));
2053
2054 // MV data buffer
2055 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
2056 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2057 surfaceCodecParams.dwSize = size;
2058 surfaceCodecParams.presBuffer = ¶ms->ppRefList[refPicIdx]->resRefMvDataBuffer;
2059 surfaceCodecParams.dwOffset = refMvBottomFieldOffsetUsed;
2060 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
2061 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdRefMVData;
2062 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2063 m_hwInterface,
2064 cmdBuffer,
2065 &surfaceCodecParams,
2066 kernelState));
2067 }
2068
2069 if (refIdx < CODECHAL_ENCODE_NUM_MAX_VME_L1_REF)
2070 {
2071 if (currFieldPicture)
2072 {
2073 // The binding table contains multiple entries for IDX0 backwards references
2074 if (refBottomField)
2075 {
2076 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicBotField[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
2077 }
2078 else
2079 {
2080 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicTopField[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
2081 }
2082 }
2083 else
2084 {
2085 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicFrame[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
2086 }
2087
2088 // Picture Y VME
2089 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2090 surfaceCodecParams.bUseAdvState = true;
2091 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
2092 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
2093 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
2094 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
2095 surfaceCodecParams.ucVDirection = refVDirection;
2096 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
2097
2098 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2099 m_hwInterface,
2100 cmdBuffer,
2101 &surfaceCodecParams,
2102 kernelState));
2103 }
2104 }
2105 }
2106
2107 // BRC distortion data buffer for I frame
2108 if (params->bMbEncIFrameDistInUse)
2109 {
2110 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2111 surfaceCodecParams.bIs2DSurface = true;
2112 surfaceCodecParams.bMediaBlockRW = true;
2113 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
2114 surfaceCodecParams.dwOffset = params->dwMeBrcDistortionBottomFieldOffset;
2115 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBRCDist;
2116 surfaceCodecParams.bIsWritable = true;
2117 surfaceCodecParams.bRenderTarget = true;
2118 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2119 m_hwInterface,
2120 cmdBuffer,
2121 &surfaceCodecParams,
2122 kernelState));
2123 }
2124
2125 // RefPicSelect of Current Picture
2126 if (params->bUsedAsRef)
2127 {
2128 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2129 surfaceCodecParams.bIs2DSurface = true;
2130 surfaceCodecParams.bMediaBlockRW = true;
2131 surfaceCodecParams.psSurface = &currPicRefListEntry->pRefPicSelectListEntry->sBuffer;
2132 surfaceCodecParams.psSurface->dwHeight = MOS_ALIGN_CEIL(surfaceCodecParams.psSurface->dwHeight, 8);
2133 surfaceCodecParams.dwOffset = params->dwRefPicSelectBottomFieldOffset;
2134 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncRefPicSelectL0;
2135 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
2136 surfaceCodecParams.bRenderTarget = true;
2137 surfaceCodecParams.bIsWritable = true;
2138 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2139 m_hwInterface,
2140 cmdBuffer,
2141 &surfaceCodecParams,
2142 kernelState));
2143 }
2144
2145 if (params->bMBVProcStatsEnabled)
2146 {
2147 size = params->dwFrameWidthInMb *
2148 (currFieldPicture ? params->dwFrameFieldHeightInMb : params->dwFrameHeightInMb) *
2149 16 * sizeof(uint32_t);
2150
2151 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2152 surfaceCodecParams.dwSize = size;
2153 surfaceCodecParams.presBuffer = params->presMBVProcStatsBuffer;
2154 surfaceCodecParams.dwOffset = currBottomField ? params->dwMBVProcStatsBottomFieldOffset : 0;
2155 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMBStats;
2156 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2157 m_hwInterface,
2158 cmdBuffer,
2159 &surfaceCodecParams,
2160 kernelState));
2161 }
2162 else if (params->bFlatnessCheckEnabled)
2163 {
2164 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2165 surfaceCodecParams.bIs2DSurface = true;
2166 surfaceCodecParams.bMediaBlockRW = true;
2167 surfaceCodecParams.psSurface = params->psFlatnessCheckSurface;
2168 surfaceCodecParams.dwOffset = currBottomField ? params->dwFlatnessCheckBottomFieldOffset : 0;
2169 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFlatnessChk;
2170 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_FLATNESS_CHECK_ENCODE].Value;
2171 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2172 m_hwInterface,
2173 cmdBuffer,
2174 &surfaceCodecParams,
2175 kernelState));
2176 }
2177
2178 if (params->bMADEnabled)
2179 {
2180 size = CODECHAL_MAD_BUFFER_SIZE;
2181
2182 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2183 surfaceCodecParams.bRawSurface = true;
2184 surfaceCodecParams.dwSize = size;
2185 surfaceCodecParams.presBuffer = params->presMADDataBuffer;
2186 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMADData;
2187 surfaceCodecParams.bRenderTarget = true;
2188 surfaceCodecParams.bIsWritable = true;
2189 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2190 m_hwInterface,
2191 cmdBuffer,
2192 &surfaceCodecParams,
2193 kernelState));
2194 }
2195
2196 if (params->dwMbEncBRCBufferSize > 0)
2197 {
2198 //Started from GEN95, separated Mbenc curbe from BRC update kernel. BRC update kernel will generate a 128 bytes surface for mbenc.
2199 //The new surface contains the updated data for mbenc. MBenc kernel has been changed to use the new BRC update output surface
2200 //to update its curbe internally.
2201 // MbEnc BRC buffer - write only
2202 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2203 surfaceCodecParams.presBuffer = params->presMbEncBRCBuffer;
2204 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwMbEncBRCBufferSize);
2205 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMbEncBRCCurbeData;
2206 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE].Value;
2207 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2208 m_hwInterface,
2209 cmdBuffer,
2210 &surfaceCodecParams,
2211 kernelState));
2212 }
2213 else
2214 {
2215 uint32_t curbeSize;
2216 if (params->bUseMbEncAdvKernel)
2217 {
2218 // For BRC the new BRC surface is used
2219 if (params->bUseAdvancedDsh)
2220 {
2221 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2222 surfaceCodecParams.presBuffer = params->presMbEncCurbeBuffer;
2223 curbeSize = MOS_ALIGN_CEIL(
2224 params->pKernelState->KernelParams.iCurbeLength,
2225 m_renderEngineInterface->m_stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
2226 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(curbeSize);
2227 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMbEncBRCCurbeData;
2228 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE].Value;
2229 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2230 m_hwInterface,
2231 cmdBuffer,
2232 &surfaceCodecParams,
2233 kernelState));
2234 }
2235 else // For CQP the DSH CURBE is used
2236 {
2237 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2238 MOS_RESOURCE *dsh = nullptr;
2239 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = params->pKernelState->m_dshRegion.GetResource());
2240 surfaceCodecParams.presBuffer = dsh;
2241 surfaceCodecParams.dwOffset =
2242 params->pKernelState->m_dshRegion.GetOffset() +
2243 params->pKernelState->dwCurbeOffset;
2244 curbeSize = MOS_ALIGN_CEIL(
2245 params->pKernelState->KernelParams.iCurbeLength,
2246 m_renderEngineInterface->m_stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
2247 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(curbeSize);
2248 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMbEncBRCCurbeData;
2249 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MBENC_CURBE_ENCODE].Value;
2250 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2251 m_hwInterface,
2252 cmdBuffer,
2253 &surfaceCodecParams,
2254 kernelState));
2255 }
2256 }
2257 }
2258
2259 if (params->bArbitraryNumMbsInSlice)
2260 {
2261 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2262 surfaceCodecParams.bIs2DSurface = true;
2263 surfaceCodecParams.bMediaBlockRW = true;
2264 surfaceCodecParams.psSurface = params->psSliceMapSurface;
2265 surfaceCodecParams.bRenderTarget = false;
2266 surfaceCodecParams.bIsWritable = false;
2267 surfaceCodecParams.dwOffset = currBottomField ? params->dwSliceMapBottomFieldOffset : 0;
2268 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncSliceMapData;
2269
2270 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2271 m_hwInterface,
2272 cmdBuffer,
2273 &surfaceCodecParams,
2274 kernelState));
2275 }
2276
2277 if (!params->bMbEncIFrameDistInUse)
2278 {
2279 if (params->bMbDisableSkipMapEnabled)
2280 {
2281 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2282 surfaceCodecParams.bIs2DSurface = true;
2283 surfaceCodecParams.bMediaBlockRW = true;
2284 surfaceCodecParams.psSurface = params->psMbDisableSkipMapSurface;
2285 surfaceCodecParams.dwOffset = 0;
2286 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbNonSkipMap;
2287 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_MBDISABLE_SKIPMAP_CODEC].Value;
2288 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2289 m_hwInterface,
2290 cmdBuffer,
2291 &surfaceCodecParams,
2292 kernelState));
2293 }
2294
2295 if (params->bStaticFrameDetectionEnabled)
2296 {
2297 // static frame cost table surface
2298 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2299 surfaceCodecParams.presBuffer = params->presSFDCostTableBuffer;
2300 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(CODECHAL_ENCODE_AVC_SFD_COST_TABLE_BUFFER_SIZE_G9);
2301 surfaceCodecParams.dwOffset = 0;
2302 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
2303 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncStaticDetectionCostTable;
2304 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2305 m_hwInterface,
2306 cmdBuffer,
2307 &surfaceCodecParams,
2308 kernelState));
2309 }
2310 }
2311
2312 return eStatus;
2313 }
2314
SendAvcWPSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_WP_SURFACE_PARAMS params)2315 MOS_STATUS CodechalEncodeAvcEncG9::SendAvcWPSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_WP_SURFACE_PARAMS params)
2316 {
2317 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2318
2319 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
2320 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
2321 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
2322 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psInputRefBuffer);
2323 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psOutputScaledBuffer);
2324
2325 CODECHAL_SURFACE_CODEC_PARAMS surfaceParams;
2326 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
2327 surfaceParams.bIs2DSurface = true;
2328 surfaceParams.bMediaBlockRW = true;
2329 surfaceParams.psSurface = params->psInputRefBuffer;// Input surface
2330 surfaceParams.bIsWritable = false;
2331 surfaceParams.bRenderTarget = false;
2332 surfaceParams.dwBindingTableOffset = CODECHAL_ENCODE_AVC_WP_INPUT_REF_SURFACE_G9;
2333 surfaceParams.dwVerticalLineStride = params->dwVerticalLineStride;
2334 surfaceParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
2335 surfaceParams.ucVDirection = params->ucVDirection;
2336 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2337 m_hwInterface,
2338 cmdBuffer,
2339 &surfaceParams,
2340 params->pKernelState));
2341
2342 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
2343 surfaceParams.bIs2DSurface = true;
2344 surfaceParams.bMediaBlockRW = true;
2345 surfaceParams.psSurface = params->psOutputScaledBuffer;// output surface
2346 surfaceParams.bIsWritable = true;
2347 surfaceParams.bRenderTarget = true;
2348 surfaceParams.dwBindingTableOffset = CODECHAL_ENCODE_AVC_WP_OUTPUT_SCALED_SURFACE_G9;
2349 surfaceParams.dwVerticalLineStride = params->dwVerticalLineStride;
2350 surfaceParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
2351 surfaceParams.ucVDirection = params->ucVDirection;
2352 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2353 m_hwInterface,
2354 cmdBuffer,
2355 &surfaceParams,
2356 params->pKernelState));
2357
2358 return eStatus;
2359 }
2360
SendAvcBrcFrameUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)2361 MOS_STATUS CodechalEncodeAvcEncG9::SendAvcBrcFrameUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)
2362 {
2363 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2364
2365 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
2366 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
2367 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pBrcBuffers);
2368
2369 // BRC history buffer
2370 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
2371 auto kernelState = params->pKernelState;
2372 auto avcBrcUpdateBindingTable = params->pBrcUpdateBindingTable;
2373 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2374 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcHistoryBuffer;
2375 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwBrcHistoryBufferSize);
2376 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcHistoryBuffer;
2377 surfaceCodecParams.bIsWritable = true;
2378 surfaceCodecParams.bRenderTarget = true;
2379 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2380 m_hwInterface,
2381 cmdBuffer,
2382 &surfaceCodecParams,
2383 kernelState));
2384
2385 // PAK Statistics buffer
2386 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2387 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcPakStatisticBuffer[0];
2388 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwBrcPakStatisticsSize);
2389 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcPakStatisticsOutputBuffer;
2390 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2391 m_hwInterface,
2392 cmdBuffer,
2393 &surfaceCodecParams,
2394 kernelState));
2395
2396 // PAK IMG_STATEs buffer - read only
2397 uint32_t size = MOS_BYTES_TO_DWORDS(BRC_IMG_STATE_SIZE_PER_PASS * m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses());
2398 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2399 surfaceCodecParams.presBuffer =
2400 ¶ms->pBrcBuffers->resBrcImageStatesReadBuffer[params->ucCurrRecycledBufIdx];
2401 surfaceCodecParams.dwSize = size;
2402 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcImageStateReadBuffer;
2403 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2404 m_hwInterface,
2405 cmdBuffer,
2406 &surfaceCodecParams,
2407 kernelState));
2408
2409 // PAK IMG_STATEs buffer - write only
2410 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2411 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcImageStatesWriteBuffer;
2412 surfaceCodecParams.dwSize = size;
2413 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcImageStateWriteBuffer;
2414 surfaceCodecParams.bIsWritable = true;
2415 surfaceCodecParams.bRenderTarget = true;
2416 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2417 m_hwInterface,
2418 cmdBuffer,
2419 &surfaceCodecParams,
2420 kernelState));
2421
2422 if (params->dwMbEncBRCBufferSize > 0)
2423 {
2424 //Started from GEN95, separated Mbenc curbe from BRC update kernel. BRC update kernel will generate a 128 bytes surface for mbenc.
2425 //The new surface contains the updated data for mbenc. MBenc kernel has been changed to use the new BRC update output surface
2426 //to update its curbe internally.
2427 // MbEnc BRC buffer - write only
2428 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2429 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resMbEncBrcBuffer;
2430 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwMbEncBRCBufferSize);
2431
2432 if (IsMfeMbEncEnabled(false))
2433 {
2434 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbEncCurbeReadBuffer;
2435 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2436 m_hwInterface,
2437 cmdBuffer,
2438 &surfaceCodecParams,
2439 kernelState));
2440 }
2441
2442 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbEncCurbeWriteData;
2443 surfaceCodecParams.bIsWritable = true;
2444 surfaceCodecParams.bRenderTarget = true;
2445 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2446 m_hwInterface,
2447 cmdBuffer,
2448 &surfaceCodecParams,
2449 kernelState));
2450 }
2451 else
2452 {
2453 PMHW_KERNEL_STATE mbEncKernelState;
2454 CODECHAL_ENCODE_CHK_NULL_RETURN(mbEncKernelState = params->pBrcBuffers->pMbEncKernelStateInUse);
2455
2456 // BRC ENC CURBE Buffer - read only
2457 size = MOS_ALIGN_CEIL(
2458 mbEncKernelState->KernelParams.iCurbeLength,
2459 m_renderEngineInterface->m_stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
2460 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2461 MOS_RESOURCE *dsh = nullptr;
2462 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = mbEncKernelState->m_dshRegion.GetResource());
2463 surfaceCodecParams.presBuffer = dsh;
2464 surfaceCodecParams.dwOffset =
2465 mbEncKernelState->m_dshRegion.GetOffset() +
2466 mbEncKernelState->dwCurbeOffset;
2467 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(size);
2468 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbEncCurbeReadBuffer;
2469 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2470 m_hwInterface,
2471 cmdBuffer,
2472 &surfaceCodecParams,
2473 kernelState));
2474
2475 // BRC ENC CURBE Buffer - write only
2476 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2477 if (params->bUseAdvancedDsh)
2478 {
2479 surfaceCodecParams.presBuffer = params->presMbEncCurbeBuffer;
2480 }
2481 else
2482 {
2483 MOS_RESOURCE *dsh = nullptr;
2484 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = mbEncKernelState->m_dshRegion.GetResource());
2485 surfaceCodecParams.presBuffer = dsh;
2486 surfaceCodecParams.dwOffset =
2487 mbEncKernelState->m_dshRegion.GetOffset() +
2488 mbEncKernelState->dwCurbeOffset;
2489 }
2490 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(size);
2491 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbEncCurbeWriteData;
2492 surfaceCodecParams.bRenderTarget = true;
2493 surfaceCodecParams.bIsWritable = true;
2494 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2495 m_hwInterface,
2496 cmdBuffer,
2497 &surfaceCodecParams,
2498 kernelState));
2499 }
2500
2501 // AVC_ME BRC Distortion data buffer - input/output
2502 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2503 surfaceCodecParams.bIs2DSurface = true;
2504 surfaceCodecParams.bMediaBlockRW = true;
2505 surfaceCodecParams.psSurface = ¶ms->pBrcBuffers->sMeBrcDistortionBuffer;
2506 surfaceCodecParams.dwOffset = params->pBrcBuffers->dwMeBrcDistortionBottomFieldOffset;
2507 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcDistortionBuffer;
2508 surfaceCodecParams.bRenderTarget = true;
2509 surfaceCodecParams.bIsWritable = true;
2510 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2511 m_hwInterface,
2512 cmdBuffer,
2513 &surfaceCodecParams,
2514 kernelState));
2515
2516 // BRC Constant Data Surface
2517 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2518 surfaceCodecParams.bIs2DSurface = true;
2519 surfaceCodecParams.bMediaBlockRW = true;
2520 surfaceCodecParams.psSurface =
2521 ¶ms->pBrcBuffers->sBrcConstantDataBuffer[params->ucCurrRecycledBufIdx];
2522 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcConstantData;
2523 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2524 m_hwInterface,
2525 cmdBuffer,
2526 &surfaceCodecParams,
2527 kernelState));
2528
2529 // MBStat buffer - input
2530 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2531 surfaceCodecParams.presBuffer = params->presMbStatBuffer;
2532 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(m_hwInterface->m_avcMbStatBufferSize);
2533 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMbStatBuffer;
2534 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2535 m_hwInterface,
2536 cmdBuffer,
2537 &surfaceCodecParams,
2538 kernelState));
2539
2540 // MV data buffer
2541 if (params->psMvDataBuffer)
2542 {
2543 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2544 surfaceCodecParams.bIs2DSurface = true;
2545 surfaceCodecParams.bMediaBlockRW = true;
2546 surfaceCodecParams.psSurface = params->psMvDataBuffer;
2547 surfaceCodecParams.dwOffset = params->dwMvBottomFieldOffset;
2548 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
2549 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwFrameBrcMvDataBuffer;
2550 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2551 m_hwInterface,
2552 cmdBuffer,
2553 &surfaceCodecParams,
2554 kernelState));
2555 }
2556
2557 return eStatus;
2558 }
2559
SendAvcBrcMbUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)2560 MOS_STATUS CodechalEncodeAvcEncG9::SendAvcBrcMbUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params)
2561 {
2562 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2563
2564 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
2565 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
2566 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pBrcBuffers);
2567
2568 // BRC history buffer
2569 auto kernelState = params->pKernelState;
2570 auto avcBrcUpdateBindingTable = params->pBrcUpdateBindingTable;
2571 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
2572 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2573 surfaceCodecParams.presBuffer = ¶ms->pBrcBuffers->resBrcHistoryBuffer;
2574 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(params->dwBrcHistoryBufferSize);
2575 surfaceCodecParams.bIsWritable = true;
2576 surfaceCodecParams.bRenderTarget = true;
2577 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcHistoryBuffer;
2578 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2579 m_hwInterface,
2580 cmdBuffer,
2581 &surfaceCodecParams,
2582 kernelState));
2583
2584 // AVC MB QP data buffer
2585 if (params->bMbBrcEnabled)
2586 {
2587 params->pBrcBuffers->sBrcMbQpBuffer.dwHeight = MOS_ALIGN_CEIL((params->dwDownscaledFrameFieldHeightInMb4x << 2), 8);
2588
2589 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2590 surfaceCodecParams.bIs2DSurface = true;
2591 surfaceCodecParams.bMediaBlockRW = true;
2592 surfaceCodecParams.bIsWritable = true;
2593 surfaceCodecParams.bRenderTarget = true;
2594 surfaceCodecParams.psSurface = ¶ms->pBrcBuffers->sBrcMbQpBuffer;
2595 surfaceCodecParams.dwOffset = params->pBrcBuffers->dwBrcMbQpBottomFieldOffset;
2596 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcMbQpBuffer;
2597 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2598 m_hwInterface,
2599 cmdBuffer,
2600 &surfaceCodecParams,
2601 kernelState));
2602 }
2603
2604 // BRC ROI feature
2605 if (params->bBrcRoiEnabled)
2606 {
2607 params->psRoiSurface->dwHeight = MOS_ALIGN_CEIL((params->dwDownscaledFrameFieldHeightInMb4x << 2), 8);
2608
2609 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2610 surfaceCodecParams.bIs2DSurface = true;
2611 surfaceCodecParams.bMediaBlockRW = true;
2612 surfaceCodecParams.bIsWritable = false;
2613 surfaceCodecParams.bRenderTarget = true;
2614 surfaceCodecParams.psSurface = params->psRoiSurface;
2615 surfaceCodecParams.dwOffset = 0;
2616 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcROISurface;
2617 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2618 m_hwInterface,
2619 cmdBuffer,
2620 &surfaceCodecParams,
2621 kernelState));
2622 }
2623
2624 // MBStat buffer
2625 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
2626 surfaceCodecParams.presBuffer = params->presMbStatBuffer;
2627 surfaceCodecParams.dwSize = MOS_BYTES_TO_DWORDS(m_hwInterface->m_avcMbStatBufferSize);
2628 surfaceCodecParams.dwBindingTableOffset = avcBrcUpdateBindingTable->dwMbBrcMbStatBuffer;
2629 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
2630 m_hwInterface,
2631 cmdBuffer,
2632 &surfaceCodecParams,
2633 kernelState));
2634
2635 return eStatus;
2636 }
2637
SetupROISurface()2638 MOS_STATUS CodechalEncodeAvcEncG9::SetupROISurface()
2639 {
2640 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2641
2642 CODECHAL_ENCODE_FUNCTION_ENTER;
2643
2644 MOS_LOCK_PARAMS readOnly;
2645 MOS_ZeroMemory(&readOnly, sizeof(readOnly));
2646 readOnly.ReadOnly = 1;
2647 uint32_t* data = (uint32_t*)m_osInterface->pfnLockResource(m_osInterface, &BrcBuffers.sBrcRoiSurface.OsResource, &readOnly);
2648 if (!data)
2649 {
2650 eStatus = MOS_STATUS_INVALID_HANDLE;
2651 return eStatus;
2652 }
2653
2654 uint32_t bufferWidthInByte = BrcBuffers.sBrcRoiSurface.dwPitch;
2655 uint32_t bufferHeightInByte = MOS_ALIGN_CEIL((m_downscaledHeightInMb4x << 2), 8);
2656 uint32_t numMBs = m_picWidthInMb * m_picHeightInMb;
2657 for (uint32_t mb = 0; mb <= numMBs; mb++)
2658 {
2659 int32_t curMbY = mb / m_picWidthInMb;
2660 int32_t curMbX = mb - curMbY * m_picWidthInMb;
2661
2662 uint32_t outdata = 0;
2663 for (int32_t iRoi = (m_avcPicParam->NumROI - 1); iRoi >= 0; iRoi--)
2664 {
2665 int32_t qplevel;
2666 if (bROIValueInDeltaQP)
2667 {
2668 qplevel = -m_avcPicParam->ROI[iRoi].PriorityLevelOrDQp;
2669 }
2670 else
2671 {
2672 // QP Level sent to ROI surface is (priority * 6)
2673 qplevel = m_avcPicParam->ROI[iRoi].PriorityLevelOrDQp * 6;
2674 }
2675
2676 if (qplevel == 0)
2677 {
2678 continue;
2679 }
2680
2681 if ((curMbX >= (int32_t)m_avcPicParam->ROI[iRoi].Left) && (curMbX < (int32_t)m_avcPicParam->ROI[iRoi].Right) &&
2682 (curMbY >= (int32_t)m_avcPicParam->ROI[iRoi].Top) && (curMbY < (int32_t)m_avcPicParam->ROI[iRoi].Bottom))
2683 {
2684 outdata = 15 | ((qplevel & 0xFF) << 8);
2685 }
2686 else if (bROISmoothEnabled)
2687 {
2688 if ((curMbX >= (int32_t)m_avcPicParam->ROI[iRoi].Left - 1) && (curMbX < (int32_t)m_avcPicParam->ROI[iRoi].Right + 1) &&
2689 (curMbY >= (int32_t)m_avcPicParam->ROI[iRoi].Top - 1) && (curMbY < (int32_t)m_avcPicParam->ROI[iRoi].Bottom + 1))
2690 {
2691 outdata = 14 | ((qplevel & 0xFF) << 8);
2692 }
2693 else if ((curMbX >= (int32_t)m_avcPicParam->ROI[iRoi].Left - 2) && (curMbX < (int32_t)m_avcPicParam->ROI[iRoi].Right + 2) &&
2694 (curMbY >= (int32_t)m_avcPicParam->ROI[iRoi].Top - 2) && (curMbY < (int32_t)m_avcPicParam->ROI[iRoi].Bottom + 2))
2695 {
2696 outdata = 13 | ((qplevel & 0xFF) << 8);
2697 }
2698 else if ((curMbX >= (int32_t)m_avcPicParam->ROI[iRoi].Left - 3) && (curMbX < (int32_t)m_avcPicParam->ROI[iRoi].Right + 3) &&
2699 (curMbY >= (int32_t)m_avcPicParam->ROI[iRoi].Top - 3) && (curMbY < (int32_t)m_avcPicParam->ROI[iRoi].Bottom + 3))
2700 {
2701 outdata = 12 | ((qplevel & 0xFF) << 8);
2702 }
2703 }
2704 }
2705 data[(curMbY * (bufferWidthInByte>>2)) + curMbX] = outdata;
2706 }
2707
2708 m_osInterface->pfnUnlockResource(m_osInterface, &BrcBuffers.sBrcRoiSurface.OsResource);
2709
2710 uint32_t bufferSize = bufferWidthInByte * bufferHeightInByte;
2711 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2712 &BrcBuffers.sBrcRoiSurface.OsResource,
2713 CodechalDbgAttr::attrInput,
2714 "ROI",
2715 bufferSize,
2716 0,
2717 CODECHAL_MEDIA_STATE_MB_BRC_UPDATE)));
2718 return eStatus;
2719 }
2720
IsMfeMbEncEnabled(bool mbEncIFrameDistInUse)2721 bool CodechalEncodeAvcEncG9::IsMfeMbEncEnabled(bool mbEncIFrameDistInUse)
2722 {
2723 return mbEncIFrameDistInUse ? false : m_mfeMbEncEanbled;
2724 }
2725
GetStatusReport(void * status,uint16_t numStatus)2726 MOS_STATUS CodechalEncodeAvcEncG9::GetStatusReport(
2727 void *status,
2728 uint16_t numStatus)
2729 {
2730 CODECHAL_ENCODE_CHK_NULL_RETURN(status);
2731 EncodeStatusReport *codecStatus = (EncodeStatusReport *)status;
2732
2733 if ((m_mfeEnabled && m_codecFunction == CODECHAL_FUNCTION_FEI_ENC)
2734 #ifdef FEI_ENABLE_CMRT
2735 || (m_codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC)
2736 #endif
2737 )
2738 {
2739 if (m_cmEvent[m_cmEventCheckIdx] != nullptr)
2740 {
2741 if (!m_mfeEnabled)
2742 {
2743 m_cmEvent[m_cmEventCheckIdx]->WaitForTaskFinished();
2744 m_cmQueue->DestroyEvent(m_cmEvent[m_cmEventCheckIdx]);
2745 }
2746 m_cmEvent[m_cmEventCheckIdx] = nullptr;
2747 m_cmEventCheckIdx = (m_cmEventCheckIdx + 1) % CM_EVENT_NUM;
2748 codecStatus[0].CodecStatus = CODECHAL_STATUS_SUCCESSFUL;
2749
2750 return MOS_STATUS_SUCCESS;
2751 }
2752 else
2753 {
2754 codecStatus[0].CodecStatus = CODECHAL_STATUS_UNAVAILABLE;
2755 return MOS_STATUS_SUCCESS;
2756 }
2757 }
2758 else
2759 return CodechalEncoderState::GetStatusReport(status, numStatus);
2760 }
2761
SceneChangeReport(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params)2762 MOS_STATUS CodechalEncodeAvcEncG9::SceneChangeReport(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params)
2763 {
2764
2765 MHW_MI_COPY_MEM_MEM_PARAMS copyMemMemParams;
2766 uint32_t offset = (m_encodeStatusBuf.wCurrIndex * m_encodeStatusBuf.dwReportSize)
2767 + (sizeof(uint32_t) * 2) + m_encodeStatusBuf.dwSceneChangedOffset;
2768
2769 MOS_ZeroMemory(©MemMemParams, sizeof(copyMemMemParams));
2770 copyMemMemParams.presSrc = params->presBrcHistoryBuffer;
2771 copyMemMemParams.dwSrcOffset = CODECHAL_ENCODE_AVC_BRC_HISTORY_BUFFER_OFFSET_SCENE_CHANGED;
2772 copyMemMemParams.presDst = &m_encodeStatusBuf.resStatusBuffer;
2773 copyMemMemParams.dwDstOffset = offset;
2774 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_miInterface->AddMiCopyMemMemCmd(
2775 cmdBuffer,
2776 ©MemMemParams));
2777
2778 return MOS_STATUS_SUCCESS;
2779 }
2780
2781 #if USE_CODECHAL_DEBUG_TOOL
PopulateBrcInitParam(void * cmd)2782 MOS_STATUS CodechalEncodeAvcEncG9::PopulateBrcInitParam(
2783 void *cmd)
2784 {
2785 CODECHAL_DEBUG_FUNCTION_ENTER;
2786
2787 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
2788
2789 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
2790 {
2791 return MOS_STATUS_SUCCESS;
2792 }
2793
2794 CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9 *curbe = (CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9 *)cmd;
2795
2796 if (m_pictureCodingType == I_TYPE)
2797 {
2798 m_avcPar->MBBRCEnable = bMbBrcEnabled;
2799 m_avcPar->MBRC = bMbBrcEnabled;
2800 m_avcPar->BitRate = curbe->DW3.AverageBitRate;
2801 m_avcPar->InitVbvFullnessInBit = curbe->DW1.InitBufFullInBits;
2802 m_avcPar->MaxBitRate = curbe->DW4.MaxBitRate;
2803 m_avcPar->VbvSzInBit = curbe->DW2.BufSizeInBits;
2804 m_avcPar->AvbrAccuracy = curbe->DW10.AVBRAccuracy;
2805 m_avcPar->AvbrConvergence = curbe->DW11.AVBRConvergence;
2806 m_avcPar->SlidingWindowSize = curbe->DW22.SlidingWindowSize;
2807 }
2808
2809 return MOS_STATUS_SUCCESS;
2810 }
2811
PopulateBrcUpdateParam(void * cmd)2812 MOS_STATUS CodechalEncodeAvcEncG9::PopulateBrcUpdateParam(
2813 void *cmd)
2814 {
2815 CODECHAL_DEBUG_FUNCTION_ENTER;
2816
2817 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
2818
2819 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
2820 {
2821 return MOS_STATUS_SUCCESS;
2822 }
2823
2824 CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9 *curbe = (CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G9 *)cmd;
2825
2826 if (m_pictureCodingType == I_TYPE)
2827 {
2828 m_avcPar->EnableMultipass = (curbe->DW5.MaxNumPAKs > 0) ? 1 : 0;
2829 m_avcPar->MaxNumPakPasses = curbe->DW5.MaxNumPAKs;
2830 m_avcPar->SlidingWindowEnable = curbe->DW6.EnableSlidingWindow;
2831 m_avcPar->FrameSkipEnable = curbe->DW6.EnableForceToSkip;
2832 m_avcPar->UserMaxFrame = curbe->DW19.UserMaxFrame;
2833 }
2834 else
2835 {
2836 m_avcPar->UserMaxFrameP = curbe->DW19.UserMaxFrame;
2837 }
2838
2839 return MOS_STATUS_SUCCESS;
2840 }
2841
PopulateEncParam(uint8_t meMethod,void * cmd)2842 MOS_STATUS CodechalEncodeAvcEncG9::PopulateEncParam(
2843 uint8_t meMethod,
2844 void *cmd)
2845 {
2846 CODECHAL_DEBUG_FUNCTION_ENTER;
2847
2848 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
2849
2850 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
2851 {
2852 return MOS_STATUS_SUCCESS;
2853 }
2854
2855 CODECHAL_ENCODE_AVC_MBENC_CURBE_G9 *curbe = (CODECHAL_ENCODE_AVC_MBENC_CURBE_G9 *)cmd;
2856
2857 if (m_pictureCodingType == I_TYPE)
2858 {
2859 m_avcPar->MRDisableQPCheck = MRDisableQPCheck[m_targetUsage];
2860 m_avcPar->AllFractional =
2861 CODECHAL_ENCODE_AVC_AllFractional_Common[m_targetUsage & 0x7];
2862 m_avcPar->DisableAllFractionalCheckForHighRes =
2863 CODECHAL_ENCODE_AVC_DisableAllFractionalCheckForHighRes_Common[m_targetUsage & 0x7];
2864 m_avcPar->EnableAdaptiveSearch = curbe->common.DW37.AdaptiveEn;
2865 m_avcPar->EnableFBRBypass = curbe->common.DW4.EnableFBRBypass;
2866 m_avcPar->BlockBasedSkip = curbe->common.DW3.BlockBasedSkipEnable;
2867 m_avcPar->MADEnableFlag = curbe->common.DW34.MADEnableFlag;
2868 m_avcPar->MBTextureThreshold = curbe->common.DW58.MBTextureThreshold;
2869 m_avcPar->EnableMBFlatnessCheckOptimization = curbe->common.DW34.EnableMBFlatnessChkOptimization;
2870 m_avcPar->EnableArbitrarySliceSize = curbe->common.DW34.ArbitraryNumMbsPerSlice;
2871 m_avcPar->RefThresh = curbe->common.DW38.RefThreshold;
2872 m_avcPar->EnableWavefrontOptimization = curbe->common.DW4.EnableWavefrontOptimization;
2873 m_avcPar->MaxLenSP = curbe->common.DW2.LenSP;
2874 }
2875 else if (m_pictureCodingType == P_TYPE)
2876 {
2877 m_avcPar->MEMethod = meMethod;
2878 m_avcPar->HMECombineLen = HMECombineLen[m_targetUsage];
2879 m_avcPar->FTQBasedSkip = FTQBasedSkip[m_targetUsage];
2880 m_avcPar->MultiplePred = MultiPred[m_targetUsage];
2881 m_avcPar->EnableAdaptiveIntraScaling = bAdaptiveIntraScalingEnable;
2882 m_avcPar->StaticFrameIntraCostScalingRatioP = 240;
2883 m_avcPar->SubPelMode = curbe->common.DW3.SubPelMode;
2884 m_avcPar->HMECombineOverlap = curbe->common.DW36.HMECombineOverlap;
2885 m_avcPar->SearchX = curbe->common.DW5.RefWidth;
2886 m_avcPar->SearchY = curbe->common.DW5.RefHeight;
2887 m_avcPar->SearchControl = curbe->common.DW3.SearchCtrl;
2888 m_avcPar->EnableAdaptiveTxDecision = curbe->common.DW34.EnableAdaptiveTxDecision;
2889 m_avcPar->TxDecisionThr = curbe->common.DW58.TxDecisonThreshold;
2890 m_avcPar->EnablePerMBStaticCheck = curbe->common.DW34.EnablePerMBStaticCheck;
2891 m_avcPar->EnableAdaptiveSearchWindowSize = curbe->common.DW34.EnableAdaptiveSearchWindowSize;
2892 m_avcPar->EnableIntraCostScalingForStaticFrame = curbe->common.DW4.EnableIntraCostScalingForStaticFrame;
2893 m_avcPar->BiMixDisable = curbe->common.DW0.BiMixDis;
2894 m_avcPar->SurvivedSkipCost = (curbe->common.DW7.NonSkipZMvAdded << 1) + curbe->common.DW7.NonSkipModeAdded;
2895 m_avcPar->UniMixDisable = curbe->common.DW1.UniMixDisable;
2896 }
2897 else if (m_pictureCodingType == B_TYPE)
2898 {
2899 m_avcPar->BMEMethod = meMethod;
2900 m_avcPar->HMEBCombineLen = HMEBCombineLen[m_targetUsage];
2901 m_avcPar->StaticFrameIntraCostScalingRatioB = 200;
2902 m_avcPar->BSearchX = curbe->common.DW5.RefWidth;
2903 m_avcPar->BSearchY = curbe->common.DW5.RefHeight;
2904 m_avcPar->BSearchControl = curbe->common.DW3.SearchCtrl;
2905 m_avcPar->BSkipType = curbe->common.DW3.SkipType;
2906 m_avcPar->DirectMode = curbe->common.DW34.bDirectMode;
2907 m_avcPar->BiWeight = curbe->common.DW1.BiWeight;
2908 }
2909
2910 return MOS_STATUS_SUCCESS;
2911 }
2912 #endif
2913