1 /*
2 * Copyright (c) 2017, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encode_avc_g9_skl.cpp
24 //! \brief AVC dual-pipe encoder for GEN9 SKL & BXT.
25 //!
26 #include "codechal_encode_avc_g9_skl.h"
27 #include "igcodeckrn_g9.h"
28 #if USE_CODECHAL_DEBUG_TOOL
29 #include "mhw_vdbox_mfx_hwcmd_g9_skl.h"
30 #endif
31
32 #define MBENC_NUM_TARGET_USAGES_CM_G9_SKL 3
33
34 const uint32_t CodechalEncodeAvcEncG9Skl::TrellisQuantizationEnable[NUM_TARGET_USAGE_MODES] =
35 {
36 0, 1, 0, 0, 0, 0, 0, 0
37 };
38
39 const uint32_t CodechalEncodeAvcEncG9Skl::TrellisQuantizationRounding[NUM_TARGET_USAGE_MODES] =
40 {
41 0, 6, 0, 0, 0, 0, 0, 0
42 };
43
44 const uint32_t CodechalEncodeAvcEncG9Skl::EnableAdaptiveTrellisQuantization[NUM_TARGET_USAGE_MODES] =
45 {
46 0, 1, 0, 0, 0, 0, 0, 0
47 };
48
49 typedef struct _CODECHAL_ENCODE_AVC_MBENC_CURBE_CM_G9
50 {
51 // DW0
52 union
53 {
54 struct
55 {
56 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
57 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
58 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
59 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
60 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
61 uint32_t : MOS_BITFIELD_BIT( 6 );
62 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
63 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
64 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
65 };
66 struct
67 {
68 uint32_t Value;
69 };
70 } DW0;
71
72 // DW1
73 union
74 {
75 struct
76 {
77 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 );
78 uint32_t : MOS_BITFIELD_RANGE( 6,15 );
79 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 );
80 uint32_t : MOS_BITFIELD_RANGE( 22,27 );
81 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 );
82 uint32_t : MOS_BITFIELD_RANGE( 29,31 );
83 };
84 struct
85 {
86 uint32_t Value;
87 };
88 } DW1;
89
90 // DW2
91 union
92 {
93 struct
94 {
95 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
96 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
97 uint32_t PicWidth : MOS_BITFIELD_RANGE( 16,31 );
98 };
99 struct
100 {
101 uint32_t Value;
102 };
103 } DW2;
104
105 // DW3
106 union
107 {
108 struct
109 {
110 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 );
111 uint32_t : MOS_BITFIELD_RANGE( 2, 3 );
112 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 );
113 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 );
114 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 );
115 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 );
116 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 );
117 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 );
118 uint32_t SkipType : MOS_BITFIELD_BIT( 14 );
119 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 );
120 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 );
121 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 );
122 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 );
123 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 );
124 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 );
125 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 );
126 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 );
127 uint32_t : MOS_BITFIELD_BIT( 31 );
128 };
129 struct
130 {
131 uint32_t Value;
132 };
133 } DW3;
134
135 // DW4
136 union
137 {
138 struct
139 {
140 uint32_t PicHeightMinus1 : MOS_BITFIELD_RANGE( 0,15 );
141 uint32_t MvRestrictionInSliceEnable : MOS_BITFIELD_BIT( 16 );
142 uint32_t DeltaMvEnable : MOS_BITFIELD_BIT( 17 );
143 uint32_t TrueDistortionEnable : MOS_BITFIELD_BIT( 18 );
144 uint32_t EnableWavefrontOptimization : MOS_BITFIELD_BIT( 19);
145 uint32_t : MOS_BITFIELD_BIT( 20);
146 uint32_t EnableIntraCostScalingForStaticFrame: MOS_BITFIELD_BIT( 21);
147 uint32_t EnableIntraRefresh : MOS_BITFIELD_BIT( 22);
148 uint32_t Reserved : MOS_BITFIELD_BIT( 23);
149 uint32_t EnableDirtyRect : MOS_BITFIELD_BIT( 24);
150 uint32_t bCurFldIDR : MOS_BITFIELD_BIT( 25 );
151 uint32_t ConstrainedIntraPredFlag : MOS_BITFIELD_BIT( 26 );
152 uint32_t FieldParityFlag : MOS_BITFIELD_BIT( 27 );
153 uint32_t HMEEnable : MOS_BITFIELD_BIT( 28 );
154 uint32_t PictureType : MOS_BITFIELD_RANGE( 29,30 );
155 uint32_t UseActualRefQPValue : MOS_BITFIELD_BIT( 31 );
156 };
157 struct
158 {
159 uint32_t Value;
160 };
161 } DW4;
162
163 // DW5
164 union
165 {
166 struct
167 {
168 uint32_t SliceMbHeight : MOS_BITFIELD_RANGE( 0,15 );
169 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
170 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
171 };
172 struct
173 {
174 uint32_t Value;
175 };
176 } DW5;
177
178 // DW6
179 union
180 {
181 struct
182 {
183 uint32_t BatchBufferEnd : MOS_BITFIELD_RANGE( 0,31 );
184 };
185 struct
186 {
187 uint32_t Value;
188 };
189 } DW6;
190
191 // DW7
192 union
193 {
194 struct
195 {
196 uint32_t IntraPartMask : MOS_BITFIELD_RANGE( 0, 4 );
197 uint32_t NonSkipZMvAdded : MOS_BITFIELD_BIT( 5 );
198 uint32_t NonSkipModeAdded : MOS_BITFIELD_BIT( 6 );
199 uint32_t LumaIntraSrcCornerSwap : MOS_BITFIELD_BIT( 7 );
200 uint32_t : MOS_BITFIELD_RANGE( 8,15 );
201 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 );
202 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 );
203 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 );
204 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 );
205 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 );
206 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 );
207 uint32_t : MOS_BITFIELD_BIT( 23 );
208 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 );
209 };
210 struct
211 {
212 uint32_t Value;
213 };
214 } DW7;
215
216 // DW8
217 union
218 {
219 struct
220 {
221 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 );
222 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 );
223 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 );
224 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 );
225 };
226 struct
227 {
228 uint32_t Value;
229 };
230 } DW8;
231
232 // DW9
233 union
234 {
235 struct
236 {
237 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 );
238 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 );
239 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 );
240 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 );
241 };
242 struct
243 {
244 uint32_t Value;
245 };
246 } DW9;
247
248 // DW10
249 union
250 {
251 struct
252 {
253 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 );
254 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 );
255 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 );
256 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 );
257 };
258 struct
259 {
260 uint32_t Value;
261 };
262 } DW10;
263
264 // DW11
265 union
266 {
267 struct
268 {
269 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 );
270 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 );
271 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 );
272 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 );
273 };
274 struct
275 {
276 uint32_t Value;
277 };
278 } DW11;
279
280 // DW12
281 union
282 {
283 struct
284 {
285 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 );
286 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 );
287 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 );
288 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 );
289 };
290 struct
291 {
292 uint32_t Value;
293 };
294 } DW12;
295
296 // DW13
297 union
298 {
299 struct
300 {
301 uint32_t QpPrimeY : MOS_BITFIELD_RANGE( 0, 7 );
302 uint32_t QpPrimeCb : MOS_BITFIELD_RANGE( 8,15 );
303 uint32_t QpPrimeCr : MOS_BITFIELD_RANGE( 16,23 );
304 uint32_t TargetSizeInWord : MOS_BITFIELD_RANGE( 24,31 );
305 };
306 struct
307 {
308 uint32_t Value;
309 };
310 } DW13;
311
312 // DW14
313 union
314 {
315 struct
316 {
317 uint32_t SICFwdTransCoeffThreshold_0 : MOS_BITFIELD_RANGE( 0,15 );
318 uint32_t SICFwdTransCoeffThreshold_1 : MOS_BITFIELD_RANGE( 16,23 );
319 uint32_t SICFwdTransCoeffThreshold_2 : MOS_BITFIELD_RANGE( 24,31 );
320 };
321 struct
322 {
323 uint32_t Value;
324 };
325 } DW14;
326
327 // DW15
328 union
329 {
330 struct
331 {
332 uint32_t SICFwdTransCoeffThreshold_3 : MOS_BITFIELD_RANGE( 0, 7 );
333 uint32_t SICFwdTransCoeffThreshold_4 : MOS_BITFIELD_RANGE( 8,15 );
334 uint32_t SICFwdTransCoeffThreshold_5 : MOS_BITFIELD_RANGE( 16,23 );
335 uint32_t SICFwdTransCoeffThreshold_6 : MOS_BITFIELD_RANGE( 24,31 ); // Highest Freq
336 };
337 struct
338 {
339 uint32_t Value;
340 };
341 } DW15;
342
343 // DW16
344 union
345 {
346 struct
347 {
348 SearchPathDelta SPDelta_0;
349 SearchPathDelta SPDelta_1;
350 SearchPathDelta SPDelta_2;
351 SearchPathDelta SPDelta_3;
352 };
353 struct
354 {
355 uint32_t Value;
356 };
357 } DW16;
358
359 // DW17
360 union
361 {
362 struct
363 {
364 SearchPathDelta SPDelta_4;
365 SearchPathDelta SPDelta_5;
366 SearchPathDelta SPDelta_6;
367 SearchPathDelta SPDelta_7;
368 };
369 struct
370 {
371 uint32_t Value;
372 };
373 } DW17;
374
375 // DW18
376 union
377 {
378 struct
379 {
380 SearchPathDelta SPDelta_8;
381 SearchPathDelta SPDelta_9;
382 SearchPathDelta SPDelta_10;
383 SearchPathDelta SPDelta_11;
384 };
385 struct
386 {
387 uint32_t Value;
388 };
389 } DW18;
390
391 // DW19
392 union
393 {
394 struct
395 {
396 SearchPathDelta SPDelta_12;
397 SearchPathDelta SPDelta_13;
398 SearchPathDelta SPDelta_14;
399 SearchPathDelta SPDelta_15;
400 };
401 struct
402 {
403 uint32_t Value;
404 };
405 } DW19;
406
407 // DW20
408 union
409 {
410 struct
411 {
412 SearchPathDelta SPDelta_16;
413 SearchPathDelta SPDelta_17;
414 SearchPathDelta SPDelta_18;
415 SearchPathDelta SPDelta_19;
416 };
417 struct
418 {
419 uint32_t Value;
420 };
421 } DW20;
422
423 // DW21
424 union
425 {
426 struct
427 {
428 SearchPathDelta SPDelta_20;
429 SearchPathDelta SPDelta_21;
430 SearchPathDelta SPDelta_22;
431 SearchPathDelta SPDelta_23;
432 };
433 struct
434 {
435 uint32_t Value;
436 };
437 } DW21;
438
439 // DW22
440 union
441 {
442 struct
443 {
444 SearchPathDelta SPDelta_24;
445 SearchPathDelta SPDelta_25;
446 SearchPathDelta SPDelta_26;
447 SearchPathDelta SPDelta_27;
448 };
449 struct
450 {
451 uint32_t Value;
452 };
453 } DW22;
454
455 // DW23
456 union
457 {
458 struct
459 {
460 SearchPathDelta SPDelta_28;
461 SearchPathDelta SPDelta_29;
462 SearchPathDelta SPDelta_30;
463 SearchPathDelta SPDelta_31;
464 };
465 struct
466 {
467 uint32_t Value;
468 };
469 } DW23;
470
471 // DW24
472 union
473 {
474 struct
475 {
476 SearchPathDelta SPDelta_32;
477 SearchPathDelta SPDelta_33;
478 SearchPathDelta SPDelta_34;
479 SearchPathDelta SPDelta_35;
480 };
481 struct
482 {
483 uint32_t Value;
484 };
485 } DW24;
486
487 // DW25
488 union
489 {
490 struct
491 {
492 SearchPathDelta SPDelta_36;
493 SearchPathDelta SPDelta_37;
494 SearchPathDelta SPDelta_38;
495 SearchPathDelta SPDelta_39;
496 };
497 struct
498 {
499 uint32_t Value;
500 };
501 } DW25;
502
503 // DW26
504 union
505 {
506 struct
507 {
508 SearchPathDelta SPDelta_40;
509 SearchPathDelta SPDelta_41;
510 SearchPathDelta SPDelta_42;
511 SearchPathDelta SPDelta_43;
512 };
513 struct
514 {
515 uint32_t Value;
516 };
517 } DW26;
518
519 // DW27
520 union
521 {
522 struct
523 {
524 SearchPathDelta SPDelta_44;
525 SearchPathDelta SPDelta_45;
526 SearchPathDelta SPDelta_46;
527 SearchPathDelta SPDelta_47;
528 };
529 struct
530 {
531 uint32_t Value;
532 };
533 } DW27;
534
535 // DW28
536 union
537 {
538 struct
539 {
540 SearchPathDelta SPDelta_48;
541 SearchPathDelta SPDelta_49;
542 SearchPathDelta SPDelta_50;
543 SearchPathDelta SPDelta_51;
544 };
545 struct
546 {
547 uint32_t Value;
548 };
549 } DW28;
550
551 // DW29
552 union
553 {
554 struct
555 {
556 SearchPathDelta SPDelta_52;
557 SearchPathDelta SPDelta_53;
558 SearchPathDelta SPDelta_54;
559 SearchPathDelta SPDelta_55;
560 };
561 struct
562 {
563 uint32_t Value;
564 };
565 } DW29;
566
567 // DW30
568 union
569 {
570 struct
571 {
572 uint32_t Intra4x4ModeMask : MOS_BITFIELD_RANGE( 0, 8 );
573 uint32_t : MOS_BITFIELD_RANGE( 9,15 );
574 uint32_t Intra8x8ModeMask : MOS_BITFIELD_RANGE( 16,24 );
575 uint32_t : MOS_BITFIELD_RANGE( 25,31 );
576 };
577 struct
578 {
579 uint32_t Value;
580 };
581 } DW30;
582
583 // DW31
584 union
585 {
586 struct
587 {
588 uint32_t Intra16x16ModeMask : MOS_BITFIELD_RANGE( 0, 3 );
589 uint32_t IntraChromaModeMask : MOS_BITFIELD_RANGE( 4, 7 );
590 uint32_t IntraComputeType : MOS_BITFIELD_RANGE( 8, 9 );
591 uint32_t : MOS_BITFIELD_RANGE( 10,31 );
592 };
593 struct
594 {
595 uint32_t Value;
596 };
597 } DW31;
598
599 // DW32
600 union
601 {
602 struct
603 {
604 uint32_t SkipVal : MOS_BITFIELD_RANGE( 0,15 );
605 uint32_t MultiPredL0Disable : MOS_BITFIELD_RANGE( 16,23 );
606 uint32_t MultiPredL1Disable : MOS_BITFIELD_RANGE( 24,31 );
607 };
608 struct
609 {
610 uint32_t Value;
611 };
612 } DW32;
613
614 // DW33
615 union
616 {
617 struct
618 {
619 uint32_t Intra16x16NonDCPredPenalty : MOS_BITFIELD_RANGE( 0,7 );
620 uint32_t Intra8x8NonDCPredPenalty : MOS_BITFIELD_RANGE( 8,15 );
621 uint32_t Intra4x4NonDCPredPenalty : MOS_BITFIELD_RANGE( 16,23 );
622 uint32_t : MOS_BITFIELD_RANGE( 24,31 );
623 };
624 struct
625 {
626 uint32_t Value;
627 };
628 } DW33;
629
630 // DW34
631 union
632 {
633 struct
634 {
635 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT( 0 );
636 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT( 1 );
637 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT( 2 );
638 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT( 3 );
639 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT( 4 );
640 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT( 5 );
641 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT( 6 );
642 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT( 7 );
643 uint32_t List1RefID0FrameFieldFlag : MOS_BITFIELD_BIT( 8 );
644 uint32_t List1RefID1FrameFieldFlag : MOS_BITFIELD_BIT( 9 );
645 uint32_t IntraRefreshEn : MOS_BITFIELD_RANGE( 10,11 );
646 uint32_t ArbitraryNumMbsPerSlice : MOS_BITFIELD_BIT( 12 );
647 uint32_t ForceNonSkipMbEnable : MOS_BITFIELD_BIT( 13 );
648 uint32_t DisableEncSkipCheck : MOS_BITFIELD_BIT( 14 );
649 uint32_t EnableDirectBiasAdjustment : MOS_BITFIELD_BIT( 15 );
650 uint32_t EnableGlobalMotionBiasAdjustment: MOS_BITFIELD_BIT( 16 );
651 uint32_t bForceToSkip : MOS_BITFIELD_BIT( 17 );
652 uint32_t : MOS_BITFIELD_RANGE( 18,23 );
653 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT( 24 );
654 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT( 25 );
655 uint32_t MADEnableFlag : MOS_BITFIELD_BIT( 26 );
656 uint32_t ROIEnableFlag : MOS_BITFIELD_BIT( 27 );
657 uint32_t EnableMBFlatnessChkOptimization : MOS_BITFIELD_BIT( 28 );
658 uint32_t bDirectMode : MOS_BITFIELD_BIT( 29 );
659 uint32_t MBBrcEnable : MOS_BITFIELD_BIT( 30 );
660 uint32_t bOriginalBff : MOS_BITFIELD_BIT( 31 );
661 };
662 struct
663 {
664 uint32_t Value;
665 };
666 } DW34;
667
668 // DW35
669 union
670 {
671 struct
672 {
673 uint32_t PanicModeMBThreshold : MOS_BITFIELD_RANGE( 0,15 );
674 uint32_t SmallMbSizeInWord : MOS_BITFIELD_RANGE( 16,23 );
675 uint32_t LargeMbSizeInWord : MOS_BITFIELD_RANGE( 24,31 );
676 };
677 struct
678 {
679 uint32_t Value;
680 };
681 } DW35;
682
683 // DW36
684 union
685 {
686 struct
687 {
688 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE( 0, 7 );
689 uint32_t HMECombinedExtraSUs : MOS_BITFIELD_RANGE( 8,15 );
690 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE( 16,23 );
691 uint32_t EnableCABACAdvanced : MOS_BITFIELD_BIT( 24 );
692 uint32_t : MOS_BITFIELD_RANGE( 25,27 );
693 uint32_t IsFwdFrameShortTermRef : MOS_BITFIELD_BIT( 28 );
694 uint32_t CheckAllFractionalEnable : MOS_BITFIELD_BIT( 29 );
695 uint32_t HMECombineOverlap : MOS_BITFIELD_RANGE( 30,31 );
696 };
697 struct
698 {
699 uint32_t Value;
700 };
701 } DW36;
702
703 // DW37
704 union
705 {
706 struct
707 {
708 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
709 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
710 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
711 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
712 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
713 uint32_t : MOS_BITFIELD_BIT( 6 );
714 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
715 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
716 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
717 };
718 struct
719 {
720 uint32_t Value;
721 };
722 } DW37;
723
724 // DW38
725 union
726 {
727 struct
728 {
729 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
730 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
731 uint32_t RefThreshold : MOS_BITFIELD_RANGE( 16,31 );
732 };
733 struct
734 {
735 uint32_t Value;
736 };
737 } DW38;
738
739 // DW39
740 union
741 {
742 struct
743 {
744 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
745 uint32_t HMERefWindowsCombThreshold : MOS_BITFIELD_RANGE( 8,15 );
746 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
747 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
748 };
749 struct
750 {
751 uint32_t Value;
752 };
753 } DW39;
754
755 // DW40
756 union
757 {
758 struct
759 {
760 uint32_t DistScaleFactorRefID0List0 : MOS_BITFIELD_RANGE( 0,15 );
761 uint32_t DistScaleFactorRefID1List0 : MOS_BITFIELD_RANGE( 16,31 );
762 };
763 struct
764 {
765 uint32_t Value;
766 };
767 } DW40;
768
769 // DW41
770 union
771 {
772 struct
773 {
774 uint32_t DistScaleFactorRefID2List0 : MOS_BITFIELD_RANGE( 0,15 );
775 uint32_t DistScaleFactorRefID3List0 : MOS_BITFIELD_RANGE( 16,31 );
776 };
777 struct
778 {
779 uint32_t Value;
780 };
781 } DW41;
782
783 // DW42
784 union
785 {
786 struct
787 {
788 uint32_t DistScaleFactorRefID4List0 : MOS_BITFIELD_RANGE( 0,15 );
789 uint32_t DistScaleFactorRefID5List0 : MOS_BITFIELD_RANGE( 16,31 );
790 };
791 struct
792 {
793 uint32_t Value;
794 };
795 } DW42;
796
797 // DW43
798 union
799 {
800 struct
801 {
802 uint32_t DistScaleFactorRefID6List0 : MOS_BITFIELD_RANGE( 0,15 );
803 uint32_t DistScaleFactorRefID7List0 : MOS_BITFIELD_RANGE( 16,31 );
804 };
805 struct
806 {
807 uint32_t Value;
808 };
809 } DW43;
810
811 // DW44
812 union
813 {
814 struct
815 {
816 uint32_t ActualQPValueForRefID0List0 : MOS_BITFIELD_RANGE( 0, 7 );
817 uint32_t ActualQPValueForRefID1List0 : MOS_BITFIELD_RANGE( 8,15 );
818 uint32_t ActualQPValueForRefID2List0 : MOS_BITFIELD_RANGE( 16,23 );
819 uint32_t ActualQPValueForRefID3List0 : MOS_BITFIELD_RANGE( 24,31 );
820 };
821 struct
822 {
823 uint32_t Value;
824 };
825 } DW44;
826
827 // DW45
828 union
829 {
830 struct
831 {
832 uint32_t ActualQPValueForRefID4List0 : MOS_BITFIELD_RANGE( 0, 7 );
833 uint32_t ActualQPValueForRefID5List0 : MOS_BITFIELD_RANGE( 8,15 );
834 uint32_t ActualQPValueForRefID6List0 : MOS_BITFIELD_RANGE( 16,23 );
835 uint32_t ActualQPValueForRefID7List0 : MOS_BITFIELD_RANGE( 24,31 );
836 };
837 struct
838 {
839 uint32_t Value;
840 };
841 } DW45;
842
843 // DW46
844 union
845 {
846 struct
847 {
848 uint32_t ActualQPValueForRefID0List1 : MOS_BITFIELD_RANGE( 0, 7 );
849 uint32_t ActualQPValueForRefID1List1 : MOS_BITFIELD_RANGE( 8,15 );
850 uint32_t RefCost : MOS_BITFIELD_RANGE( 16,31 );
851 };
852 struct
853 {
854 uint32_t Value;
855 };
856 } DW46;
857
858 // DW47
859 union
860 {
861 struct
862 {
863 uint32_t MbQpReadFactor : MOS_BITFIELD_RANGE( 0, 7 );
864 uint32_t IntraCostSF : MOS_BITFIELD_RANGE( 8,15 );
865 uint32_t MaxVmvR : MOS_BITFIELD_RANGE( 16,31 );
866 };
867 struct
868 {
869 uint32_t Value;
870 };
871 } DW47;
872
873 //DW48
874 union
875 {
876 struct
877 {
878 uint32_t IntraRefreshMBx : MOS_BITFIELD_RANGE( 0, 15 );
879 uint32_t IntraRefreshUnitInMBMinus1 : MOS_BITFIELD_RANGE( 16,23 );
880 uint32_t IntraRefreshQPDelta : MOS_BITFIELD_RANGE( 24,31 );
881 };
882 struct
883 {
884 uint32_t Value;
885 };
886 } DW48;
887
888 // DW49
889 union
890 {
891 struct
892 {
893 uint32_t ROI1_X_left : MOS_BITFIELD_RANGE( 0,15 );
894 uint32_t ROI1_Y_top : MOS_BITFIELD_RANGE( 16,31 );
895 };
896 struct
897 {
898 uint32_t Value;
899 };
900 } DW49;
901
902 // DW50
903 union
904 {
905 struct
906 {
907 uint32_t ROI1_X_right : MOS_BITFIELD_RANGE( 0,15 );
908 uint32_t ROI1_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
909 };
910 struct
911 {
912 uint32_t Value;
913 };
914 } DW50;
915
916 // DW51
917 union
918 {
919 struct
920 {
921 uint32_t ROI2_X_left : MOS_BITFIELD_RANGE( 0,15 );
922 uint32_t ROI2_Y_top : MOS_BITFIELD_RANGE( 16,31 );
923 };
924 struct
925 {
926 uint32_t Value;
927 };
928 } DW51;
929
930 // DW52
931 union
932 {
933 struct
934 {
935 uint32_t ROI2_X_right : MOS_BITFIELD_RANGE( 0,15 );
936 uint32_t ROI2_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
937 };
938 struct
939 {
940 uint32_t Value;
941 };
942 } DW52;
943
944 // DW53
945 union
946 {
947 struct
948 {
949 uint32_t ROI3_X_left : MOS_BITFIELD_RANGE( 0,15 );
950 uint32_t ROI3_Y_top : MOS_BITFIELD_RANGE( 16,31 );
951 };
952 struct
953 {
954 uint32_t Value;
955 };
956 } DW53;
957
958 // DW54
959 union
960 {
961 struct
962 {
963 uint32_t ROI3_X_right : MOS_BITFIELD_RANGE( 0,15 );
964 uint32_t ROI3_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
965 };
966 struct
967 {
968 uint32_t Value;
969 };
970 } DW54;
971
972 // DW55
973 union
974 {
975 struct
976 {
977 uint32_t ROI4_X_left : MOS_BITFIELD_RANGE( 0,15 );
978 uint32_t ROI4_Y_top : MOS_BITFIELD_RANGE( 16,31 );
979 };
980 struct
981 {
982 uint32_t Value;
983 };
984 } DW55;
985
986 // DW56
987 union
988 {
989 struct
990 {
991 uint32_t ROI4_X_right : MOS_BITFIELD_RANGE( 0,15 );
992 uint32_t ROI4_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
993 };
994 struct
995 {
996 uint32_t Value;
997 };
998 } DW56;
999
1000 // DW57
1001 union
1002 {
1003 struct
1004 {
1005 uint32_t ROI1_dQpPrimeY : MOS_BITFIELD_RANGE( 0, 7 );
1006 uint32_t ROI2_dQpPrimeY : MOS_BITFIELD_RANGE( 8,15 );
1007 uint32_t ROI3_dQpPrimeY : MOS_BITFIELD_RANGE( 16,23 );
1008 uint32_t ROI4_dQpPrimeY : MOS_BITFIELD_RANGE( 24,31 );
1009 };
1010 struct
1011 {
1012 uint32_t Value;
1013 };
1014 } DW57;
1015
1016 // DW58
1017 union
1018 {
1019 struct
1020 {
1021 uint32_t HMEMVCostScalingFactor : MOS_BITFIELD_RANGE( 0, 7 );
1022 uint32_t Reserved : MOS_BITFIELD_RANGE( 8, 15 );
1023 uint32_t IntraRefreshMBy : MOS_BITFIELD_RANGE( 16, 31 );
1024 };
1025 struct
1026 {
1027 uint32_t Value;
1028 };
1029 } DW58;
1030
1031 // DW59
1032 union
1033 {
1034 struct
1035 {
1036 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
1037 };
1038 struct
1039 {
1040 uint32_t Value;
1041 };
1042 } DW59;
1043
1044 // DW60
1045 union
1046 {
1047 struct
1048 {
1049 uint32_t CabacWaZone0Threshold : MOS_BITFIELD_RANGE( 0,15 );
1050 uint32_t CabacWaZone1Threshold : MOS_BITFIELD_RANGE( 16,31 );
1051 };
1052 struct
1053 {
1054 uint32_t Value;
1055 };
1056 } DW60;
1057
1058 // DW61
1059 union
1060 {
1061 struct
1062 {
1063 uint32_t CabacWaZone2Threshold : MOS_BITFIELD_RANGE( 0,15 );
1064 uint32_t CabacWaZone3Threshold : MOS_BITFIELD_RANGE( 16,31 );
1065 };
1066 struct
1067 {
1068 uint32_t Value;
1069 };
1070 } DW61;
1071
1072 // DW62
1073 union
1074 {
1075 struct
1076 {
1077 uint32_t CABACWAZone0IntraMinQP : MOS_BITFIELD_RANGE( 0, 7 );
1078 uint32_t CABACWAZone1IntraMinQP : MOS_BITFIELD_RANGE( 8,15 );
1079 uint32_t CABACWAZone2IntraMinQP : MOS_BITFIELD_RANGE( 16,23 );
1080 uint32_t CABACWAZone3IntraMinQP : MOS_BITFIELD_RANGE( 24,31 );
1081 };
1082 struct
1083 {
1084 uint32_t Value;
1085 };
1086 } DW62;
1087
1088 // DW63
1089 union
1090 {
1091 struct
1092 {
1093 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
1094 };
1095 struct
1096 {
1097 uint32_t Value;
1098 };
1099 } DW63;
1100
1101 // DW64
1102 union
1103 {
1104 struct
1105 {
1106 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
1107 };
1108 struct
1109 {
1110 uint32_t Value;
1111 };
1112 } DW64;
1113
1114 // DW65
1115 union
1116 {
1117 struct
1118 {
1119 uint32_t MBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1120 };
1121 struct
1122 {
1123 uint32_t Value;
1124 };
1125 } DW65;
1126
1127 // DW66
1128 union
1129 {
1130 struct
1131 {
1132 uint32_t MVDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1133 };
1134 struct
1135 {
1136 uint32_t Value;
1137 };
1138 } DW66;
1139
1140 // DW67
1141 union
1142 {
1143 struct
1144 {
1145 uint32_t IDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1146 };
1147 struct
1148 {
1149 uint32_t Value;
1150 };
1151 } DW67;
1152
1153 // DW68
1154 union
1155 {
1156 struct
1157 {
1158 uint32_t SrcYSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1159 };
1160 struct
1161 {
1162 uint32_t Value;
1163 };
1164 } DW68;
1165
1166 // DW69
1167 union
1168 {
1169 struct
1170 {
1171 uint32_t MBSpecificDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1172 };
1173 struct
1174 {
1175 uint32_t Value;
1176 };
1177 } DW69;
1178
1179 // DW70
1180 union
1181 {
1182 struct
1183 {
1184 uint32_t AuxVmeOutSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1185 };
1186 struct
1187 {
1188 uint32_t Value;
1189 };
1190 } DW70;
1191
1192 // DW71
1193 union
1194 {
1195 struct
1196 {
1197 uint32_t CurrRefPicSelSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1198 };
1199 struct
1200 {
1201 uint32_t Value;
1202 };
1203 } DW71;
1204
1205 // DW72
1206 union
1207 {
1208 struct
1209 {
1210 uint32_t HMEMVPredFwdBwdSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1211 };
1212 struct
1213 {
1214 uint32_t Value;
1215 };
1216 } DW72;
1217
1218 // DW73
1219 union
1220 {
1221 struct
1222 {
1223 uint32_t HMEDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1224 };
1225 struct
1226 {
1227 uint32_t Value;
1228 };
1229 } DW73;
1230
1231 // DW74
1232 union
1233 {
1234 struct
1235 {
1236 uint32_t SliceMapSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1237 };
1238 struct
1239 {
1240 uint32_t Value;
1241 };
1242 } DW74;
1243
1244 // DW75
1245 union
1246 {
1247 struct
1248 {
1249 uint32_t FwdFrmMBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1250 };
1251 struct
1252 {
1253 uint32_t Value;
1254 };
1255 } DW75;
1256
1257 // DW76
1258 union
1259 {
1260 struct
1261 {
1262 uint32_t FwdFrmMVSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1263 };
1264 struct
1265 {
1266 uint32_t Value;
1267 };
1268 } DW76;
1269
1270 // DW77
1271 union
1272 {
1273 struct
1274 {
1275 uint32_t MBQPBuffer : MOS_BITFIELD_RANGE( 0,31 );
1276 };
1277 struct
1278 {
1279 uint32_t Value;
1280 };
1281 } DW77;
1282
1283 // DW78
1284 union
1285 {
1286 struct
1287 {
1288 uint32_t MBBRCLut : MOS_BITFIELD_RANGE( 0,31 );
1289 };
1290 struct
1291 {
1292 uint32_t Value;
1293 };
1294 } DW78;
1295
1296 // DW79
1297 union
1298 {
1299 struct
1300 {
1301 uint32_t VMEInterPredictionSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1302 };
1303 struct
1304 {
1305 uint32_t Value;
1306 };
1307 } DW79;
1308
1309 // DW80
1310 union
1311 {
1312 struct
1313 {
1314 uint32_t VMEInterPredictionMRSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1315 };
1316 struct
1317 {
1318 uint32_t Value;
1319 };
1320 } DW80;
1321
1322 // DW81
1323 union
1324 {
1325 struct
1326 {
1327 uint32_t FlatnessChkSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1328 };
1329 struct
1330 {
1331 uint32_t Value;
1332 };
1333 } DW81;
1334
1335 // DW82
1336 union
1337 {
1338 struct
1339 {
1340 uint32_t MADSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1341 };
1342 struct
1343 {
1344 uint32_t Value;
1345 };
1346 } DW82;
1347
1348 // DW83
1349 union
1350 {
1351 struct
1352 {
1353 uint32_t ForceNonSkipMBmapSurface : MOS_BITFIELD_RANGE( 0,31 );
1354 };
1355 struct
1356 {
1357 uint32_t Value;
1358 };
1359 } DW83;
1360
1361 // DW84
1362 union
1363 {
1364 struct
1365 {
1366 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
1367 };
1368 struct
1369 {
1370 uint32_t Value;
1371 };
1372 } DW84;
1373
1374 // DW85
1375 union
1376 {
1377 struct
1378 {
1379 uint32_t BRCCurbeSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
1380 };
1381 struct
1382 {
1383 uint32_t Value;
1384 };
1385 } DW85;
1386
1387 // DW86
1388 union
1389 {
1390 struct
1391 {
1392 uint32_t StaticDetectionOutputBufferIndex: MOS_BITFIELD_RANGE( 0,31 );
1393 };
1394 struct
1395 {
1396 uint32_t Value;
1397 };
1398 } DW86;
1399
1400 // DW87
1401 union
1402 {
1403 struct
1404 {
1405 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
1406 };
1407 struct
1408 {
1409 uint32_t Value;
1410 };
1411 } DW87;
1412
1413 } CODECHAL_ENCODE_AVC_MBENC_CURBE_CM_G9_SKL, *PCODECHAL_ENCODE_AVC_MBENC_CURBE_CM_G9_SKL;
1414
1415 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_CM_G9_SKL)) == 88);
1416
1417 typedef struct _CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_VME_BTI_G9
1418 {
1419 // DW0
1420 struct
1421 {
1422 uint32_t m_vmeInterPredictionSurfIndex;
1423 } DW0;
1424 // DW1
1425 struct
1426 {
1427 uint32_t m_vmeInterPredictionMRSurfIndex;
1428 } DW1;
1429 } CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_VME_BTI_G9;
1430
1431 typedef struct _CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_COMMON_BTI_G9
1432 {
1433 // DW8
1434 struct
1435 {
1436 uint32_t m_curbeDataSurfIndex;
1437 } DW8;
1438 // DW9
1439 struct
1440 {
1441 uint32_t m_mbDataSurfIndex;
1442 } DW9;
1443 // DW10
1444 struct
1445 {
1446 uint32_t m_mvDataSurfIndex;
1447 } DW10;
1448 // DW11
1449 struct
1450 {
1451 uint32_t m_fwdFrmMBDataSurfIndex;
1452 } DW11;
1453 // DW12
1454 struct
1455 {
1456 uint32_t m_fwdFrmMVSurfIndex;
1457 } DW12;
1458 // DW13
1459 struct
1460 {
1461 uint32_t m_hmeMVPredFwdBwdSurfIndex;
1462 } DW13;
1463 // DW14
1464 struct
1465 {
1466 uint32_t m_hmeDistSurfIndex;
1467 } DW14;
1468 // DW15
1469 struct
1470 {
1471 uint32_t m_iDistSurfIndex;
1472 } DW15;
1473 // DW16
1474 struct
1475 {
1476 uint32_t m_srcYSurfIndex;
1477 } DW16;
1478 // DW17
1479 struct
1480 {
1481 uint32_t m_mbBRCLut;
1482 } DW17;
1483 // DW18
1484 struct
1485 {
1486 uint32_t m_madSurfIndex;
1487 } DW18;
1488 // DW19
1489 struct
1490 {
1491 uint32_t m_reservedIndex;
1492 } DW19;
1493 // DW20
1494 struct
1495 {
1496 uint32_t m_staticDetectionCostTableIndex;
1497 } DW20;
1498 // DW21
1499 struct
1500 {
1501 uint32_t m_currRefPicSelSurfIndex;
1502 } DW21;
1503 // DW22
1504 struct
1505 {
1506 uint32_t m_mbStatsSurfIndex;
1507 } DW22;
1508 // DW23
1509 struct
1510 {
1511 uint32_t m_mbSpecificDataSurfIndex;
1512 } DW23;
1513 // DW24
1514 struct
1515 {
1516 uint32_t m_forceNonSkipMBmapSurface;
1517 } DW24;
1518 // DW25
1519 struct
1520 {
1521 uint32_t m_sliceMapSurfIndex;
1522 } DW25;
1523 // DW26
1524 struct
1525 {
1526 uint32_t m_mbQPBuffer;
1527 } DW26;
1528 // DW27
1529 struct
1530 {
1531 uint32_t m_auxVmeOutSurfIndex;
1532 } DW27;
1533 // DW28
1534 struct
1535 {
1536 uint32_t m_feiMVPredictorSurfIndex;
1537 } DW28;
1538 // DW29
1539 struct
1540 {
1541 uint32_t m_reserved;
1542 } DW29;
1543 // DW30
1544 struct
1545 {
1546 uint32_t m_reserved;
1547 } DW30;
1548 // DW31
1549 struct
1550 {
1551 uint32_t m_reserved;
1552 } DW31;
1553 } CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_COMMON_BTI_G9;
1554
1555 typedef struct _CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_G9
1556 {
1557 CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_VME_BTI_G9 m_vme[CODECHAL_ENCODE_AVC_MFE_MAX_FRAMES_G9];
1558 CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_COMMON_BTI_G9 m_common[CODECHAL_ENCODE_AVC_MFE_MAX_FRAMES_G9];
1559
1560 } CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_G9, *PCODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_G9;
1561
1562 // AVC MBEnc CURBE init data for G9 Kernel
1563 const uint32_t CodechalEncodeAvcEncG9Skl::MBEnc_CURBE_normal_I_frame[MBENC_CURBE_SIZE_IN_DWORD_G9_SKL] =
1564 {
1565 0x00000082, 0x00000000, 0x00003910, 0x00a83000, 0x00000000, 0x28300000, 0x05000000, 0x00000000,
1566 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1567 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1568 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1569 0x80800000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x00000080, 0x00003900, 0x28301000,
1570 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002,
1571 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1572 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1573 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1574 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1575 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1576 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1577 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1578 };
1579
1580 const uint32_t CodechalEncodeAvcEncG9Skl::MBEnc_CURBE_normal_I_field[MBENC_CURBE_SIZE_IN_DWORD_G9_SKL] =
1581 {
1582 0x00000082, 0x00000000, 0x00003910, 0x00a830c0, 0x02000000, 0x28300000, 0x05000000, 0x00000000,
1583 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1584 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1585 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1586 0x80800000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x00000080, 0x00003900, 0x28301000,
1587 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002,
1588 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1589 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1590 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1591 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1592 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1593 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1594 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1595 };
1596
1597 const uint32_t CodechalEncodeAvcEncG9Skl::MBEnc_CURBE_normal_P_frame[MBENC_CURBE_SIZE_IN_DWORD_G9_SKL] =
1598 {
1599 0x000000a3, 0x00000008, 0x00003910, 0x00ae3000, 0x30000000, 0x28300000, 0x05000000, 0x01400060,
1600 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1601 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1602 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1603 0x80010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x60000000, 0x000000a1, 0x00003900, 0x28301000,
1604 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000002,
1605 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1606 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1607 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1608 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1609 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1610 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1611 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1612 };
1613
1614 const uint32_t CodechalEncodeAvcEncG9Skl::MBEnc_CURBE_normal_P_field[MBENC_CURBE_SIZE_IN_DWORD_G9_SKL] =
1615 {
1616 0x000000a3, 0x00000008, 0x00003910, 0x00ae30c0, 0x30000000, 0x28300000, 0x05000000, 0x01400060,
1617 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1618 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1619 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1620 0x80010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x000000a1, 0x00003900, 0x28301000,
1621 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000002,
1622 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1623 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1624 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1625 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1626 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1627 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1628 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1629 };
1630
1631 const uint32_t CodechalEncodeAvcEncG9Skl::MBEnc_CURBE_normal_B_frame[MBENC_CURBE_SIZE_IN_DWORD_G9_SKL] =
1632 {
1633 0x000000a3, 0x00200008, 0x00003910, 0x00aa7700, 0x50020000, 0x20200000, 0x05000000, 0xff400000,
1634 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1635 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1636 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1637 0x01010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x60000000, 0x000000a1, 0x00003900, 0x28301000,
1638 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000002,
1639 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1640 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1641 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1642 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1643 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1644 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1645 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1646 };
1647
1648 const uint32_t CodechalEncodeAvcEncG9Skl::MBEnc_CURBE_normal_B_field[MBENC_CURBE_SIZE_IN_DWORD_G9_SKL] =
1649 {
1650 0x000000a3, 0x00200008, 0x00003919, 0x00aa77c0, 0x50020000, 0x20200000, 0x05000000, 0xff400000,
1651 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1652 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1653 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1654 0x01010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x000000a1, 0x00003900, 0x28301000,
1655 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000002,
1656 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1657 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1658 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1659 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1660 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1661 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1662 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1663 };
1664
1665 // AVC I_DIST CURBE init data for G9 Kernel
1666 const uint32_t CodechalEncodeAvcEncG9Skl::MBEnc_CURBE_I_frame_DIST[MBENC_CURBE_SIZE_IN_DWORD_G9_SKL] =
1667 {
1668 0x00000082, 0x00200008, 0x001e3910, 0x00a83000, 0x90000000, 0x28300000, 0x00000000, 0x00000000,
1669 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00000000,
1670 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1671 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100,
1672 0x80800000, 0x00000000, 0x00000800, 0xffff00ff, 0x40000000, 0x00000080, 0x00003900, 0x28300000,
1673 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1674 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1675 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1676 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1677 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1678 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1679 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1680 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1681 };
1682
1683 const int32_t CodechalEncodeAvcEncG9Skl::BRC_BTCOUNTS[CODECHAL_ENCODE_BRC_IDX_NUM] = {
1684 CODECHAL_ENCODE_AVC_BRC_INIT_RESET_NUM_SURFACES,
1685 CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_NUM_SURFACES_G9,
1686 CODECHAL_ENCODE_AVC_BRC_INIT_RESET_NUM_SURFACES,
1687 CODECHAL_ENCODE_AVC_MBENC_NUM_SURFACES_CM_G9,
1688 CODECHAL_ENCODE_AVC_BRC_BLOCK_COPY_NUM_SURFACES,
1689 CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_NUM_SURFACES_G9 // MbBRCUpdate kernel starting GEN9
1690 };
1691
1692 const int32_t CodechalEncodeAvcEncG9Skl::BRC_CURBE_SIZE[CODECHAL_ENCODE_BRC_IDX_NUM] = {
1693 (sizeof(CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9)),
1694 (sizeof(CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G9)),
1695 (sizeof(CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G9)),
1696 (sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)),
1697 0,
1698 (sizeof(CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G9)) // MbBRCUpdate kernel starting GEN9
1699 };
1700
GetKernelHeaderAndSize(void * pvBinary,EncOperation Operation,uint32_t dwKrnStateIdx,void * pvKrnHeader,uint32_t * pdwKrnSize)1701 MOS_STATUS CodechalEncodeAvcEncG9Skl::GetKernelHeaderAndSize(void *pvBinary, EncOperation Operation, uint32_t dwKrnStateIdx, void *pvKrnHeader, uint32_t *pdwKrnSize)
1702 {
1703 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1704
1705 CODECHAL_ENCODE_CHK_NULL_RETURN(pvBinary);
1706 CODECHAL_ENCODE_CHK_NULL_RETURN(pvKrnHeader);
1707 CODECHAL_ENCODE_CHK_NULL_RETURN(pdwKrnSize);
1708
1709 auto pKernelHeaderTable = (PCODECHAL_ENCODE_AVC_KERNEL_HEADER_G9)pvBinary;
1710 auto pInvalidEntry = &(pKernelHeaderTable->AVCMBEnc_Qlty_MFE) + 1;
1711 auto dwNextKrnOffset = *pdwKrnSize;
1712
1713 PCODECHAL_KERNEL_HEADER pCurrKrnHeader;
1714 if (Operation == ENC_SCALING4X)
1715 {
1716 pCurrKrnHeader = &pKernelHeaderTable->PLY_DScale_PLY;
1717 }
1718 else if (Operation == ENC_SCALING2X)
1719 {
1720 pCurrKrnHeader = &pKernelHeaderTable->PLY_2xDScale_PLY;
1721 }
1722 else if (Operation == ENC_ME)
1723 {
1724 pCurrKrnHeader = &pKernelHeaderTable->AVC_ME_P;
1725 }
1726 else if (Operation == VDENC_ME)
1727 {
1728 pCurrKrnHeader = &pKernelHeaderTable->AVC_ME_VDENC;
1729 }
1730 else if (Operation == ENC_BRC)
1731 {
1732 pCurrKrnHeader = &pKernelHeaderTable->InitFrameBRC;
1733 }
1734 else if (Operation == ENC_MBENC)
1735 {
1736 pCurrKrnHeader = &pKernelHeaderTable->AVCMBEnc_Qlty_I;
1737 }
1738 else if (Operation == ENC_MBENC_ADV)
1739 {
1740 pCurrKrnHeader = &pKernelHeaderTable->AVCMBEnc_Adv_I;
1741 }
1742 else if (Operation == ENC_WP)
1743 {
1744 pCurrKrnHeader = &pKernelHeaderTable->AVC_WeightedPrediction;
1745 }
1746 else if (Operation == ENC_SFD)
1747 {
1748 pCurrKrnHeader = &pKernelHeaderTable->AVC_StaticFrameDetection;
1749 }
1750 else
1751 {
1752 CODECHAL_ENCODE_ASSERTMESSAGE("Unsupported ENC mode requested");
1753 eStatus = MOS_STATUS_INVALID_PARAMETER;
1754 return eStatus;
1755 }
1756
1757 pCurrKrnHeader += dwKrnStateIdx;
1758 *((PCODECHAL_KERNEL_HEADER)pvKrnHeader) = *pCurrKrnHeader;
1759
1760 auto pNextKrnHeader = (pCurrKrnHeader + 1);
1761 if (pNextKrnHeader < pInvalidEntry)
1762 {
1763 dwNextKrnOffset = pNextKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT;
1764 }
1765 *pdwKrnSize = dwNextKrnOffset - (pCurrKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
1766
1767 return eStatus;
1768 }
1769
InitMfe()1770 MOS_STATUS CodechalEncodeAvcEncG9Skl::InitMfe()
1771 {
1772 if (!m_mfeEnabled)
1773 {
1774 return MOS_STATUS_SUCCESS;
1775 }
1776
1777 m_mfeLastStream = (m_mfeEncodeParams.submitIndex == m_mfeEncodeParams.submitNumber - 1);
1778 m_mfeFirstStream = (m_mfeEncodeParams.submitIndex == 0);
1779
1780 // Defer allocate some MFE specific resources and init flags
1781 if (!m_mfeInitialized)
1782 {
1783 // MFE use surface as MbEnc curbe, which is inited by brc update kernel.
1784 m_mbencBrcBufferSize = sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9);
1785 uint32_t size = MOS_ALIGN_CEIL(m_mbencBrcBufferSize,
1786 m_stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
1787
1788 MOS_LOCK_PARAMS LockFlagsWriteOnly;
1789 MOS_ZeroMemory(&LockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
1790 LockFlagsWriteOnly.WriteOnly = 1;
1791
1792 MOS_ALLOC_GFXRES_PARAMS AllocParamsForBufferLinear;
1793 MOS_ZeroMemory(&AllocParamsForBufferLinear, sizeof(MOS_ALLOC_GFXRES_PARAMS));
1794 AllocParamsForBufferLinear.Type = MOS_GFXRES_BUFFER;
1795 AllocParamsForBufferLinear.TileType = MOS_TILE_LINEAR;
1796 AllocParamsForBufferLinear.Format = Format_Buffer;
1797 AllocParamsForBufferLinear.dwBytes = size;
1798 AllocParamsForBufferLinear.pBufName = "MbEnc BRC buffer";
1799
1800 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnAllocateResource(
1801 m_osInterface,
1802 &AllocParamsForBufferLinear,
1803 &BrcBuffers.resMbEncBrcBuffer));
1804
1805 uint8_t* pData = (uint8_t*)m_osInterface->pfnLockResource(
1806 m_osInterface,
1807 &(BrcBuffers.resMbEncBrcBuffer),
1808 &LockFlagsWriteOnly);
1809 CODECHAL_ENCODE_CHK_NULL_RETURN(pData);
1810
1811 MOS_ZeroMemory(pData, size);
1812 m_osInterface->pfnUnlockResource(m_osInterface, &BrcBuffers.resMbEncBrcBuffer);
1813 CODECHAL_DEBUG_TOOL(
1814 m_debugInterface->m_streamId = m_mfeEncodeParams.streamId;)
1815
1816 // bookkeeping the orignal interfaces, which are changed during mfe mbenc kernel
1817 m_origHwInterface = m_hwInterface;
1818 m_origOsInterface = m_osInterface;
1819 m_origStateHeapInterface = m_stateHeapInterface;
1820
1821 // Whether mfe mbenc kernel is enabled or not
1822 MOS_USER_FEATURE_VALUE_DATA UserFeatureData;
1823 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
1824 MOS_UserFeature_ReadValue_ID(
1825 nullptr,
1826 __MEDIA_USER_FEATURE_VALUE_MFE_MBENC_ENABLE_ID,
1827 &UserFeatureData,
1828 m_osInterface->pOsContext);
1829 m_mfeMbEncEanbled = (UserFeatureData.i32Data) ? true : false;
1830
1831 m_mfeInitialized = true;
1832 }
1833
1834 return MOS_STATUS_SUCCESS;
1835 }
1836
SetCurbeAvcMfeMbEnc(PCODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_PARAMS pParams)1837 MOS_STATUS CodechalEncodeAvcEncG9Skl::SetCurbeAvcMfeMbEnc(PCODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_PARAMS pParams)
1838 {
1839 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1840
1841 CODECHAL_ENCODE_FUNCTION_ENTER;
1842 CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_G9 Cmd;
1843 PCODECHAL_ENCODE_AVC_BINDING_TABLE_MBENC pBindingTable = pParams->pBindingTable;
1844
1845 if (pParams->submitNumber > CODECHAL_ENCODE_AVC_MFE_MAX_FRAMES_G9)
1846 {
1847 CODECHAL_ENCODE_ASSERTMESSAGE("MFE submission number exceeds the threshold");
1848 eStatus = MOS_STATUS_INVALID_PARAMETER;
1849 return eStatus;
1850 }
1851
1852 MOS_ZeroMemory(&Cmd, sizeof(Cmd));
1853
1854 for (uint32_t submitIdx = 0; submitIdx < pParams->submitNumber; submitIdx++)
1855 {
1856 uint32_t dwBindingTableBase = CODECHAL_ENCODE_AVC_MBENC_NUM_SURFACES_G9 * submitIdx;
1857 Cmd.m_vme[submitIdx].DW0.m_vmeInterPredictionSurfIndex = pBindingTable->dwAvcMBEncCurrPicFrame[0] + dwBindingTableBase;
1858 Cmd.m_vme[submitIdx].DW1.m_vmeInterPredictionMRSurfIndex = pBindingTable->dwAvcMBEncCurrPicFrame[1] + dwBindingTableBase;
1859
1860 Cmd.m_common[submitIdx].DW8.m_curbeDataSurfIndex = pBindingTable->dwAvcMbEncBRCCurbeData + dwBindingTableBase;
1861 Cmd.m_common[submitIdx].DW9.m_mbDataSurfIndex = pBindingTable->dwAvcMBEncMfcAvcPakObj + dwBindingTableBase;
1862 Cmd.m_common[submitIdx].DW10.m_mvDataSurfIndex = pBindingTable->dwAvcMBEncIndMVData + dwBindingTableBase;
1863 Cmd.m_common[submitIdx].DW11.m_fwdFrmMBDataSurfIndex = pBindingTable->dwAvcMBEncBwdRefMBData + dwBindingTableBase;
1864 Cmd.m_common[submitIdx].DW12.m_fwdFrmMVSurfIndex = pBindingTable->dwAvcMBEncBwdRefMVData + dwBindingTableBase;
1865 Cmd.m_common[submitIdx].DW13.m_hmeMVPredFwdBwdSurfIndex = pBindingTable->dwAvcMBEncMVDataFromME + dwBindingTableBase;
1866 Cmd.m_common[submitIdx].DW14.m_hmeDistSurfIndex = pBindingTable->dwAvcMBEncMEDist + dwBindingTableBase;
1867 Cmd.m_common[submitIdx].DW15.m_iDistSurfIndex = pBindingTable->dwAvcMBEncBRCDist + dwBindingTableBase;
1868 Cmd.m_common[submitIdx].DW16.m_srcYSurfIndex = pBindingTable->dwAvcMBEncCurrY + dwBindingTableBase;
1869 Cmd.m_common[submitIdx].DW17.m_mbBRCLut = pBindingTable->dwAvcMBEncMbBrcConstData + dwBindingTableBase;
1870 Cmd.m_common[submitIdx].DW18.m_madSurfIndex = pBindingTable->dwAvcMBEncMADData + dwBindingTableBase;
1871 Cmd.m_common[submitIdx].DW19.m_reservedIndex = pBindingTable->dwAvcMBEncAdv + dwBindingTableBase;
1872 Cmd.m_common[submitIdx].DW20.m_staticDetectionCostTableIndex = pBindingTable->dwAvcMBEncStaticDetectionCostTable + dwBindingTableBase;
1873 Cmd.m_common[submitIdx].DW21.m_currRefPicSelSurfIndex = pBindingTable->dwAvcMBEncRefPicSelectL0 + dwBindingTableBase;
1874 Cmd.m_common[submitIdx].DW22.m_mbStatsSurfIndex = pBindingTable->dwAvcMBEncMBStats + dwBindingTableBase;
1875 Cmd.m_common[submitIdx].DW23.m_mbSpecificDataSurfIndex = pBindingTable->dwAvcMBEncMbSpecificData + dwBindingTableBase;
1876 Cmd.m_common[submitIdx].DW24.m_forceNonSkipMBmapSurface = pBindingTable->dwAvcMBEncMbNonSkipMap + dwBindingTableBase;
1877 Cmd.m_common[submitIdx].DW25.m_sliceMapSurfIndex = pBindingTable->dwAvcMBEncSliceMapData + dwBindingTableBase;
1878 Cmd.m_common[submitIdx].DW26.m_mbQPBuffer = pBindingTable->dwAvcMBEncMbQpFrame + dwBindingTableBase;
1879 }
1880 CODECHAL_ENCODE_CHK_STATUS_RETURN(pParams->pKernelState->m_dshRegion.AddData(
1881 &Cmd,
1882 pParams->pKernelState->dwCurbeOffset,
1883 sizeof(Cmd)));
1884 return eStatus;
1885 }
1886
UpdateMfeMbEncBindingTable(uint32_t submitIndex)1887 MOS_STATUS CodechalEncodeAvcEncG9Skl::UpdateMfeMbEncBindingTable(uint32_t submitIndex)
1888 {
1889 auto pBindingTable = &MbEncBindingTable;
1890
1891 uint32_t dwBindingTableBase = CODECHAL_ENCODE_AVC_MBENC_NUM_SURFACES_G9 * submitIndex;
1892
1893 pBindingTable->dwAvcMBEncMfcAvcPakObj = CODECHAL_ENCODE_AVC_MBENC_MFC_AVC_PAK_OBJ_G9 + dwBindingTableBase;
1894 pBindingTable->dwAvcMBEncIndMVData = CODECHAL_ENCODE_AVC_MBENC_IND_MV_DATA_G9 + dwBindingTableBase;
1895 pBindingTable->dwAvcMBEncBRCDist = CODECHAL_ENCODE_AVC_MBENC_BRC_DISTORTION_G9 + dwBindingTableBase;
1896 pBindingTable->dwAvcMBEncCurrY = CODECHAL_ENCODE_AVC_MBENC_CURR_Y_G9 + dwBindingTableBase;
1897 pBindingTable->dwAvcMBEncCurrUV = CODECHAL_ENCODE_AVC_MBENC_CURR_UV_G9 + dwBindingTableBase;
1898 pBindingTable->dwAvcMBEncMbSpecificData = CODECHAL_ENCODE_AVC_MBENC_MB_SPECIFIC_DATA_G9 + dwBindingTableBase;
1899 pBindingTable->dwAvcMBEncRefPicSelectL0 = CODECHAL_ENCODE_AVC_MBENC_REFPICSELECT_L0_G9 + dwBindingTableBase;
1900 pBindingTable->dwAvcMBEncMVDataFromME = CODECHAL_ENCODE_AVC_MBENC_MV_DATA_FROM_ME_G9 + dwBindingTableBase;
1901 pBindingTable->dwAvcMBEncMEDist = CODECHAL_ENCODE_AVC_MBENC_4xME_DISTORTION_G9 + dwBindingTableBase;
1902 pBindingTable->dwAvcMBEncSliceMapData = CODECHAL_ENCODE_AVC_MBENC_SLICEMAP_DATA_G9 + dwBindingTableBase;
1903 pBindingTable->dwAvcMBEncBwdRefMBData = CODECHAL_ENCODE_AVC_MBENC_FWD_MB_DATA_G9 + dwBindingTableBase;
1904 pBindingTable->dwAvcMBEncBwdRefMVData = CODECHAL_ENCODE_AVC_MBENC_FWD_MV_DATA_G9 + dwBindingTableBase;
1905 pBindingTable->dwAvcMBEncMbBrcConstData = CODECHAL_ENCODE_AVC_MBENC_MBBRC_CONST_DATA_G9 + dwBindingTableBase;
1906 pBindingTable->dwAvcMBEncMBStats = CODECHAL_ENCODE_AVC_MBENC_MB_STATS_G9 + dwBindingTableBase;
1907 pBindingTable->dwAvcMBEncMADData = CODECHAL_ENCODE_AVC_MBENC_MAD_DATA_G9 + dwBindingTableBase;
1908 pBindingTable->dwAvcMBEncMbNonSkipMap = CODECHAL_ENCODE_AVC_MBENC_FORCE_NONSKIP_MB_MAP_G9 + dwBindingTableBase;
1909 pBindingTable->dwAvcMBEncAdv = CODECHAL_ENCODE_AVC_MBENC_ADV_WA_G9 + dwBindingTableBase;
1910 pBindingTable->dwAvcMbEncBRCCurbeData = CODECHAL_ENCODE_AVC_MBENC_BRC_CURBE_DATA_G9 + dwBindingTableBase;
1911 pBindingTable->dwAvcMBEncFlatnessChk = CODECHAL_ENCODE_AVC_MBENC_FLATNESS_CHECK_CM_G9 + dwBindingTableBase;
1912 pBindingTable->dwAvcMBEncStaticDetectionCostTable = CODECHAL_ENCODE_AVC_MBENC_SFD_COST_TABLE_G9 + dwBindingTableBase;
1913
1914 // Frame
1915 pBindingTable->dwAvcMBEncMbQpFrame = CODECHAL_ENCODE_AVC_MBENC_MBQP_G9 + dwBindingTableBase;
1916 pBindingTable->dwAvcMBEncCurrPicFrame[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_G9 + dwBindingTableBase;
1917 pBindingTable->dwAvcMBEncFwdPicFrame[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX0_G9 + dwBindingTableBase;
1918 pBindingTable->dwAvcMBEncBwdPicFrame[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_G9 + dwBindingTableBase;
1919 pBindingTable->dwAvcMBEncFwdPicFrame[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX1_G9 + dwBindingTableBase;
1920 pBindingTable->dwAvcMBEncBwdPicFrame[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_G9 + dwBindingTableBase;
1921 pBindingTable->dwAvcMBEncFwdPicFrame[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX2_G9 + dwBindingTableBase;
1922 pBindingTable->dwAvcMBEncFwdPicFrame[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX3_G9 + dwBindingTableBase;
1923 pBindingTable->dwAvcMBEncFwdPicFrame[4] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX4_G9 + dwBindingTableBase;
1924 pBindingTable->dwAvcMBEncFwdPicFrame[5] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX5_G9 + dwBindingTableBase;
1925 pBindingTable->dwAvcMBEncFwdPicFrame[6] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX6_G9 + dwBindingTableBase;
1926 pBindingTable->dwAvcMBEncFwdPicFrame[7] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX7_G9 + dwBindingTableBase;
1927 pBindingTable->dwAvcMBEncCurrPicFrame[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_G9 + dwBindingTableBase;
1928 pBindingTable->dwAvcMBEncBwdPicFrame[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_G9 + dwBindingTableBase;
1929 pBindingTable->dwAvcMBEncBwdPicFrame[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_G9 + dwBindingTableBase;
1930
1931 // Field
1932 pBindingTable->dwAvcMBEncMbQpField = CODECHAL_ENCODE_AVC_MBENC_MBQP_G9 + dwBindingTableBase;
1933 pBindingTable->dwAvcMBEncFieldCurrPic[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_G9 + dwBindingTableBase;
1934 pBindingTable->dwAvcMBEncFwdPicTopField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX0_G9 + dwBindingTableBase;
1935 pBindingTable->dwAvcMBEncBwdPicTopField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_G9 + dwBindingTableBase;
1936 pBindingTable->dwAvcMBEncFwdPicBotField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX0_G9 + dwBindingTableBase;
1937 pBindingTable->dwAvcMBEncBwdPicBotField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_G9 + dwBindingTableBase;
1938 pBindingTable->dwAvcMBEncFwdPicTopField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX1_G9 + dwBindingTableBase;
1939 pBindingTable->dwAvcMBEncBwdPicTopField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_G9 + dwBindingTableBase;
1940 pBindingTable->dwAvcMBEncFwdPicBotField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX1_G9 + dwBindingTableBase;
1941 pBindingTable->dwAvcMBEncBwdPicBotField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_G9 + dwBindingTableBase;
1942 pBindingTable->dwAvcMBEncFwdPicTopField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX2_G9 + dwBindingTableBase;
1943 pBindingTable->dwAvcMBEncFwdPicBotField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX2_G9 + dwBindingTableBase;
1944 pBindingTable->dwAvcMBEncFwdPicTopField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX3_G9 + dwBindingTableBase;
1945 pBindingTable->dwAvcMBEncFwdPicBotField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX3_G9 + dwBindingTableBase;
1946 pBindingTable->dwAvcMBEncFwdPicTopField[4] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX4_G9 + dwBindingTableBase;
1947 pBindingTable->dwAvcMBEncFwdPicBotField[4] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX4_G9 + dwBindingTableBase;
1948 pBindingTable->dwAvcMBEncFwdPicTopField[5] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX5_G9 + dwBindingTableBase;
1949 pBindingTable->dwAvcMBEncFwdPicBotField[5] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX5_G9 + dwBindingTableBase;
1950 pBindingTable->dwAvcMBEncFwdPicTopField[6] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX6_G9 + dwBindingTableBase;
1951 pBindingTable->dwAvcMBEncFwdPicBotField[6] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX6_G9 + dwBindingTableBase;
1952 pBindingTable->dwAvcMBEncFwdPicTopField[7] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX7_G9 + dwBindingTableBase;
1953 pBindingTable->dwAvcMBEncFwdPicBotField[7] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX7_G9 + dwBindingTableBase;
1954 pBindingTable->dwAvcMBEncFieldCurrPic[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_G9 + dwBindingTableBase;
1955 pBindingTable->dwAvcMBEncBwdPicTopField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_G9 + dwBindingTableBase;
1956 pBindingTable->dwAvcMBEncBwdPicBotField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_G9 + dwBindingTableBase;
1957 pBindingTable->dwAvcMBEncBwdPicTopField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_G9 + dwBindingTableBase;
1958 pBindingTable->dwAvcMBEncBwdPicBotField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_G9 + dwBindingTableBase;
1959
1960 return MOS_STATUS_SUCCESS;
1961 }
1962
SetCurbeAvcMbEnc(PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS pParams)1963 MOS_STATUS CodechalEncodeAvcEncG9Skl::SetCurbeAvcMbEnc(PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS pParams)
1964 {
1965 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1966
1967 CODECHAL_ENCODE_FUNCTION_ENTER;
1968
1969 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams);
1970 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams->pPicParams);
1971 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams->pSeqParams);
1972 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams->pSlcParams);
1973 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams->pdwBlockBasedSkipEn);
1974
1975 auto pPicParams = pParams->pPicParams;
1976 auto pSeqParams = pParams->pSeqParams;
1977 auto pSlcParams = pParams->pSlcParams;
1978 CODECHAL_ENCODE_ASSERT(pSeqParams->TargetUsage < NUM_TARGET_USAGE_MODES);
1979
1980 uint8_t ucMeMethod =
1981 (m_pictureCodingType == B_TYPE) ? m_bMeMethodGeneric[pSeqParams->TargetUsage] : m_meMethodGeneric[pSeqParams->TargetUsage];
1982 // set SliceQP to MAX_SLICE_QP for MbEnc Adv kernel, we can use it to verify whether QP is changed or not
1983 uint8_t SliceQP = (pParams->bUseMbEncAdvKernel && pParams->bBrcEnabled) ? CODECHAL_ENCODE_AVC_MAX_SLICE_QP : pPicParams->pic_init_qp_minus26 + 26 + pSlcParams->slice_qp_delta;
1984 bool bFramePicture = CodecHal_PictureIsFrame(pPicParams->CurrOriginalPic);
1985 bool bTopField = CodecHal_PictureIsTopField(pPicParams->CurrOriginalPic);
1986 bool bBottomField = CodecHal_PictureIsBottomField(pPicParams->CurrOriginalPic);
1987
1988 CODECHAL_ENCODE_AVC_MBENC_CURBE_G9 Cmd;
1989 if (pParams->bMbEncIFrameDistEnabled)
1990 {
1991 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
1992 &Cmd,
1993 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9),
1994 MBEnc_CURBE_I_frame_DIST,
1995 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)));
1996 }
1997 else
1998 {
1999 switch (m_pictureCodingType)
2000 {
2001 case I_TYPE:
2002 if (bFramePicture)
2003 {
2004 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
2005 &Cmd,
2006 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9),
2007 MBEnc_CURBE_normal_I_frame,
2008 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)));
2009 }
2010 else
2011 {
2012 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
2013 &Cmd,
2014 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9),
2015 MBEnc_CURBE_normal_I_field,
2016 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)));
2017 }
2018 break;
2019
2020 case P_TYPE:
2021 if (bFramePicture)
2022 {
2023 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
2024 &Cmd,
2025 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9),
2026 MBEnc_CURBE_normal_P_frame,
2027 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)));
2028 }
2029 else
2030 {
2031 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
2032 &Cmd,
2033 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9),
2034 MBEnc_CURBE_normal_P_field,
2035 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)));
2036 }
2037 break;
2038
2039 case B_TYPE:
2040 if (bFramePicture)
2041 {
2042 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
2043 &Cmd,
2044 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9),
2045 MBEnc_CURBE_normal_B_frame,
2046 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)));
2047 }
2048 else
2049 {
2050 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
2051 &Cmd,
2052 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9),
2053 MBEnc_CURBE_normal_B_field,
2054 sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9)));
2055 }
2056 break;
2057
2058 default:
2059 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture coding type.");
2060 eStatus = MOS_STATUS_UNKNOWN;
2061 return eStatus;
2062 }
2063 }
2064
2065 // r1
2066 Cmd.common.DW0.AdaptiveEn =
2067 Cmd.common.DW37.AdaptiveEn = EnableAdaptiveSearch[pSeqParams->TargetUsage];
2068 Cmd.common.DW0.T8x8FlagForInterEn =
2069 Cmd.common.DW37.T8x8FlagForInterEn = pPicParams->transform_8x8_mode_flag;
2070 Cmd.common.DW2.LenSP = MaxLenSP[pSeqParams->TargetUsage];
2071 Cmd.common.DW38.LenSP = 0; // MBZ
2072 Cmd.common.DW3.SrcAccess =
2073 Cmd.common.DW3.RefAccess = bFramePicture ? 0 : 1;
2074 if (m_pictureCodingType != I_TYPE && bFTQEnable)
2075 {
2076 if (pParams->pAvcQCParams && pParams->pAvcQCParams->FTQOverride)
2077 {
2078 Cmd.common.DW3.FTEnable = pParams->pAvcQCParams->FTQEnable;
2079 }
2080 else
2081 {
2082 if (m_pictureCodingType == P_TYPE)
2083 {
2084 Cmd.common.DW3.FTEnable = FTQBasedSkip[pSeqParams->TargetUsage] & 0x01;
2085 }
2086 else // B_TYPE
2087 {
2088 Cmd.common.DW3.FTEnable = (FTQBasedSkip[pSeqParams->TargetUsage] >> 1) & 0x01;
2089 }
2090 }
2091 }
2092 else
2093 {
2094 Cmd.common.DW3.FTEnable = 0;
2095 }
2096 if (pPicParams->UserFlags.bDisableSubMBPartition)
2097 {
2098 Cmd.common.DW3.SubMbPartMask = CODECHAL_ENCODE_AVC_DISABLE_4X4_SUB_MB_PARTITION | CODECHAL_ENCODE_AVC_DISABLE_4X8_SUB_MB_PARTITION | CODECHAL_ENCODE_AVC_DISABLE_8X4_SUB_MB_PARTITION;
2099 }
2100
2101 if (pPicParams->bEnableSubMbPartMask)
2102 {
2103 Cmd.common.DW3.SubMbPartMask |= pPicParams->SubMbPartMask;
2104 }
2105
2106 if (pPicParams->bEnableSubPelMode)
2107 {
2108 Cmd.common.DW3.SubPelMode = pPicParams->SubPelMode;
2109 }
2110
2111 Cmd.common.DW2.PicWidth = pParams->wPicWidthInMb;
2112 Cmd.common.DW4.PicHeightMinus1 = pParams->wFieldFrameHeightInMb - 1;
2113 Cmd.common.DW4.EnableFBRBypass = bFBRBypassEnable;
2114 Cmd.common.DW4.EnableIntraCostScalingForStaticFrame = pParams->bStaticFrameDetectionEnabled;
2115 Cmd.common.DW4.FieldParityFlag = bBottomField;
2116 Cmd.common.DW4.bCurFldIDR = !bFramePicture && (pPicParams->bIdrPic || m_firstFieldIdrPic);
2117 Cmd.common.DW4.ConstrainedIntraPredFlag = pPicParams->constrained_intra_pred_flag;
2118 Cmd.common.DW4.HMEEnable = m_hmeEnabled;
2119 Cmd.common.DW4.PictureType = m_pictureCodingType - 1;
2120 Cmd.common.DW4.UseActualRefQPValue = m_hmeEnabled && (MRDisableQPCheck[pSeqParams->TargetUsage] == 0);
2121 Cmd.common.DW5.SliceMbHeight = pParams->usSliceHeight;
2122 Cmd.common.DW7.IntraPartMask = pPicParams->transform_8x8_mode_flag ? 0 : 0x2; // Disable 8x8 if flag is not set
2123 Cmd.common.DW7.SrcFieldPolarity = bBottomField;
2124
2125 // r2
2126 if (pParams->bMbEncIFrameDistEnabled)
2127 {
2128 Cmd.common.DW6.BatchBufferEnd = 0;
2129 }
2130 else
2131 {
2132 uint8_t ucTableIdx = m_pictureCodingType - 1;
2133 eStatus = MOS_SecureMemcpy(&(Cmd.common.DW8), 8 * sizeof(uint32_t), ModeMvCost_Cm[ucTableIdx][SliceQP], 8 * sizeof(uint32_t));
2134 if (eStatus != MOS_STATUS_SUCCESS)
2135 {
2136 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2137 return eStatus;
2138 }
2139
2140 if (m_pictureCodingType == I_TYPE && bOldModeCostEnable)
2141 {
2142 // Old intra mode cost needs to be used if bOldModeCostEnable is 1
2143 Cmd.common.DW8.Value = OldIntraModeCost_Cm_Common[SliceQP];
2144 }
2145 else if (m_skipBiasAdjustmentEnable)
2146 {
2147 // Load different MvCost for P picture when SkipBiasAdjustment is enabled
2148 // No need to check for P picture as the flag is only enabled for P picture
2149 Cmd.common.DW11.Value = MvCost_PSkipAdjustment_Cm_Common[SliceQP];
2150 }
2151 }
2152
2153 if (pParams->pAvcQCParams && pParams->pAvcQCParams->FTQSkipThresholdLUTInput)
2154 {
2155 Cmd.common.DW14.SICFwdTransCoeffThreshold_0 = pParams->pAvcQCParams->FTQSkipThresholdLUT[SliceQP];
2156 Cmd.common.DW14.SICFwdTransCoeffThreshold_1 = pParams->pAvcQCParams->FTQSkipThresholdLUT[SliceQP];
2157 Cmd.common.DW14.SICFwdTransCoeffThreshold_2 = pParams->pAvcQCParams->FTQSkipThresholdLUT[SliceQP];
2158 Cmd.common.DW15.SICFwdTransCoeffThreshold_3 = pParams->pAvcQCParams->FTQSkipThresholdLUT[SliceQP];
2159 Cmd.common.DW15.SICFwdTransCoeffThreshold_4 = pParams->pAvcQCParams->FTQSkipThresholdLUT[SliceQP];
2160 Cmd.common.DW15.SICFwdTransCoeffThreshold_5 = pParams->pAvcQCParams->FTQSkipThresholdLUT[SliceQP];
2161 Cmd.common.DW15.SICFwdTransCoeffThreshold_6 = pParams->pAvcQCParams->FTQSkipThresholdLUT[SliceQP];
2162 }
2163
2164 // r3 & r4
2165 if (pParams->bMbEncIFrameDistEnabled)
2166 {
2167 Cmd.common.DW31.IntraComputeType = 1;
2168 }
2169 else
2170 {
2171 uint8_t ucTableIdx = (m_pictureCodingType == B_TYPE) ? 1 : 0;
2172 eStatus = MOS_SecureMemcpy(&(Cmd.common.DW16), 16 * sizeof(uint32_t), CodechalEncoderState::m_encodeSearchPath[ucTableIdx][ucMeMethod], 16 * sizeof(uint32_t));
2173 if (eStatus != MOS_STATUS_SUCCESS)
2174 {
2175 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2176 return eStatus;
2177 }
2178 }
2179
2180 // r5
2181 if (m_pictureCodingType != I_TYPE && pParams->pAvcQCParams && pParams->pAvcQCParams->NonFTQSkipThresholdLUTInput)
2182 {
2183 Cmd.common.DW32.SkipVal = (uint16_t)CalcSkipVal(Cmd.common.DW3.BlockBasedSkipEnable, pPicParams->transform_8x8_mode_flag,
2184 pParams->pAvcQCParams->NonFTQSkipThresholdLUT[SliceQP]);
2185
2186 }
2187 else
2188 {
2189 if (m_pictureCodingType == P_TYPE)
2190 {
2191 Cmd.common.DW32.SkipVal = SkipVal_P_Common
2192 [Cmd.common.DW3.BlockBasedSkipEnable]
2193 [pPicParams->transform_8x8_mode_flag]
2194 [SliceQP];
2195 }
2196 else if (m_pictureCodingType == B_TYPE)
2197 {
2198 Cmd.common.DW32.SkipVal = SkipVal_B_Common
2199 [Cmd.common.DW3.BlockBasedSkipEnable]
2200 [pPicParams->transform_8x8_mode_flag]
2201 [SliceQP];
2202 }
2203 }
2204
2205 Cmd.common.DW13.QpPrimeY = SliceQP;
2206 // QpPrimeCb and QpPrimeCr are not used by Kernel. Following settings are for CModel matching.
2207 Cmd.common.DW13.QpPrimeCb = SliceQP;
2208 Cmd.common.DW13.QpPrimeCr = SliceQP;
2209 Cmd.common.DW13.TargetSizeInWord = 0xff; // hardcoded for BRC disabled
2210
2211 if (bMultiPredEnable && (m_pictureCodingType != I_TYPE))
2212 {
2213 switch (MultiPred[pSeqParams->TargetUsage])
2214 {
2215 case 0: // Disable multipred for both P & B picture types
2216 Cmd.common.DW32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2217 Cmd.common.DW32.MultiPredL1Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2218 break;
2219
2220 case 1: // Enable multipred for P pictures only
2221 Cmd.common.DW32.MultiPredL0Disable = (m_pictureCodingType == P_TYPE) ? CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2222 Cmd.common.DW32.MultiPredL1Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2223 break;
2224
2225 case 2: // Enable multipred for B pictures only
2226 Cmd.common.DW32.MultiPredL0Disable = (m_pictureCodingType == B_TYPE) ?
2227 CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2228 Cmd.common.DW32.MultiPredL1Disable = (m_pictureCodingType == B_TYPE) ?
2229 CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2230 break;
2231
2232 case 3: // Enable multipred for both P & B picture types
2233 Cmd.common.DW32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE;
2234 Cmd.common.DW32.MultiPredL1Disable = (m_pictureCodingType == B_TYPE) ?
2235 CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2236 break;
2237 }
2238 }
2239 else
2240 {
2241 Cmd.common.DW32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2242 Cmd.common.DW32.MultiPredL1Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2243 }
2244
2245 if (!bFramePicture)
2246 {
2247 if (m_pictureCodingType != I_TYPE)
2248 {
2249 Cmd.common.DW34.List0RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_0);
2250 Cmd.common.DW34.List0RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_1);
2251 Cmd.common.DW34.List0RefID2FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_2);
2252 Cmd.common.DW34.List0RefID3FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_3);
2253 Cmd.common.DW34.List0RefID4FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_4);
2254 Cmd.common.DW34.List0RefID5FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_5);
2255 Cmd.common.DW34.List0RefID6FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_6);
2256 Cmd.common.DW34.List0RefID7FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_0, CODECHAL_ENCODE_REF_ID_7);
2257 }
2258 if (m_pictureCodingType == B_TYPE)
2259 {
2260 Cmd.common.DW34.List1RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_1, CODECHAL_ENCODE_REF_ID_0);
2261 Cmd.common.DW34.List1RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(pSlcParams, LIST_1, CODECHAL_ENCODE_REF_ID_1);
2262 }
2263 }
2264 Cmd.common.DW34.RemoveIntraRefreshOverlap = pPicParams->bDisableRollingIntraRefreshOverlap;
2265 if (m_adaptiveTransformDecisionEnabled)
2266 {
2267 if (m_pictureCodingType != I_TYPE)
2268 {
2269 Cmd.common.DW34.EnableAdaptiveTxDecision = true;
2270 }
2271
2272 Cmd.common.DW58.TxDecisonThreshold = CODECHAL_ENCODE_AVC_ADAPTIVE_TX_DECISION_THRESHOLD_G9;
2273 }
2274
2275 if (m_adaptiveTransformDecisionEnabled || m_flatnessCheckEnabled)
2276 {
2277 Cmd.common.DW58.MBTextureThreshold = CODECHAL_ENCODE_AVC_MB_TEXTURE_THRESHOLD_G9;
2278 }
2279
2280 if (m_pictureCodingType == B_TYPE)
2281 {
2282 Cmd.common.DW34.List1RefID0FrameFieldFlag = GetRefPicFieldFlag(pParams, LIST_1, CODECHAL_ENCODE_REF_ID_0);
2283 Cmd.common.DW34.List1RefID1FrameFieldFlag = GetRefPicFieldFlag(pParams, LIST_1, CODECHAL_ENCODE_REF_ID_1);
2284 Cmd.common.DW34.bDirectMode = pSlcParams->direct_spatial_mv_pred_flag;
2285 }
2286 Cmd.common.DW34.bOriginalBff = bFramePicture ? 0 :
2287 ((m_firstField && (bBottomField)) || (!m_firstField && (!bBottomField)));
2288 Cmd.common.DW34.EnableMBFlatnessChkOptimization = m_flatnessCheckEnabled;
2289 Cmd.common.DW34.ROIEnableFlag = pParams->bRoiEnabled;
2290 Cmd.common.DW34.MADEnableFlag = m_madEnabled;
2291 Cmd.common.DW34.MBBrcEnable = bMbBrcEnabled || bMbQpDataEnabled;
2292 Cmd.common.DW34.ArbitraryNumMbsPerSlice = m_arbitraryNumMbsInSlice;
2293 Cmd.common.DW34.ForceNonSkipMbEnable = pParams->bMbDisableSkipMapEnabled;
2294 if (pParams->pAvcQCParams && !Cmd.common.DW34.ForceNonSkipMbEnable) // ignore DisableEncSkipCheck if Mb Disable Skip Map is available
2295 {
2296 Cmd.common.DW34.DisableEncSkipCheck = pParams->pAvcQCParams->skipCheckDisable;
2297 }
2298 Cmd.common.DW36.CheckAllFractionalEnable = bCAFEnable;
2299 Cmd.common.DW38.RefThreshold = m_refThreshold;
2300 Cmd.common.DW39.HMERefWindowsCombThreshold = (m_pictureCodingType == B_TYPE) ?
2301 HMEBCombineLen[pSeqParams->TargetUsage] : HMECombineLen[pSeqParams->TargetUsage];
2302
2303 // Default:2 used for MBBRC (MB QP Surface width and height are 4x downscaled picture in MB unit * 4 bytes)
2304 // 0 used for MBQP data surface (MB QP Surface width and height are same as the input picture size in MB unit * 1bytes)
2305 // starting GEN9, BRC use split kernel, MB QP surface is same size as input picture
2306 Cmd.common.DW47.MbQpReadFactor = (bMbBrcEnabled || bMbQpDataEnabled) ? 0 : 2;
2307
2308 // Those fields are not really used for I_dist kernel,
2309 // but set them to 0 to get bit-exact match with kernel prototype
2310 if (pParams->bMbEncIFrameDistEnabled)
2311 {
2312 Cmd.common.DW13.QpPrimeY = 0;
2313 Cmd.common.DW13.QpPrimeCb = 0;
2314 Cmd.common.DW13.QpPrimeCr = 0;
2315 Cmd.common.DW33.Intra16x16NonDCPredPenalty = 0;
2316 Cmd.common.DW33.Intra4x4NonDCPredPenalty = 0;
2317 Cmd.common.DW33.Intra8x8NonDCPredPenalty = 0;
2318 }
2319
2320 //r6
2321 if (Cmd.common.DW4.UseActualRefQPValue)
2322 {
2323 Cmd.common.DW44.ActualQPValueForRefID0List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_0);
2324 Cmd.common.DW44.ActualQPValueForRefID1List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_1);
2325 Cmd.common.DW44.ActualQPValueForRefID2List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_2);
2326 Cmd.common.DW44.ActualQPValueForRefID3List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_3);
2327 Cmd.common.DW45.ActualQPValueForRefID4List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_4);
2328 Cmd.common.DW45.ActualQPValueForRefID5List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_5);
2329 Cmd.common.DW45.ActualQPValueForRefID6List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_6);
2330 Cmd.common.DW45.ActualQPValueForRefID7List0 = AVCGetQPValueFromRefList(pParams, LIST_0, CODECHAL_ENCODE_REF_ID_7);
2331 Cmd.common.DW46.ActualQPValueForRefID0List1 = AVCGetQPValueFromRefList(pParams, LIST_1, CODECHAL_ENCODE_REF_ID_0);
2332 Cmd.common.DW46.ActualQPValueForRefID1List1 = AVCGetQPValueFromRefList(pParams, LIST_1, CODECHAL_ENCODE_REF_ID_1);
2333 }
2334
2335 uint8_t ucTableIdx = m_pictureCodingType - 1;
2336 Cmd.common.DW46.RefCost = RefCost_MultiRefQp[ucTableIdx][SliceQP];
2337
2338 // Picture Coding Type dependent parameters
2339 if (m_pictureCodingType == I_TYPE)
2340 {
2341 Cmd.common.DW0.SkipModeEn = 0;
2342 Cmd.common.DW37.SkipModeEn = 0;
2343 Cmd.common.DW36.HMECombineOverlap = 0;
2344 Cmd.common.DW47.IntraCostSF = 16; // This is not used but recommended to set this to 16 by Kernel team
2345 Cmd.common.DW34.EnableDirectBiasAdjustment = 0;
2346 Cmd.common.DW34.EnableGlobalMotionBiasAdjustment = 0;
2347 }
2348 else if (m_pictureCodingType == P_TYPE)
2349 {
2350 Cmd.common.DW1.MaxNumMVs = GetMaxMvsPer2Mb(pSeqParams->Level) / 2;
2351 Cmd.common.DW3.BMEDisableFBR = 1;
2352 Cmd.common.DW5.RefWidth = SearchX[pSeqParams->TargetUsage];
2353 Cmd.common.DW5.RefHeight = SearchY[pSeqParams->TargetUsage];
2354 Cmd.common.DW7.NonSkipZMvAdded = 1;
2355 Cmd.common.DW7.NonSkipModeAdded = 1;
2356 Cmd.common.DW7.SkipCenterMask = 1;
2357 Cmd.common.DW47.IntraCostSF =
2358 bAdaptiveIntraScalingEnable ?
2359 AdaptiveIntraScalingFactor_Cm_Common[SliceQP] :
2360 IntraScalingFactor_Cm_Common[SliceQP];
2361 Cmd.common.DW47.MaxVmvR = (bFramePicture) ? CodecHalAvcEncode_GetMaxMvLen(pSeqParams->Level) * 4 : (CodecHalAvcEncode_GetMaxMvLen(pSeqParams->Level) >> 1) * 4;
2362 Cmd.common.DW36.HMECombineOverlap = 1;
2363 Cmd.common.DW36.NumRefIdxL0MinusOne = bMultiPredEnable ? pSlcParams->num_ref_idx_l0_active_minus1 : 0;
2364 Cmd.common.DW39.RefWidth = SearchX[pSeqParams->TargetUsage];
2365 Cmd.common.DW39.RefHeight = SearchY[pSeqParams->TargetUsage];
2366 Cmd.common.DW34.EnableDirectBiasAdjustment = 0;
2367 if (pParams->pAvcQCParams)
2368 {
2369 Cmd.common.DW34.EnableGlobalMotionBiasAdjustment = pParams->pAvcQCParams->globalMotionBiasAdjustmentEnable;
2370 if (Cmd.common.DW34.EnableGlobalMotionBiasAdjustment)
2371 {
2372 Cmd.common.DW59.HMEMVCostScalingFactor = pParams->pAvcQCParams->HMEMVCostScalingFactor;
2373 }
2374 }
2375 }
2376 else
2377 {
2378 // B_TYPE
2379 Cmd.common.DW1.MaxNumMVs = GetMaxMvsPer2Mb(pSeqParams->Level) / 2;
2380 Cmd.common.DW1.BiWeight = m_biWeight;
2381 Cmd.common.DW3.SearchCtrl = 7;
2382 Cmd.common.DW3.SkipType = 1;
2383 Cmd.common.DW5.RefWidth = BSearchX[pSeqParams->TargetUsage];
2384 Cmd.common.DW5.RefHeight = BSearchY[pSeqParams->TargetUsage];
2385 Cmd.common.DW7.SkipCenterMask = 0xFF;
2386 Cmd.common.DW47.IntraCostSF =
2387 bAdaptiveIntraScalingEnable ?
2388 AdaptiveIntraScalingFactor_Cm_Common[SliceQP] :
2389 IntraScalingFactor_Cm_Common[SliceQP];
2390 Cmd.common.DW47.MaxVmvR = (bFramePicture) ? CodecHalAvcEncode_GetMaxMvLen(pSeqParams->Level) * 4 : (CodecHalAvcEncode_GetMaxMvLen(pSeqParams->Level) >> 1) * 4;
2391 Cmd.common.DW36.HMECombineOverlap = 1;
2392 // Checking if the forward frame (List 1 index 0) is a short term reference
2393 {
2394 CODEC_PICTURE CodecHalPic = pParams->pSlcParams->RefPicList[LIST_1][0];
2395 if (CodecHalPic.PicFlags != PICTURE_INVALID &&
2396 CodecHalPic.FrameIdx != CODECHAL_ENCODE_AVC_INVALID_PIC_ID &&
2397 pParams->pPicIdx[CodecHalPic.FrameIdx].bValid)
2398 {
2399 // Although its name is FWD, it actually means the future frame or the backward reference frame
2400 Cmd.common.DW36.IsFwdFrameShortTermRef = CodecHal_PictureIsShortTermRef(pParams->pPicParams->RefFrameList[CodecHalPic.FrameIdx]);
2401 }
2402 else
2403 {
2404 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid backward reference frame.");
2405 eStatus = MOS_STATUS_INVALID_PARAMETER;
2406 return eStatus;
2407 }
2408 }
2409 Cmd.common.DW36.NumRefIdxL0MinusOne = bMultiPredEnable ? pSlcParams->num_ref_idx_l0_active_minus1 : 0;
2410 Cmd.common.DW36.NumRefIdxL1MinusOne = bMultiPredEnable ? pSlcParams->num_ref_idx_l1_active_minus1 : 0;
2411 Cmd.common.DW39.RefWidth = BSearchX[pSeqParams->TargetUsage];
2412 Cmd.common.DW39.RefHeight = BSearchY[pSeqParams->TargetUsage];
2413 Cmd.common.DW40.DistScaleFactorRefID0List0 = m_distScaleFactorList0[0];
2414 Cmd.common.DW40.DistScaleFactorRefID1List0 = m_distScaleFactorList0[1];
2415 Cmd.common.DW41.DistScaleFactorRefID2List0 = m_distScaleFactorList0[2];
2416 Cmd.common.DW41.DistScaleFactorRefID3List0 = m_distScaleFactorList0[3];
2417 Cmd.common.DW42.DistScaleFactorRefID4List0 = m_distScaleFactorList0[4];
2418 Cmd.common.DW42.DistScaleFactorRefID5List0 = m_distScaleFactorList0[5];
2419 Cmd.common.DW43.DistScaleFactorRefID6List0 = m_distScaleFactorList0[6];
2420 Cmd.common.DW43.DistScaleFactorRefID7List0 = m_distScaleFactorList0[7];
2421 if (pParams->pAvcQCParams)
2422 {
2423 Cmd.common.DW34.EnableDirectBiasAdjustment = pParams->pAvcQCParams->directBiasAdjustmentEnable;
2424 if (Cmd.common.DW34.EnableDirectBiasAdjustment)
2425 {
2426 Cmd.common.DW7.NonSkipModeAdded = 1;
2427 Cmd.common.DW7.NonSkipZMvAdded = 1;
2428 }
2429
2430 Cmd.common.DW34.EnableGlobalMotionBiasAdjustment = pParams->pAvcQCParams->globalMotionBiasAdjustmentEnable;
2431 if (Cmd.common.DW34.EnableGlobalMotionBiasAdjustment)
2432 {
2433 Cmd.common.DW59.HMEMVCostScalingFactor = pParams->pAvcQCParams->HMEMVCostScalingFactor;
2434 }
2435 }
2436 {
2437 CODEC_PICTURE RefPic;
2438 RefPic = pSlcParams->RefPicList[LIST_1][0];
2439
2440 Cmd.common.DW64.L1ListRef0PictureCodingType = m_refList[m_picIdx[RefPic.FrameIdx].ucPicIdx]->ucAvcPictureCodingType;
2441 if(bFramePicture && ((Cmd.common.DW64.L1ListRef0PictureCodingType == CODEC_AVC_PIC_CODING_TYPE_TFF_FIELD) || (Cmd.common.DW64.L1ListRef0PictureCodingType == CODEC_AVC_PIC_CODING_TYPE_BFF_FIELD)))
2442 {
2443 uint16_t wFieldHeightInMb = (pParams->wFieldFrameHeightInMb + 1) >> 1;
2444 Cmd.common.DW66.BottomFieldOffsetL1ListRef0MV = MOS_ALIGN_CEIL(wFieldHeightInMb * pParams->wPicWidthInMb * (32 * 4), 0x1000);
2445 Cmd.common.DW67.BottomFieldOffsetL1ListRef0MBCode = wFieldHeightInMb * pParams->wPicWidthInMb * 64;
2446 }
2447 }
2448 }
2449
2450 *pParams->pdwBlockBasedSkipEn = Cmd.common.DW3.BlockBasedSkipEnable;
2451
2452 if (pPicParams->EnableRollingIntraRefresh)
2453 {
2454 Cmd.common.DW34.IntraRefreshEn = pPicParams->EnableRollingIntraRefresh;
2455
2456 /* Multiple predictor should be completely disabled for the RollingI feature. This does not lead to much quality drop for P frames especially for TU as 1 */
2457 Cmd.common.DW32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
2458
2459 /* Pass the same IntraRefreshUnit to the kernel w/o the adjustment by -1, so as to have an overlap of one MB row or column of Intra macroblocks
2460 across one P frame to another P frame, as needed by the RollingI algo */
2461 Cmd.common.DW48.IntraRefreshMBNum = pPicParams->IntraRefreshMBNum; /* MB row or column number */
2462 Cmd.common.DW48.IntraRefreshUnitInMBMinus1 = pPicParams->IntraRefreshUnitinMB;
2463 Cmd.common.DW48.IntraRefreshQPDelta = pPicParams->IntraRefreshQPDelta;
2464 }
2465 else
2466 {
2467 Cmd.common.DW34.IntraRefreshEn = 0;
2468 }
2469
2470 Cmd.common.DW34.EnablePerMBStaticCheck = pParams->bStaticFrameDetectionEnabled;
2471 Cmd.common.DW34.EnableAdaptiveSearchWindowSize = pParams->bApdatvieSearchWindowSizeEnabled;
2472
2473 if (true == pParams->bRoiEnabled)
2474 {
2475 Cmd.common.DW49.ROI1_X_left = pPicParams->ROI[0].Left;
2476 Cmd.common.DW49.ROI1_Y_top = pPicParams->ROI[0].Top;
2477 Cmd.common.DW50.ROI1_X_right = pPicParams->ROI[0].Right;
2478 Cmd.common.DW50.ROI1_Y_bottom = pPicParams->ROI[0].Bottom;
2479
2480 Cmd.common.DW51.ROI2_X_left = pPicParams->ROI[1].Left;
2481 Cmd.common.DW51.ROI2_Y_top = pPicParams->ROI[1].Top;
2482 Cmd.common.DW52.ROI2_X_right = pPicParams->ROI[1].Right;
2483 Cmd.common.DW52.ROI2_Y_bottom = pPicParams->ROI[1].Bottom;
2484
2485 Cmd.common.DW53.ROI3_X_left = pPicParams->ROI[2].Left;
2486 Cmd.common.DW53.ROI3_Y_top = pPicParams->ROI[2].Top;
2487 Cmd.common.DW54.ROI3_X_right = pPicParams->ROI[2].Right;
2488 Cmd.common.DW54.ROI3_Y_bottom = pPicParams->ROI[2].Bottom;
2489
2490 Cmd.common.DW55.ROI4_X_left = pPicParams->ROI[3].Left;
2491 Cmd.common.DW55.ROI4_Y_top = pPicParams->ROI[3].Top;
2492 Cmd.common.DW56.ROI4_X_right = pPicParams->ROI[3].Right;
2493 Cmd.common.DW56.ROI4_Y_bottom = pPicParams->ROI[3].Bottom;
2494
2495 if (bBrcEnabled == false)
2496 {
2497 uint16_t numROI = pPicParams->NumROI;
2498 char priorityLevelOrDQp[CODECHAL_ENCODE_AVC_MAX_ROI_NUMBER] = { 0 };
2499
2500 // cqp case
2501 for (unsigned int i = 0; i < numROI; i += 1)
2502 {
2503 char dQpRoi = pPicParams->ROI[i].PriorityLevelOrDQp;
2504
2505 // clip qp roi in order to have (qp + qpY) in range [0, 51]
2506 priorityLevelOrDQp[i] = (char)CodecHal_Clip3(-SliceQP, CODECHAL_ENCODE_AVC_MAX_SLICE_QP - SliceQP, dQpRoi);
2507 }
2508
2509 Cmd.common.DW57.ROI1_dQpPrimeY = priorityLevelOrDQp[0];
2510 Cmd.common.DW57.ROI2_dQpPrimeY = priorityLevelOrDQp[1];
2511 Cmd.common.DW57.ROI3_dQpPrimeY = priorityLevelOrDQp[2];
2512 Cmd.common.DW57.ROI4_dQpPrimeY = priorityLevelOrDQp[3];
2513 }
2514 else
2515 {
2516 // kernel does not support BRC case
2517 Cmd.common.DW34.ROIEnableFlag = 0;
2518 }
2519 }
2520 else if (pParams->bDirtyRoiEnabled)
2521 {
2522 // enable Dirty Rect flag
2523 Cmd.common.DW4.EnableDirtyRect = true;
2524
2525 Cmd.common.DW49.ROI1_X_left = pParams->pPicParams->DirtyROI[0].Left;
2526 Cmd.common.DW49.ROI1_Y_top = pParams->pPicParams->DirtyROI[0].Top;
2527 Cmd.common.DW50.ROI1_X_right = pParams->pPicParams->DirtyROI[0].Right;
2528 Cmd.common.DW50.ROI1_Y_bottom = pParams->pPicParams->DirtyROI[0].Bottom;
2529
2530 Cmd.common.DW51.ROI2_X_left = pParams->pPicParams->DirtyROI[1].Left;
2531 Cmd.common.DW51.ROI2_Y_top = pParams->pPicParams->DirtyROI[1].Top;
2532 Cmd.common.DW52.ROI2_X_right = pParams->pPicParams->DirtyROI[1].Right;
2533 Cmd.common.DW52.ROI2_Y_bottom = pParams->pPicParams->DirtyROI[1].Bottom;
2534
2535 Cmd.common.DW53.ROI3_X_left = pParams->pPicParams->DirtyROI[2].Left;
2536 Cmd.common.DW53.ROI3_Y_top = pParams->pPicParams->DirtyROI[2].Top;
2537 Cmd.common.DW54.ROI3_X_right = pParams->pPicParams->DirtyROI[2].Right;
2538 Cmd.common.DW54.ROI3_Y_bottom = pParams->pPicParams->DirtyROI[2].Bottom;
2539
2540 Cmd.common.DW55.ROI4_X_left = pParams->pPicParams->DirtyROI[3].Left;
2541 Cmd.common.DW55.ROI4_Y_top = pParams->pPicParams->DirtyROI[3].Top;
2542 Cmd.common.DW56.ROI4_X_right = pParams->pPicParams->DirtyROI[3].Right;
2543 Cmd.common.DW56.ROI4_Y_bottom = pParams->pPicParams->DirtyROI[3].Bottom;
2544 }
2545
2546 //IPCM QP and threshold
2547 Cmd.common.DW60.IPCM_QP0 = IPCM_Threshold_Table[0].QP;
2548 Cmd.common.DW60.IPCM_QP1 = IPCM_Threshold_Table[1].QP;
2549 Cmd.common.DW60.IPCM_QP2 = IPCM_Threshold_Table[2].QP;
2550 Cmd.common.DW60.IPCM_QP3 = IPCM_Threshold_Table[3].QP;
2551 Cmd.common.DW61.IPCM_QP4 = IPCM_Threshold_Table[4].QP;
2552
2553 Cmd.common.DW61.IPCM_Thresh0 = IPCM_Threshold_Table[0].Threshold;
2554 Cmd.common.DW62.IPCM_Thresh1 = IPCM_Threshold_Table[1].Threshold;
2555 Cmd.common.DW62.IPCM_Thresh2 = IPCM_Threshold_Table[2].Threshold;
2556 Cmd.common.DW63.IPCM_Thresh3 = IPCM_Threshold_Table[3].Threshold;
2557 Cmd.common.DW63.IPCM_Thresh4 = IPCM_Threshold_Table[4].Threshold;
2558
2559 Cmd.common.DW64.EnableColorBleedWAforIntraSlice = 0;
2560 Cmd.common.DW64.MBInputEnable = bMbSpecificDataEnabled;
2561
2562 if (IsMfeMbEncEnabled(pParams->bMbEncIFrameDistEnabled))
2563 {
2564
2565 // MFE uses quality mode kernel for perf mode. It changes
2566 // some curbe settings to simulate the perf mode kernel
2567 // These settings include:
2568 // MultipredictorL0EnableBit/MultipredictorL1EnableBit = 0, set by MultiPred[TargetUsage]
2569 // AllFractional = 0, set by CODECHAL_ENCODE_AVC_AllFractional_Common[TargetUsage]
2570 // EnableATD = 0, set by CODECHAL_ENCODE_AVC_EnableAdaptiveTxDecision_Common[TargetUsage]
2571 // EnableFBRBypass = 0
2572 // NumRefIdxL0MinusOne/NumRefIdxL1MinusOne = 0
2573 if (m_targetUsage == TARGETUSAGE_BEST_SPEED)
2574 {
2575 Cmd.common.DW4.EnableFBRBypass = false;
2576 Cmd.common.DW36.NumRefIdxL0MinusOne = 0;
2577 Cmd.common.DW36.NumRefIdxL1MinusOne = 0;
2578 }
2579
2580 MOS_LOCK_PARAMS LockFlagsWriteOnly;
2581 MOS_ZeroMemory(&LockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
2582 LockFlagsWriteOnly.WriteOnly = 1;
2583
2584 uint8_t* pData = (uint8_t*)m_osInterface->pfnLockResource(
2585 m_osInterface,
2586 &(BrcBuffers.resMbEncBrcBuffer),
2587 &LockFlagsWriteOnly);
2588 CODECHAL_ENCODE_CHK_NULL_RETURN(pData);
2589
2590 MOS_SecureMemcpy(pData, sizeof(Cmd.common), (void *)&Cmd, sizeof(Cmd.common));
2591
2592 m_osInterface->pfnUnlockResource(m_osInterface, &BrcBuffers.resMbEncBrcBuffer);
2593 }
2594 else
2595 {
2596 Cmd.surfaces.DW80.MBDataSurfIndex = CODECHAL_ENCODE_AVC_MBENC_MFC_AVC_PAK_OBJ_G9;
2597 Cmd.surfaces.DW81.MVDataSurfIndex = CODECHAL_ENCODE_AVC_MBENC_IND_MV_DATA_G9;
2598 Cmd.surfaces.DW82.IDistSurfIndex = CODECHAL_ENCODE_AVC_MBENC_BRC_DISTORTION_G9;
2599 Cmd.surfaces.DW83.SrcYSurfIndex = CODECHAL_ENCODE_AVC_MBENC_CURR_Y_G9;
2600 Cmd.surfaces.DW84.MBSpecificDataSurfIndex = CODECHAL_ENCODE_AVC_MBENC_MB_SPECIFIC_DATA_G9;
2601 Cmd.surfaces.DW85.AuxVmeOutSurfIndex = CODECHAL_ENCODE_AVC_MBENC_AUX_VME_OUT_G9;
2602 Cmd.surfaces.DW86.CurrRefPicSelSurfIndex = CODECHAL_ENCODE_AVC_MBENC_REFPICSELECT_L0_G9;
2603 Cmd.surfaces.DW87.HMEMVPredFwdBwdSurfIndex = CODECHAL_ENCODE_AVC_MBENC_MV_DATA_FROM_ME_G9;
2604 Cmd.surfaces.DW88.HMEDistSurfIndex = CODECHAL_ENCODE_AVC_MBENC_4xME_DISTORTION_G9;
2605 Cmd.surfaces.DW89.SliceMapSurfIndex = CODECHAL_ENCODE_AVC_MBENC_SLICEMAP_DATA_G9;
2606 Cmd.surfaces.DW90.FwdFrmMBDataSurfIndex = CODECHAL_ENCODE_AVC_MBENC_FWD_MB_DATA_G9;
2607 Cmd.surfaces.DW91.FwdFrmMVSurfIndex = CODECHAL_ENCODE_AVC_MBENC_FWD_MV_DATA_G9;
2608 Cmd.surfaces.DW92.MBQPBuffer = CODECHAL_ENCODE_AVC_MBENC_MBQP_G9;
2609 Cmd.surfaces.DW93.MBBRCLut = CODECHAL_ENCODE_AVC_MBENC_MBBRC_CONST_DATA_G9;
2610 Cmd.surfaces.DW94.VMEInterPredictionSurfIndex = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_G9;
2611 Cmd.surfaces.DW95.VMEInterPredictionMRSurfIndex = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_G9;
2612 Cmd.surfaces.DW96.MbStatsSurfIndex = CODECHAL_ENCODE_AVC_MBENC_MB_STATS_G9;
2613 Cmd.surfaces.DW97.MADSurfIndex = CODECHAL_ENCODE_AVC_MBENC_MAD_DATA_G9;
2614 Cmd.surfaces.DW98.ForceNonSkipMBmapSurface = CODECHAL_ENCODE_AVC_MBENC_FORCE_NONSKIP_MB_MAP_G9;
2615 Cmd.surfaces.DW99.ReservedIndex = CODECHAL_ENCODE_AVC_MBENC_ADV_WA_G9;
2616 Cmd.surfaces.DW100.BRCCurbeSurfIndex = CODECHAL_ENCODE_AVC_MBENC_BRC_CURBE_DATA_G9;
2617 Cmd.surfaces.DW101.StaticDetectionCostTableIndex = CODECHAL_ENCODE_AVC_MBENC_SFD_COST_TABLE_G9;
2618
2619 CODECHAL_ENCODE_CHK_STATUS_RETURN(pParams->pKernelState->m_dshRegion.AddData(
2620 &Cmd,
2621 pParams->pKernelState->dwCurbeOffset,
2622 sizeof(Cmd)));
2623 }
2624
2625 CODECHAL_DEBUG_TOOL(
2626 CODECHAL_ENCODE_CHK_STATUS_RETURN(PopulateEncParam(
2627 ucMeMethod,
2628 &Cmd));
2629 )
2630
2631 return eStatus;
2632 }
2633
GetTrellisQuantization(PCODECHAL_ENCODE_AVC_TQ_INPUT_PARAMS pParams,PCODECHAL_ENCODE_AVC_TQ_PARAMS pTrellisQuantParams)2634 MOS_STATUS CodechalEncodeAvcEncG9Skl::GetTrellisQuantization(PCODECHAL_ENCODE_AVC_TQ_INPUT_PARAMS pParams, PCODECHAL_ENCODE_AVC_TQ_PARAMS pTrellisQuantParams)
2635 {
2636 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2637
2638 CODECHAL_ENCODE_FUNCTION_ENTER;
2639
2640 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams);
2641 CODECHAL_ENCODE_CHK_NULL_RETURN(pTrellisQuantParams);
2642
2643 pTrellisQuantParams->dwTqEnabled = TrellisQuantizationEnable[pParams->ucTargetUsage];
2644 pTrellisQuantParams->dwTqRounding =
2645 pTrellisQuantParams->dwTqEnabled ? TrellisQuantizationRounding[pParams->ucTargetUsage] : 0;
2646
2647 // If AdaptiveTrellisQuantization is enabled then disable trellis quantization for
2648 // B-frames with QP > 26 only in CQP mode
2649 if (pTrellisQuantParams->dwTqEnabled
2650 && EnableAdaptiveTrellisQuantization[pParams->ucTargetUsage]
2651 && pParams->wPictureCodingType == B_TYPE
2652 && !pParams->bBrcEnabled && pParams->ucQP > 26)
2653 {
2654 pTrellisQuantParams->dwTqEnabled = 0;
2655 pTrellisQuantParams->dwTqRounding = 0;
2656 }
2657 return eStatus;
2658 }
2659
InitBrcConstantBufferMultiRefQP(PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS pParams)2660 MOS_STATUS CodechalEncodeAvcEncG9Skl::InitBrcConstantBufferMultiRefQP(PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS pParams)
2661 {
2662 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2663
2664 CODECHAL_ENCODE_FUNCTION_ENTER;
2665
2666 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams);
2667 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams->pOsInterface);
2668 CODECHAL_ENCODE_CHK_NULL_RETURN(pParams->pPicParams);
2669
2670 uint8_t ucTableIdx = pParams->wPictureCodingType - 1;
2671 bool bBlockBasedSkipEn = pParams->dwMbEncBlockBasedSkipEn ? true : false;
2672 bool bTransform_8x8_mode_flag = pParams->pPicParams->transform_8x8_mode_flag ? true : false;
2673
2674 if (ucTableIdx >= 3)
2675 {
2676 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid input parameter.");
2677 eStatus = MOS_STATUS_INVALID_PARAMETER;
2678 return eStatus;
2679 }
2680
2681 MOS_LOCK_PARAMS LockFlags;
2682 MOS_ZeroMemory(&LockFlags, sizeof(MOS_LOCK_PARAMS));
2683 LockFlags.WriteOnly = 1;
2684 uint8_t* pbData = (uint8_t*)pParams->pOsInterface->pfnLockResource(
2685 pParams->pOsInterface,
2686 &pParams->sBrcConstantDataBuffer.OsResource,
2687 &LockFlags);
2688 CODECHAL_ENCODE_CHK_NULL_RETURN(pbData);
2689
2690 MOS_ZeroMemory(pbData, pParams->sBrcConstantDataBuffer.dwWidth * pParams->sBrcConstantDataBuffer.dwHeight);
2691
2692 // Fill surface with QP Adjustment table, Distortion threshold table, MaxFrame threshold table, Distortion QP Adjustment Table
2693 eStatus = MOS_SecureMemcpy(
2694 pbData,
2695 sizeof(m_qpDistMaxFrameAdjustmentCm),
2696 (void*)m_qpDistMaxFrameAdjustmentCm,
2697 sizeof(m_qpDistMaxFrameAdjustmentCm));
2698 if (eStatus != MOS_STATUS_SUCCESS)
2699 {
2700 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2701 return eStatus;
2702 }
2703
2704 pbData += sizeof(m_qpDistMaxFrameAdjustmentCm);
2705
2706 // Fill surface with Skip Threshold Table
2707 switch (pParams->wPictureCodingType)
2708 {
2709 case P_TYPE:
2710 eStatus = MOS_SecureMemcpy(
2711 pbData,
2712 m_brcConstantSurfaceEarlySkipTableSize,
2713 (void*)&SkipVal_P_Common[bBlockBasedSkipEn][bTransform_8x8_mode_flag][0],
2714 m_brcConstantSurfaceEarlySkipTableSize);
2715 if (eStatus != MOS_STATUS_SUCCESS)
2716 {
2717 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2718 return eStatus;
2719 }
2720 break;
2721 case B_TYPE:
2722 eStatus = MOS_SecureMemcpy(
2723 pbData,
2724 m_brcConstantSurfaceEarlySkipTableSize,
2725 (void*)&SkipVal_B_Common[bBlockBasedSkipEn][bTransform_8x8_mode_flag][0],
2726 m_brcConstantSurfaceEarlySkipTableSize);
2727 if (eStatus != MOS_STATUS_SUCCESS)
2728 {
2729 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2730 return eStatus;
2731 }
2732 break;
2733 default:
2734 // do nothing for I TYPE
2735 break;
2736 }
2737
2738 if ((pParams->wPictureCodingType != I_TYPE) && (pParams->pAvcQCParams != nullptr) && (pParams->pAvcQCParams->NonFTQSkipThresholdLUTInput))
2739 {
2740 for (uint8_t ucQp = 0; ucQp < CODEC_AVC_NUM_QP; ucQp++)
2741 {
2742 *(pbData + 1 + (ucQp * 2)) = (uint8_t)CalcSkipVal((pParams->dwMbEncBlockBasedSkipEn ? true : false), (pParams->pPicParams->transform_8x8_mode_flag ? true : false), pParams->pAvcQCParams->NonFTQSkipThresholdLUT[ucQp]);
2743 }
2744 }
2745
2746 pbData += m_brcConstantSurfaceEarlySkipTableSize;
2747
2748 // Fill surface with QP list
2749
2750 // Initialize to -1 (0xff)
2751 MOS_FillMemory(pbData, CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_G9, 0xff);
2752 MOS_FillMemory(pbData
2753 + CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_G9
2754 + CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_RESERVED_G9,
2755 CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_1_G9, 0xff);
2756
2757 uint8_t ucRefIdx;
2758 CODEC_PICTURE RefPic;
2759 switch (pParams->wPictureCodingType)
2760 {
2761 case B_TYPE:
2762 pbData += (CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_G9 + CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_RESERVED_G9);
2763
2764 for (ucRefIdx = 0; ucRefIdx <= pParams->pAvcSlcParams->num_ref_idx_l1_active_minus1; ucRefIdx++)
2765 {
2766 RefPic = pParams->pAvcSlcParams->RefPicList[LIST_1][ucRefIdx];
2767 if (!CodecHal_PictureIsInvalid(RefPic) && pParams->pAvcPicIdx[RefPic.FrameIdx].bValid)
2768 {
2769 *(pbData + ucRefIdx) = pParams->pAvcPicIdx[RefPic.FrameIdx].ucPicIdx;
2770 }
2771 }
2772 pbData -= (CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_G9 + CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_RESERVED_G9);
2773 // break statement omitted intentionally
2774 case P_TYPE:
2775 for (ucRefIdx = 0; ucRefIdx <= pParams->pAvcSlcParams->num_ref_idx_l0_active_minus1; ucRefIdx++)
2776 {
2777 RefPic = pParams->pAvcSlcParams->RefPicList[LIST_0][ucRefIdx];
2778 if (!CodecHal_PictureIsInvalid(RefPic) && pParams->pAvcPicIdx[RefPic.FrameIdx].bValid)
2779 {
2780 *(pbData + ucRefIdx) = pParams->pAvcPicIdx[RefPic.FrameIdx].ucPicIdx;
2781 }
2782 }
2783 break;
2784 default:
2785 // do nothing for I type
2786 break;
2787 }
2788
2789 pbData += (CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_G9 + CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_0_RESERVED_G9
2790 + CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_1_G9 + CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_QP_LIST_1_RESERVED_G9);
2791
2792 // Fill surface with Mode cost and MV cost
2793 eStatus = MOS_SecureMemcpy(
2794 pbData,
2795 m_brcConstantSurfacModeMvCostSize,
2796 (void*)ModeMvCost_Cm[ucTableIdx],
2797 m_brcConstantSurfacModeMvCostSize);
2798 if (eStatus != MOS_STATUS_SUCCESS)
2799 {
2800 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2801 return eStatus;
2802 }
2803
2804 // If old mode cost is used the update the table
2805 uint32_t* pdwDataTemp;
2806 if (pParams->wPictureCodingType == I_TYPE && pParams->bOldModeCostEnable)
2807 {
2808 pdwDataTemp = (uint32_t*)pbData;
2809 for (uint8_t ucQp = 0; ucQp < CODEC_AVC_NUM_QP; ucQp++)
2810 {
2811 // Writing to DW0 in each sub-array of 16 DWs
2812 *pdwDataTemp = (uint32_t)OldIntraModeCost_Cm_Common[ucQp];
2813 pdwDataTemp += 16;
2814 }
2815 }
2816
2817 if (pParams->pAvcQCParams)
2818 {
2819 for (uint8_t ucQp = 0; ucQp < CODEC_AVC_NUM_QP; ucQp++)
2820 {
2821 if (pParams->pAvcQCParams->FTQSkipThresholdLUTInput)
2822 {
2823 *(pbData + (ucQp * 32) + 24) =
2824 *(pbData + (ucQp * 32) + 25) =
2825 *(pbData + (ucQp * 32) + 27) =
2826 *(pbData + (ucQp * 32) + 28) =
2827 *(pbData + (ucQp * 32) + 29) =
2828 *(pbData + (ucQp * 32) + 30) =
2829 *(pbData + (ucQp * 32) + 31) = pParams->pAvcQCParams->FTQSkipThresholdLUT[ucQp];
2830 }
2831 }
2832 }
2833
2834 pbData += m_brcConstantSurfacModeMvCostSize;
2835
2836 // Fill surface with Refcost
2837 eStatus = MOS_SecureMemcpy(
2838 pbData,
2839 m_brcConstantSurfaceRefCostSize,
2840 (void*)&RefCost_MultiRefQp[ucTableIdx][0],
2841 m_brcConstantSurfaceRefCostSize);
2842 if (eStatus != MOS_STATUS_SUCCESS)
2843 {
2844 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2845 return eStatus;
2846 }
2847 pbData += m_brcConstantSurfaceRefCostSize;
2848
2849 //Fill surface with Intra cost scaling Factor
2850 if (pParams->bAdaptiveIntraScalingEnable)
2851 {
2852 eStatus = MOS_SecureMemcpy(
2853 pbData,
2854 CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_INTRACOST_SCALING_FACTOR_G9,
2855 (void*)&AdaptiveIntraScalingFactor_Cm_Common[0],
2856 CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_INTRACOST_SCALING_FACTOR_G9);
2857 if (eStatus != MOS_STATUS_SUCCESS)
2858 {
2859 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2860 return eStatus;
2861 }
2862 }
2863 else
2864 {
2865 eStatus = MOS_SecureMemcpy(
2866 pbData,
2867 CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_INTRACOST_SCALING_FACTOR_G9,
2868 (void*)&IntraScalingFactor_Cm_Common[0],
2869 CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_INTRACOST_SCALING_FACTOR_G9);
2870 if (eStatus != MOS_STATUS_SUCCESS)
2871 {
2872 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
2873 return eStatus;
2874 }
2875 }
2876
2877 pParams->pOsInterface->pfnUnlockResource(
2878 pParams->pOsInterface,
2879 &pParams->sBrcConstantDataBuffer.OsResource);
2880
2881 return eStatus;
2882 }
2883
InitBrcConstantBuffer(PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS pParams)2884 MOS_STATUS CodechalEncodeAvcEncG9Skl::InitBrcConstantBuffer(PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS pParams)
2885 {
2886 CODECHAL_ENCODE_FUNCTION_ENTER;
2887
2888 if (bMultiRefQpEnabled)
2889 {
2890 return InitBrcConstantBufferMultiRefQP(pParams);
2891 }
2892 else
2893 {
2894 return CodechalEncodeAvcEnc::InitBrcConstantBuffer(pParams);
2895 }
2896 }
2897
CodechalEncodeAvcEncG9Skl(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)2898 CodechalEncodeAvcEncG9Skl::CodechalEncodeAvcEncG9Skl(
2899 CodechalHwInterface * hwInterface,
2900 CodechalDebugInterface *debugInterface,
2901 PCODECHAL_STANDARD_INFO standardInfo): CodechalEncodeAvcEncG9(hwInterface, debugInterface, standardInfo)
2902 {
2903 CODECHAL_ENCODE_FUNCTION_ENTER;
2904
2905 m_cmKernelEnable = true;
2906 bBrcSplitEnable = true;
2907 bBrcRoiSupported = true;
2908 bHighTextureModeCostEnable = true;
2909
2910 this->pfnGetKernelHeaderAndSize = this->GetKernelHeaderAndSize;
2911
2912 m_mbStatsSupported = true; //Starting from GEN9
2913 m_kernelBase = (uint8_t *)IGCODECKRN_G9;
2914 AddIshSize(m_kuid, m_kernelBase);
2915 }
2916
InitializeState()2917 MOS_STATUS CodechalEncodeAvcEncG9Skl::InitializeState()
2918 {
2919 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2920 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeAvcEncG9::InitializeState());
2921
2922 m_brcHistoryBufferSize = CODECHAL_ENCODE_AVC_BRC_HISTORY_BUFFER_SIZE_G9;
2923 dwBrcConstantSurfaceWidth = CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_WIDTH_G9;
2924 dwBrcConstantSurfaceHeight = CODECHAL_ENCODE_AVC_BRC_CONSTANTSURFACE_HEIGHT_G9;
2925
2926 return eStatus;
2927 }
2928
InitKernelStateMbEnc()2929 MOS_STATUS CodechalEncodeAvcEncG9Skl::InitKernelStateMbEnc()
2930 {
2931 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2932
2933 CODECHAL_ENCODE_FUNCTION_ENTER;
2934
2935 dwNumMbEncEncKrnStates =
2936 MBENC_TARGET_USAGE_CM * MBENC_NUM_TARGET_USAGES_CM_G9_SKL;
2937 dwNumMbEncEncKrnStates += MBENC_TARGET_USAGE_CM;
2938 pMbEncKernelStates =
2939 MOS_NewArray(MHW_KERNEL_STATE, dwNumMbEncEncKrnStates);
2940 CODECHAL_ENCODE_CHK_NULL_RETURN(pMbEncKernelStates);
2941
2942 PMHW_KERNEL_STATE pKernelStatePtr = pMbEncKernelStates;
2943 CODECHAL_KERNEL_HEADER CurrKrnHeader;
2944
2945 uint8_t* kernelBinary;
2946 uint32_t kernelSize;
2947
2948 MOS_STATUS status = CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize);
2949 CODECHAL_ENCODE_CHK_STATUS_RETURN(status);
2950
2951 for (uint32_t dwKrnStateIdx = 0; dwKrnStateIdx < dwNumMbEncEncKrnStates; dwKrnStateIdx++)
2952 {
2953 bool bKernelState = (dwKrnStateIdx >= MBENC_TARGET_USAGE_CM * MBENC_NUM_TARGET_USAGES_CM_G9_SKL);
2954
2955 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetKernelHeaderAndSize(
2956 kernelBinary,
2957 (bKernelState ? ENC_MBENC_ADV : ENC_MBENC),
2958 (bKernelState ? dwKrnStateIdx - MBENC_TARGET_USAGE_CM * MBENC_NUM_TARGET_USAGES_CM_G9_SKL : dwKrnStateIdx),
2959 (void*)&CurrKrnHeader,
2960 &kernelSize));
2961
2962 pKernelStatePtr->KernelParams.iBTCount = CODECHAL_ENCODE_AVC_MBENC_NUM_SURFACES_G9;
2963 pKernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
2964 pKernelStatePtr->KernelParams.iCurbeLength = sizeof(CODECHAL_ENCODE_AVC_MBENC_CURBE_G9);
2965 pKernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
2966 pKernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
2967 pKernelStatePtr->KernelParams.iIdCount = 1;
2968
2969 pKernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
2970 pKernelStatePtr->KernelParams.pBinary = kernelBinary + (CurrKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
2971 pKernelStatePtr->KernelParams.iSize = kernelSize;
2972
2973 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
2974 m_stateHeapInterface,
2975 pKernelStatePtr->KernelParams.iBTCount,
2976 &pKernelStatePtr->dwSshSize,
2977 &pKernelStatePtr->dwBindingTableSize));
2978
2979 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, pKernelStatePtr));
2980
2981 pKernelStatePtr++;
2982 }
2983
2984 // Until a better way can be found, maintain old binding table structures
2985 auto pBindingTable = &MbEncBindingTable;
2986
2987 pBindingTable->dwAvcMBEncMfcAvcPakObj = CODECHAL_ENCODE_AVC_MBENC_MFC_AVC_PAK_OBJ_G9;
2988 pBindingTable->dwAvcMBEncIndMVData = CODECHAL_ENCODE_AVC_MBENC_IND_MV_DATA_G9;
2989 pBindingTable->dwAvcMBEncBRCDist = CODECHAL_ENCODE_AVC_MBENC_BRC_DISTORTION_G9;
2990 pBindingTable->dwAvcMBEncCurrY = CODECHAL_ENCODE_AVC_MBENC_CURR_Y_G9;
2991 pBindingTable->dwAvcMBEncCurrUV = CODECHAL_ENCODE_AVC_MBENC_CURR_UV_G9;
2992 pBindingTable->dwAvcMBEncMbSpecificData = CODECHAL_ENCODE_AVC_MBENC_MB_SPECIFIC_DATA_G9;
2993
2994 pBindingTable->dwAvcMBEncRefPicSelectL0 = CODECHAL_ENCODE_AVC_MBENC_REFPICSELECT_L0_G9;
2995 pBindingTable->dwAvcMBEncMVDataFromME = CODECHAL_ENCODE_AVC_MBENC_MV_DATA_FROM_ME_G9;
2996 pBindingTable->dwAvcMBEncMEDist = CODECHAL_ENCODE_AVC_MBENC_4xME_DISTORTION_G9;
2997 pBindingTable->dwAvcMBEncSliceMapData = CODECHAL_ENCODE_AVC_MBENC_SLICEMAP_DATA_G9;
2998 pBindingTable->dwAvcMBEncBwdRefMBData = CODECHAL_ENCODE_AVC_MBENC_FWD_MB_DATA_G9;
2999 pBindingTable->dwAvcMBEncBwdRefMVData = CODECHAL_ENCODE_AVC_MBENC_FWD_MV_DATA_G9;
3000 pBindingTable->dwAvcMBEncMbBrcConstData = CODECHAL_ENCODE_AVC_MBENC_MBBRC_CONST_DATA_G9;
3001 pBindingTable->dwAvcMBEncMBStats = CODECHAL_ENCODE_AVC_MBENC_MB_STATS_G9;
3002 pBindingTable->dwAvcMBEncMADData = CODECHAL_ENCODE_AVC_MBENC_MAD_DATA_G9;
3003 pBindingTable->dwAvcMBEncMbNonSkipMap = CODECHAL_ENCODE_AVC_MBENC_FORCE_NONSKIP_MB_MAP_G9;
3004 pBindingTable->dwAvcMBEncAdv = CODECHAL_ENCODE_AVC_MBENC_ADV_WA_G9;
3005 pBindingTable->dwAvcMbEncBRCCurbeData = CODECHAL_ENCODE_AVC_MBENC_BRC_CURBE_DATA_G9;
3006 pBindingTable->dwAvcMBEncFlatnessChk = CODECHAL_ENCODE_AVC_MBENC_FLATNESS_CHECK_CM_G9;
3007 pBindingTable->dwAvcMBEncStaticDetectionCostTable = CODECHAL_ENCODE_AVC_MBENC_SFD_COST_TABLE_G9;
3008
3009 // Frame
3010 pBindingTable->dwAvcMBEncMbQpFrame = CODECHAL_ENCODE_AVC_MBENC_MBQP_G9;
3011 pBindingTable->dwAvcMBEncCurrPicFrame[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_G9;
3012 pBindingTable->dwAvcMBEncFwdPicFrame[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX0_G9;
3013 pBindingTable->dwAvcMBEncBwdPicFrame[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_G9;
3014 pBindingTable->dwAvcMBEncFwdPicFrame[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX1_G9;
3015 pBindingTable->dwAvcMBEncBwdPicFrame[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_G9;
3016 pBindingTable->dwAvcMBEncFwdPicFrame[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX2_G9;
3017 pBindingTable->dwAvcMBEncFwdPicFrame[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX3_G9;
3018 pBindingTable->dwAvcMBEncFwdPicFrame[4] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX4_G9;
3019 pBindingTable->dwAvcMBEncFwdPicFrame[5] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX5_G9;
3020 pBindingTable->dwAvcMBEncFwdPicFrame[6] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX6_G9;
3021 pBindingTable->dwAvcMBEncFwdPicFrame[7] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX7_G9;
3022 pBindingTable->dwAvcMBEncCurrPicFrame[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_G9;
3023 pBindingTable->dwAvcMBEncBwdPicFrame[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_G9;
3024 pBindingTable->dwAvcMBEncBwdPicFrame[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_G9;
3025
3026 // Field
3027 pBindingTable->dwAvcMBEncMbQpField = CODECHAL_ENCODE_AVC_MBENC_MBQP_G9;
3028 pBindingTable->dwAvcMBEncFieldCurrPic[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_G9;
3029 pBindingTable->dwAvcMBEncFwdPicTopField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX0_G9;
3030 pBindingTable->dwAvcMBEncBwdPicTopField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_G9;
3031 pBindingTable->dwAvcMBEncFwdPicBotField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX0_G9;
3032 pBindingTable->dwAvcMBEncBwdPicBotField[0] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_G9;
3033 pBindingTable->dwAvcMBEncFwdPicTopField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX1_G9;
3034 pBindingTable->dwAvcMBEncBwdPicTopField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_G9;
3035 pBindingTable->dwAvcMBEncFwdPicBotField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX1_G9;
3036 pBindingTable->dwAvcMBEncBwdPicBotField[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_G9;
3037 pBindingTable->dwAvcMBEncFwdPicTopField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX2_G9;
3038 pBindingTable->dwAvcMBEncFwdPicBotField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX2_G9;
3039 pBindingTable->dwAvcMBEncFwdPicTopField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX3_G9;
3040 pBindingTable->dwAvcMBEncFwdPicBotField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX3_G9;
3041 pBindingTable->dwAvcMBEncFwdPicTopField[4] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX4_G9;
3042 pBindingTable->dwAvcMBEncFwdPicBotField[4] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX4_G9;
3043 pBindingTable->dwAvcMBEncFwdPicTopField[5] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX5_G9;
3044 pBindingTable->dwAvcMBEncFwdPicBotField[5] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX5_G9;
3045 pBindingTable->dwAvcMBEncFwdPicTopField[6] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX6_G9;
3046 pBindingTable->dwAvcMBEncFwdPicBotField[6] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX6_G9;
3047 pBindingTable->dwAvcMBEncFwdPicTopField[7] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX7_G9;
3048 pBindingTable->dwAvcMBEncFwdPicBotField[7] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_FWD_PIC_IDX7_G9;
3049 pBindingTable->dwAvcMBEncFieldCurrPic[1] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_G9;
3050 pBindingTable->dwAvcMBEncBwdPicTopField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_G9;
3051 pBindingTable->dwAvcMBEncBwdPicBotField[2] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_G9;
3052 pBindingTable->dwAvcMBEncBwdPicTopField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_G9;
3053 pBindingTable->dwAvcMBEncBwdPicBotField[3] = CODECHAL_ENCODE_AVC_MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_G9;
3054
3055 return eStatus;
3056 }
3057
InitKernelStateMfeMbEnc()3058 MOS_STATUS CodechalEncodeAvcEncG9Skl::InitKernelStateMfeMbEnc()
3059 {
3060 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3061
3062 CODECHAL_ENCODE_FUNCTION_ENTER;
3063
3064 CODECHAL_KERNEL_HEADER CurrKrnHeader;
3065 auto pKernelStatePtr = &mfeMbEncKernelState;
3066
3067 uint8_t* kernelBinary;
3068 uint32_t kernelSize;
3069
3070 MOS_STATUS status = CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize);
3071 CODECHAL_ENCODE_CHK_STATUS_RETURN(status);
3072
3073 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetKernelHeaderAndSize(
3074 kernelBinary,
3075 ENC_MBENC,
3076 CODECHAL_ENCODE_AVC_MFE_MBENC_KERNEL_IDX,
3077 (void*)&CurrKrnHeader,
3078 &kernelSize));
3079
3080 pKernelStatePtr->KernelParams.iBTCount = CODECHAL_ENCODE_AVC_MBENC_NUM_SURFACES_G9 * CODECHAL_ENCODE_AVC_MFE_MAX_FRAMES_G9;
3081 pKernelStatePtr->KernelParams.iCurbeLength = sizeof(CODECHAL_ENCODE_AVC_MFE_MBENC_CURBE_G9);
3082 pKernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
3083 pKernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
3084 pKernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
3085 pKernelStatePtr->KernelParams.iIdCount = 1;
3086
3087 pKernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
3088 pKernelStatePtr->KernelParams.pBinary = kernelBinary + (CurrKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
3089 pKernelStatePtr->KernelParams.iSize = kernelSize;
3090
3091 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
3092 m_stateHeapInterface,
3093 pKernelStatePtr->KernelParams.iBTCount,
3094 &pKernelStatePtr->dwSshSize,
3095 &pKernelStatePtr->dwBindingTableSize));
3096
3097 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, pKernelStatePtr));
3098
3099 return eStatus;
3100 }
3101
InitKernelStateBrc()3102 MOS_STATUS CodechalEncodeAvcEncG9Skl::InitKernelStateBrc()
3103 {
3104 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3105
3106 CODECHAL_ENCODE_FUNCTION_ENTER;
3107
3108 uint8_t* kernelBinary;
3109 uint32_t kernelSize;
3110
3111 MOS_STATUS status = CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize);
3112 CODECHAL_ENCODE_CHK_STATUS_RETURN(status);
3113
3114 CODECHAL_KERNEL_HEADER CurrKrnHeader;
3115 for (uint32_t dwKrnStateIdx = 0; dwKrnStateIdx < CODECHAL_ENCODE_BRC_IDX_NUM; dwKrnStateIdx++)
3116 {
3117 auto pKernelStatePtr = &BrcKernelStates[dwKrnStateIdx];
3118 CODECHAL_ENCODE_CHK_STATUS_RETURN(GetKernelHeaderAndSize(
3119 kernelBinary,
3120 ENC_BRC,
3121 dwKrnStateIdx,
3122 (void*)&CurrKrnHeader,
3123 &kernelSize));
3124
3125 pKernelStatePtr->KernelParams.iBTCount = BRC_BTCOUNTS[dwKrnStateIdx];
3126 pKernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
3127 pKernelStatePtr->KernelParams.iCurbeLength = BRC_CURBE_SIZE[dwKrnStateIdx];
3128 pKernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
3129 pKernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
3130 pKernelStatePtr->KernelParams.iIdCount = 1;
3131
3132 pKernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
3133 pKernelStatePtr->KernelParams.pBinary = kernelBinary + (CurrKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
3134 pKernelStatePtr->KernelParams.iSize = kernelSize;
3135
3136 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
3137 m_stateHeapInterface,
3138 pKernelStatePtr->KernelParams.iBTCount,
3139 &pKernelStatePtr->dwSshSize,
3140 &pKernelStatePtr->dwBindingTableSize));
3141
3142 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, pKernelStatePtr));
3143 }
3144
3145 // Until a better way can be found, maintain old binding table structures
3146 auto pBindingTable = &BrcUpdateBindingTable;
3147 pBindingTable->dwFrameBrcHistoryBuffer = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_HISTORY_G9;
3148 pBindingTable->dwFrameBrcPakStatisticsOutputBuffer = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_PAK_STATISTICS_OUTPUT_G9;
3149 pBindingTable->dwFrameBrcImageStateReadBuffer = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_READ_G9;
3150 pBindingTable->dwFrameBrcImageStateWriteBuffer = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_WRITE_G9;
3151 pBindingTable->dwFrameBrcMbEncCurbeReadBuffer = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_MBENC_CURBE_READ_G9;
3152 pBindingTable->dwFrameBrcMbEncCurbeWriteData = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_MBENC_CURBE_WRITE_G9;
3153 pBindingTable->dwFrameBrcDistortionBuffer = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_DISTORTION_G9;
3154 pBindingTable->dwFrameBrcConstantData = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CONSTANT_DATA_G9;
3155 pBindingTable->dwFrameBrcMbStatBuffer = CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_MB_STAT_G9;
3156 // starting GEN9 BRC kernel has split into a frame level update, and an MB level update.
3157 // above is BTI for frame level, below is BTI for MB level
3158 pBindingTable->dwMbBrcHistoryBuffer = CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_HISTORY_G9;
3159 pBindingTable->dwMbBrcMbQpBuffer = CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_MB_QP_G9;
3160 pBindingTable->dwMbBrcROISurface = CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_ROI_G9;
3161 pBindingTable->dwMbBrcMbStatBuffer = CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_MB_STAT_G9;
3162
3163 return eStatus;
3164 }
3165
UpdateSSDSliceCount()3166 void CodechalEncodeAvcEncG9Skl::UpdateSSDSliceCount()
3167 {
3168 CodechalEncodeAvcBase::UpdateSSDSliceCount();
3169
3170 uint32_t sliceCount;
3171
3172 // Adjust DymanicSliceShutdown policy for multi-frame encode cases
3173 if (m_mfeEnabled && m_mfeEncodeParams.submitNumber > 1)
3174 {
3175 if (m_frameHeight * m_frameWidth >= 1920*1080 && m_targetUsage <= 4)
3176 {
3177 sliceCount = 3;
3178 }
3179 else if ((m_frameHeight * m_frameWidth >= 3840*2160) ||
3180 (m_frameHeight * m_frameWidth >= 1920*1080 && m_targetUsage > 4) ||
3181 (m_frameHeight * m_frameWidth >= 1280*720 && m_targetUsage <= 4))
3182 {
3183 sliceCount = 2;
3184 }
3185 else
3186 {
3187 sliceCount = 1;
3188 }
3189 }
3190 else
3191 {
3192 if ((m_frameHeight * m_frameWidth >= 1920*1080 && m_targetUsage <= 4) ||
3193 (m_frameHeight * m_frameWidth >= 1280*720 && m_targetUsage <= 2) ||
3194 (m_frameHeight * m_frameWidth >= 3840*2160))
3195 {
3196 sliceCount = 2;
3197 }
3198 else
3199 {
3200 sliceCount = 1;
3201 }
3202 }
3203
3204 if (m_osInterface->pfnSetSliceCount)
3205 {
3206 m_osInterface->pfnSetSliceCount(m_osInterface, &sliceCount);
3207 }
3208 }
3209
3210 #if USE_CODECHAL_DEBUG_TOOL
PopulatePakParam(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER secondLevelBatchBuffer)3211 MOS_STATUS CodechalEncodeAvcEncG9Skl::PopulatePakParam(
3212 PMOS_COMMAND_BUFFER cmdBuffer,
3213 PMHW_BATCH_BUFFER secondLevelBatchBuffer)
3214 {
3215 CODECHAL_DEBUG_FUNCTION_ENTER;
3216
3217 CODECHAL_DEBUG_CHK_NULL(m_debugInterface);
3218
3219 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDumpEncodePar))
3220 {
3221 return MOS_STATUS_SUCCESS;
3222 }
3223
3224 uint8_t *data = nullptr;
3225 MOS_LOCK_PARAMS lockFlags;
3226 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
3227 lockFlags.ReadOnly = 1;
3228
3229 if (cmdBuffer != nullptr)
3230 {
3231 data = (uint8_t*)(cmdBuffer->pCmdPtr - (mhw_vdbox_mfx_g9_skl::MFX_AVC_IMG_STATE_CMD::byteSize / sizeof(uint32_t)));
3232 }
3233 else if (secondLevelBatchBuffer != nullptr)
3234 {
3235 data = secondLevelBatchBuffer->pData;
3236 }
3237 else
3238 {
3239 data = (uint8_t*)m_osInterface->pfnLockResource(m_osInterface, &BrcBuffers.resBrcImageStatesReadBuffer[m_currRecycledBufIdx], &lockFlags);
3240 }
3241
3242 CODECHAL_DEBUG_CHK_NULL(data);
3243
3244 mhw_vdbox_mfx_g9_skl::MFX_AVC_IMG_STATE_CMD mfxCmd;
3245 mfxCmd = *(mhw_vdbox_mfx_g9_skl::MFX_AVC_IMG_STATE_CMD *)(data);
3246
3247 if (m_pictureCodingType == I_TYPE)
3248 {
3249 m_avcPar->TrellisQuantizationEnable = mfxCmd.DW5.TrellisQuantizationEnabledTqenb;
3250 m_avcPar->EnableAdaptiveTrellisQuantization = mfxCmd.DW5.TrellisQuantizationEnabledTqenb;
3251 m_avcPar->TrellisQuantizationRounding = mfxCmd.DW5.TrellisQuantizationRoundingTqr;
3252 m_avcPar->TrellisQuantizationChromaDisable = mfxCmd.DW5.TrellisQuantizationChromaDisableTqchromadisable;
3253 m_avcPar->ExtendedRhoDomainEn = mfxCmd.DW16_17.ExtendedRhodomainStatisticsEnable;
3254 }
3255
3256 if (data && (cmdBuffer == nullptr) && (secondLevelBatchBuffer == nullptr))
3257 {
3258 m_osInterface->pfnUnlockResource(
3259 m_osInterface,
3260 &BrcBuffers.resBrcImageStatesReadBuffer[m_currRecycledBufIdx]);
3261 }
3262
3263 return MOS_STATUS_SUCCESS;
3264 }
3265 #endif
3266