1 /*
2 * Copyright (c) 2021-2022, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 //!
24 //! \file media_sku_wa_xe.cpp
25 //!
26
27 #include "igfxfmid.h"
28 #include "linux_system_info.h"
29 #include "skuwa_factory.h"
30 #include "linux_skuwa_debug.h"
31 #include "linux_media_skuwa.h"
32 #include "mos_utilities.h"
33 #include "mos_os_specific.h"
34 #include "media_user_setting_specific.h"
35
36 #ifndef SI_REV_LO
37 #define SI_REV_LO(SteppingID) (SteppingID & 0xFFFF)
38 #endif
39
40 #ifndef SI_WA_FROM
41 #define SI_WA_FROM(ulRevID, STEPPING) (ulRevID >= (int)SI_REV_LO(STEPPING))
42 #endif
43
44 #ifndef ACM_G10_MEDIA_REV_ID_B0
45 #define ACM_G10_MEDIA_REV_ID_B0 DG2_MEDIA_REV_ID_B0
46 #endif
47
48 static constexpr uint32_t singleVeboxSubSliceNumMax = 24;
49
50 //extern template class DeviceInfoFactory<GfxDeviceInfo>;
51 typedef DeviceInfoFactory<LinuxDeviceInit> DeviceInit;
52
53 static struct LinuxCodecInfo XehpSdvCodecInfo =
54 {
55 .avcDecoding = 1,
56 .mpeg2Decoding = 1,
57 .vp8Decoding = 0,
58 .vc1Decoding = 0,
59 .jpegDecoding = 1,
60 .avcEncoding = 0,
61 .mpeg2Encoding = 0,
62 .hevcDecoding = 1,
63 .hevcEncoding = 0,
64 .jpegEncoding = 0,
65 .avcVdenc = 0,
66 .vp9Decoding = 1,
67 .hevc10Decoding = 1,
68 .vp9b10Decoding = 1,
69 .hevc10Encoding = 0,
70 .hevc12Encoding = 0,
71 .vp8Encoding = 0,
72 .hevcVdenc = 0,
73 .vp9Vdenc = 0,
74 .adv0Decoding = 1,
75 .adv1Decoding = 1,
76 };
77
78 static struct LinuxCodecInfo Dg2CodecInfo =
79 {
80 .avcDecoding = 1,
81 .mpeg2Decoding = 1,
82 .vp8Decoding = 0,
83 .vc1Decoding = 0,
84 .jpegDecoding = 1,
85 .avcEncoding = 0,
86 .mpeg2Encoding = 0,
87 .hevcDecoding = 1,
88 .hevcEncoding = 0,
89 .jpegEncoding = 1,
90 .avcVdenc = 1,
91 .vp9Decoding = 1,
92 .hevc10Decoding = 1,
93 .vp9b10Decoding = 1,
94 .hevc10Encoding = 0,
95 .hevc12Encoding = 0,
96 .vp8Encoding = 0,
97 .hevcVdenc = 1,
98 .vp9Vdenc = 1,
99 .adv0Decoding = 1,
100 .adv1Decoding = 1,
101 };
102
103 static struct LinuxCodecInfo PvcCodecInfo =
104 {
105 .avcDecoding = 1,
106 .mpeg2Decoding = 1,
107 .vp8Decoding = 0,
108 .vc1Decoding = 0,
109 .jpegDecoding = 1,
110 .avcEncoding = 0,
111 .mpeg2Encoding = 0,
112 .hevcDecoding = 1,
113 .hevcEncoding = 0,
114 #ifdef IGFX_PVC_ENABLE_NON_UPSTREAM
115 .jpegEncoding = 1,
116 .avcVdenc = 1,
117 #else
118 .jpegEncoding = 0,
119 .avcVdenc = 0,
120 #endif
121 .vp9Decoding = 1,
122 .hevc10Decoding = 1,
123 .vp9b10Decoding = 1,
124 .hevc10Encoding = 0,
125 .hevc12Encoding = 0,
126 .vp8Encoding = 0,
127 #ifdef IGFX_PVC_ENABLE_NON_UPSTREAM
128 .hevcVdenc = 1,
129 .vp9Vdenc = 1,
130 #else
131 .hevcVdenc = 0,
132 .vp9Vdenc = 0,
133 #endif
134 .adv0Decoding = 1,
135 .adv1Decoding = 1,
136 };
137
InitTglMediaSkuExt(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,struct LinuxCodecInfo * codecInfo,MediaUserSettingSharedPtr userSettingPtr)138 static bool InitTglMediaSkuExt(struct GfxDeviceInfo *devInfo,
139 MediaFeatureTable *skuTable,
140 struct LinuxDriverInfo *drvInfo,
141 struct LinuxCodecInfo *codecInfo,
142 MediaUserSettingSharedPtr userSettingPtr)
143 {
144 if ((devInfo == nullptr) || (skuTable == nullptr) || (drvInfo == nullptr))
145 {
146 DEVINFO_ERROR("null ptr is passed\n");
147 return false;
148 }
149
150 if (drvInfo->hasBsd)
151 {
152 MEDIA_WR_SKU(skuTable, FtrAVCVLDLongDecoding, codecInfo->avcDecoding);
153 MEDIA_WR_SKU(skuTable, FtrMPEG2VLDDecoding, codecInfo->mpeg2Decoding);
154 MEDIA_WR_SKU(skuTable, FtrIntelVP8VLDDecoding, codecInfo->vp8Decoding);
155 MEDIA_WR_SKU(skuTable, FtrVC1VLDDecoding, codecInfo->vc1Decoding);
156 MEDIA_WR_SKU(skuTable, FtrIntelJPEGDecoding, codecInfo->jpegDecoding);
157 MEDIA_WR_SKU(skuTable, FtrEncodeAVC, codecInfo->avcEncoding);
158 MEDIA_WR_SKU(skuTable, FtrEncodeMPEG2, codecInfo->mpeg2Encoding);
159 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMainDecoding, codecInfo->hevcDecoding);
160 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10Decoding, codecInfo->hevc10Decoding);
161
162 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC, codecInfo->hevcEncoding);
163 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC10bit, codecInfo->hevc10Encoding);
164 MEDIA_WR_SKU(skuTable, FtrEncodeJPEG, codecInfo->jpegEncoding);
165 MEDIA_WR_SKU(skuTable, FtrEncodeAVCVdenc, codecInfo->avcVdenc);
166 MEDIA_WR_SKU(skuTable, FtrVP9VLDDecoding, codecInfo->vp9Decoding);
167 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile0Decoding8bit420, codecInfo->vp9Decoding);
168 MEDIA_WR_SKU(skuTable, FtrVP9VLD10bProfile2Decoding, codecInfo->vp9b10Decoding);
169 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding, codecInfo->vp9b10Decoding);
170 MEDIA_WR_SKU(skuTable, FtrIntelAV1VLDDecoding8bit420, codecInfo->adv0Decoding);
171 MEDIA_WR_SKU(skuTable, FtrIntelAV1VLDDecoding10bit420, codecInfo->adv1Decoding);
172
173 /* VP8 enc */
174 MEDIA_WR_SKU(skuTable, FtrEncodeVP8, codecInfo->vp8Encoding);
175
176 /* HEVC VDENC */
177 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain, codecInfo->hevcVdenc);
178 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10, codecInfo->hevcVdenc);
179
180 /* Vp9 VDENC */
181 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc, codecInfo->vp9Vdenc);
182
183 /* HEVC Main8/10bit-422/444 Decoding. Currently it is enabled. */
184 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD42210bitDecoding, 1);
185 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD4448bitDecoding, 1);
186 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD44410bitDecoding, 1);
187
188 /* SFC Histogram Streamout. */
189 MEDIA_WR_SKU(skuTable, FtrSFCHistogramStreamOut, 1);
190
191 /* Subset buffer for realtile decoding. */
192 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDDecodingSubsetBuffer, 1);
193
194 /* HEVC Main8/10bit-420/422/444 Scc Decoding. Currently it is enabled. */
195 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain8bit420SCC, 1);
196 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10bit420SCC, 1);
197 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain8bit444SCC, 1);
198 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10bit444SCC, 1);
199
200 /* HEVC VDENC Main8/10 422/444 Encoding. */
201 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain444, codecInfo->hevcVdenc);
202 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain422, codecInfo->hevcVdenc);
203 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit422, codecInfo->hevcVdenc);
204 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit444, codecInfo->hevcVdenc);
205
206 /* HEVC VDENC Main8/10bit-420/422/444 Scc Encoding. */
207 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMainSCC, codecInfo->hevcVdenc);
208 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bitSCC, codecInfo->hevcVdenc);
209 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain444SCC, codecInfo->hevcVdenc);
210 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit444SCC, codecInfo->hevcVdenc);
211
212 /* HEVC 12bit Decoding. Currently it is enabled */
213 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit420Decoding, 1);
214 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit422Decoding, 1);
215 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit444Decoding, 1);
216
217 /* VP9 8 bit 444 */
218 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile1Decoding8bit444, 1);
219 /* VP9 10 Bit 444*/
220 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding10bit444, 1);
221 /* VP9 12 bit 420/444 */
222 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding12bit420, 1);
223 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding12bit444, 1);
224
225 /* VP9 VDENC 8Bit 444 */
226 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc8bit444, codecInfo->vp9Vdenc);
227 /* VP9 VDENC 10Bit 420/444 */
228 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit420, codecInfo->vp9Vdenc);
229 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit444, codecInfo->vp9Vdenc);
230 }
231
232 MEDIA_WR_SKU(skuTable, FtrEnableMediaKernels, drvInfo->hasHuc);
233
234 if (devInfo->eGTType == GTTYPE_GT1)
235 {
236 MEDIA_WR_SKU(skuTable, FtrGT1, 1);
237 }
238 else if (devInfo->eGTType == GTTYPE_GT1_5)
239 {
240 MEDIA_WR_SKU(skuTable, FtrGT1_5, 1);
241 }
242 else if (devInfo->eGTType == GTTYPE_GT2)
243 {
244 MEDIA_WR_SKU(skuTable, FtrGT2, 1);
245 }
246 else if (devInfo->eGTType == GTTYPE_GT3)
247 {
248 MEDIA_WR_SKU(skuTable, FtrGT3, 1);
249 }
250 else if (devInfo->eGTType == GTTYPE_GT4)
251 {
252 MEDIA_WR_SKU(skuTable, FtrGT4, 1);
253 }
254 else
255 {
256 /* GT1 is by default */
257 MEDIA_WR_SKU(skuTable, FtrGT1, 1);
258 }
259
260 MEDIA_WR_SKU(skuTable, FtrVERing, drvInfo->hasVebox);
261 MEDIA_WR_SKU(skuTable, FtrPPGTT, drvInfo->hasPpgtt);
262 MEDIA_WR_SKU(skuTable, FtrEDram, devInfo->hasERAM);
263
264 /* Virtual VDBOX ring is used on Gen12 */
265 MEDIA_WR_SKU(skuTable, FtrVcs2, 0);
266
267 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 1);
268 if (devInfo->SubSliceCount >= singleVeboxSubSliceNumMax)
269 {
270 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 0);
271 }
272
273 MEDIA_WR_SKU(skuTable, FtrSFCPipe, 1);
274
275 MEDIA_WR_SKU(skuTable, FtrHCP2SFCPipe, 1);
276 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGating, 1);
277 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGatingControlByUMD, 1);
278
279 MEDIA_WR_SKU(skuTable, FtrPerCtxtPreemptionGranularityControl, 1);
280
281 /* It is disabled by default. It can be enabled based on HW */
282 MEDIA_WR_SKU(skuTable, FtrMemoryCompression, 0);
283 MEDIA_WR_SKU(skuTable, FtrHcpDecMemoryCompression, 0);
284 MEDIA_WR_SKU(skuTable, Ftr10bitDecMemoryCompression, 0);
285
286 MEDIA_WR_SKU(skuTable, FtrCCSNode, 1);
287
288 MEDIA_WR_SKU(skuTable, FtrVpP010Output, 1);
289 MEDIA_WR_SKU(skuTable, FtrVp10BitSupport, 1);
290 MEDIA_WR_SKU(skuTable, FtrVp16BitSupport, 1);
291
292 MEDIA_WR_SKU(skuTable, FtrContextBasedScheduling, 1);
293
294 MEDIA_WR_SKU(skuTable, FtrSWMediaReset, 1);
295
296 MEDIA_WR_SKU(skuTable, FtrVeboxScalabilitywith4K, 1);
297
298 MEDIA_WR_SKU(skuTable, FtrTileY, 1);
299 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 1);
300 MEDIA_WR_SKU(skuTable, FtrLinearCCS, 1);
301 MEDIA_WR_SKU(skuTable, FtrFlatPhysCCS, 0);
302
303 MEDIA_WR_SKU(skuTable, FtrHeight8AlignVE3DLUTDualPipe, 1);
304
305 // Disable MMC for all components if set reg key
306 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
307 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
308 MOS_UserFeature_ReadValue_ID(
309 nullptr,
310 __MEDIA_USER_FEATURE_VALUE_DISABLE_MMC_ID,
311 &userFeatureData,
312 (MOS_CONTEXT_HANDLE)nullptr);
313 if (userFeatureData.bData)
314 {
315 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 0);
316 }
317
318 // Create uncompressible surface by default
319 MEDIA_WR_SKU(skuTable, FtrCompressibleSurfaceDefault, 0);
320
321 bool compressibleSurfaceEnable = false;
322
323 ReadUserSetting(userSettingPtr,
324 compressibleSurfaceEnable,
325 "Enable Compressible Surface Creation",
326 MediaUserSetting::Group::Device);
327
328 #ifdef _MMC_SUPPORTED
329 if (compressibleSurfaceEnable)
330 {
331 MEDIA_WR_SKU(skuTable, FtrCompressibleSurfaceDefault, 1);
332 }
333 #endif
334
335 if (drvInfo->devId == 0xFF20)
336 {
337 MEDIA_WR_SKU(skuTable, FtrConditionalBatchBuffEnd, 1);
338 }
339
340 MEDIA_WR_SKU(skuTable, FtrUseSwSwizzling, 1);
341
342 MEDIA_WR_SKU(skuTable, FtrMemoryRemapSupport, 1);
343
344 MEDIA_WR_SKU(skuTable, FtrAV1VLDLSTDecoding, 0);
345
346 //Tile64
347 if (GFX_IS_DG2_G11_CONFIG(drvInfo->devId))
348 {
349 MEDIA_WR_SKU(skuTable, FtrTileY, 0);
350 }
351
352 return true;
353 }
354
InitTglMediaWaExt(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)355 static bool InitTglMediaWaExt(struct GfxDeviceInfo *devInfo,
356 MediaWaTable *waTable,
357 struct LinuxDriverInfo *drvInfo)
358 {
359 if ((devInfo == nullptr) || (waTable == nullptr) || (drvInfo == nullptr))
360 {
361 DEVINFO_ERROR("null ptr is passed\n");
362 return false;
363 }
364
365 MEDIA_WR_WA(waTable, WaForceGlobalGTT, !drvInfo->hasPpgtt);
366 MEDIA_WR_WA(waTable, WaMidBatchPreemption, 0);
367 MEDIA_WR_WA(waTable, WaArbitraryNumMbsInSlice, 1);
368
369 MEDIA_WR_WA(waTable, WaSuperSliceHeaderPacking, 1);
370
371 MEDIA_WR_WA(waTable, WaSFC270DegreeRotation, 0);
372
373 MEDIA_WR_WA(waTable, WaEnableYV12BugFixInHalfSliceChicken7, 1);
374
375 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
376 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
377 MOS_UserFeature_ReadValue_ID(
378 nullptr,
379 __MEDIA_USER_FEATURE_VALUE_AUX_TABLE_16K_GRANULAR_ID,
380 &userFeatureData,
381 (MOS_CONTEXT_HANDLE)nullptr);
382
383 MEDIA_WR_WA(waTable, WaDummyReference, 1);
384
385 MEDIA_WR_WA(waTable, Wa16KInputHeightNV12Planar420, 1);
386
387 /*software wa to disable calculate the UV offset by gmmlib
388 CPU blt call will add/remove padding on the platform*/
389 MEDIA_WR_WA(waTable, WaDisableGmmLibOffsetInDeriveImage, 1);
390
391 /*software wa to fix some corner cases of HEVC/VP9 SFC and Scalability*/
392 MEDIA_WR_WA(waTable, Wa_14010222001, 1);
393
394 /*software wa to fix some corner hang cases for Scalability*/
395 MEDIA_WR_WA(waTable, Wa_2209620131, 1);
396
397
398 if (drvInfo->devId == 0x9A49 ||
399 drvInfo->devId == 0x9AC9 ||
400 drvInfo->devId == 0x9A60 ||
401 drvInfo->devId == 0x9A68 ||
402 drvInfo->devId == 0x9A70 ||
403 drvInfo->devId == 0x4905 ||
404 drvInfo->devId == 0x4906 ||
405 drvInfo->devId == 0x4907)
406 {
407 /*software wa to use frame based decoding for AV1 decode*/
408 MEDIA_WR_WA(waTable, Wa_1409820462, 1);
409 }
410
411 if (drvInfo->devId == 0x4905 ||
412 drvInfo->devId == 0x4906 ||
413 drvInfo->devId == 0x4907)
414 {
415 /* Turn off MMC for codec, need to remove once turn it on */
416 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 1);
417
418 /* Turn off MMC for VPP, need to remove once turn it on */
419 MEDIA_WR_WA(waTable, WaDisableVPMmc, 1);
420 }
421
422 if (MEDIA_IS_WA(waTable, Wa_14012254246))
423 {
424 MOS_UserFeature_ReadValue_ID(
425 nullptr,
426 __MEDIA_USER_FEATURE_VALUE_DISABLE_TLB_PREFETCH_ID,
427 &userFeatureData,
428 (MOS_CONTEXT_HANDLE)nullptr);
429 // For PVC A0, if TLB pre-fetch disabled, resource could be allocated to system memory and local memory;
430 // otherwise, resource could be allocated to local memory only.
431 if (userFeatureData.u32Data == 0)
432 {
433 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 1);
434 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 0);
435 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
436 }
437 }
438
439 // For DG2
440 if (GFX_IS_DG2_G11_CONFIG(drvInfo->devId))
441 {
442 MEDIA_WR_WA(waTable, Wa_22011549751, 1);
443 }
444
445 MEDIA_WR_WA(waTable, WaEnableVPPCopy, 1);
446 MEDIA_WR_WA(waTable, Wa_AvcUnalignedHeight, 1);
447 return true;
448 }
449
InitXehpSDVMediaSku(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)450 static bool InitXehpSDVMediaSku(struct GfxDeviceInfo *devInfo,
451 MediaFeatureTable *skuTable,
452 struct LinuxDriverInfo *drvInfo,
453 MediaUserSettingSharedPtr userSettingPtr)
454 {
455 if (!InitTglMediaSkuExt(devInfo, skuTable, drvInfo, &XehpSdvCodecInfo, userSettingPtr))
456 {
457 return false;
458 }
459
460 // Guc Submission
461 MEDIA_WR_SKU(skuTable, FtrGucSubmission, 1);
462
463 // doesn't support legacy TileY
464 MEDIA_WR_SKU(skuTable, FtrTileY, 0);
465 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 1);
466 MEDIA_WR_SKU(skuTable, FtrLinearCCS, 1);
467 MEDIA_WR_SKU(skuTable, FtrFlatPhysCCS, 1);
468 MEDIA_WR_SKU(skuTable, FtrCompsitionMemoryCompressedOut, 1);
469
470 //Enable LocalMemory for all dGraphics
471 MEDIA_WR_SKU(skuTable, FtrLocalMemory, 1);
472
473 MEDIA_WR_SKU(skuTable, FtrConditionalBatchBuffEnd, 1);
474 return true;
475 }
476
InitXehpSDVMediaWa(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)477 static bool InitXehpSDVMediaWa(struct GfxDeviceInfo *devInfo,
478 MediaWaTable *waTable,
479 struct LinuxDriverInfo *drvInfo)
480 {
481 if (!InitTglMediaWaExt(devInfo, waTable, drvInfo))
482 {
483 DEVINFO_ERROR("InitMediaWA failed\n");
484 return false;
485 }
486 /*software wa to use frame based decoding for AV1 decode*/
487 MEDIA_WR_WA(waTable, Wa_1409820462, 1);
488
489 /*software wa to add a dummy workload in front of
490 normal workload per batch buffer*/
491 MEDIA_WR_WA(waTable, Wa_1508208842, 1);
492
493 /* Turn off MMC for codec, need to remove once turn it on */
494 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 1);
495
496 /* Turn off MMC for VPP, need to remove once turn it on */
497 MEDIA_WR_WA(waTable, WaDisableVPMmc, 1);
498
499 /* default resource allocate policy for XeHP_SDV*/
500 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
501
502 /* only enable L3 for A step*/
503 if (drvInfo->devRev == 0x0 || drvInfo->devRev == 0x1)
504 {
505 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
506 }
507 else
508 {
509 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 0);
510 }
511 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
512
513 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
514 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
515 MOS_UserFeature_ReadValue_ID(
516 nullptr,
517 __MEDIA_USER_FEATURE_VALUE_LOCAL_MEMORY_LEVEL_SWITCH_ID,
518 &userFeatureData,
519 (MOS_CONTEXT_HANDLE)nullptr);
520
521 if(userFeatureData.u32Data == 2)
522 {
523 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 1);
524 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 0);
525 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
526 }
527
528 if(userFeatureData.u32Data == 3)
529 {
530 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
531 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
532 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
533 }
534
535 if(userFeatureData.u32Data == 4)
536 {
537 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
538 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
539 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 1);
540 }
541
542 if (char* pLocalMemLevelSwitch = getenv("LOCALMEMLEVELSWITCH"))
543 {
544 int localMemLevelSwitch = atoi(pLocalMemLevelSwitch);
545
546 if(localMemLevelSwitch == 2)
547 {
548 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 1);
549 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 0);
550 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
551 }
552 else if(localMemLevelSwitch == 3)
553 {
554 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
555 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
556 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
557 }
558 else if(localMemLevelSwitch == 4)
559 {
560 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
561 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
562 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 1);
563 }
564 }
565 // XeHP_SDV I as P WA
566 MEDIA_WR_WA(waTable, Wa_22011549751, 1);
567 #ifdef IGFX_XEHP_SDV_ENABLE_NON_UPSTREAM
568 MEDIA_WR_WA(waTable, WaHEVCVDEncForceDeltaQpRoiNotSupported, 1);
569 #else
570 MEDIA_WR_WA(waTable, WaHEVCVDEncForceDeltaQpRoiNotSupported, 0);
571 #endif
572 return true;
573 }
574
InitPvcMediaSku(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)575 static bool InitPvcMediaSku(struct GfxDeviceInfo *devInfo,
576 MediaFeatureTable *skuTable,
577 struct LinuxDriverInfo *drvInfo,
578 MediaUserSettingSharedPtr userSettingPtr)
579 {
580 if (!InitTglMediaSkuExt(devInfo, skuTable, drvInfo, &PvcCodecInfo, userSettingPtr))
581 {
582 return false;
583 }
584
585 // PVC doesn't have VEBOX and SFC
586 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 0);
587 MEDIA_WR_SKU(skuTable, FtrSFCPipe, 0);
588 MEDIA_WR_SKU(skuTable, FtrVERing, 0);
589 // PVC doesn't support legacy TileY
590 MEDIA_WR_SKU(skuTable, FtrTileY, 0);
591 MEDIA_WR_SKU(skuTable, FtrVERing, 0);
592
593 MEDIA_WR_SKU(skuTable, FtrVeboxScalabilitywith4K, 0);
594
595 // Compression Flags
596 if (!(drvInfo->devId == 0x0BD0 ||
597 (drvInfo->devId == 0x0BD5 && drvInfo->devRev == 0x03)))
598 {
599 MEDIA_WR_SKU(skuTable, FtrLinearCCS, 1);
600 MEDIA_WR_SKU(skuTable, FtrFlatPhysCCS, 1);
601 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 1);
602 MEDIA_WR_SKU(skuTable, FtrRenderCompressionOnly, 1);
603 MEDIA_WR_SKU(skuTable, FtrCompsitionMemoryCompressedOut, 1);
604 }
605
606 // Force MMC Turn on for all components if set reg key
607 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
608 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
609 MOS_UserFeature_ReadValue_ID(
610 nullptr,
611 __MEDIA_USER_FEATURE_VALUE_FORCE_MMC_ON_ID,
612 &userFeatureData,
613 (MOS_CONTEXT_HANDLE)nullptr);
614
615 if (userFeatureData.bData)
616 {
617 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 1);
618 }
619
620 // Disable MMC for all components if set reg key
621 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
622 MOS_UserFeature_ReadValue_ID(
623 nullptr,
624 __MEDIA_USER_FEATURE_VALUE_DISABLE_MMC_ID,
625 &userFeatureData,
626 (MOS_CONTEXT_HANDLE)nullptr);
627 if (userFeatureData.bData)
628 {
629 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 0);
630 }
631
632 MEDIA_WR_SKU(skuTable, FtrWithSlimVdbox, 1);
633
634 // Enable LocalMemory for all dGraphics
635 MEDIA_WR_SKU(skuTable, FtrLocalMemory, 1);
636
637 //Enable AV1 Large Scale Tile decoding
638 MEDIA_WR_SKU(skuTable, FtrAV1VLDLSTDecoding, 1);
639
640 return true;
641 }
642
InitPvcMediaWa(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)643 static bool InitPvcMediaWa(struct GfxDeviceInfo *devInfo,
644 MediaWaTable *waTable,
645 struct LinuxDriverInfo *drvInfo)
646 {
647 if (!InitTglMediaWaExt(devInfo, waTable, drvInfo))
648 {
649 DEVINFO_ERROR("InitMediaWA failed\n");
650 return false;
651 }
652
653 // turn on Compression on B Step+
654 if (drvInfo->devId == 0x0BD0 ||
655 (drvInfo->devId == 0x0BD5 && drvInfo->devRev == 0x03))
656 {
657 /* Turn off MMC for codec, need to remove once turn it on */
658 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 1);
659
660 /* Turn off MMC for VPP, need to remove once turn it on */
661 MEDIA_WR_WA(waTable, WaDisableVPMmc, 1);
662 }
663
664 // For PVC A0 dev, disable TLB prefetch WA
665 if (drvInfo->devId == 0x0BD0 || drvInfo->devId == 0x0BD5)
666 {
667 MEDIA_WR_WA(waTable, Wa_14012254246, 1);
668 }
669
670 // for PVC XL/XT A0 dev, need add MEM policy WA, B0 doesn't need.
671 if (drvInfo->devId == 0x0BD0 ||
672 (drvInfo->devId == 0x0BD5 && drvInfo->devRev == 0x03))
673 {
674 /* default resource allocate policy for PVC */
675 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
676 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
677 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
678
679 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
680 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
681 MOS_UserFeature_ReadValue_ID(
682 nullptr,
683 __MEDIA_USER_FEATURE_VALUE_LOCAL_MEMORY_LEVEL_SWITCH_ID,
684 &userFeatureData,
685 (MOS_CONTEXT_HANDLE)nullptr);
686
687 if(userFeatureData.u32Data == 2)
688 {
689 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 1);
690 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 0);
691 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
692 }
693
694 if(userFeatureData.u32Data == 3)
695 {
696 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
697 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
698 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
699 }
700
701 if(userFeatureData.u32Data == 4)
702 {
703 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
704 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
705 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 1);
706 }
707
708 if (char* pLocalMemLevelSwitch = getenv("LOCALMEMLEVELSWITCH"))
709 {
710 int localMemLevelSwitch = atoi(pLocalMemLevelSwitch);
711
712 if(localMemLevelSwitch == 2)
713 {
714 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 1);
715 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 0);
716 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
717 }
718 else if(localMemLevelSwitch == 3)
719 {
720 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
721 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
722 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 0);
723 }
724 else if(localMemLevelSwitch == 4)
725 {
726 MEDIA_WR_WA(waTable, WaForceAllocateLML2, 0);
727 MEDIA_WR_WA(waTable, WaForceAllocateLML3, 1);
728 MEDIA_WR_WA(waTable, WaForceAllocateLML4, 1);
729 }
730 }
731 }
732
733 #ifdef IGFX_PVC_ENABLE_NON_UPSTREAM
734 MEDIA_WR_WA(waTable, WaHEVCVDEncForceDeltaQpRoiNotSupported, 1);
735 #else
736 MEDIA_WR_WA(waTable, WaHEVCVDEncForceDeltaQpRoiNotSupported, 0);
737 #endif
738
739 // I as P WA
740 MEDIA_WR_WA(waTable, Wa_22011549751, 1);
741
742 // Remove the WA of DummyReference
743 MEDIA_WR_WA(waTable, WaDummyReference, 0);
744
745 return true;
746 }
747
InitDg2MediaSku(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)748 static bool InitDg2MediaSku(struct GfxDeviceInfo *devInfo,
749 MediaFeatureTable *skuTable,
750 struct LinuxDriverInfo *drvInfo,
751 MediaUserSettingSharedPtr userSettingPtr)
752 {
753 if (!InitTglMediaSkuExt(devInfo, skuTable, drvInfo, &Dg2CodecInfo, userSettingPtr))
754 {
755 return false;
756 }
757
758 // Disable CCS on DG2A
759 if (drvInfo->devRev == 0)
760 {
761 MEDIA_WR_SKU(skuTable, FtrCCSNode, 0);
762 }
763
764 if (drvInfo->hasBsd)
765 {
766 /* AV1 VDENC 8/10Bit 420 */
767 MEDIA_WR_SKU(skuTable, FtrEncodeAV1Vdenc, 1);
768 MEDIA_WR_SKU(skuTable, FtrEncodeAV1Vdenc10bit420, 1);
769 }
770
771 MEDIA_WR_SKU(skuTable, FtrSfcScalability, 1);
772
773 // Guc Submission
774 MEDIA_WR_SKU(skuTable, FtrGucSubmission, 1);
775
776 MEDIA_WR_SKU(skuTable, FtrTileY, 0);
777 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 1);
778 MEDIA_WR_SKU(skuTable, FtrLinearCCS, 1);
779 MEDIA_WR_SKU(skuTable, FtrFlatPhysCCS, 1);
780 MEDIA_WR_SKU(skuTable, FtrCompsitionMemoryCompressedOut, 1);
781
782 // Enable LocalMemory for all dGraphics
783 MEDIA_WR_SKU(skuTable, FtrLocalMemory, 1);
784
785 // Enable AV1 Large Scale Tile decoding
786 MEDIA_WR_SKU(skuTable, FtrAV1VLDLSTDecoding, 1);
787
788 // Enable HDR
789 MEDIA_WR_SKU(skuTable, FtrHDR, 1);
790
791 // Enable down scaling first if 3DLUT enabled
792 MEDIA_WR_SKU(skuTable, FtrScalingFirst, 1);
793
794 // Disable HEVC 422 Virtual Tile Scalability
795 MEDIA_WR_SKU(skuTable, FtrDecodeHEVC422VTScalaDisable, 1);
796
797 // Tile64
798 if (drvInfo->devRev >= 0x04 &&
799 (drvInfo->devId == 0x4F80 ||
800 drvInfo->devId == 0x4F81 ||
801 drvInfo->devId == 0x4F82 ||
802 drvInfo->devId == 0x4F83 ||
803 drvInfo->devId == 0x4F84 ||
804 drvInfo->devId == 0x4F85 ||
805 drvInfo->devId == 0x4F86 ||
806 drvInfo->devId == 0x5690 ||
807 drvInfo->devId == 0x5691 ||
808 drvInfo->devId == 0x5692 ||
809 drvInfo->devId == 0x5695 ||
810 drvInfo->devId == 0x5696 ||
811 drvInfo->devId == 0x5697 ||
812 drvInfo->devId == 0x5698 ||
813 drvInfo->devId == 0x56A0 ||
814 drvInfo->devId == 0x56A1 ||
815 drvInfo->devId == 0x56A2 ||
816 drvInfo->devId == 0x56A3 ||
817 drvInfo->devId == 0x56A4 ||
818 drvInfo->devId == 0x56A5 ||
819 drvInfo->devId == 0x56A6 ||
820 drvInfo->devId == 0x56A7 ||
821 drvInfo->devId == 0x56A8 ||
822 drvInfo->devId == 0x56A9 ||
823 drvInfo->devId == 0x56C0))
824 {
825 MEDIA_WR_SKU(skuTable, FtrTileY, 0);
826 }
827
828 MEDIA_WR_SKU(skuTable, FtrHDR, 1);
829
830 // Enable HVS Denoise
831 MEDIA_WR_SKU(skuTable, FtrHVSDenoise, 1);
832
833 #define IS_SERVER_SKU(d) (((d) >= 0x56C0) && ((d) <= 0x56C1))
834 if (IS_SERVER_SKU(drvInfo->devId))
835 {
836 drvInfo->isServer = 1;
837 }
838 else
839 {
840 drvInfo->isServer = 0;
841 }
842
843 return true;
844 }
845
InitDg2MediaWa(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)846 static bool InitDg2MediaWa(struct GfxDeviceInfo *devInfo,
847 MediaWaTable *waTable,
848 struct LinuxDriverInfo *drvInfo)
849 {
850 if (!InitTglMediaWaExt(devInfo, waTable, drvInfo))
851 {
852 DEVINFO_ERROR("InitMediaWA failed\n");
853 return false;
854 }
855
856 /* Turn off MMC for codec, need to remove once turn it on */
857 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 1);
858
859 /* Turn off MMC for VPP, need to remove once turn it on */
860 MEDIA_WR_WA(waTable, WaDisableVPMmc, 1);
861
862 // Compression Settings
863 if (SI_WA_FROM(drvInfo->devRev, ACM_G10_MEDIA_REV_ID_B0) ||
864 GFX_IS_DG2_G11_CONFIG(drvInfo->devId))
865 {
866 /* Turn on MMC for codec and vpp*/
867 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 0);
868 MEDIA_WR_WA(waTable, WaDisableVPMmc, 0);
869 }
870
871 if (GFX_IS_DG2_G11_CONFIG(drvInfo->devId) ||
872 (GFX_IS_DG2_G10_CONFIG(drvInfo->devId) && SI_WA_FROM(drvInfo->devRev, ACM_G10_MEDIA_REV_ID_B0)))
873 {
874 MEDIA_WR_WA(waTable, Wa_22011700429, 1);
875 }
876
877 // For DG2 128/512 need to distinguish A stepping and B stepping
878 // Disable B+ stepping features on DG2A
879 if (GFX_IS_DG2_G10_CONFIG(drvInfo->devId) ||
880 GFX_IS_DG2_G11_CONFIG(drvInfo->devId))
881 {
882 if (drvInfo->devRev < 4)
883 {
884 MEDIA_WR_WA(waTable, WaEnableOnlyASteppingFeatures, 1);
885 MEDIA_WR_WA(waTable, Wa_14010476401, 1);
886 MEDIA_WR_WA(waTable, Wa_22011531258, 1);
887 MEDIA_WR_WA(waTable, Wa_2209975292, 1);
888 MEDIA_WR_WA(waTable, WaHEVCVDEncForceDeltaQpRoiNotSupported, 1);
889 }
890 MEDIA_WR_WA(waTable, Wa_22011549751, 1);
891 }
892
893 // for DG2 256EU, support B+ features, don't need wa for A stepping
894 if (GFX_IS_DG2_G12_CONFIG(drvInfo->devId))
895 {
896 MEDIA_WR_WA(waTable, Wa_22011549751, 1);
897 }
898
899 // CCS Chromakey
900 if (GFX_IS_DG2_G11_CONFIG(drvInfo->devId))
901 {
902 MEDIA_WR_WA(waTable, Wa_16011481064, 1);
903 }
904 else
905 {
906 if (drvInfo->devRev >= 4)
907 {
908 MEDIA_WR_WA(waTable, Wa_16011481064, 1);
909 }
910 }
911
912 MEDIA_WR_WA(waTable, Wa_15010089951, 1);
913
914 // Remove the WA of DummyReference
915 MEDIA_WR_WA(waTable, WaDummyReference, 0);
916
917 MEDIA_WR_WA(waTable, WaDisableSetObjectCapture, 1);
918
919 MEDIA_WR_WA(waTable, Wa_15013355402, 1);
920
921 return true;
922 }
923
924
925 static struct LinuxDeviceInit xehpSDVDeviceInit =
926 {
927 .productFamily = IGFX_XE_HP_SDV,
928 .InitMediaFeature = InitXehpSDVMediaSku,
929 .InitMediaWa = InitXehpSDVMediaWa,
930 };
931
932 static bool xehpSDVDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
933 RegisterDevice(IGFX_XE_HP_SDV, &xehpSDVDeviceInit);
934
935 static struct LinuxDeviceInit dg2DeviceInit =
936 {
937 .productFamily = IGFX_DG2,
938 .InitMediaFeature = InitDg2MediaSku,
939 .InitMediaWa = InitDg2MediaWa,
940 };
941
942 static bool dg2DeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
943 RegisterDevice(IGFX_DG2, &dg2DeviceInit);
944
945 static struct LinuxDeviceInit pvcDeviceInit =
946 {
947 .productFamily = IGFX_PVC,
948 .InitMediaFeature = InitPvcMediaSku,
949 .InitMediaWa = InitPvcMediaWa,
950 };
951
952 static bool pvcDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
953 RegisterDevice(IGFX_PVC, &pvcDeviceInit);
954