1 /* 2 * Copyright (c) 2020, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file encode_hevc_vdenc_scc.cpp 24 //! \brief Implemetation for hevc scc feature 25 //! 26 27 #include "encode_hevc_vdenc_scc.h" 28 #include "encode_hevc_vdenc_feature_manager.h" 29 #include "encode_utils.h" 30 #include "encode_huc_brc_update_packet.h" 31 32 namespace encode 33 { HevcVdencScc(MediaFeatureManager * featureManager,EncodeAllocator * allocator,CodechalHwInterfaceNext * hwInterface,void * constSettings)34 HevcVdencScc::HevcVdencScc( 35 MediaFeatureManager *featureManager, 36 EncodeAllocator *allocator, 37 CodechalHwInterfaceNext *hwInterface, 38 void *constSettings) : 39 MediaFeature(constSettings, hwInterface ? hwInterface->GetOsInterface() : nullptr) 40 { 41 ENCODE_FUNC_CALL(); 42 auto encFeatureManager = dynamic_cast<EncodeHevcVdencFeatureManager *>(featureManager); 43 ENCODE_CHK_NULL_NO_STATUS_RETURN(encFeatureManager); 44 ENCODE_CHK_NULL_NO_STATUS_RETURN(hwInterface); 45 CODEC_HW_ASSERT(hwInterface->GetOsInterface()); 46 m_osInterface = hwInterface->GetOsInterface(); 47 48 m_basicFeature = dynamic_cast<EncodeBasicFeature *>(encFeatureManager->GetFeature(FeatureIDs::basicFeature)); 49 ENCODE_CHK_NULL_NO_STATUS_RETURN(m_basicFeature); 50 51 m_mosCtx = hwInterface->GetOsInterface()->pOsContext; 52 ENCODE_CHK_NULL_NO_STATUS_RETURN(m_mosCtx); 53 } 54 ~HevcVdencScc()55 HevcVdencScc::~HevcVdencScc() 56 { 57 FreeEncResources(); 58 } 59 Init(void * settings)60 MOS_STATUS HevcVdencScc::Init(void *settings) 61 { 62 ENCODE_FUNC_CALL(); 63 64 CodechalSetting* codecSettings = (CodechalSetting*)settings; 65 m_enableSCC = codecSettings->isSCCEnabled; 66 m_mmcEnabled = codecSettings->isMmcEnabled; 67 68 #if (_DEBUG || _RELEASE_INTERNAL) 69 // LBC only Enable should be passed from DDI, will change later when DDI is ready 70 MediaUserSetting::Value outValue; 71 ReadUserSetting( 72 m_userSettingPtr, 73 outValue, 74 "HEVC VDEnc LBC Only Enable", 75 MediaUserSetting::Group::Sequence, 76 (PMOS_CONTEXT)m_mosCtx); 77 m_enableLBCOnly = outValue.Get<bool>(); 78 #endif 79 80 ENCODE_CHK_STATUS_RETURN(AllocateEncResources()); 81 return MOS_STATUS_SUCCESS; 82 } 83 Update(void * params)84 MOS_STATUS HevcVdencScc::Update(void *params) 85 { 86 ENCODE_FUNC_CALL(); 87 88 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 89 ENCODE_CHK_NULL_RETURN(hevcFeature); 90 91 m_enableSCC = m_enableSCC && (hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag || hevcFeature->m_hevcSeqParams->palette_mode_enabled_flag); 92 // Error concealment, disable IBC if slice coding type is I type 93 if (m_enableSCC && hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag) 94 { 95 for (uint32_t slcCount = 0; slcCount < hevcFeature->m_numSlices; slcCount++) 96 { 97 if (hevcFeature->m_hevcSliceParams[slcCount].slice_type == encodeHevcISlice) 98 { 99 hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag = false; 100 break; 101 } 102 } 103 } 104 m_enableSCC = m_enableSCC && (hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag || hevcFeature->m_hevcSeqParams->palette_mode_enabled_flag); 105 return MOS_STATUS_SUCCESS; 106 } 107 AllocateEncResources()108 MOS_STATUS HevcVdencScc::AllocateEncResources() 109 { 110 ENCODE_FUNC_CALL(); 111 112 if (!m_enableSCC) 113 { 114 return MOS_STATUS_SUCCESS; 115 } 116 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 117 MOS_ALLOC_GFXRES_PARAMS allocParamsForBuffer2D; 118 uint32_t alignedWidth, alignedHeight; 119 120 // Allocate the recon not filtered surface for IBC 121 // First align to LCU size 64x64 122 alignedWidth = MOS_ALIGN_CEIL(m_basicFeature->m_frameWidth, ((HevcBasicFeature *)m_basicFeature)->m_maxLCUSize); 123 alignedHeight = MOS_ALIGN_CEIL(m_basicFeature->m_frameHeight, ((HevcBasicFeature *)m_basicFeature)->m_maxLCUSize); 124 125 MOS_ZeroMemory(&allocParamsForBuffer2D, sizeof(MOS_ALLOC_GFXRES_PARAMS)); 126 allocParamsForBuffer2D.Type = MOS_GFXRES_2D; 127 allocParamsForBuffer2D.TileType = MOS_TILE_Y; 128 // default setting 129 allocParamsForBuffer2D.Format = Format_NV12; 130 allocParamsForBuffer2D.pBufName = "Recon not Filtered Surface"; 131 allocParamsForBuffer2D.dwWidth = alignedWidth; 132 allocParamsForBuffer2D.dwHeight = alignedHeight; 133 134 // The format and size is dependent on chroma format and bit depth 135 if (m_basicFeature->m_bitDepth >= 12) 136 { 137 ENCODE_ASSERTMESSAGE("Bit depth should be smaller than 12."); 138 return MOS_STATUS_INVALID_PARAMETER; 139 } 140 141 if (HCP_CHROMA_FORMAT_YUV420 == m_basicFeature->m_chromaFormat) 142 { 143 if (10 == m_basicFeature->m_bitDepth) 144 { 145 if (m_mmcEnabled) 146 { 147 allocParamsForBuffer2D.dwWidth = alignedWidth * 2; 148 } 149 else 150 { 151 allocParamsForBuffer2D.Format = Format_P010; 152 } 153 } 154 } 155 else if (HCP_CHROMA_FORMAT_YUV444 == m_basicFeature->m_chromaFormat) 156 { 157 if (8 == m_basicFeature->m_bitDepth) 158 { 159 allocParamsForBuffer2D.Format = Format_AYUV; 160 allocParamsForBuffer2D.dwWidth = MOS_ALIGN_CEIL(alignedWidth, 512 / 4); 161 allocParamsForBuffer2D.dwHeight = MOS_ALIGN_CEIL(alignedHeight * 3 / 4, 8); 162 } 163 else 164 { 165 allocParamsForBuffer2D.Format = Format_Y410; 166 allocParamsForBuffer2D.dwWidth = MOS_ALIGN_CEIL(alignedWidth, 256 / 4); 167 allocParamsForBuffer2D.dwHeight = MOS_ALIGN_CEIL(alignedHeight * 3 / 2, 8); 168 } 169 } 170 else 171 { 172 ENCODE_ASSERTMESSAGE("4:2:2 is not supported for SCC feature!"); 173 eStatus = MOS_STATUS_INVALID_PARAMETER; 174 return eStatus; 175 } 176 177 if (m_mmcEnabled && IsCompressFlagNeeded()) 178 { 179 allocParamsForBuffer2D.bIsCompressible = true; 180 allocParamsForBuffer2D.CompressionMode = MOS_MMC_MC; 181 } 182 allocParamsForBuffer2D.ResUsageType = MOS_HW_RESOURCE_USAGE_ENCODE_INTERNAL_READ_WRITE_CACHE; 183 ENCODE_CHK_STATUS_MESSAGE_RETURN(m_osInterface->pfnAllocateResource( 184 m_osInterface, 185 &allocParamsForBuffer2D, 186 &m_vdencRecNotFilteredBuffer), 187 "Failed to allocate Recon not filtered surface for IBC"); 188 189 // Allocate the palette mode stream out surface here 190 // Checking the size now, will add once it is clarified 191 return eStatus; 192 } 193 FreeEncResources()194 MOS_STATUS HevcVdencScc::FreeEncResources() 195 { 196 ENCODE_FUNC_CALL(); 197 ENCODE_CHK_NULL_RETURN(m_osInterface); 198 m_osInterface->pfnFreeResource(m_osInterface, &m_vdencRecNotFilteredBuffer); 199 return MOS_STATUS_SUCCESS; 200 } 201 SetHucBrcUpdateDmem(void * hucVdencBrcUpdateDmem)202 MOS_STATUS HevcVdencScc::SetHucBrcUpdateDmem(void* hucVdencBrcUpdateDmem) 203 { 204 ENCODE_FUNC_CALL(); 205 206 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 207 VdencHevcHucBrcUpdateDmem *phucVdencBrcUpdateDmem = (VdencHevcHucBrcUpdateDmem *)hucVdencBrcUpdateDmem; 208 ENCODE_CHK_NULL_RETURN(hucVdencBrcUpdateDmem); 209 // SCC is in conflict with PAK only pass 210 if (m_enableSCC) 211 { 212 phucVdencBrcUpdateDmem->ReEncodePositiveQPDeltaThr_S8 = 0; 213 phucVdencBrcUpdateDmem->ReEncodeNegativeQPDeltaThr_S8 = 0; 214 } 215 216 return eStatus; 217 } 218 SetRecNotFilteredID(unsigned char & slotForRecNotFiltered)219 MOS_STATUS HevcVdencScc::SetRecNotFilteredID(unsigned char &slotForRecNotFiltered) 220 { 221 ENCODE_FUNC_CALL(); 222 slotForRecNotFiltered = m_slotForRecNotFiltered; 223 return MOS_STATUS_SUCCESS; 224 } 225 MHW_SETPAR_DECL_SRC(VDENC_PIPE_MODE_SELECT,HevcVdencScc)226 MHW_SETPAR_DECL_SRC(VDENC_PIPE_MODE_SELECT, HevcVdencScc) 227 { 228 if (m_enableSCC) 229 { 230 params.pakObjCmdStreamOut = false; 231 } 232 233 return MOS_STATUS_SUCCESS; 234 } 235 MHW_SETPAR_DECL_SRC(VDENC_PIPE_BUF_ADDR_STATE,HevcVdencScc)236 MHW_SETPAR_DECL_SRC(VDENC_PIPE_BUF_ADDR_STATE, HevcVdencScc) 237 { 238 ENCODE_FUNC_CALL(); 239 240 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 241 ENCODE_CHK_NULL_RETURN(hevcFeature); 242 243 // Set up the recon not filtered surface for IBC 244 if (m_enableSCC && 245 hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag) 246 { 247 if (m_slotForRecNotFiltered >= CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC) 248 { 249 return MOS_STATUS_INVALID_PARAMETER; 250 } 251 252 unsigned int i; 253 254 for (i = 0; i < CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC; i++) 255 { 256 if (params.refs[i] == nullptr) 257 { 258 break; 259 } 260 } 261 if (i >= CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC) 262 { 263 ENCODE_ASSERTMESSAGE("Find no available slot."); 264 return MOS_STATUS_INVALID_PARAMETER; 265 } 266 267 int j; 268 for (j = i; j >= 0; j--) 269 { 270 if (j > m_slotForRecNotFiltered) 271 { 272 if (j >= 1) 273 { 274 params.refs[j] = params.refs[j - 1]; 275 params.refsDsStage2[j] = params.refsDsStage2[j - 1]; 276 params.refsDsStage1[j] = params.refsDsStage1[j - 1]; 277 } 278 } 279 else if (j == m_slotForRecNotFiltered) 280 { 281 params.refs[j] = const_cast<MOS_RESOURCE *>(& m_vdencRecNotFilteredBuffer); 282 params.refsDsStage2[j] = nullptr; 283 params.refsDsStage1[j] = nullptr; 284 } 285 else if (j < m_slotForRecNotFiltered) 286 { 287 break; 288 } 289 } 290 291 params.numActiveRefL0 += 1; 292 params.mmcSkipMask = (1 << m_slotForRecNotFiltered); 293 } 294 return MOS_STATUS_SUCCESS; 295 } 296 MHW_SETPAR_DECL_SRC(VDENC_CMD2,HevcVdencScc)297 MHW_SETPAR_DECL_SRC(VDENC_CMD2, HevcVdencScc) 298 { 299 ENCODE_FUNC_CALL(); 300 301 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 302 ENCODE_CHK_NULL_RETURN(hevcFeature); 303 304 if (hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag) 305 { 306 if (hevcFeature->m_hevcPicParams->CodingType == I_TYPE) 307 { 308 params.frameIdxL0Ref0 = m_slotForRecNotFiltered; 309 } 310 else 311 { 312 if (hevcFeature->m_hevcSliceParams->num_ref_idx_l0_active_minus1 == 0) 313 { 314 params.frameIdxL0Ref1 = m_slotForRecNotFiltered; 315 } 316 else if (hevcFeature->m_hevcSliceParams->num_ref_idx_l0_active_minus1 == 1) 317 { 318 params.frameIdxL0Ref2 = m_slotForRecNotFiltered; 319 } 320 else if (hevcFeature->m_hevcSliceParams->num_ref_idx_l0_active_minus1 == 2) 321 { 322 params.frameIdxL1Ref0 = m_slotForRecNotFiltered; 323 } 324 } 325 } 326 327 return MOS_STATUS_SUCCESS; 328 } 329 MHW_SETPAR_DECL_SRC(HCP_PIC_STATE,HevcVdencScc)330 MHW_SETPAR_DECL_SRC(HCP_PIC_STATE, HevcVdencScc) 331 { 332 ENCODE_FUNC_CALL(); 333 334 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 335 ENCODE_CHK_NULL_RETURN(hevcFeature); 336 PCODEC_HEVC_ENCODE_SEQUENCE_PARAMS hevcSeqParams = hevcFeature->m_hevcSeqParams; 337 ENCODE_CHK_NULL_RETURN(hevcSeqParams); 338 PCODEC_HEVC_ENCODE_PICTURE_PARAMS hevcPicParams = hevcFeature->m_hevcPicParams; 339 ENCODE_CHK_NULL_RETURN(hevcPicParams); 340 341 params.intraBoundaryFilteringDisabledFlag = hevcSeqParams->intra_boundary_filtering_disabled_flag; 342 params.motionVectorResolutionControlIdc = (uint8_t)hevcSeqParams->motion_vector_resolution_control_idc; 343 params.ppsCurrPicRefEnabledFlag = hevcPicParams->pps_curr_pic_ref_enabled_flag; 344 params.ibcMotionCompensationBufferReferenceIdc = m_slotForRecNotFiltered; 345 params.ibcConfiguration = hevcPicParams->pps_curr_pic_ref_enabled_flag ? (m_enableLBCOnly ? 0x2 : 0x3) : 0; 346 params.paletteModeEnabledFlag = hevcSeqParams->palette_mode_enabled_flag; 347 params.paletteMaxSize = hevcSeqParams->palette_mode_enabled_flag ? 64 : 0; 348 params.deltaPaletteMaxPredictorSize = hevcSeqParams->palette_mode_enabled_flag ? 32 : 0; 349 params.lumaBitDepthEntryMinus8 = hevcSeqParams->bit_depth_luma_minus8; 350 params.chromaBitDepthEntryMinus8 = hevcSeqParams->bit_depth_chroma_minus8; 351 352 return MOS_STATUS_SUCCESS; 353 } 354 MHW_SETPAR_DECL_SRC(HCP_PIPE_BUF_ADDR_STATE,HevcVdencScc)355 MHW_SETPAR_DECL_SRC(HCP_PIPE_BUF_ADDR_STATE, HevcVdencScc) 356 { 357 ENCODE_FUNC_CALL(); 358 359 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 360 ENCODE_CHK_NULL_RETURN(hevcFeature); 361 362 // Set up the recon not filtered surface for IBC 363 if (m_enableSCC && 364 hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag) 365 { 366 if (m_slotForRecNotFiltered >= CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC) 367 { 368 return MOS_STATUS_INVALID_PARAMETER; 369 } 370 params.presReferences[m_slotForRecNotFiltered] = const_cast<PMOS_RESOURCE>(&m_vdencRecNotFilteredBuffer); 371 params.bIBCEnabled = true; 372 } 373 374 return MOS_STATUS_SUCCESS; 375 } 376 MHW_SETPAR_DECL_SRC(HCP_SURFACE_STATE,HevcVdencScc)377 MHW_SETPAR_DECL_SRC(HCP_SURFACE_STATE, HevcVdencScc) 378 { 379 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 380 ENCODE_CHK_NULL_RETURN(hevcFeature); 381 382 if (m_enableSCC && hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag 383 && CODECHAL_HCP_REF_SURFACE_ID == params.surfaceStateId) 384 { 385 ENCODE_CHK_STATUS_RETURN(hevcFeature->m_ref.SetSlotForRecNotFiltered(const_cast<unsigned char &> (m_slotForRecNotFiltered))); 386 387 params.mmcSkipMask = (1 << m_slotForRecNotFiltered); 388 } 389 return MOS_STATUS_SUCCESS; 390 } 391 MHW_SETPAR_DECL_SRC(HCP_REF_IDX_STATE,HevcVdencScc)392 MHW_SETPAR_DECL_SRC(HCP_REF_IDX_STATE, HevcVdencScc) 393 { 394 ENCODE_FUNC_CALL(); 395 396 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 397 ENCODE_CHK_NULL_RETURN(hevcFeature); 398 399 // For IBC 400 if (hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag) 401 { 402 uint8_t ucNumRefForList = 0; 403 MHW_ASSERT(m_slotForRecNotFiltered < CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC); 404 params.numRefIdxLRefpiclistnumActiveMinus1++; 405 ucNumRefForList = params.numRefIdxLRefpiclistnumActiveMinus1; 406 407 if ((hevcFeature->m_hevcPicParams->CodingType == I_TYPE) && (hevcFeature->m_hevcSliceParams->slice_type == mhw::vdbox::hcp::hevcSliceP)) 408 { 409 ucNumRefForList = 0; 410 params.numRefIdxLRefpiclistnumActiveMinus1 = 0; 411 } 412 413 params.listEntryLxReferencePictureFrameIdRefaddr07[ucNumRefForList] = m_slotForRecNotFiltered; 414 params.referencePictureTbValue[ucNumRefForList] = 0; 415 params.longtermreference[ucNumRefForList] = true; 416 params.fieldPicFlag[ucNumRefForList] = 0; 417 params.bottomFieldFlag[ucNumRefForList] = 0; 418 } 419 return MOS_STATUS_SUCCESS; 420 } 421 MHW_SETPAR_DECL_SRC(VDENC_HEVC_VP9_TILE_SLICE_STATE,HevcVdencScc)422 MHW_SETPAR_DECL_SRC(VDENC_HEVC_VP9_TILE_SLICE_STATE, HevcVdencScc) 423 { 424 auto hevcFeature = dynamic_cast<HevcBasicFeature *>(m_basicFeature); 425 ENCODE_CHK_NULL_RETURN(hevcFeature); 426 427 uint32_t IbcControl = 0; 428 if (hevcFeature->m_hevcPicParams->pps_curr_pic_ref_enabled_flag) 429 { 430 IbcControl = m_enableLBCOnly ? 1 : 3; 431 } 432 else 433 { 434 IbcControl = 0; 435 } 436 uint32_t PaletteModeEnable = (hevcFeature->m_hevcSeqParams->palette_mode_enabled_flag != 0) ? 1 : 0; 437 uint32_t SliceQP = hevcFeature->m_hevcPicParams->QpY + hevcFeature->m_hevcSliceParams->slice_qp_delta; 438 uint32_t BitDepthLumaMinus8 = hevcFeature->m_hevcSeqParams->bit_depth_luma_minus8; 439 uint8_t TargetUsage = hevcFeature->m_hevcSeqParams->TargetUsage; 440 441 params.VdencHEVCVP9TileSlicePar0 = 0; 442 params.ibcControl = IbcControl; 443 444 params.paletteModeEnable = PaletteModeEnable; 445 params.VdencHEVCVP9TileSlicePar1 = 1; 446 447 MHW_ASSERT(params.VdencHEVCVP9TileSlicePar1 < 3); 448 uint32_t tableIdx; 449 if (SliceQP <= 12) 450 { 451 tableIdx = 0; 452 } 453 else if (SliceQP > 12 && SliceQP <= 17) 454 { 455 tableIdx = 1; 456 } 457 else if (SliceQP > 17 && SliceQP <= 22) 458 { 459 tableIdx = 2; 460 } 461 else if (SliceQP > 22 && SliceQP <= 27) 462 { 463 tableIdx = 3; 464 } 465 else if (SliceQP > 27 && SliceQP <= 32) 466 { 467 tableIdx = 4; 468 } 469 else if (SliceQP > 32 && SliceQP <= 37) 470 { 471 tableIdx = 5; 472 } 473 else if (SliceQP > 37 && SliceQP <= 42) 474 { 475 tableIdx = 6; 476 } 477 else if (SliceQP > 42 && SliceQP <= 47) 478 { 479 tableIdx = 7; 480 } 481 else if (SliceQP > 47 && SliceQP <= 49) 482 { 483 tableIdx = 8; 484 } 485 else 486 { 487 tableIdx = 9; 488 } 489 490 static const uint32_t table[3][10][11] = 491 { 492 { 493 {16, 16, 2, 4, 10, 16, 128, 1, 1, 1, 4}, 494 {16, 16, 2, 4, 10, 16, 128, 1, 1, 1, 4}, 495 {16, 16, 2, 4, 10, 16, 128, 1, 1, 1, 4}, 496 {16, 16, 4, 8, 10, 12, 128, 2, 1, 1, 4}, 497 {32, 32, 8, 4, 10, 4, 128, 2, 2, 1, 4}, 498 {48, 32, 12, 6, 16, 4, 128, 2, 2, 1, 4}, 499 {64, 64, 12, 6, 24, 1, 128, 2, 2, 1, 4}, 500 {96, 64, 12, 6, 24, 1, 128, 2, 3, 1, 4}, 501 {128, 64, 16, 12, 32, 1, 128, 2, 6, 1, 4}, 502 {256, 48, 24, 6, 48, 1, 128, 3, 8, 1, 4}, 503 }, 504 { 505 {16, 16, 2, 4, 10, 16, 128, 1, 1, 1, 4}, 506 {16, 16, 2, 4, 10, 16, 128, 1, 1, 1, 4}, 507 {16, 16, 2, 4, 10, 16, 128, 1, 1, 1, 4}, 508 {16, 16, 4, 8, 10, 12, 128, 2, 1, 1, 4}, 509 {32, 32, 8, 4, 10, 4, 128, 2, 2, 1, 4}, 510 {48, 32, 12, 6, 16, 4, 128, 2, 2, 1, 4}, 511 {64, 63, 12, 6, 24, 1, 128, 2, 2, 1, 4}, 512 {96, 63, 12, 6, 24, 1, 128, 2, 3, 1, 4}, 513 {128, 63, 16, 12, 32, 1, 128, 2, 6, 1, 4}, 514 {256, 48, 24, 6, 48, 1, 128, 3, 8, 1, 4}, 515 }, 516 { 517 {256, 24, 4, 4, 12, 8, 128, 2, 1, 1, 4}, 518 {256, 32, 4, 4, 12, 8, 128, 2, 1, 1, 4}, 519 {256, 32, 4, 4, 16, 8, 128, 2, 1, 1, 4}, 520 {256, 32, 8, 4, 16, 8, 128, 2, 1, 1, 4}, 521 {256, 32, 8, 4, 32, 4, 128, 3, 1, 1, 4}, 522 {768, 32, 8, 4, 32, 4, 128, 3, 1, 1, 4}, 523 {768, 128, 32, 8, 64, 1, 128, 3, 4, 1, 4}, 524 {768, 128, 48, 8, 128, 1, 128, 3, 12, 1, 4}, 525 {768, 128, 48, 8, 128, 1, 128, 3, 24, 1, 4}, 526 {768, 128, 64, 8, 128, 1, 128, 4, 32, 0, 4}, 527 }, 528 }; 529 530 params.VdencHEVCVP9TileSlicePar14 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][0]; 531 params.VdencHEVCVP9TileSlicePar8 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][1]; 532 params.VdencHEVCVP9TileSlicePar6 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][2]; 533 params.VdencHEVCVP9TileSlicePar9 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][3]; 534 params.VdencHEVCVP9TileSlicePar7 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][4]; 535 params.VdencHEVCVP9TileSlicePar10 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][5]; 536 537 params.VdencHEVCVP9TileSlicePar5 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][7]; 538 params.VdencHEVCVP9TileSlicePar2 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][8]; 539 params.VdencHEVCVP9TileSlicePar3 = table[params.VdencHEVCVP9TileSlicePar1][tableIdx][9]; 540 params.VdencHEVCVP9TileSlicePar15 = 0; 541 542 if (BitDepthLumaMinus8 > 0 && PaletteModeEnable) 543 { 544 uint32_t shift = BitDepthLumaMinus8; 545 params.VdencHEVCVP9TileSlicePar5 += shift; 546 params.VdencHEVCVP9TileSlicePar6 <<= shift; 547 params.VdencHEVCVP9TileSlicePar7 <<= shift; 548 if (params.VdencHEVCVP9TileSlicePar14 >= 256) 549 { 550 params.VdencHEVCVP9TileSlicePar14 = 255; 551 } 552 params.VdencHEVCVP9TileSlicePar14 <<= shift; 553 } 554 555 params.VdencHEVCVP9TileSlicePar4 = 0; // Default value in C model 556 557 params.VdencHEVCVP9TileSlicePar11 = 1; // Default in C model 558 params.VdencHEVCVP9TileSlicePar12 = 72; // Default in C model 559 params.VdencHEVCVP9TileSlicePar13 = 2; // Default in C model 560 561 params.VdencHEVCVP9TileSlicePar16[2] = 1; // Default in C model 562 params.VdencHEVCVP9TileSlicePar16[1] = 0; // Default in C model 563 params.VdencHEVCVP9TileSlicePar16[0] = 1; // Default in C model 564 // According to HW team, disable it with setting to 0 when RTL is not ready 565 params.VdencHEVCVP9TileSlicePar23 = 6; // Default in C model 566 567 if (TargetUsage == 7) 568 { 569 params.VdencHEVCVP9TileSlicePar17[2] = 49; 570 params.VdencHEVCVP9TileSlicePar17[1] = 49; 571 params.VdencHEVCVP9TileSlicePar17[0] = 49; 572 } 573 else 574 { 575 params.VdencHEVCVP9TileSlicePar17[2] = 63; 576 params.VdencHEVCVP9TileSlicePar17[1] = 63; 577 params.VdencHEVCVP9TileSlicePar17[0] = 63; 578 } 579 580 return MOS_STATUS_SUCCESS; 581 } 582 } // namespace encode 583