xref: /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen12/hw/mhw_sfc_g12_X.h (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*
2 * Copyright (c) 2015-2020, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file     mhw_sfc_g12_X.h
24 //! \brief    Defines functions for constructing sfc commands on Gen12-based platforms
25 //!
26 
27 #ifndef __MHW_SFC_G12_X_H__
28 #define __MHW_SFC_G12_X_H__
29 
30 #include "mhw_sfc_generic.h"
31 #include "mhw_sfc_hwcmd_g12_X.h"
32 #include "mhw_utilities.h"
33 #include "mos_os.h"
34 #include "mhw_mi_g12_X.h"
35 
36 static const int   MHW_SFC_MAX_WIDTH_G12  = 16 * 1024;
37 static const int   MHW_SFC_MAX_HEIGHT_G12 = 16 * 1024;
38 
39 struct MHW_SFC_STATE_PARAMS_G12: public MHW_SFC_STATE_PARAMS
40 {
41     // HCP-SFC pipe only for scalability and more input/output color format
42     uint32_t                        engineMode;                                 //!< 0 - single, 1 - left most column, 2 - right most column, 3 - middle column
43     uint32_t                        inputBitDepth;                              //!< 0 - 8bit, 1 - 10bit, 2 - 12bit
44     uint32_t                        tileType;                                   //!< virtual tile = 1, another tile = 0
45     uint32_t                        srcStartX;                                  //!< Source surface column horizontal start position in pixel
46     uint32_t                        srcEndX;                                    //!< Source surface column horizontal end position in pixel
47     uint32_t                        dstStartX;                                  //!< Destination surface column horizontal start position in pixel
48     uint32_t                        dstEndX;                                    //!< Destination surface column horizontal end position in pixel
49 
50     // Histogram stream out
51     PMOS_SURFACE                    histogramSurface;                    //!< Histogram stream out buffer
52     // Row Store and Column Store Scratch buffer
53     PMOS_RESOURCE                   resAvsLineBuffer;                        // AVS Row Store buffer used by SFC
54     PMOS_RESOURCE                   resIefLineBuffer;                        // IEF Row Store buffer used by SFC
55     PMOS_RESOURCE                   resSfdLineBuffer;                        // SFD Row Store buffer used by SFC
56     PMOS_RESOURCE                   resAvsLineTileBuffer;                    // AVS Column Store buffer used by SFC
57     PMOS_RESOURCE                   resIefLineTileBuffer;                    // IEF Column Store buffer used by SFC
58     PMOS_RESOURCE                   resSfdLineTileBuffer;                    // SFD Column Store buffer used by SFC
59 };
60 using PMHW_SFC_STATE_PARAMS_G12 = MHW_SFC_STATE_PARAMS_G12*;
61 
62 class MhwSfcInterfaceG12 : public MhwSfcInterfaceGeneric<mhw_sfc_g12_X>
63 {
64 public:
65     MhwSfcInterfaceG12(PMOS_INTERFACE pOsInterface);
66 
~MhwSfcInterfaceG12()67     virtual ~MhwSfcInterfaceG12()
68     {
69 
70     }
71 
72     MOS_STATUS AddSfcLock(
73         PMOS_COMMAND_BUFFER            pCmdBuffer,
74         PMHW_SFC_LOCK_PARAMS           pSfcLockParams);
75 
76     MOS_STATUS AddSfcState(
77         PMOS_COMMAND_BUFFER            pCmdBuffer,
78         PMHW_SFC_STATE_PARAMS          pSfcStateParams,
79         PMHW_SFC_OUT_SURFACE_PARAMS    pOutSurface);
80 
81     MOS_STATUS AddSfcAvsState(
82         PMOS_COMMAND_BUFFER            pCmdBuffer,
83         PMHW_SFC_AVS_STATE             pSfcAvsState);
84 
85     MOS_STATUS AddSfcFrameStart(
86         PMOS_COMMAND_BUFFER            pCmdBuffer,
87         uint8_t                        sfcPipeMode);
88 
89     MOS_STATUS AddSfcIefState(
90         PMOS_COMMAND_BUFFER            pCmdBuffer,
91         PMHW_SFC_IEF_STATE_PARAMS      pSfcIefStateParams);
92 
93     MOS_STATUS AddSfcAvsChromaTable(
94         PMOS_COMMAND_BUFFER             pCmdBuffer,
95         PMHW_SFC_AVS_CHROMA_TABLE       pChromaTable);
96 
97     MOS_STATUS AddSfcAvsLumaTable(
98         PMOS_COMMAND_BUFFER             pCmdBuffer,
99         PMHW_SFC_AVS_LUMA_TABLE         pLumaTable);
100 
101     MOS_STATUS SetSfcSamplerTable(
102         PMHW_SFC_AVS_LUMA_TABLE         pLumaTable,
103         PMHW_SFC_AVS_CHROMA_TABLE       pChromaTable,
104         PMHW_AVS_PARAMS                 pAvsParams,
105         MOS_FORMAT                      SrcFormat,
106         float                           fScaleX,
107         float                           fScaleY,
108         uint32_t                        dwChromaSiting,
109         bool                            bUse8x8Filter,
110         float                           fHPStrength,
111         float                           fLanczosT);
112 
113     //!
114     //! \brief      get Output centering wheter enable
115     //! \param      [in] inputEnable
116     //!             wheter enable the Output center.
117     //! \return     void
118     //!
119     void IsOutPutCenterEnable(
120         bool                            inputEnable);
121 public:
122     enum SFC_PIPE_MODE_G12
123     {
124         SFC_PIPE_MODE_HCP = 2
125     };
126 
127     enum VD_VE_ORDER_MODE
128     {
129         LCU_16_16_HEVC = 0,
130         LCU_32_32_HEVC = 1,
131         LCU_64_64_HEVC = 2,
132         LCU_64_64_VP9 =  3 // should use 3 for VP9
133     };
134 
135     #define PATCH_LIST_COMMAND(x) (x##_NUMBER_OF_ADDRESSES)
136     enum CommandsNumberOfAddresses
137     {
138         SFC_STATE_CMD_NUMBER_OF_ADDRESSES                  = 8,
139         SFC_AVS_LUMA_Coeff_Table_CMD_NUMBER_OF_ADDRESSES   = 0,
140         SFC_AVS_CHROMA_Coeff_Table_CMD_NUMBER_OF_ADDRESSES = 0,
141         SFC_AVS_STATE_CMD_NUMBER_OF_ADDRESSES              = 0,
142         SFC_FRAME_START_CMD_NUMBER_OF_ADDRESSES            = 0,
143         SFC_IEF_STATE_CMD_NUMBER_OF_ADDRESSES              = 0,
144         SFC_LOCK_CMD_NUMBER_OF_ADDRESSES                   = 0,
145     };
146 
147 protected:
148     bool m_outputCenteringEnable = true;
149 };
150 #endif // __MHW_SFC_G12_X_H__
151