1 /* 2 * Copyright (c) 2021, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_state_heap_xe2_hpg.h 24 //! \brief This modules implements HW interface layer to be used on all platforms on 25 //! all operating systems/DDIs, across MHW components. 26 //! 27 28 #ifndef __mhw_state_heap_xe2_hpg_H__ 29 #define __mhw_state_heap_xe2_hpg_H__ 30 31 #include "mhw_state_heap_generic.h" 32 #include "mhw_state_heap_hwcmd_xe2_hpg.h" 33 34 struct MHW_STATE_HEAP_INTERFACE_XE2_HPG : public MHW_STATE_HEAP_INTERFACE_GENERIC<mhw_state_heap_xe2_hpg> 35 { 36 37 private: 38 uint16_t m_wSizeOfInterfaceDescriptor; 39 uint32_t m_dwSizeSurfaceState; 40 uint32_t m_dwSizeSurfaceStateAdv; 41 42 public: 43 MHW_STATE_HEAP_INTERFACE_XE2_HPG(PMOS_INTERFACE pInputOSInterface, int8_t bDynamicMode); 44 45 ~MHW_STATE_HEAP_INTERFACE_XE2_HPG(); 46 47 MOS_STATUS SetInterfaceDescriptorEntry( 48 PMHW_ID_ENTRY_PARAMS pParams); 49 50 MOS_STATUS AddInterfaceDescriptorData( 51 PMHW_ID_ENTRY_PARAMS pParams); 52 53 MOS_STATUS SetSurfaceStateEntry( 54 PMHW_SURFACE_STATE_PARAMS pParams); 55 56 MOS_STATUS SetSurfaceState( 57 PMHW_KERNEL_STATE pKernelState, 58 PMOS_COMMAND_BUFFER pCmdBuffer, 59 uint32_t dwNumSurfaceStatesToSet, 60 PMHW_RCS_SURFACE_PARAMS pParams); 61 62 MOS_STATUS SetSamplerState( 63 void *pSampler, 64 PMHW_SAMPLER_STATE_PARAM pParam); 65 66 MOS_STATUS AddSamplerStateData( 67 uint32_t samplerOffset, 68 MemoryBlock *memoryBlock, 69 PMHW_SAMPLER_STATE_PARAM pParam); 70 71 MOS_STATUS InitSamplerStates( 72 void *pSamplerStates, 73 int32_t iSamplers); 74 75 MOS_STATUS LoadSamplerAvsTable( 76 void *pTable, 77 PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam); 78 79 MOS_STATUS InitHwSizes(); 80 81 MOS_STATUS SetInterfaceDescriptor( 82 uint32_t dwNumIdsToSet, 83 PMHW_INTERFACE_DESCRIPTOR_PARAMS pParams); 84 85 MOS_STATUS SetMissingShaderChannels( 86 mhw_state_heap_xe2_hpg::RENDER_SURFACE_STATE_CMD *pSurfaceState, 87 uint32_t dwFormat); 88 89 }; 90 #endif