xref: /aosp_15_r20/external/intel-media-driver/media_common/agnostic/common/hw/mhw_vebox.h (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*
2 * Copyright (c) 2014-2022, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file     mhw_vebox.h
24 //! \brief    MHW interface for constructing commands for the VEBOX
25 //! \details  Impelements the functionalities common across all platforms for MHW_VEBOX
26 //!
27 
28 #ifndef __MHW_VEBOX_H__
29 #define __MHW_VEBOX_H__
30 
31 #include "mos_os.h"
32 #include "mhw_utilities.h"
33 #include "mhw_cp_interface.h"
34 #include "mhw_mi.h"
35 #include <math.h>
36 
37 #define MHW_FORWARD_GAMMA_SEGMENT_COUNT       1024    //!< Forward Gamma Correction MAX Control Points
38 
39 //!
40 //! \brief  VEBOX constants
41 //!
42 #define MHW_VEBOX_MIN_HEIGHT      16
43 #define MHW_VEBOX_MIN_WIDTH       64
44 #define MHW_VEBOX_LINEAR_PITCH    64
45 //!
46 //! \brief  ACE constants
47 //!
48 #define MHW_NUM_ACE_PWLF_COEFF    5
49 
50 //!
51 //! \brief  Vebox DNDI constants
52 //!
53 #define DNDI_HISTORY_INITVALUE                      0xFF
54 
55 //!
56 //! \brief  Vebox Denoise pixel range threshold numbers
57 //!
58 #define MHW_PIXRANGETHRES_NUM     6
59 
60 //!
61 //! \brief  STE Parameters
62 //!
63 #define MHW_STE_OPTIMAL           3  // for perfect HD-HQV Score
64 
65 //!
66 //! \brief  Default size of area for sync, debugging, performance collecting
67 //!
68 #define MHW_SYNC_SIZE   128 // range: (128 ... 4096)
69 
70 //!
71 //! \brief  Default number of media states (Dynamic GSH mode)
72 //!
73 #define MHW_MAX_VEBOX_STATES    16
74 
75 #define MHW_PI                     3.14159265358979324f         //!< Definition the const pi
76 
77 //!
78 //! \def MHW_DEGREE_TO_RADIAN(degree)
79 //! Convert \a degree value to \a radian value.
80 //!
81 #define MHW_DEGREE_TO_RADIAN(degree)   (degree) * (MHW_PI) / 180
82 #define AVS_TBL_COEF_PREC         6           //!< Table coef precision (after decimal point
83 #define SAME_SAMPLE_THRESHOLD     1000        //!< When checking whether 2 timestamps are the same, leave room for some error
84 
85 #define MHW_VEBOX_WATCHDOG_ENABLE_COUNTER                 0x0
86 #define MHW_VEBOX_WATCHDOG_DISABLE_COUNTER                0xFFFFFFFF
87 #define MHW_VEBOX_TIMEOUT_MS                              60
88 
89 #define HDR_OETF_1DLUT_POINT_NUMBER                  256
90 #define MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT      1024
91 #define MHW_VEBOX_STARTING_INDEX                     0
92 
93 typedef MhwMiInterface *PMHW_MI_INTERFACE;
94 
95 //!
96 //! \brief Color Spaces enum
97 //!
98 typedef enum _MHW_CSPACE
99 {
100     MHW_CSpace_None     = -5        ,   //!< Unidentified
101     MHW_CSpace_Source   = -4        ,   //!< Current source Color Space
102 
103     // Groups of Color Spaces
104     MHW_CSpace_RGB      = -3        ,   //!< sRGB
105     MHW_CSpace_YUV      = -2        ,   //!< YUV BT601 or BT709 - non xvYCC
106     MHW_CSpace_Gray     = -1        ,   //!< Gray scale image with only Y component
107     MHW_CSpace_Any      =  0        ,   //!< Any
108 
109     // Specific Color Spaces
110     MHW_CSpace_sRGB                 ,   //!< RGB - sRGB       -   RGB[0,255]
111     MHW_CSpace_stRGB                ,   //!< RGB - stRGB      -   RGB[16,235]
112     MHW_CSpace_BT601                ,   //!< YUV BT.601 Y[16,235] UV[16,240]
113     MHW_CSpace_BT601_FullRange      ,   //!< YUV BT.601 Y[0,255]  UV[-128,+127]
114     MHW_CSpace_BT709                ,   //!< YUV BT.709 Y[16,235] UV[16,240]
115     MHW_CSpace_BT709_FullRange      ,   //!< YUV BT.709 Y[0,255]  UV[-128,+127]
116     MHW_CSpace_xvYCC601             ,   //!< xvYCC 601 Y[16,235]  UV[16,240]
117     MHW_CSpace_xvYCC709             ,   //!< xvYCC 709 Y[16,235]  UV[16,240]
118     MHW_CSpace_BT601Gray            ,   //!< BT.601 Y[16,235]
119     MHW_CSpace_BT601Gray_FullRange  ,   //!< BT.601 Y[0,255]
120     MHW_CSpace_BT2020               ,   //!< BT.2020 YUV Limited Range 10bit Y[64, 940] UV[64, 960]
121     MHW_CSpace_BT2020_FullRange     ,   //!< BT.2020 YUV Full Range 10bit [0, 1023]
122     MHW_CSpace_BT2020_RGB           ,   //!< BT.2020 RGB Full Range 10bit [0, 1023]
123     MHW_CSpace_BT2020_stRGB         ,   //!< BT.2020 RGB Studio Range 10bit [64, 940]
124     MHW_CSpace_Count                    //!< Keep this at the end
125 } MHW_CSPACE;
126 C_ASSERT(MHW_CSpace_Count == 15);
127 
128 //!
129 //! \brief Gamut Mode enum
130 //!
131 typedef enum _MHW_GAMUT_MODE
132 {
133     MHW_GAMUT_MODE_NONE,
134     MHW_GAMUT_MODE_BASIC,
135     MHW_GAMUT_MODE_ADVANCED,
136     MHW_GAMUT_MODE_CUSTOMIZED
137 } MHW_GAMUT_MODE;
138 C_ASSERT(MHW_GAMUT_MODE_CUSTOMIZED == 3);
139 
140 //!
141 //! \brief Gamma Values configuration enum
142 //!
143 typedef enum _MHW_GAMMA_VALUE
144 {
145     MHW_GAMMA_1P0 = 0,
146     MHW_GAMMA_2P2,
147     MHW_GAMMA_2P6
148 } MHW_GAMMA_VALUE;
149 C_ASSERT(MHW_GAMMA_2P6 == 2);
150 
151 //!
152 //! \brief  Structure to Vebox Mode
153 //!
154 typedef struct _MHW_VEBOX_MODE
155 {
156     uint32_t    ColorGamutExpansionEnable           : 1;
157     uint32_t    ColorGamutCompressionEnable         : 1;
158     uint32_t    GlobalIECPEnable                    : 1;
159     uint32_t    DNEnable                            : 1;
160     uint32_t    DIEnable                            : 1;
161     uint32_t    DNDIFirstFrame                      : 1;
162     uint32_t    DIOutputFrames                      : 2;
163     uint32_t    PipeSynchronizeDisable              : 1;
164     uint32_t    DemosaicEnable                      : 1;  // Gen8+
165     uint32_t    VignetteEnable                      : 1;  // Gen8+
166     uint32_t    AlphaPlaneEnable                    : 1;
167     uint32_t    HotPixelFilteringEnable             : 1;  // Gen8+
168     uint32_t    SingleSliceVeboxEnable              : 2;  // Gen9+
169     uint32_t    LACECorrectionEnable                : 1;  // Gen9+
170     uint32_t    DisableEncoderStatistics            : 1;  // Gen9+
171     uint32_t    DisableTemporalDenoiseFilter        : 1;  // Gen9+
172     uint32_t    SinglePipeIECPEnable                : 1;  // Gen9+
173     uint32_t    SFCParallelWriteEnable              : 1;  // Gen9+
174     uint32_t    ScalarMode                          : 1;  // Gen10+
175     uint32_t    ForwardGammaCorrectionEnable        : 1;  // Gen9+
176     uint32_t    Hdr1DLutEnable                      : 1;
177     uint32_t    Fp16ModeEnable                      : 1;
178     uint32_t    Hdr1K1DLut                          : 1;
179     uint32_t    GamutExpansionPosition              : 1;
180     uint32_t    EotfPrecision                       : 1;
181     uint32_t    BypassCcm                           : 1;
182     uint32_t    BypassOetf                          : 1;
183     uint32_t                                        : 3; // Reserved
184 } MHW_VEBOX_MODE, *PMHW_VEBOX_MODE;
185 
186 typedef enum _MHW_VEBOX_ADDRESS_SHIFT
187 {
188     MHW_VEBOX_DI_IECP_SHIFT                    = 12,
189 } MHW_VEBOX_ADDRESS_SHIFT;
190 
191 //!
192 //! \brief  Structure to Chroma Sampling to handle VEBOX_STATE_CMD Command
193 //!
194 typedef struct _MHW_VEBOX_CHROMA_SAMPLING
195 {
196     uint32_t    ChromaUpsamplingCoSitedHorizontalOffset     : 2;
197     uint32_t    ChromaUpsamplingCoSitedVerticalOffset       : 3;
198     uint32_t    ChromaDownsamplingCoSitedHorizontalOffset   : 2;
199     uint32_t    ChromaDownsamplingCoSitedVerticalOffset     : 3;
200     uint32_t    BypassChromaUpsampling                      : 1;
201     uint32_t    BypassChromaDownsampling                    : 1;
202     uint32_t                                                : 20; // Reserved
203 } MHW_VEBOX_CHROMA_SAMPLING, *PMHW_VEBOX_CHROMA_SAMPLING;
204 
205 typedef struct _MHW_VEBOX_3D_LUT
206 {
207     uint32_t    ArbitrationPriorityControl                  : 2;
208     uint32_t    Lut3dEnable                                 : 1;
209     uint32_t    Lut3dSize                                   : 2;
210     uint32_t    ChannelMappingSwapForLut3D                  : 1;
211     uint32_t    InterpolationMethod                         : 1;
212     uint32_t                                                : 25; // Reserved
213 } MHW_VEBOX_3D_LUT, *PMHW_VEBOX_3D_LUT;
214 
215 typedef struct _MHW_VEBOX_FP16_INPUT
216 {
217     uint32_t VeboxFp16InputEnable                           : 1;
218     uint32_t RgbSwapForFp16Input                            : 1;
219     uint32_t HdrGainFactor                                  : 8;
220     uint32_t                                                : 22;  // Reserved
221 } MHW_VEBOX_FP16_INPUT, *PMHW_VEBOX_FP16_INPUT;
222 
223 //!
224 //! \brief  Structure to handle VEBOX_STATE_CMD Command
225 //!
226 typedef struct _MHW_VEBOX_STATE_CMD_PARAMS
227 {
228     MHW_VEBOX_MODE                      VeboxMode;
229     MHW_VEBOX_CHROMA_SAMPLING           ChromaSampling;
230     MHW_VEBOX_3D_LUT                    LUT3D;
231     MHW_VEBOX_FP16_INPUT                FP16Input;
232     bool                                bUseVeboxHeapKernelResource;
233     PMOS_RESOURCE                       pLaceLookUpTables;
234     PMOS_RESOURCE                       pVeboxParamSurf;
235     PMOS_RESOURCE                       pVebox3DLookUpTables;
236     PMOS_RESOURCE                       pVebox1DLookUpTables;
237     MOS_RESOURCE                        DummyIecpResource;
238     MHW_MEMORY_OBJECT_CONTROL_PARAMS    LaceLookUpTablesSurfCtrl;
239     MHW_MEMORY_OBJECT_CONTROL_PARAMS    Vebox3DLookUpTablesSurfCtrl;
240     bool                                bNoUseVeboxHeap;
241     bool                                isTlbPrefetchDisable;
242 } MHW_VEBOX_STATE_CMD_PARAMS, *PMHW_VEBOX_STATE_CMD_PARAMS;
243 
244 //!
245 //! \brief  VEBOX DNDI parameters
246 //!
247 typedef struct _MHW_VEBOX_DNDI_PARAMS
248 {
249     // DI and Luma Denoise Params
250     uint32_t  dwDenoiseASDThreshold = 0;
251     uint32_t  dwDenoiseHistoryDelta = 0;
252     uint32_t  dwDenoiseMaximumHistory = 0;
253     uint32_t  dwDenoiseSTADThreshold  = 0;
254     uint32_t  dwDenoiseSCMThreshold   = 0;
255     uint32_t  dwDenoiseMPThreshold    = 0;
256     uint32_t  dwLTDThreshold          = 0;
257     uint32_t  dwTDThreshold           = 0;
258     uint32_t  dwGoodNeighborThreshold = 0;
259     bool      bDNDITopFirst           = false;
260     bool      bProgressiveDN          = false;
261     uint32_t  dwFMDFirstFieldCurrFrame  = 0;
262     uint32_t  dwFMDSecondFieldPrevFrame = 0;
263 
264     // Pixel Range Threshold Array for 5x5 Spatial Filter
265     uint32_t dwPixRangeThreshold[MHW_PIXRANGETHRES_NUM] = {};
266     uint32_t dwPixRangeWeight[MHW_PIXRANGETHRES_NUM]    = {};
267 
268     // Chroma Denoise Params
269     uint32_t  dwHistoryInitUV = 0;
270     uint32_t  dwChromaSTADThreshold = 0;
271     uint32_t  dwChromaLTDThreshold  = 0;
272     uint32_t  dwChromaTDThreshold   = 0;
273     bool      bChromaDNEnable       = false;
274 
275     // Hot Pixel Params
276     uint32_t dwHotPixelThreshold = 0;
277     uint32_t dwHotPixelCount     = 0;
278 
279     // CNL New DI
280     uint32_t  dwLumaTDMWeight   = 0;
281     uint32_t  dwChromaTDMWeight = 0;
282     uint32_t  dwSHCMDelta       = 0;
283     uint32_t  dwSHCMThreshold   = 0;
284     uint32_t  dwSVCMDelta       = 0;
285     uint32_t  dwSVCMThreshold   = 0;
286     bool      bFasterConvergence      = false;
287     bool      bTDMLumaSmallerWindow   = false;
288     bool      bTDMChromaSmallerWindow = false;
289     uint32_t  dwLumaTDMCoringThreshold   = 0;
290     uint32_t  dwChromaTDMCoringThreshold = 0;
291     bool      bBypassDeflickerFilter     = false;
292     bool      bUseSyntheticContentMedian = false;
293     bool      bLocalCheck                = false;
294     bool      bSyntheticContentCheck     = false;
295     bool      bSyntheticFrame            = false;
296     bool      bSCDEnable                 = false;
297     uint32_t  dwDirectionCheckThreshold  = 0;
298     uint32_t  dwTearingLowThreshold      = 0;
299     uint32_t  dwTearingHighThreshold     = 0;
300     uint32_t  dwDiffCheckSlackThreshold  = 0;
301     uint32_t  dwSADWT0                   = 0;
302     uint32_t  dwSADWT1                   = 0;
303     uint32_t  dwSADWT2                   = 0;
304     uint32_t  dwSADWT3                   = 0;
305     uint32_t  dwSADWT4                   = 0;
306     uint32_t  dwSADWT6                   = 0;
307     uint32_t  dwLPFWtLUT0                = 0;
308     uint32_t  dwLPFWtLUT1                = 0;
309     uint32_t  dwLPFWtLUT2                = 0;
310     uint32_t  dwLPFWtLUT3                = 0;
311     uint32_t  dwLPFWtLUT4                = 0;
312     uint32_t  dwLPFWtLUT5                = 0;
313     uint32_t  dwLPFWtLUT6                = 0;
314     uint32_t  dwLPFWtLUT7                = 0;
315 
316     //for SlimIPUDenoise
317     void *    pSystemMem            = nullptr;
318     uint32_t  MemSizeInBytes        = 0;
319     bool      bEnableSlimIPUDenoise = false;
320 
321     // FDFB
322     bool      dndistateforFDFB      = false;
323 } MHW_VEBOX_DNDI_PARAMS, *PMHW_VEBOX_DNDI_PARAMS;
324 
325 //!
326 //! \brief  VEBOX Chroma parameters
327 //!
328 typedef struct _MHW_VEBOX_CHROMA_PARAMS
329 {
330     uint32_t dwPixRangeThresholdChromaU[MHW_PIXRANGETHRES_NUM];
331     uint32_t dwPixRangeWeightChromaU[MHW_PIXRANGETHRES_NUM];
332     uint32_t dwPixRangeThresholdChromaV[MHW_PIXRANGETHRES_NUM];
333     uint32_t dwPixRangeWeightChromaV[MHW_PIXRANGETHRES_NUM];
334     uint32_t dwHotPixelThresholdChromaU;
335     uint32_t dwHotPixelCountChromaU;
336     uint32_t dwHotPixelThresholdChromaV;
337     uint32_t dwHotPixelCountChromaV;
338 } MHW_VEBOX_CHROMA_PARAMS;
339 
340 //!
341 //! Structure MHW_STE_PARAMS
342 //! \brief STE parameters - Skin Tone Enhancement
343 //!
344 typedef struct _MHW_STE_PARAMS
345 {
346     uint32_t            dwSTEFactor;
347     uint32_t            satP1;
348     uint32_t            satS0;
349     uint32_t            satS1;
350 } MHW_STE_PARAMS, *PMHW_STE_PARAMS;
351 
352 
353 //!
354 //! Structure MHW_STD_PARAMS
355 //! \brief STD parameters - Skin Tone Detection
356 //!
357 typedef struct _MHW_STD_PARAMS
358 {
359     uint32_t  paraSizeInBytes;
360     void      *param;
361 } MHW_STD_PARAMS, *PMHW_STD_PARAMS;
362 
363 
364 //!
365 //! Structure MHW_TCC_PARAMS
366 //! \brief TCC parameters - Total Color Control
367 //!
368 typedef struct _MHW_TCC_PARAMS
369 {
370     uint8_t             Red;
371     uint8_t             Green;
372     uint8_t             Blue;
373     uint8_t             Cyan;
374     uint8_t             Magenta;
375     uint8_t             Yellow;
376 } MHW_TCC_PARAMS, *PMHW_TCC_PARAMS;
377 
378 //!
379 //! Structure MHW_LACE_PARAMS
380 //! \brief LACE parameters - Local Adaptive Contrast Enhancement
381 //!
382 typedef struct _MHW_LACE_PARAMS
383 {
384     bool                bSTD;                               // To enable Skin Tone Special handling
385     uint32_t            dwStrength;                         // LACE strength
386     uint16_t            wMinAceLuma;                        // Minimum Luma for which ACE has to be applied
387     uint16_t            wMaxAceLuma;                        // Maximum Luma for which ACE has to be applied
388 } MHW_LACE_PARAMS, *PMHW_LACE_PARAMS;
389 
390 //!
391 //! Structure MHW_COLORPIPE_PARAMS
392 //! \brief IECP Parameters - Color Pipe
393 //!
394 typedef struct _MHW_COLORPIPE_PARAMS
395 {
396     uint32_t            bActive;                    //!< Active or not
397     bool                bEnableACE;
398     bool                bEnableSTE;
399     bool                bEnableSTD;                 // vebox STD alone enabled or not
400     bool                bEnableTCC;
401     bool                bAceLevelChanged;
402     uint32_t            dwAceLevel;
403     uint32_t            dwAceStrength;
404     bool                bEnableLACE;
405     MHW_STE_PARAMS      SteParams;
406     MHW_STD_PARAMS      StdParams;
407     MHW_TCC_PARAMS      TccParams;
408     MHW_LACE_PARAMS     LaceParams;
409 } MHW_COLORPIPE_PARAMS, *PMHW_COLORPIPE_PARAMS;
410 
411 //!
412 //! \brief  Adaptive Contrast Enhancement (ACE) Params
413 //!
414 typedef struct _MHW_ACE_PARAMS
415 {
416     uint32_t bActive;
417     uint16_t wACEPWLF_X[MHW_NUM_ACE_PWLF_COEFF];                                 //  Piece-wise linear function x
418     uint16_t wACEPWLF_Y[MHW_NUM_ACE_PWLF_COEFF];                                 //  Piece-wise linear function y
419     uint16_t wACEPWLF_S[MHW_NUM_ACE_PWLF_COEFF];                                 //  Piece-wise linear function slope
420     uint16_t wACEPWLF_B[MHW_NUM_ACE_PWLF_COEFF];                                 //  Piece-wise linear function bias
421 } MHW_ACE_PARAMS, *PMHW_ACE_PARAMS;
422 
423 //!
424 //! Structure MHW_PROCAMP_PARAMS
425 //! \brief Procamp parameters
426 //!
427 typedef struct _MHW_PROCAMP_PARAMS
428 {
429     uint32_t            bActive;                    //!< Active or not
430     bool                bEnabled;
431     uint32_t            brightness;
432     uint32_t            contrast;
433     uint32_t            sinCS;
434     uint32_t            cosCS;
435 } MHW_PROCAMP_PARAMS, *PMHW_PROCAMP_PARAMS;
436 
437 //!
438 //! Structure MHW_HOTPIXEL_PARAMS
439 //! \brief Hotpixel Parameters
440 //!
441 typedef struct _MHW_HOTPIXEL_PARAMS
442 {
443     uint32_t bActive;
444     uint32_t PixelThreshold;
445     uint32_t PixelCount;
446 } MHW_HOTPIXEL_PARAMS, *PMHW_HOTPIXEL_PARAMS;
447 
448 //!
449 //! Structure MHW_VIGNETTE_PARAMS
450 //! \brief Vignette Parameters
451 //!
452 typedef struct _MHW_VIGNETTE_PARAMS
453 {
454     uint32_t bActive;
455     uint32_t Width;
456     uint32_t Height;
457     uint32_t Stride;
458     uint8_t *pCorrectionMap;
459 } MHW_VIGNETTE_PARAMS, *PMHW_VIGNETTE_PARAMS;
460 
461 //!
462 //! Structure MHW_BLACK_LEVEL_PARAMS
463 //! \brief Black Level Parameters
464 //!
465 typedef struct _MHW_BLACK_LEVEL_PARAMS
466 {
467     uint32_t bActive;
468     uint32_t R;
469     uint32_t G0;
470     uint32_t B;
471     uint32_t G1;
472 } MHW_BLACK_LEVEL_PARAMS, *PMHW_BLACK_LEVEL_PARAMS;
473 
474 //!
475 //! Structure MHW_WB_MODE
476 //! \brief WB Parameters
477 //!
478 typedef enum _MHW_WB_MODE
479 {
480     MHW_WB_NONE,
481     MHW_WB_MANUAL,
482     MHW_WB_AUTO_IMAGE,
483     MHW_WB_COUNT
484 } MHW_WB_MODE;
485 
486 //!
487 //! Structure MHW_3DLUT_INTERPOLATION
488 //! \brief 3DLut interpolation method
489 //!
490 typedef enum _MHW_3DLUT_INTERPOLATION
491 {
492     MHW_3DLUT_INTERPOLATION_TRILINEAR            = 0,   //!< 3DLUT Trilinear interpolation method.
493     MHW_3DLUT_INTERPOLATION_TETRAHEDRAL          = 1    //!< 3DLUT Tetrahedral interpolation method.
494 } MHW_3DLUT_INTERPOLATION;
495 
496 //!
497 //! Structure MHW_WHITE_BALANCE_PARAMS
498 //! \brief White Balance Parameters
499 //!
500 typedef struct _MHW_WHITE_BALANCE_PARAMS
501 {
502     uint32_t        bActive;
503     MHW_WB_MODE     Mode;
504     float           RedCorrection;
505     float           GreenTopCorrection;
506     float           BlueCorrection;
507     float           GreenBottomCorrection;
508 } MHW_WHITE_BALANCE_PARAMS, *PMHW_WHITE_BALANCE_PARAMS;
509 
510 //!
511 //! Structure MHW_COLOR_CORRECTION_PARAMS
512 //! \brief Color Correction Parameters
513 //!
514 typedef struct _MHW_COLOR_CORRECTION_PARAMS
515 {
516     uint32_t bActive;
517     float   CCM[3][3];
518 } MHW_COLOR_CORRECTION_PARAMS, *PMHW_COLOR_CORRECTION_PARAMS;
519 
520 //!
521 //! Structure MHW_FORWARD_GAMMA_SEG
522 //! \brief Forward Gamma  SEG Parameters
523 //!
524 typedef struct _MHW_FORWARD_GAMMA_SEG
525 {
526     uint16_t PixelValue;                                                         //!< SKL+ U16     Range=[0, 65535]
527     uint16_t RedChannelCorrectedValue;                                           //!< SKL+ U16     Range=[0, 65535]
528     uint16_t GreenChannelCorrectedValue;                                         //!< SKL+ U16     Range=[0, 65535]
529     uint16_t BlueChannelCorrectedValue;                                          //!< SKL+ U16     Range=[0, 65535]
530 } MHW_FORWARD_GAMMA_SEG, *PMHW_FORWARD_GAMMA_SEG;
531 
532 //!
533 //! Structure MHW_FWD_GAMMA_PARAMS
534 //! \brief Forward Gamma Parameters
535 //!
536 typedef struct _MHW_FWD_GAMMA_PARAMS
537 {
538     uint32_t                    bActive;
539     MHW_FORWARD_GAMMA_SEG       Segment[MHW_FORWARD_GAMMA_SEGMENT_COUNT];
540 } MHW_FWD_GAMMA_PARAMS, *PMHW_FWD_GAMMA_PARAMS;
541 
542 //!
543 //! Structure MHW_FECSC_PARAMS
544 //! \brief Front End CSC Parameters
545 //!
546 typedef struct _MHW_FECSC_PARAMS
547 {
548     uint32_t bActive;
549     float   PreOffset[3];
550     float   Matrix[3][3];
551     float   PostOffset[3];
552 } MHW_FECSC_PARAMS, *PMHW_FECSC_PARAMS;
553 
554 //!
555 //! Structure MHW_BECSC_PARAMS
556 //! \brief Back End CSC Parameters
557 //!
558 typedef struct _MHW_BECSC_PARAMS
559 {
560     uint32_t bActive;
561     float   PreOffset[3];
562     float   Matrix[3][3];
563     float   PostOffset[3];
564 } MHW_BECSC_PARAMS, *PMHW_BECSC_PARAMS;
565 
566 //!
567 //! Structure MHW_LGCA_PARAMS
568 //! \brief  Geometric Lens Correction and Chorma Aberration  parameters
569 //!
570 typedef struct _MHW_LENS_CORRECTION_PARAMS
571 {
572     uint32_t bActive;                    //!< Active or not
573     float   a[3];                       //!< Array (red, green, blue) of values for "a"
574     float   b[3];                       //!< Array (red, green, blue) of values for "b"
575     float   c[3];                       //!< Array (red, green, blue) of values for "c"
576     float   d[3];                       //!< Array (red, green, blue) of values for "d"
577 } MHW_LENS_CORRECTION_PARAMS, *PMHW_LENS_CORRECTION_PARAMS;
578 
579 //!
580 //! Structure MHW_ICC_COLOR_CONVERSION_PARAMS
581 //! \brief  ICC Color Conversion
582 //!
583 typedef struct _MHW_ICC_COLOR_CONVERSION_PARAMS
584 {
585     uint32_t bActive;                    //!< Active or not
586     uint32_t LUTSize;                    //!< Size (one dimensions) of the LUT
587     uint32_t LUTLength;                  //!< Length of the LUT, in unit of bit
588     uint8_t *pLUT;                       //!< Pointer to the LUT value
589 } MHW_ICC_COLOR_CONVERSION_PARAMS, *PMHW_ICC_COLOR_CONVERSION_PARAMS;
590 
591 typedef struct _MHW_DEBAYER_PARAMS
592 {
593     uint32_t BayerInput;                  //!< 0: MSB (default); 1: LSB
594     uint32_t LSBBayerBitDepth;            //!< 10, 12 or 14 for varies bayer input
595 } MHW_DEBAYER_PARAMS, *PMHW_DEBAYER_PARAMS;
596 
597 //!
598 //! Structure MHW_CAPPIPE_PARAMS
599 //! \brief Capture Pipe Parameters
600 //!
601 typedef struct _MHW_CAPPIPE_PARAMS
602 {
603     uint32_t                        bActive;
604     MHW_HOTPIXEL_PARAMS             HotPixelParams;
605     MHW_VIGNETTE_PARAMS             VignetteParams;
606     MHW_BLACK_LEVEL_PARAMS          BlackLevelParams;
607     MHW_WHITE_BALANCE_PARAMS        WhiteBalanceParams;
608     MHW_COLOR_CORRECTION_PARAMS     ColorCorrectionParams;
609     MHW_FWD_GAMMA_PARAMS            FwdGammaParams;
610     MHW_FECSC_PARAMS                FECSCParams;
611     MHW_BECSC_PARAMS                BECSCParams;
612     MHW_LENS_CORRECTION_PARAMS      LensCorrectionParams;
613     MHW_ICC_COLOR_CONVERSION_PARAMS ICCColorConversionParams;
614     MHW_DEBAYER_PARAMS              DebayerParams;
615 } MHW_CAPPIPE_PARAMS, *PMHW_CAPPIPE_PARAMS;
616 
617 //!
618 //! Structure MHW_3DLUT_PARAMS
619 //! \details No pre-si version for MHW_VEBOX_IECP_PARAMS, just leave it now and handle it later
620 //!
621 typedef struct _MHW_3DLUT_PARAMS
622 {
623     uint32_t                bActive;                    //!< Active or not
624     uint32_t                LUTSize;                    //!< Size (one dimensions) of the LUT
625     uint32_t                LUTLength;                  //!< Length of the LUT, in unit of bit
626     uint8_t                 *pLUT;                      //!< Pointer to the LUT value
627     MHW_3DLUT_INTERPOLATION InterpolationMethod;        //!< Vebox 3DLut interpolation method
628 } MHW_3DLUT_PARAMS, *PMHW_3DLUT_PARAMS;
629 
630 //!
631 //! \brief  VEBOX HDR PARAMS
632 //! \details For CCM settings, move 1DLut to here later
633 typedef struct _MHW_1DLUT_PARAMS
634 {
635     uint32_t bActive;
636     void     *p1DLUT;
637     uint32_t LUTSize;
638     int32_t *pCCM;
639     uint32_t CCMSize;
640 } MHW_1DLUT_PARAMS, *PMHW_1DLUT_PARAMS;
641 
642 //!
643 //! Structure MHW_3DLUT_PARAMS
644 //! \details No pre-si version for MHW_VEBOX_IECP_PARAMS, just leave it now and handle it later
645 //!
646 typedef struct _MHW_FP16_PARAMS
647 {
648     uint32_t                isActive       = false;              //!< Active or not
649     uint32_t                OETFLutY[256]  = {};
650     uint32_t                OETFLutX[256]  = {};
651 } MHW_FP16_PARAMS, *PMHW_FP16_PARAMS;
652 
653 //!
654 //! \brief  VEBOX IECP parameters
655 //!
656 typedef struct _MHW_VEBOX_IECP_PARAMS
657 {
658     MHW_COLORPIPE_PARAMS            ColorPipeParams;
659     MHW_ACE_PARAMS                  AceParams;
660     MHW_PROCAMP_PARAMS              ProcAmpParams;
661     MHW_CAPPIPE_PARAMS              CapPipeParams;
662     MOS_FORMAT                      dstFormat;
663     MOS_FORMAT                      srcFormat;
664     MHW_CSPACE                      ColorSpace;                                 // ColorSpace of the input surface
665 
666     // CSC params
667     bool                            bCSCEnable;                                 // Enable CSC transform
668     float                           *pfCscCoeff;                                // [3x3] CSC Coeff matrix
669     float                           *pfCscInOffset;                             // [3x1] CSC Input Offset matrix
670     float                           *pfCscOutOffset;                            // [3x1] CSC Output Offset matrix
671     bool                            bAlphaEnable;                               // Alpha Enable Param
672     uint16_t                        wAlphaValue;                                // Color Pipe Alpha Value
673 
674     bool                            bAce;
675 
676     MHW_3DLUT_PARAMS                s3DLutParams;
677     MHW_1DLUT_PARAMS                s1DLutParams;
678     MHW_FP16_PARAMS                 fp16Params;
679 
680     // Front End CSC params
681     bool                            bFeCSCEnable;                               // Enable Front End CSC transform
682     float                           *pfFeCscCoeff;                              // [3x3] Front End CSC Coeff matrix
683     float                           *pfFeCscInOffset;                           // [3x1] Front End CSC Input Offset matrix
684     float                           *pfFeCscOutOffset;                          // [3x1] Front End CSC Output Offset matrix
685 
686     // FDFB
687     bool                            iecpstateforFDFB;
688     // CSC via CCM for float 16bit output
689     bool                            bCcmCscEnable;
690 } MHW_VEBOX_IECP_PARAMS, *PMHW_VEBOX_IECP_PARAMS;
691 
692 //!
693 //! \brief  VEBOX CH_DIR_FILTER_COEFFICIENT parameters
694 //!
695 typedef struct _MHW_VEBOX_CH_DIR_FILTER_COEFFICIENT
696 {
697     uint32_t                        FilterCoefficient0;
698     uint32_t                        FilterCoefficient1;
699     uint32_t                        FilterCoefficient2;
700     uint32_t                        FilterCoefficient3;
701     uint32_t                        FilterCoefficient4;
702     uint32_t                        FilterCoefficient5;
703     uint32_t                        FilterCoefficient6;
704     uint32_t                        FilterCoefficient7;
705 } MHW_VEBOX_CH_DIR_FILTER_COEFFICIENT, *PMHW_VEBOX_CH_DIR_FILTER_COEFFICIENT;
706 
707 //!
708 //! \brief  VEBOX Scalar parameters
709 //!
710 typedef struct _MHW_VEBOX_SCALAR_PARAMS
711 {
712     bool                                    bDisableChromaChannelDiagonalInterpolation;
713     MHW_VEBOX_CH_DIR_FILTER_COEFFICIENT     UVChCoefficient0;
714     MHW_VEBOX_CH_DIR_FILTER_COEFFICIENT     UVChCoefficient1;
715     MHW_VEBOX_CH_DIR_FILTER_COEFFICIENT     UVChCoefficient2;
716     MHW_VEBOX_CH_DIR_FILTER_COEFFICIENT     UVChCoefficient3;
717     uint32_t                                dwSADWT0;
718     uint32_t                                dwSADWT1;
719     uint32_t                                dwSADWT2;
720     uint32_t                                dwSADWT3;
721     uint32_t                                dwSADWT4;
722     uint32_t                                dwSADWT5;
723 } MHW_VEBOX_SCALAR_PARAMS, *PMHW_VEBOX_SCALAR_PARAMS;
724 
725 //!
726 //! \brief  VEBOX Gamut parameters
727 //!
728 typedef struct _MHW_VEBOX_GAMUT_PARAMS
729 {
730     MHW_CSPACE                          ColorSpace;                             // ColorSpace of the input surface
731     MHW_CSPACE                          dstColorSpace;                          // ColorSpace of the output surface
732     MOS_FORMAT                          srcFormat;                              // Input surface format
733     MOS_FORMAT                          dstFormat;                              // output surface format
734     // GComp
735     MHW_GAMUT_MODE                      GCompMode;
736     // Basic mode params
737     uint32_t                            GCompBasicMode;
738     int32_t                             iBasicModeScalingFactor;
739     // Advanced mode params
740     int32_t                             iDin;
741     int32_t                             iDinDefault;
742     int32_t                             iDout;
743     int32_t                             iDoutDefault;
744 
745     // GExp
746     MHW_GAMUT_MODE                      GExpMode;
747     uint32_t                            *pFwdGammaBias;
748     uint32_t                            *pInvGammaBias;
749     int32_t                             Matrix[3][3];
750 
751     // Gamma correction
752     bool                                bGammaCorr;
753     MHW_GAMMA_VALUE                     InputGammaValue;
754     MHW_GAMMA_VALUE                     OutputGammaValue;
755 
756     // HDR
757     bool                                bH2S;
758     uint16_t                            uiMaxCLL;
759 
760     // FDFB
761     bool                                gamutstateforFDFB;
762 
763     // Segmentation
764     bool                                bColorBalance;
765 
766 } MHW_VEBOX_GAMUT_PARAMS, *PMHW_VEBOX_GAMUT_PARAMS;
767 
768 //!
769 //! \brief  Structure to handle VEBOX_DI_IECP_CMD Command
770 //!
771 typedef struct _MHW_VEBOX_DI_IECP_CMD_PARAMS
772 {
773     uint32_t                            dwEndingX;
774     uint32_t                            dwStartingX;
775     uint32_t                            dwEndingY;
776     uint32_t                            dwStartingY;
777     uint32_t                            dwCurrInputSurfOffset;
778     uint32_t                            dwPrevInputSurfOffset;
779     uint32_t                            dwCurrOutputSurfOffset;
780     uint32_t                            dwStreamID;                         // Stream ID for input surface
781     uint32_t                            dwStreamIDOutput;                   // Stream ID for output surface
782 
783     PMOS_RESOURCE                       pOsResCurrInput;
784     PMOS_RESOURCE                       pOsResPrevInput;
785     PMOS_RESOURCE                       pOsResStmmInput;
786     PMOS_RESOURCE                       pOsResStmmOutput;
787     PMOS_RESOURCE                       pOsResDenoisedCurrOutput;
788     PMOS_RESOURCE                       pOsResCurrOutput;
789     PMOS_RESOURCE                       pOsResPrevOutput;
790     PMOS_RESOURCE                       pOsResStatisticsOutput;
791     PMOS_RESOURCE                       pOsResAlphaOrVignette;
792     PMOS_RESOURCE                       pOsResLaceOrAceOrRgbHistogram;
793     PMOS_RESOURCE                       pOsResSkinScoreSurface;
794 
795     MHW_MEMORY_OBJECT_CONTROL_PARAMS    CurrInputSurfCtrl;//can be removed after VPHAL moving to new cmd definition
796     MHW_MEMORY_OBJECT_CONTROL_PARAMS    PrevInputSurfCtrl;
797     MHW_MEMORY_OBJECT_CONTROL_PARAMS    StmmInputSurfCtrl;
798     MHW_MEMORY_OBJECT_CONTROL_PARAMS    StmmOutputSurfCtrl;
799     MHW_MEMORY_OBJECT_CONTROL_PARAMS    DenoisedCurrOutputSurfCtrl;
800     MHW_MEMORY_OBJECT_CONTROL_PARAMS    CurrOutputSurfCtrl;
801     MHW_MEMORY_OBJECT_CONTROL_PARAMS    PrevOutputSurfCtrl;
802     MHW_MEMORY_OBJECT_CONTROL_PARAMS    StatisticsOutputSurfCtrl;
803     MHW_MEMORY_OBJECT_CONTROL_PARAMS    AlphaOrVignetteSurfCtrl;
804     MHW_MEMORY_OBJECT_CONTROL_PARAMS    LaceOrAceOrRgbHistogramSurfCtrl;
805     MHW_MEMORY_OBJECT_CONTROL_PARAMS    SkinScoreSurfaceSurfCtrl;
806 
807     MOS_MEMCOMP_STATE                   CurInputSurfMMCState;
808 } MHW_VEBOX_DI_IECP_CMD_PARAMS, *PMHW_VEBOX_DI_IECP_CMD_PARAMS;
809 
810 //!
811 //! \brief  Structure to VEBOX SURFACE PARAMETERS for VEBOX_SURFACE_STATE_CMD Command
812 //!
813 typedef struct _MHW_VEBOX_SURFACE_PARAMS
814 {
815     uint32_t                    bActive             = 0;
816     bool                        bIsCompressed       = false;
817     MOS_FORMAT                  Format              = Format_None;       //!<  Surface format
818     MOS_RESOURCE_MMC_MODE       CompressionMode     = MOS_MMC_DISABLED;  //!<  Surface Compression Mode
819     uint32_t                    dwCompressionFormat = 0;     //!<  Surface Compression Format
820     uint32_t                    dwWidth             = 0;     //!<  Surface width
821     uint32_t                    dwHeight            = 0;     //!<  Surface height
822     uint32_t                    dwPitch             = 0;     //!<  Surface pitch
823     uint32_t                    dwBitDepth          = 0;     //!<  Surface bitdepth
824     uint32_t                    dwStreamID          = 0;     //!<  Surface StreamID
825     uint32_t                    dwYoffset           = 0;     //!<  Surface Yoffset in Vertical
826     uint32_t                    dwUYoffset          = 0;     //!<  Surface Uoffset in Vertical
827     uint32_t                    dwOffset            = 0;     //!<  Surface Offset from Start Point
828     MOS_TILE_TYPE               TileType            = MOS_TILE_X;           //!<  Tile Type
829     MOS_TILE_MODE_GMM           TileModeGMM         = MOS_TILE_LINEAR_GMM;  //!<  Tile Mode from GMM Definition
830     bool                        bGMMTileEnabled     = false;         //!<  GMM defined tile mode flag
831     RECT                        rcSrc               = {0, 0, 0, 0};  //!< Source rectangle
832     RECT                        rcMaxSrc            = {0, 0, 0, 0};  //!< Max source rectangle
833     bool                        bVEBOXCroppingUsed  = false;         //!<Vebox crop case need use rcSrc as vebox input.
834     PMOS_RESOURCE               pOsResource         = nullptr;            //!<  Surface resource
835 } MHW_VEBOX_SURFACE_PARAMS, *PMHW_VEBOX_SURFACE_PARAMS;
836 
837 //!
838 //! \brief  Structure to handle VEBOX_SURFACE_STATE_CMD Command
839 //!
840 typedef struct _MHW_VEBOX_SURFACE_STATE_CMD_PARAMS
841 {
842     MHW_VEBOX_SURFACE_PARAMS         SurfInput    = {};
843     MHW_VEBOX_SURFACE_PARAMS         SurfOutput   = {};
844     MHW_VEBOX_SURFACE_PARAMS         SurfSTMM     = {};
845     MHW_VEBOX_SURFACE_PARAMS         SurfDNOutput = {};
846     MHW_VEBOX_SURFACE_PARAMS         SurfSkinScoreOutput = {};
847     bool                             bDIEnable    = false;
848     bool                             b3DlutEnable = false;
849     bool                             bOutputValid = false;
850 } MHW_VEBOX_SURFACE_STATE_CMD_PARAMS, *PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS;
851 
852 //!
853 //! \brief  VEBOX input surface control bits params
854 //!
855 typedef struct _MHW_VEBOX_SURFACE_CNTL_PARAMS
856 {
857     bool                            bIsCompressed;
858     MOS_RESOURCE_MMC_MODE           CompressionMode;
859 } MHW_VEBOX_SURFACE_CNTL_PARAMS, *PMHW_VEBOX_SURFACE_CNTL_PARAMS;
860 
861 //!
862 //! \brief  VEBOX Heap State Structure
863 //!
864 typedef struct _MHW_VEBOX_HEAP_STATE
865 {
866     bool        bBusy;                                      // true if the state is in use (must sync before use)
867     uint32_t    dwSyncTag;                                  // Vebox heap state sync tag
868 } MHW_VEBOX_HEAP_STATE, *PMHW_VEBOX_HEAP_STATE;
869 
870 //!
871 //! \brief  VEBOX Heap Structure
872 //!
873 typedef struct _MHW_VEBOX_HEAP
874 {
875     uint32_t                uiCurState;                                         // Current VEBOX State
876     uint32_t                uiNextState;                                        // Next VEBOX State
877     uint32_t                uiOffsetSync;                                       // Offset of sync data in VeboxHeap
878     uint32_t                uiDndiStateOffset;                                  // DNDI or Scalar state offset
879     uint32_t                uiIecpStateOffset;                                  // IECP state offset
880     uint32_t                uiGamutStateOffset;                                 // Gamut state offset
881     uint32_t                uiVertexTableOffset;                                // Vertex Table offset
882     uint32_t                uiCapturePipeStateOffset;                           // Capture Pipe state offset
883     uint32_t                uiGammaCorrectionStateOffset;                       // Gamma Correction state offset
884     uint32_t                uiHdrStateOffset;                                   // Hdr State offset
885     uint32_t                uiInstanceSize;                                     // Size of single instance of VEBOX states
886     uint32_t                uiStateHeapSize;                                    // Total size of VEBOX States heap
887     PMHW_VEBOX_HEAP_STATE   pStates;                                            // Array of VEBOX Heap States
888     MOS_RESOURCE            DriverResource;                                     // Graphics memory for Driver access
889     MOS_RESOURCE            KernelResource;                                     // Graphics memory for Kernel access
890     uint8_t                 *pLockedDriverResourceMem;                           // Locked Driver resource memory
891 
892     // Synchronization
893     volatile uint32_t       *pSync;                                              // Pointer to sync area (when locked)
894     uint32_t                dwNextTag;                                          // Next sync tag value to use
895     uint32_t                dwSyncTag;                                          // Last sync tag completed
896 } MHW_VEBOX_HEAP, *PMHW_VEBOX_HEAP;
897 
898 //!
899 //! \brief  VEBOX settings Structure
900 //!
901 typedef struct
902 {
903     uint32_t            uiNumInstances;                                         // Number of VEBOX instances to create
904     uint32_t            uiSyncSize;                                             // Sync Data Size
905     uint32_t            uiDndiStateSize;                                        // DNDI State Size
906     uint32_t            uiIecpStateSize;                                        // IECP State Size
907     uint32_t            uiGamutStateSize;                                       // Gamut State Size
908     uint32_t            uiVertexTableSize;                                      // Vertex Table Size
909     uint32_t            uiCapturePipeStateSize;                                 // Capture Pipe State Size (Gen8+)
910     uint32_t            uiGammaCorrectionStateSize;                             // Gamma Correction State Size (Gen9+)
911     uint32_t            uiHdrStateSize;                                         // HDR State Size
912 } MHW_VEBOX_SETTINGS, *PMHW_VEBOX_SETTINGS;
913 typedef const MHW_VEBOX_SETTINGS CMHW_VEBOX_SETTINGS, *PCMHW_VEBOX_SETTINGS;
914 
915 //!
916 //! \brief  MHW VEBOX GPUNODE Structure
917 //!
918 typedef struct _MHW_VEBOX_GPUNODE_LIMIT
919 {
920     bool    bSfcInUse;
921     bool    bCpEnabled;
922     uint32_t dwGpuNodeToUse;
923 } MHW_VEBOX_GPUNODE_LIMIT, *PMHW_VEBOX_GPUNODE_LIMIT;
924 
925 
926 
927 class MhwVeboxInterface
928 {
929 public:
~MhwVeboxInterface()930     virtual ~MhwVeboxInterface()
931     {
932         MHW_FUNCTION_ENTER;
933     }
934 
935     //!
936     //! \brief      Add VEBOX Vertex Table
937     //! \details    Add Vebox vertex table based on color space
938     //! \param      [in] ColorSpace
939     //!             ColorSpace of the source surface
940     //! \return     MOS_STATUS
941     //!
942     virtual MOS_STATUS AddVeboxVertexTable(
943         MHW_CSPACE                              ColorSpace) = 0;
944 
945     //!
946     //! \brief    Add Vebox State
947     //! \details  Add Vebox State commands
948     //! \param    [in] pCmdBuffer
949     //!           Pointer to Command Buffer
950     //! \param    [in] pVeboxStateCmdParams
951     //!           Pointer to Vebox State Params
952     //! \return   MOS_STATUS
953     //!
954     virtual MOS_STATUS AddVeboxState(
955         PMOS_COMMAND_BUFFER                     pCmdBuffer,
956         PMHW_VEBOX_STATE_CMD_PARAMS             pVeboxStateCmdParams,
957         bool                                    bUseCmBuffer) = 0;
958 
959     //!
960     //! \brief      Send Vebox Surface State commands
961     //! \details    Set surface state for input and output surfaces
962     //! \param      [in] pCmdBuffer
963     //!             Pointer to command buffer
964     //! \param      [in] pVeboxSurfaceStateCmdParams
965     //!             Pointer to surface state params
966     //! \return     MOS_STATUS
967     //!
968     virtual MOS_STATUS AddVeboxSurfaces(
969         PMOS_COMMAND_BUFFER                     pCmdBuffer,
970         PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS     pVeboxSurfaceStateCmdParams) = 0;
971 
972     //!
973     //! \brief    Send Vebox Di Iecp
974     //! \details  Send Vebox DI IECP commands
975     //! \param    [in] pCmdBuffer
976     //!           Pointer to Command Buffer
977     //! \param    [in] pVeboxDiIecpCmdParams
978     //!           Pointer to DI IECP Params
979     //! \return   MOS_STATUS
980     //!
981     virtual MOS_STATUS AddVeboxDiIecp(
982         PMOS_COMMAND_BUFFER                     pCmdBuffer,
983         PMHW_VEBOX_DI_IECP_CMD_PARAMS           pVeboxDiIecpCmdParams) = 0;
984 
985     //!
986     //! \brief      Add VEBOX DNDI States
987     //! \details    Add vebox dndi states
988     //! \param      [in] pVeboxDndiParams
989     //!             Pointer to VEBOX DNDI State Params
990     //! \return     MOS_STATUS
991     //!
992     virtual MOS_STATUS AddVeboxDndiState(
993         PMHW_VEBOX_DNDI_PARAMS                  pVeboxDndiParams) = 0;
994 
995     //!
996     //! \brief      Add VEBOX Gamut States
997     //! \details    Add Vebox Gamut states
998     //! \param      [in] pVeboxIecpParams
999     //!             Pointer to VEBOX IECP State Params
1000     //! \param      [in] pVeboxGamutParams
1001     //!             Pointer to VEBOX Gamut State Params
1002     //! \return     MOS_STATUS
1003     //!
1004     virtual MOS_STATUS AddVeboxGamutState(
1005         PMHW_VEBOX_IECP_PARAMS                  pVeboxIecpParams,
1006         PMHW_VEBOX_GAMUT_PARAMS                 pVeboxGamutParams) = 0;
1007 
AddVeboxHdrState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)1008     virtual MOS_STATUS AddVeboxHdrState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams) { return MOS_STATUS_SUCCESS;}
1009 
1010     //!
1011     //! \brief      Add VEBOX IECP States
1012     //! \details    Add Vebox IECP states STD/E, ACE, TCC, FECSC, BLC, ProcAmp, also add CapPipe state
1013     //! \param      [in, out] pVeboxIecpParams
1014     //!             Pointer to VEBOX IECP State Params
1015     //! \return     MOS_STATUS
1016     //!
1017     virtual MOS_STATUS AddVeboxIecpState(
1018         PMHW_VEBOX_IECP_PARAMS                  pVeboxIecpParams) = 0;
1019 
1020     //!
1021     //! \brief      Add VEBOX IECP ACE State
1022     //! \details    Add vebox IECP  ACE State
1023     //! \param      [in] pVeboxIecpParams
1024     //!             Pointer to VEBOX IECP State Params
1025     //! \return     MOS_STATUS
1026     //!
1027     virtual MOS_STATUS AddVeboxIecpAceState(
1028         PMHW_VEBOX_IECP_PARAMS                  pVeboxIecpParams) = 0;
1029 
1030     //!
1031     //! \brief      Vebox adjust boundary
1032     //! \details    Adjust the width and height of the surface for Vebox
1033     //! \param      [in] pSurfaceParam
1034     //!             pointer to input Surface
1035     //! \param      [out] pdwSurfaceWidth
1036     //!             Adjusted surface width
1037     //! \param      [out] pdwSurfaceHeight
1038     //!             Adjusted surface height
1039     //! \param      [in] bDIEnable
1040     //!             identify if DI is enabled
1041     //! \return     MOS_STATUS
1042     //!
1043     virtual MOS_STATUS VeboxAdjustBoundary(
1044         PMHW_VEBOX_SURFACE_PARAMS               pSurfaceParam,
1045         uint32_t                                *pdwSurfaceWidth,
1046         uint32_t                                *pdwSurfaceHeight,
1047         bool                                    bDIEnable) = 0;
1048 
1049     //! \brief      Get Full Image Histogram
1050     //! \details    Get VEBOX IECP ACE State inforation about Full Image Histogram
1051     //! \param      [in, out] pFullImageHistogram
1052     //!             Pointer to Full Image Histogram Param
1053     //! \return     MOS_STATUS
1054     //!             MOS_STATUS_SUCCESS if success, else fail reason
1055     //!
GetVeboxAce_FullImageHistogram(uint32_t * pFullImageHistogram)1056     virtual MOS_STATUS GetVeboxAce_FullImageHistogram(
1057         uint32_t                                *pFullImageHistogram)
1058     {
1059         MOS_STATUS eStatus = MOS_STATUS_UNKNOWN;
1060         return eStatus;
1061     }
1062     //!
1063     //! \brief    Add Vebox Surface Controls Bits
1064     //! \details  Add Vebox Surface Control Bits for input surface
1065     //! \param    [in] pVeboxSurfCntlParams
1066     //!           Pointer to VEBOX Surface control parameters
1067     //! \param    [out] pSurfCtrlBits
1068     //!           Pointer to surface control bits
1069     //! \return   MOS_STATUS
1070     //!
1071     virtual MOS_STATUS AddVeboxSurfaceControlBits(
1072         PMHW_VEBOX_SURFACE_CNTL_PARAMS          pVeboxSurfCntlParams,
1073         uint32_t                                *pSurfCtrlBits) = 0;
1074 
1075     //!
1076     //! \brief    Add Vebox Tiling Convert Control Bits
1077     //! \details  Add Vebox Tiling Convert Control Bits
1078     //! \param    [in] cmdBuffer
1079     //!           Pointers to the HW Cmd buffer
1080     //! \param    [in] inSurParams
1081     //!           Pointer to input vebox surface params
1082     //! \param    [in] outSurParams
1083     //!           Pointer to output vebox surface params
1084     //! \return   MOS_STATUS
1085     //!           MOS_STATUS_SUCCESS if success, else fail reason
1086     virtual MOS_STATUS AddVeboxTilingConvert(
1087         PMOS_COMMAND_BUFFER cmdBuffer,
1088         PMHW_VEBOX_SURFACE_PARAMS        inSurParams,
1089         PMHW_VEBOX_SURFACE_PARAMS        outSurParams) = 0;
1090 
1091     //!
1092     //! \brief    Decide Which GPU Node to use for Vebox
1093     //! \details  Client facing function to create gpu context used by Vebox
1094     //! \param    [out] pVEGpuNodeLimit
1095     //!           VEGpuNode Limitation
1096     //! \return   MOS_STATUS
1097     //!           MOS_STATUS_SUCCESS if success, else fail reason
1098     //!
FindVeboxGpuNodeToUse(PMHW_VEBOX_GPUNODE_LIMIT pVeboxGpuNodeLimit)1099     virtual MOS_STATUS FindVeboxGpuNodeToUse(
1100         PMHW_VEBOX_GPUNODE_LIMIT                pVeboxGpuNodeLimit)
1101     {
1102         MOS_GPU_NODE VeboxGpuNode = MOS_GPU_NODE_VE;
1103         MOS_STATUS   eStatus = MOS_STATUS_SUCCESS;
1104 
1105         MHW_CHK_NULL(pVeboxGpuNodeLimit);
1106 
1107         pVeboxGpuNodeLimit->dwGpuNodeToUse = VeboxGpuNode;
1108 
1109     finish:
1110         return eStatus;
1111    }
1112 
1113     //!
1114     //! \brief    Create Gpu Context for Vebox
1115     //! \details  Create Gpu Context for Vebox
1116     //! \param    [in] pOsInterface
1117     //!           OS interface
1118     //! \param    [in] VeboxGpuContext
1119     //!           Vebox Gpu Context
1120     //! \param    [in] VeboxGpuNode
1121     //!           Vebox Gpu Node
1122     //! \return   MOS_STATUS
1123     //!           MOS_STATUS_SUCCESS if success, else fail reason
1124     //!
CreateGpuContext(PMOS_INTERFACE pOsInterface,MOS_GPU_CONTEXT VeboxGpuContext,MOS_GPU_NODE VeboxGpuNode)1125     virtual MOS_STATUS CreateGpuContext(
1126         PMOS_INTERFACE  pOsInterface,
1127         MOS_GPU_CONTEXT VeboxGpuContext,
1128         MOS_GPU_NODE    VeboxGpuNode)
1129     {
1130         MOS_GPUCTX_CREATOPTIONS createOption;
1131         MOS_STATUS              eStatus = MOS_STATUS_SUCCESS;
1132 
1133         MHW_CHK_NULL(pOsInterface);
1134 
1135         MHW_CHK_STATUS(pOsInterface->pfnCreateGpuContext(
1136             pOsInterface,
1137             VeboxGpuContext,
1138             VeboxGpuNode,
1139             &createOption));
1140 
1141     finish:
1142         return eStatus;
1143     }
1144 
1145     virtual MOS_STATUS setVeboxPrologCmd(
1146         PMHW_MI_INTERFACE   mhwMiInterface,
1147         PMOS_COMMAND_BUFFER cmdBuffer) = 0;
1148 
Add1DLutState(void * & surface,PMHW_1DLUT_PARAMS p1DLutParams)1149     virtual MOS_STATUS Add1DLutState(void *&surface, PMHW_1DLUT_PARAMS p1DLutParams) { return MOS_STATUS_SUCCESS; }
1150 
1151     //!
1152     //! \brief    Get new vebox interface, temporal solution before switching from
1153     //!           old interface to new one
1154     //!
1155     //! \return   pointer to new render interface
1156     //!
GetNewVeboxInterface()1157     virtual std::shared_ptr<void> GetNewVeboxInterface() { return nullptr; }
1158 
1159 protected:
1160     MhwVeboxInterface(PMOS_INTERFACE pOsInterface);
1161 
1162     //!
1163     //! \brief    Trace indirect state info by OCA
1164     //! \details  Trace which resource being used to store indirect state by OCA.
1165     //! \param    [in] cmdBuffer
1166     //!           Command buffer of current vebox workload.
1167     //! \param    [in] mosContext
1168     //!           mos context
1169     //! \param    [in] isCmBuffer
1170     //!           true if CM buffer being used for indirect state, otherwise, vebox heap is used.
1171     //! \param    [in] useVeboxHeapKernelResource
1172     //!           true if kernel copy needed for indirect state.
1173     //! \return   void
1174     //!
1175     void TraceIndirectStateInfo(MOS_COMMAND_BUFFER &cmdBuffer, MOS_CONTEXT &mosContext, bool isCmBuffer, bool useVeboxHeapKernelResource);
1176 
1177 public:
1178     //!
1179     //! \brief    Adds a resource to the command buffer or indirect state (SSH)
1180     //! \details  Internal MHW function to add either a graphics address of a resource or
1181     //!           add the resource to the patch list for the requested buffer or state
1182     //! \param    [in] pOsInterface
1183     //!           OS interface
1184     //! \param    [in] pCmdBuffer
1185     //!           If adding a resource to the command buffer, the buffer to which the resource
1186     //!           is added
1187     //! \param    [in] pParams
1188     //!           Parameters necessary to add the graphics address
1189     //! \return   MOS_STATUS
1190     //!           MOS_STATUS_SUCCESS if success, else fail reason
1191     //!
1192     MOS_STATUS(*pfnAddResourceToCmd)(
1193         PMOS_INTERFACE                          pOsInterface,
1194         PMOS_COMMAND_BUFFER                     pCmdBuffer,
1195         PMHW_RESOURCE_PARAMS                    pParams);
1196 
1197     //! \brief VEBOX Heap management functions
1198     //!
1199     //! \brief    Create Vebox Heap
1200     //! \details  Create Vebox Heap
1201     //!     VPHAL_VEBOX (CPU)
1202     //!      -------------------
1203     //!     | DriverResource    |
1204     //!      -------------------
1205     //!     | KernelResource    |
1206     //!      -------------------
1207     //!
1208     //!      GPU (Driver Resource)      GPU (Kernel Resource)        VEBOX State (in Graphics Memory)
1209     //!      -------------------         -------------------        ---------------------
1210     //!     | VEBOX State 0     |       | VEBOX State 0     |       | DNDI State         |
1211     //!      -------------------         -------------------         --------------------
1212     //!     | VEBOX State 1     |       | VEBOX State 1     |       | IECP State         |
1213     //!      -------------------         -------------------         --------------------
1214     //!     | VEBOX State N     |       | VEBOX State N     |       | Gamut              |
1215     //!      -------------------         -------------------         --------------------
1216     //!     | VEBOX Sync Data   |       | VEBOX Sync Data   |       | Vertex State       |
1217     //!      -------------------                                     --------------------
1218     //!                                                             | CapturePipe State  |
1219     //!                                                              --------------------
1220     //!                                                             | Gamma Correction State |
1221     //!                                                              ------------------------
1222     //!                                                             | HDR State              |
1223     //!                                                              ------------------------
1224     //! \return   MOS_STATUS
1225     //!
1226     MOS_STATUS CreateHeap();
1227 
1228     //!
1229     //! \brief    Destroy Vebox Heap
1230     //! \details  Destroy Vebox Heap
1231     //! \return   MOS_STATUS
1232     //!
1233     MOS_STATUS DestroyHeap();
1234 
1235     //!
1236     //! \brief    Assign Vebox State
1237     //! \details  Gets a pointer to the next available vebox heap instance
1238     //! \return   MOS_STATUS
1239     //!           MOS_STATUS_SUCCESS: if vebox heap avalible, sets pVeboxHeap->uiCurState
1240     //!                 pointer to avalible vebox heap instance index and clear
1241     //!                 bBusy flag for it
1242     //!           MOS_STATUS_UNKNOWN: invalid, no available vebox heap instance available + timeout
1243     //!
1244     MOS_STATUS AssignVeboxState();
1245 
1246     //!
1247     //! \brief    Get Vebox Heap Information
1248     //! \details  Get Vebox Heap pointer to access Vebox Heap information
1249     //! \param    [out] ppVeboxHeap
1250     //!           Pointer to const Vebox Heap Structure
1251     //! \return   MOS_STATUS
1252     //!
1253     MOS_STATUS GetVeboxHeapInfo(
1254         const MHW_VEBOX_HEAP                    **ppVeboxHeap);
1255 
1256     //!
1257     //! \brief    Update Vebox Sync tag info
1258     //! \details  Update Vebox Heap Sync tag info
1259     //! \return   MOS_STATUS
1260     //!
1261     MOS_STATUS UpdateVeboxSync();
1262 
1263     //!
1264     //! \brief    Set which vebox can be used by HW
1265     //! \details  VPHAL set which VEBOX can be use by HW
1266     //! \param    [in] dwVeboxIndex
1267     //!           set which Vebox can be used by HW
1268     //! \param    [in] dwVeboxCount
1269     //!           set Vebox Count
1270     //! \param    [in] dwUsingSFC
1271     //!           set whether using SFC
1272     //! \return   MOS_STATUS
1273     //!           MOS_STATUS_SUCCESS if success, else fail reason
SetVeboxIndex(uint32_t dwVeboxIndex,uint32_t dwVeboxCount,uint32_t dwUsingSFC)1274     virtual MOS_STATUS SetVeboxIndex(
1275         uint32_t dwVeboxIndex,
1276         uint32_t dwVeboxCount,
1277         uint32_t dwUsingSFC)
1278     {
1279         MOS_UNUSED(dwVeboxIndex);
1280         MOS_UNUSED(dwVeboxCount);
1281         MOS_UNUSED(dwUsingSFC);
1282         return MOS_STATUS_SUCCESS;
1283     }
1284 
1285 private:
1286     //!
1287     //! \brief    Refresh Vebox Sync
1288     //! \details  Update Vebox Heap Sync tags and clear bBusy flag in availble
1289     //!           pVeboxHeap->pStates
1290     //! \return   void
1291     //!
1292     void RefreshVeboxSync();
1293 
1294     //! \brief    Vebox heap instance in use
1295     int                    m_veboxHeapInUse = 0;
1296 
1297  public:
1298     PMOS_INTERFACE         m_osInterface   = nullptr;
1299     PMHW_VEBOX_HEAP        m_veboxHeap     = nullptr;
1300     MHW_VEBOX_SETTINGS     m_veboxSettings;
1301     bool                   m_veboxScalabilitywith4K    = false;
1302     std::shared_ptr<void>  m_veboxItfNew    = nullptr;
1303 };
1304 
1305 #endif // __MHW_VEBOX_H__
1306