1 /*
2 * Copyright (c) 2024, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_vebox_xe2_lpm_base_next_impl.h
24 //! \brief MHW vebox interface common base for Xe2_LPM
25 //! \details
26 //!
27
28 #ifndef __MHW_VEBOX_XE2_LPM_BASE_NEXT_IMPL_H__
29 #define __MHW_VEBOX_XE2_LPM_BASE_NEXT_IMPL_H__
30
31 #include "mhw_vebox.h"
32 #include "mhw_vebox_impl.h"
33 #include "mhw_vebox_hwcmd_xe2_lpm_base_next.h"
34 #include "mhw_vebox_itf.h"
35 #include "mhw_impl.h"
36 #include "mos_solo_generic.h"
37
38 //!
39 //! \brief Macro for Vebox Scalable
40 //!
41 #define MHW_VEBOX_MAX_PIPE_SIZE_XE2_LPM_BASE 4096
42 #define MHW_VEBOX_MAX_SEMAPHORE_NUM_XE2_LPM_BASE 4
43 #define MHW_VEBOX_TIMESTAMP_CNTS_PER_SEC_XE2_LPM_BASE 12000048
44 #define MHW_VEBOX_4K_PIC_WIDTH_XE2_LPM_BASE 3840
45 #define MHW_VEBOX_4K_PIC_HEIGHT_XE2_LPM_BASE 2160
46 #define MHW_VEBOX_TIMESTAMP_PER_TICK_IN_NS_XE2_LPM_BASE 83.333f
47 #define MHW_LACE_COLOR_COMPENSATION_LUT_POINT_NUMBER_XE2_LPM_BASE 16
48 #define MHW_VEBOX_SLIM_IPU_DN_CMD_SIZE_INUSE_XE2_LPM_BASE 34
49
50 namespace mhw
51 {
52 namespace vebox
53 {
54 namespace xe2_lpm_base_next
55 {
56 class Impl : public vebox::Impl<mhw::vebox::xe2_lpm_base_next::Cmd>
57 {
58 public:
Impl(PMOS_INTERFACE osItf)59 Impl(PMOS_INTERFACE osItf) : base_t(osItf)
60 {
61 MHW_FUNCTION_ENTER;
62 };
63
IecpStateInitialization(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState)64 MOS_STATUS IecpStateInitialization(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
65 {
66 MHW_FUNCTION_ENTER;
67
68 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD IecpState;
69 *pVeboxIecpState = IecpState;
70
71 // Re-set the values
72 pVeboxIecpState->StdSteState.DW5.InvMarginVyl = 3300;
73 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 1638;
74 pVeboxIecpState->StdSteState.DW12.B3U = 140;
75 pVeboxIecpState->StdSteState.DW27.Hues0Dark = 256;
76 pVeboxIecpState->StdSteState.DW27.Hues1Dark = 0;
77
78 pVeboxIecpState->AceState.DW0.LaceHistogramSize = 1;
79
80 pVeboxIecpState->TccState.DW0.Satfactor1 = 160;
81 pVeboxIecpState->TccState.DW0.Satfactor2 = 160;
82 pVeboxIecpState->TccState.DW0.Satfactor3 = 160;
83 pVeboxIecpState->TccState.DW1.Satfactor4 = 160;
84 pVeboxIecpState->TccState.DW1.Satfactor5 = 160;
85 pVeboxIecpState->TccState.DW1.Satfactor6 = 160;
86
87 pVeboxIecpState->GamutState.DW2.CmS = 640;
88 pVeboxIecpState->GamutState.DW3.AG = 26;
89 pVeboxIecpState->GamutState.DW4.AB = 26;
90 pVeboxIecpState->GamutState.DW5.RS = 768;
91 pVeboxIecpState->GamutState.DW6.CmI = 192;
92 pVeboxIecpState->GamutState.DW7.RI = 128;
93
94 return MOS_STATUS_SUCCESS;
95 }
96
IecpStateInitializationforFDFB(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState)97 MOS_STATUS IecpStateInitializationforFDFB(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
98 {
99 MHW_FUNCTION_ENTER;
100
101 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD IecpState;
102 *pVeboxIecpState = IecpState;
103
104 // Re-set the values
105 pVeboxIecpState->StdSteState.DW0.StdEnable = 1;
106 pVeboxIecpState->StdSteState.DW0.OutputControl = 1;
107 pVeboxIecpState->StdSteState.DW1.StdScoreOutput = 0;
108 pVeboxIecpState->StdSteState.DW3.VyStdEnable = 1;
109 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 20;
110 pVeboxIecpState->AceState.DW0.AceEnable = 0;
111 pVeboxIecpState->AceState.DW0.LaceHistogramEnable = 1;
112
113 pVeboxIecpState->StdSteState.DW5.InvMarginVyl = 3300;
114 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 1638;
115 pVeboxIecpState->StdSteState.DW12.B3U = 140;
116 pVeboxIecpState->StdSteState.DW15.Satp1 = 122;
117 pVeboxIecpState->StdSteState.DW15.Satb1 = 1016;
118 pVeboxIecpState->StdSteState.DW19.Hueb1 = 1016;
119 pVeboxIecpState->StdSteState.DW27.Hues0Dark = 256;
120 pVeboxIecpState->StdSteState.DW27.Hues1Dark = 0;
121
122 pVeboxIecpState->TccState.DW0.Satfactor1 = 160;
123 pVeboxIecpState->TccState.DW0.Satfactor2 = 160;
124 pVeboxIecpState->TccState.DW0.Satfactor3 = 160;
125 pVeboxIecpState->TccState.DW1.Satfactor4 = 160;
126 pVeboxIecpState->TccState.DW1.Satfactor5 = 160;
127 pVeboxIecpState->TccState.DW1.Satfactor6 = 160;
128
129 pVeboxIecpState->AlphaAoiState.DW1.AoiMaxX = 0;
130 pVeboxIecpState->AlphaAoiState.DW2.AoiMaxY = 0;
131
132 return MOS_STATUS_SUCCESS;
133 }
134
135 //!
136 //! \brief Set Vebox Iecp State FECSC
137 //! \details Set Front-End CSC part of the VEBOX IECP States
138 //! \param [in] pVeboxIecpState
139 //! Pointer to VEBOX IECP States
140 //! \param [in] pVeboxIecpParams
141 //! Pointer to VEBOX IECP State Params
142 //! \return void
143 //!
SetVeboxIecpStateFecsc(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_FRONT_END_CSC_STATE_CMD * pVeboxFecscState,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)144 void SetVeboxIecpStateFecsc(
145 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_FRONT_END_CSC_STATE_CMD *pVeboxFecscState,
146 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
147 {
148 MHW_FUNCTION_ENTER;
149
150 MHW_CAPPIPE_PARAMS *pCapPipeParams = nullptr;
151
152 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxFecscState);
153 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpParams);
154
155 pCapPipeParams = &pVeboxIecpParams->CapPipeParams;
156 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
157 MHW_ASSERT(pCapPipeParams->bActive);
158
159 #define SET_COEFS(_c0, _c1, _c2, _c3, _c4, _c5, _c6, _c7, _c8) \
160 { \
161 pVeboxFecscState->DW0.FecscC0TransformCoefficient = _c0; \
162 pVeboxFecscState->DW1.FecscC1TransformCoefficient = _c1; \
163 pVeboxFecscState->DW2.FecscC2TransformCoefficient = _c2; \
164 pVeboxFecscState->DW3.FecscC3TransformCoefficient = _c3; \
165 pVeboxFecscState->DW4.FecscC4TransformCoefficient = _c4; \
166 pVeboxFecscState->DW5.FecscC5TransformCoefficient = _c5; \
167 pVeboxFecscState->DW6.FecscC6TransformCoefficient = _c6; \
168 pVeboxFecscState->DW7.FecscC7TransformCoefficient = _c7; \
169 pVeboxFecscState->DW8.FecscC8TransformCoefficient = _c8; \
170 }
171
172 #define SET_INPUT_OFFSETS(_in1, _in2, _in3) \
173 { \
174 pVeboxFecscState->DW9.FecScOffsetIn1OffsetInForYR = _in1; \
175 pVeboxFecscState->DW10.FecScOffsetIn2OffsetOutForUG = _in2; \
176 pVeboxFecscState->DW11.FecScOffsetIn3OffsetOutForVB = _in3; \
177 }
178
179 #define SET_OUTPUT_OFFSETS(_out1, _out2, _out3) \
180 { \
181 pVeboxFecscState->DW9.FecScOffsetOut1OffsetOutForYR = _out1; \
182 pVeboxFecscState->DW10.FecScOffsetOut2OffsetOutForUG = _out2; \
183 pVeboxFecscState->DW11.FecScOffsetOut3OffsetOutForVB = _out3; \
184 }
185
186 pVeboxFecscState->DW0.FrontEndCscTransformEnable = true;
187
188 if (pCapPipeParams->FECSCParams.bActive)
189 {
190 // Coeff is S2.16, so multiply the floating value by 65536
191 SET_COEFS(
192 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[0][0] * 65536)),
193 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[0][1] * 65536)),
194 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[0][2] * 65536)),
195 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[1][0] * 65536)),
196 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[1][1] * 65536)),
197 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[1][2] * 65536)),
198 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[2][0] * 65536)),
199 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[2][1] * 65536)),
200 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[2][2] * 65536)));
201 SET_INPUT_OFFSETS(
202 ((uint32_t)pCapPipeParams->FECSCParams.PreOffset[0]),
203 ((uint32_t)pCapPipeParams->FECSCParams.PreOffset[1]),
204 ((uint32_t)pCapPipeParams->FECSCParams.PreOffset[2]));
205 SET_OUTPUT_OFFSETS(
206 ((uint32_t)pCapPipeParams->FECSCParams.PostOffset[0]),
207 ((uint32_t)pCapPipeParams->FECSCParams.PostOffset[1]),
208 ((uint32_t)pCapPipeParams->FECSCParams.PostOffset[2]));
209 }
210 else if (pVeboxIecpParams->bFeCSCEnable)
211 {
212 // Coeff is S2.16, so multiply the floating value by 65536
213 SET_COEFS(
214 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[0] * 65536)),
215 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[1] * 65536)),
216 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[2] * 65536)),
217 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[3] * 65536)),
218 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[4] * 65536)),
219 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[5] * 65536)),
220 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[6] * 65536)),
221 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[7] * 65536)),
222 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[8] * 65536)));
223 SET_INPUT_OFFSETS(
224 ((uint32_t)(pVeboxIecpParams->pfFeCscInOffset[0] * 128.0F)),
225 ((uint32_t)(pVeboxIecpParams->pfFeCscInOffset[1] * 128.0F)),
226 ((uint32_t)(pVeboxIecpParams->pfFeCscInOffset[2] * 128.0F)));
227 SET_OUTPUT_OFFSETS(
228 ((uint32_t)(pVeboxIecpParams->pfFeCscOutOffset[0] * 128.0F)),
229 ((uint32_t)(pVeboxIecpParams->pfFeCscOutOffset[1] * 128.0F)),
230 ((uint32_t)(pVeboxIecpParams->pfFeCscOutOffset[2] * 128.0F)));
231 }
232 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT601)
233 {
234 SET_COEFS(16843, 33030, 6423, MOS_BITFIELD_VALUE((uint32_t)-9698, 19), MOS_BITFIELD_VALUE((uint32_t)-19070, 19), 28770, 28770, MOS_BITFIELD_VALUE((uint32_t)-24116, 19), MOS_BITFIELD_VALUE((uint32_t)-4652, 19));
235 SET_INPUT_OFFSETS(0, 0, 0);
236 SET_OUTPUT_OFFSETS(2048, 16384, 16384);
237 }
238 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709)
239 {
240 SET_COEFS(11993, 40239, 4063, MOS_BITFIELD_VALUE((uint32_t)-6618, 19), MOS_BITFIELD_VALUE((uint32_t)-22216, 19), 28770, 28770, MOS_BITFIELD_VALUE((uint32_t)-26148, 19), MOS_BITFIELD_VALUE((uint32_t)-2620, 19));
241 SET_INPUT_OFFSETS(0, 0, 0);
242 SET_OUTPUT_OFFSETS(2048, 16384, 16384);
243 }
244 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_sRGB)
245 {
246 SET_COEFS(13932, 46871, 4731, MOS_BITFIELD_VALUE((uint32_t)-7508, 19), MOS_BITFIELD_VALUE((uint32_t)-25260, 19), 32768, 32768, MOS_BITFIELD_VALUE((uint32_t)-29764, 19), MOS_BITFIELD_VALUE((uint32_t)-3005, 19));
247 SET_INPUT_OFFSETS(0, 0, 0);
248 SET_OUTPUT_OFFSETS(0, 16384, 16384);
249 }
250 else
251 {
252 MHW_ASSERT(0);
253 }
254
255 #undef SET_COEFS
256 #undef SET_INPUT_OFFSETS
257 #undef SET_OUTPUT_OFFSETS
258 }
259
SetVeboxIecpStateBecsc(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,bool bEnableFECSC)260 MOS_STATUS SetVeboxIecpStateBecsc(
261 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState,
262 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
263 bool bEnableFECSC)
264 {
265 MHW_FUNCTION_ENTER;
266
267 MHW_CAPPIPE_PARAMS *m_capPipeParams = nullptr;
268 MOS_FORMAT dstFormat;
269
270 MHW_CHK_NULL_RETURN(pVeboxIecpState);
271 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
272
273 m_capPipeParams = &pVeboxIecpParams->CapPipeParams;
274 dstFormat = pVeboxIecpParams->dstFormat;
275
276 #define SET_COEFS(_c0, _c1, _c2, _c3, _c4, _c5, _c6, _c7, _c8) \
277 { \
278 pVeboxIecpState->CscState.DW0.C0 = _c0; \
279 pVeboxIecpState->CscState.DW1.C1 = _c1; \
280 pVeboxIecpState->CscState.DW2.C2 = _c2; \
281 pVeboxIecpState->CscState.DW3.C3 = _c3; \
282 pVeboxIecpState->CscState.DW4.C4 = _c4; \
283 pVeboxIecpState->CscState.DW5.C5 = _c5; \
284 pVeboxIecpState->CscState.DW6.C6 = _c6; \
285 pVeboxIecpState->CscState.DW7.C7 = _c7; \
286 pVeboxIecpState->CscState.DW8.C8 = _c8; \
287 }
288
289 #define SET_INPUT_OFFSETS(_in1, _in2, _in3) \
290 { \
291 pVeboxIecpState->CscState.DW9.OffsetIn1 = _in1; \
292 pVeboxIecpState->CscState.DW10.OffsetIn2 = _in2; \
293 pVeboxIecpState->CscState.DW11.OffsetIn3 = _in3; \
294 }
295
296 #define SET_OUTPUT_OFFSETS(_out1, _out2, _out3) \
297 { \
298 pVeboxIecpState->CscState.DW9.OffsetOut1 = _out1; \
299 pVeboxIecpState->CscState.DW10.OffsetOut2 = _out2; \
300 pVeboxIecpState->CscState.DW11.OffsetOut3 = _out3; \
301 }
302
303 MHW_CHK_NULL_RETURN(m_capPipeParams);
304 if (m_capPipeParams->bActive)
305 {
306 // Application controlled CSC operation
307 if (m_capPipeParams->BECSCParams.bActive)
308 {
309 pVeboxIecpState->CscState.DW0.TransformEnable = true;
310
311 // Coeff is S2.16, so multiply the floating value by 65536
312 SET_COEFS(
313 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[0][0] * 65536)),
314 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[0][1] * 65536)),
315 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[0][2] * 65536)),
316 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[1][0] * 65536)),
317 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[1][1] * 65536)),
318 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[1][2] * 65536)),
319 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[2][0] * 65536)),
320 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[2][1] * 65536)),
321 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[2][2] * 65536)));
322 SET_INPUT_OFFSETS(
323 ((uint32_t)m_capPipeParams->BECSCParams.PreOffset[0]),
324 ((uint32_t)m_capPipeParams->BECSCParams.PreOffset[1]),
325 ((uint32_t)m_capPipeParams->BECSCParams.PreOffset[2]));
326 SET_OUTPUT_OFFSETS(
327 ((uint32_t)m_capPipeParams->BECSCParams.PostOffset[0]),
328 ((uint32_t)m_capPipeParams->BECSCParams.PostOffset[1]),
329 ((uint32_t)m_capPipeParams->BECSCParams.PostOffset[2]));
330 }
331 // YUV 4:4:4 CSC to xBGR or xRGB
332 else if ((bEnableFECSC || (pVeboxIecpParams->srcFormat == Format_AYUV)) &&
333 (IS_RGB_FORMAT(dstFormat)))
334 {
335 pVeboxIecpState->CscState.DW0.TransformEnable = true;
336
337 // CSC matrix to convert YUV 4:4:4 to xBGR. e.g. Format_A8B8G8R8. In the
338 // event that dstFormat is xRGB, driver sets R & B channel swapping via
339 // CscState.DW0.YuvChannelSwap so a separate matrix is not needed.
340
341 if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT601)
342 {
343 SET_COEFS(76284, 0, 104595, 76284, MOS_BITFIELD_VALUE((uint32_t)-25689, 19), MOS_BITFIELD_VALUE((uint32_t)-53280, 19), 76284, 132186, 0);
344
345 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
346 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
347 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
348 SET_OUTPUT_OFFSETS(0, 0, 0);
349 }
350 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709)
351 {
352 SET_COEFS(76284, 0, 117506, 76284, MOS_BITFIELD_VALUE((uint32_t)-13958, 19), MOS_BITFIELD_VALUE((uint32_t)-34930, 19), 76284, 138412, 0);
353
354 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
355 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
356 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
357 SET_OUTPUT_OFFSETS(0, 0, 0);
358 }
359 else
360 {
361 MHW_ASSERT(false);
362 }
363 }
364 }
365 else if (pVeboxIecpParams->bCSCEnable)
366 {
367 pVeboxIecpState->CscState.DW0.TransformEnable = true;
368
369 // Coeff is S2.16, so multiply the floating value by 65536
370 SET_COEFS(
371 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[0] * 65536.0F)),
372 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[1] * 65536.0F)),
373 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[2] * 65536.0F)),
374 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[3] * 65536.0F)),
375 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[4] * 65536.0F)),
376 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[5] * 65536.0F)),
377 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[6] * 65536.0F)),
378 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[7] * 65536.0F)),
379 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[8] * 65536.0F)));
380
381 // Offset is S15, but the SW offsets are calculated as 8bits,
382 // so left shift them 7bits to be in the position of MSB
383 SET_INPUT_OFFSETS(
384 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[0] * 128.0F)),
385 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[1] * 128.0F)),
386 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[2] * 128.0F)));
387 SET_OUTPUT_OFFSETS(
388 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[0] * 128.0F)),
389 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[1] * 128.0F)),
390 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[2] * 128.0F)));
391 }
392
393 pVeboxIecpState->AlphaAoiState.DW0.AlphaFromStateSelect = pVeboxIecpParams->bAlphaEnable;
394
395 if (pVeboxIecpParams->dstFormat == Format_Y416)
396 {
397 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue;
398 }
399 else
400 {
401 // Alpha is U16, but the SW alpha is calculated as 8bits,
402 // so left shift it 8bits to be in the position of MSB
403 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue * 256;
404 }
405
406 #undef SET_COEFS
407 #undef SET_INPUT_OFFSETS
408 #undef SET_OUTPUT_OFFSETS
409
410 return MOS_STATUS_SUCCESS;
411 }
412
413 //!
414 //! \brief Set Vebox Iecp State Color Correction Matrix
415 //! \details Set Color Correction Matrix of the VEBOX IECP States
416 //! \param [in] pVeboxIecpState
417 //! Pointer to VEBOX IECP States
418 //! \param [in] pCapPipeParams
419 //! Pointer to Capture Pipe Params
420 //! \param [in] const unsigned int uCoeffValue
421 //! the coeffs's miltiply floating value.
422 //! Coeff is S4.12, then multiply the floating value by 4096
423 //! Coeff is S4.16, then multiply the floating value by 65536
424 //! \return void
425 //!
SetVeboxIecpStateCcm(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState,PMHW_CAPPIPE_PARAMS pCapPipeParams,const unsigned int uCoeffValue)426 void SetVeboxIecpStateCcm(
427 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD* pVeboxIecpState,
428 PMHW_CAPPIPE_PARAMS pCapPipeParams,
429 const unsigned int uCoeffValue)
430 {
431 MHW_FUNCTION_ENTER;
432
433 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_CCM_STATE_CMD *pCcm = nullptr;
434
435 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
436 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
437
438 pCcm = &pVeboxIecpState->CcmState;
439
440 if (pCapPipeParams->ColorCorrectionParams.bActive)
441 {
442 MHW_CHK_NULL_NO_STATUS_RETURN(pCcm);
443 pCcm->DW0.ColorCorrectionMatrixEnable = true;
444
445 pCcm->DW0.C1 =
446 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[0][1] * uCoeffValue);
447 pCcm->DW1.C0 =
448 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[0][0] * uCoeffValue);
449 pCcm->DW2.C3 =
450 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[1][0] * uCoeffValue);
451 pCcm->DW3.C2 =
452 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[0][2] * uCoeffValue);
453 pCcm->DW4.C5 =
454 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[1][2] * uCoeffValue);
455 pCcm->DW5.C4 =
456 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[1][1] * uCoeffValue);
457 pCcm->DW6.C7 =
458 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[2][1] * uCoeffValue);
459 pCcm->DW7.C6 =
460 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[2][0] * uCoeffValue);
461 pCcm->DW8.C8 =
462 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[2][2] * uCoeffValue);
463 }
464 }
465
466 //!
467 //! \brief Set Vebox Iecp State ProcAmp
468 //! \details Set ProcAmp part of the VEBOX IECP States
469 //! \param [in] pVeboxProcampState
470 //! Pointer to VEBOX IECP Procamp States
471 //! \param [in] pProcAmpParams
472 //! Pointer to ProcAmp Params
473 //! \return void
474 //!
SetVeboxIecpStateProcAmp(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_PROCAMP_STATE_CMD * pVeboxProcampState,PMHW_PROCAMP_PARAMS pProcAmpParams)475 void SetVeboxIecpStateProcAmp(
476 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_PROCAMP_STATE_CMD *pVeboxProcampState,
477 PMHW_PROCAMP_PARAMS pProcAmpParams)
478 {
479 MHW_FUNCTION_ENTER;
480
481 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxProcampState);
482 MHW_CHK_NULL_NO_STATUS_RETURN(pProcAmpParams);
483
484 pVeboxProcampState->DW0.ProcampEnable = true;
485 pVeboxProcampState->DW0.Brightness = pProcAmpParams->brightness; // S7.4
486 pVeboxProcampState->DW0.Contrast = pProcAmpParams->contrast; // U4.7
487 pVeboxProcampState->DW1.SinCS = pProcAmpParams->sinCS; // S7.8
488 pVeboxProcampState->DW1.CosCS = pProcAmpParams->cosCS; // S7.8
489 }
490
491 //!
492 //! \brief Add VEBOX Capture pipe state
493 //! \details Add VEBOX Capture pipe state
494 //! \param [in] pCapPipeParams
495 //! Pointer to capture pipe parameters
496 //! \return void
497 //!
SetVeboxCapPipeState(PMHW_CAPPIPE_PARAMS pCapPipeParams)498 void SetVeboxCapPipeState(
499 PMHW_CAPPIPE_PARAMS pCapPipeParams)
500 {
501 MHW_FUNCTION_ENTER;
502
503 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_CAPTURE_PIPE_STATE_CMD *pVeboxCapPipeState, CapPipCmd;
504
505 PMHW_VEBOX_HEAP pVeboxHeap;
506 uint32_t uiOffset;
507
508 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
509 MHW_CHK_NULL_NO_STATUS_RETURN(m_veboxHeap);
510
511 pVeboxHeap = m_veboxHeap;
512 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
513
514 pVeboxCapPipeState =
515 (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_CAPTURE_PIPE_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
516 pVeboxHeap->uiCapturePipeStateOffset +
517 uiOffset);
518 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxCapPipeState);
519 *pVeboxCapPipeState = CapPipCmd;
520
521 if (pCapPipeParams->BlackLevelParams.bActive)
522 {
523 pVeboxCapPipeState->DW2.BlackPointCorrectionEnable = true;
524 // Red
525 pVeboxCapPipeState->DW2.BlackPointOffsetRedMsb =
526 (pCapPipeParams->BlackLevelParams.R & MOS_BITFIELD_BIT_N(16)) >> 16;
527 pVeboxCapPipeState->DW3.BlackPointOffsetRed =
528 pCapPipeParams->BlackLevelParams.R & MOS_MASK(0, 15);
529 // Green Top
530 pVeboxCapPipeState->DW2.BlackPointOffsetGreenTopMsb =
531 (pCapPipeParams->BlackLevelParams.G1 & MOS_BITFIELD_BIT_N(16)) >> 16;
532 pVeboxCapPipeState->DW3.BlackPointOffsetGreenTop =
533 pCapPipeParams->BlackLevelParams.G1 & MOS_MASK(0, 15);
534 // Green Bottom
535 pVeboxCapPipeState->DW2.BlackPointOffsetGreenBottomMsb =
536 (pCapPipeParams->BlackLevelParams.G0 & MOS_BITFIELD_BIT_N(16)) >> 16;
537 pVeboxCapPipeState->DW4.BlackPointOffsetGreenBottom =
538 pCapPipeParams->BlackLevelParams.G0 & MOS_MASK(0, 15);
539 // Blue
540 pVeboxCapPipeState->DW2.BlackPointOffsetBlueMsb =
541 (pCapPipeParams->BlackLevelParams.B & MOS_BITFIELD_BIT_N(16)) >> 16;
542 pVeboxCapPipeState->DW4.BlackPointOffsetBlue =
543 pCapPipeParams->BlackLevelParams.B & MOS_MASK(0, 15);
544 }
545
546 if (pCapPipeParams->WhiteBalanceParams.bActive &&
547 pCapPipeParams->WhiteBalanceParams.Mode == MHW_WB_MANUAL)
548 {
549 pVeboxCapPipeState->DW2.WhiteBalanceCorrectionEnable = true;
550
551 // Is U4.12, so multiply the floating value by 4096
552 // Red
553 pVeboxCapPipeState->DW5.WhiteBalanceRedCorrection =
554 (uint32_t)(pCapPipeParams->WhiteBalanceParams.RedCorrection * 4096);
555
556 // Greep Top
557 pVeboxCapPipeState->DW5.WhiteBalanceGreenTopCorrection =
558 (uint32_t)(pCapPipeParams->WhiteBalanceParams.GreenTopCorrection * 4096);
559
560 // Green Bottom
561 pVeboxCapPipeState->DW6.WhiteBalanceGreenBottomCorrection =
562 (uint32_t)(pCapPipeParams->WhiteBalanceParams.GreenBottomCorrection * 4096);
563
564 // Blue
565 pVeboxCapPipeState->DW6.WhiteBalanceBlueCorrection =
566 (uint32_t)(pCapPipeParams->WhiteBalanceParams.BlueCorrection * 4096);
567 }
568 }
569
570 //!
571 //! \brief Add VEBOX ACE/LACE States
572 //! \details Add Vebox ACE, Lace states
573 //! \param [in] pVeboxIecpParams
574 //! Pointer to VEBOX IECP State Params
575 //! \return voild
576 //!
SetVeboxAceLaceState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState)577 void SetVeboxAceLaceState(
578 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
579 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
580 {
581 MHW_FUNCTION_ENTER;
582
583 PMHW_ACE_PARAMS pAceParams;
584 PMHW_VEBOX_HEAP pVeboxHeap;
585 int32_t uiOffset;
586 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
587
588 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpParams);
589
590 if (pVeboxIecpParams->ColorPipeParams.bActive &&
591 pVeboxIecpParams->ColorPipeParams.bEnableACE)
592 {
593 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
594 pAceParams = &pVeboxIecpParams->AceParams;
595 MHW_ASSERT(pAceParams->bActive);
596
597 // Y is input, use wPWLF_X, Y4 as Max. Populate Y5-Ymax with max Y to
598 // avoid artifact
599 pVeboxIecpState->AceState.DW1.Ymin = pAceParams->wACEPWLF_X[0] >> 2;
600 pVeboxIecpState->AceState.DW1.Y1 = pAceParams->wACEPWLF_X[1] >> 2;
601 pVeboxIecpState->AceState.DW1.Y2 = pAceParams->wACEPWLF_X[2] >> 2;
602 pVeboxIecpState->AceState.DW1.Y3 = pAceParams->wACEPWLF_X[3] >> 2;
603 pVeboxIecpState->AceState.DW2.Y4 =
604 pVeboxIecpState->AceState.DW2.Y5 =
605 pVeboxIecpState->AceState.DW2.Y6 =
606 pVeboxIecpState->AceState.DW2.Y7 =
607 pVeboxIecpState->AceState.DW3.Y8 =
608 pVeboxIecpState->AceState.DW3.Y9 =
609 pVeboxIecpState->AceState.DW3.Y10 =
610 pVeboxIecpState->AceState.DW3.Ymax = pAceParams->wACEPWLF_X[4] >> 2;
611
612 // the bias is the output, therefore the Y in algorithm
613 pVeboxIecpState->AceState.DW4.B1 = pAceParams->wACEPWLF_Y[1] >> 2;
614 pVeboxIecpState->AceState.DW4.B2 = pAceParams->wACEPWLF_Y[2] >> 2;
615 pVeboxIecpState->AceState.DW4.B3 = pAceParams->wACEPWLF_Y[3] >> 2;
616
617 // need to double check if slope is set incorrectly
618 pVeboxIecpState->AceState.DW7.S0 = pAceParams->wACEPWLF_S[0];
619 pVeboxIecpState->AceState.DW7.S1 = pAceParams->wACEPWLF_S[1];
620 pVeboxIecpState->AceState.DW8.S2 = pAceParams->wACEPWLF_S[2];
621 pVeboxIecpState->AceState.DW8.S3 = pAceParams->wACEPWLF_S[3];
622 }
623 }
624
SetVeboxVertexTable(MHW_CSPACE ColorSpace)625 MOS_STATUS SetVeboxVertexTable(
626 MHW_CSPACE ColorSpace)
627 {
628 MHW_FUNCTION_ENTER;
629
630 MHW_VEBOX_HEAP *pVeboxHeap;
631 uint32_t uiOffset;
632 uint32_t uSize;
633 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
634 typename mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_VERTEX_TABLE_CMD* pVertexTable;
635
636 MHW_CHK_NULL_RETURN(m_veboxHeap);
637
638 pVeboxHeap = m_veboxHeap;
639 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
640 uSize = sizeof(typename mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_VERTEX_TABLE_CMD);
641 pVertexTable = (typename mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_VERTEX_TABLE_CMD*)(pVeboxHeap->pLockedDriverResourceMem +
642 pVeboxHeap->uiVertexTableOffset +
643 uiOffset);
644 MOS_ZeroMemory(pVertexTable, uSize);
645 if (ColorSpace == MHW_CSpace_BT601 || ColorSpace == MHW_CSpace_xvYCC601)
646 {
647 MOS_SecureMemcpy(pVertexTable, uSize, g_VeboxVertexTableBT601, uSize);
648 }
649 else if (ColorSpace == MHW_CSpace_BT709 || ColorSpace == MHW_CSpace_xvYCC709)
650 {
651 MOS_SecureMemcpy(pVertexTable, uSize, g_VeboxVertexTableBT709, uSize);
652 }
653 else
654 {
655 MHW_NORMALMESSAGE("Unhandled ColorSpace");
656 }
657
658 return eStatus;
659 }
660
setVeboxPrologCmd(std::shared_ptr<mhw::mi::Itf> miItf,PMOS_COMMAND_BUFFER CmdBuffer)661 MOS_STATUS setVeboxPrologCmd(
662 std::shared_ptr<mhw::mi::Itf> miItf,
663 PMOS_COMMAND_BUFFER CmdBuffer)
664 {
665 MHW_FUNCTION_ENTER;
666
667 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
668 uint64_t auxTableBaseAddr = 0;
669
670 MHW_CHK_NULL_RETURN(miItf);
671 MHW_CHK_NULL_RETURN(CmdBuffer);
672 MHW_CHK_NULL_RETURN(this->m_osItf);
673
674 auxTableBaseAddr = this->m_osItf->pfnGetAuxTableBaseAddr(this->m_osItf);
675
676 return eStatus;
677 }
678
AddVeboxHdrState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)679 MOS_STATUS AddVeboxHdrState(
680 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
681 {
682 MHW_FUNCTION_ENTER;
683
684 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
685 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_HDR_STATE_CMD * pVeboxHdrState = nullptr;
686 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pIecpState = nullptr;
687 MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
688 uint32_t uiOffset = 0;
689
690 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
691 MHW_CHK_NULL_RETURN(m_veboxHeap);
692
693 pVeboxHeap = m_veboxHeap;
694 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
695
696 pVeboxHdrState =
697 (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_HDR_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
698 pVeboxHeap->uiHdrStateOffset +
699 uiOffset);
700
701 pIecpState =
702 (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
703 pVeboxHeap->uiIecpStateOffset +
704 uiOffset);
705
706 MHW_CHK_NULL_RETURN(pVeboxHdrState);
707 MHW_CHK_NULL_RETURN(pIecpState);
708
709 // Program 1DLUT in Inverse Gamma with 1024 entries / 16bit precision from API level
710 if (pVeboxIecpParams->s1DLutParams.bActive && (pVeboxIecpParams->s1DLutParams.LUTSize == 1024))
711 {
712 // HW provides 4K 1DLUT inverse gamma
713 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_HDR_INV_GAMMA_CORRECTION_STATE_CMD *pInverseGamma = pVeboxHdrState->PRGBCorrectedValue;
714 uint16_t * p1DLut = (uint16_t *)pVeboxIecpParams->s1DLutParams.p1DLUT;
715 for (uint32_t i = 0; i < pVeboxIecpParams->s1DLutParams.LUTSize; i++)
716 {
717 pInverseGamma[i].DW0.Value = 0;
718 pInverseGamma[i].DW1.InverseRChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 1]); // 32 bit precision
719 pInverseGamma[i].DW2.InverseGChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 2]); // 32 bit precision
720 pInverseGamma[i].DW3.InverseBChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 3]); // 32 bit precision
721 }
722 for (uint32_t i = pVeboxIecpParams->s1DLutParams.LUTSize; i < 4096; i++)
723 {
724 pInverseGamma[i].DW0.Value = 0;
725 pInverseGamma[i].DW1.InverseRChannelGammaCorrectionValue = 0;
726 pInverseGamma[i].DW2.InverseGChannelGammaCorrectionValue = 0;
727 pInverseGamma[i].DW3.InverseBChannelGammaCorrectionValue = 0;
728 }
729
730 pVeboxHdrState->DW17440.ToneMappingEnable = false;
731
732 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_HDR_FWD_GAMMA_CORRECTION_STATE_CMD *pForwardGamma = pVeboxHdrState->ForwardGammaLUTvalue;
733 for (uint32_t i = 0; i < 255; i++)
734 {
735 pForwardGamma[i].DW0.PointValueForForwardGammaLut = 256 * i;
736 pForwardGamma[i].DW1.ForwardRChannelGammaCorrectionValue = 256 * i;
737 pForwardGamma[i].DW2.ForwardGChannelGammaCorrectionValue = 256 * i;
738 pForwardGamma[i].DW3.ForwardBChannelGammaCorrectionValue = 256 * i;
739 }
740
741 pForwardGamma[255].DW0.PointValueForForwardGammaLut = 0xffff;
742 pForwardGamma[255].DW1.ForwardRChannelGammaCorrectionValue = 0xffff;
743 pForwardGamma[255].DW2.ForwardGChannelGammaCorrectionValue = 0xffff;
744 pForwardGamma[255].DW3.ForwardBChannelGammaCorrectionValue = 0xffff;
745
746 // Program CCM as identity matrix
747 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = false;
748 pIecpState->CcmState.DW1.C0 = 0x400000;
749 pIecpState->CcmState.DW0.C1 = 0;
750 pIecpState->CcmState.DW3.C2 = 0;
751 pIecpState->CcmState.DW2.C3 = 0;
752 pIecpState->CcmState.DW5.C4 = 0x400000;
753 pIecpState->CcmState.DW4.C5 = 0;
754 pIecpState->CcmState.DW7.C6 = 0;
755 pIecpState->CcmState.DW6.C7 = 0;
756 pIecpState->CcmState.DW8.C8 = 0x400000;
757 pIecpState->CcmState.DW9.OffsetInR = 0;
758 pIecpState->CcmState.DW10.OffsetInG = 0;
759 pIecpState->CcmState.DW11.OffsetInB = 0;
760 pIecpState->CcmState.DW12.OffsetOutR = 0;
761 pIecpState->CcmState.DW13.OffsetOutG = 0;
762 pIecpState->CcmState.DW14.OffsetOutB = 0;
763 }
764 else if (pVeboxIecpParams->s3DLutParams.bActive)
765 {
766 pVeboxHdrState->DW17440.ToneMappingEnable = false;
767
768 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_HDR_FWD_GAMMA_CORRECTION_STATE_CMD *pForwardGamma = pVeboxHdrState->ForwardGammaLUTvalue;
769 for (uint32_t i = 0; i < 255; i++)
770 {
771 pForwardGamma[i].DW0.PointValueForForwardGammaLut = 256 * i;
772 pForwardGamma[i].DW1.ForwardRChannelGammaCorrectionValue = 256 * i;
773 pForwardGamma[i].DW2.ForwardGChannelGammaCorrectionValue = 256 * i;
774 pForwardGamma[i].DW3.ForwardBChannelGammaCorrectionValue = 256 * i;
775 }
776
777 pForwardGamma[255].DW0.PointValueForForwardGammaLut = 0xffff;
778 pForwardGamma[255].DW1.ForwardRChannelGammaCorrectionValue = 0xffff;
779 pForwardGamma[255].DW2.ForwardGChannelGammaCorrectionValue = 0xffff;
780 pForwardGamma[255].DW3.ForwardBChannelGammaCorrectionValue = 0xffff;
781
782 // Program CCM as identity matrix
783 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = true;
784 pIecpState->CcmState.DW1.C0 = 0x400000;
785 pIecpState->CcmState.DW0.C1 = 0;
786 pIecpState->CcmState.DW3.C2 = 0;
787 pIecpState->CcmState.DW2.C3 = 0;
788 pIecpState->CcmState.DW5.C4 = 0x400000;
789 pIecpState->CcmState.DW4.C5 = 0;
790 pIecpState->CcmState.DW7.C6 = 0;
791 pIecpState->CcmState.DW6.C7 = 0;
792 pIecpState->CcmState.DW8.C8 = 0x400000;
793 pIecpState->CcmState.DW9.OffsetInR = 0;
794 pIecpState->CcmState.DW10.OffsetInG = 0;
795 pIecpState->CcmState.DW11.OffsetInB = 0;
796 pIecpState->CcmState.DW12.OffsetOutR = 0;
797 pIecpState->CcmState.DW13.OffsetOutG = 0;
798 pIecpState->CcmState.DW14.OffsetOutB = 0;
799 }
800 else if (pVeboxIecpParams->bCcmCscEnable)
801 {
802 uint32_t nLutInBitDepth = 12;
803 uint32_t nLutOutBitDepth = 32;
804 uint64_t maxValLutIn = (((uint64_t)1) << nLutInBitDepth) - 1;
805 uint64_t maxValLutOut = (((uint64_t)1) << nLutOutBitDepth) - 1;
806
807 // HW provides 4K 1DLUT inverse gamma and fill in with identity
808 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_HDR_INV_GAMMA_CORRECTION_STATE_CMD *pInverseGamma = pVeboxHdrState->PRGBCorrectedValue;
809 for (uint32_t i = 0; i < 4096; i++)
810 {
811 float x = (float)(i) / maxValLutIn;
812 uint32_t nCorrectedValue = (i < 4095) ? (uint32_t)(x * maxValLutOut + 0.5) : (uint32_t)(maxValLutOut);
813 pInverseGamma[i].DW0.Value = 0;
814 pInverseGamma[i].DW1.InverseRChannelGammaCorrectionValue = nCorrectedValue;
815 pInverseGamma[i].DW2.InverseGChannelGammaCorrectionValue = nCorrectedValue;
816 pInverseGamma[i].DW3.InverseBChannelGammaCorrectionValue = nCorrectedValue;
817 }
818 pVeboxHdrState->DW17440.ToneMappingEnable = false;
819 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = false;
820 if ((pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ||
821 (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709_FullRange))
822 {
823 pIecpState->CcmState.DW1.C0 = 0x00009937;
824 pIecpState->CcmState.DW0.C1 = 0x000115f6;
825 pIecpState->CcmState.DW3.C2 = 0;
826 pIecpState->CcmState.DW2.C3 = 0x00009937;
827 pIecpState->CcmState.DW5.C4 = 0x07ffe3f1;
828 pIecpState->CcmState.DW4.C5 = 0x07ffb9e0;
829 pIecpState->CcmState.DW7.C6 = 0x00009937;
830 pIecpState->CcmState.DW6.C7 = 0;
831 pIecpState->CcmState.DW8.C8 = 0x0000ebe6;
832 pIecpState->CcmState.DW9.OffsetInR = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xf8000000 : 0;
833 pIecpState->CcmState.DW10.OffsetInG = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xc0000000 : 0;
834 pIecpState->CcmState.DW11.OffsetInB = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xc0000000 : 0;
835 pIecpState->CcmState.DW12.OffsetOutR = 0;
836 pIecpState->CcmState.DW13.OffsetOutG = 0;
837 pIecpState->CcmState.DW14.OffsetOutB = 0;
838 }
839 else if ((pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ||
840 (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020_FullRange))
841 {
842 pIecpState->CcmState.DW1.C0 = 0x00009937;
843 pIecpState->CcmState.DW0.C1 = 0x000119d4;
844 pIecpState->CcmState.DW3.C2 = 0;
845 pIecpState->CcmState.DW2.C3 = 0x00009937;
846 pIecpState->CcmState.DW5.C4 = 0x07ffe75a;
847 pIecpState->CcmState.DW4.C5 = 0x07ffaa6a;
848 pIecpState->CcmState.DW7.C6 = 0x00009937;
849 pIecpState->CcmState.DW6.C7 = 0;
850 pIecpState->CcmState.DW8.C8 = 0x0000dce4;
851 pIecpState->CcmState.DW9.OffsetInR = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xf8000000 : 0;
852 pIecpState->CcmState.DW10.OffsetInG = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xc0000000 : 0;
853 pIecpState->CcmState.DW11.OffsetInB = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xc0000000 : 0;
854 pIecpState->CcmState.DW12.OffsetOutR = 0;
855 pIecpState->CcmState.DW13.OffsetOutG = 0;
856 pIecpState->CcmState.DW14.OffsetOutB = 0;
857 }
858 else
859 {
860 MHW_ASSERTMESSAGE("Unsupported Input Color Space!");
861 }
862 }
863
864 return eStatus;
865 }
866
Add1DLutState(void * & surface,PMHW_1DLUT_PARAMS p1DLutParams)867 MOS_STATUS Add1DLutState(void *&surface, PMHW_1DLUT_PARAMS p1DLutParams)
868 {
869 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_SHAPER_1K_LOOKUP_CMD *pShaper1KLut = ((mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_SHAPER_1K_LOOKUP_STATE_CMD *)surface)->VEBOXSHAPER1KLOOKUP;
870
871 MHW_CHK_NULL_RETURN(pShaper1KLut);
872
873 if (p1DLutParams && p1DLutParams->bActive && (p1DLutParams->LUTSize == 1024))
874 {
875 uint16_t *p1DLut = (uint16_t *)p1DLutParams->p1DLUT;
876
877 for (uint32_t i = 0; i < p1DLutParams->LUTSize; i++)
878 {
879 pShaper1KLut[i].DW0.RChannelValue = (uint16_t)(p1DLut[4 * i + 1]);
880 pShaper1KLut[i].DW1.GChannelValue = (uint16_t)(p1DLut[4 * i + 2]);
881 pShaper1KLut[i].DW1.BChannelValue = (uint16_t)(p1DLut[4 * i + 3]);
882 }
883 }
884 else if (p1DLutParams && p1DLutParams->bActive && (p1DLutParams->LUTSize == 256))
885 {
886 uint32_t cur_index = 0, pre_index = 0, point = 1;
887 uint16_t *p1DLut = (uint16_t *)p1DLutParams->p1DLUT;
888
889 pShaper1KLut[0].DW0.RChannelValue = (uint16_t)(p1DLut[1]);
890 pShaper1KLut[0].DW1.GChannelValue = (uint16_t)(p1DLut[2]);
891 pShaper1KLut[0].DW1.BChannelValue = (uint16_t)(p1DLut[3]);
892 for (uint32_t i = 1; i < 1024; i++)
893 {
894 for (uint32_t j = point; j <= 256; j++)
895 {
896 cur_index = 4 * j;
897 pre_index = cur_index ? 4 * (j - 1) : 0;
898 if (p1DLut[cur_index] == i * 64)
899 {
900 pShaper1KLut[i].DW0.RChannelValue = (p1DLut[cur_index + 1]);
901 pShaper1KLut[i].DW1.GChannelValue = (p1DLut[cur_index + 2]);
902 pShaper1KLut[i].DW1.BChannelValue = (p1DLut[cur_index + 3]);
903 point = j;
904 break;
905 }
906 else if (p1DLut[cur_index] > i * 64)
907 {
908 if (cur_index != pre_index)
909 {
910 pShaper1KLut[i].DW0.RChannelValue = p1DLut[pre_index + 1] + (p1DLut[cur_index + 1] - p1DLut[pre_index + 1]) * (i * 64 - p1DLut[pre_index]) / (p1DLut[cur_index] - p1DLut[pre_index]);
911 pShaper1KLut[i].DW1.GChannelValue = p1DLut[pre_index + 2] + (p1DLut[cur_index + 2] - p1DLut[pre_index + 2]) * (i * 64 - p1DLut[pre_index]) / (p1DLut[cur_index] - p1DLut[pre_index]);
912 pShaper1KLut[i].DW1.BChannelValue = p1DLut[pre_index + 3] + (p1DLut[cur_index + 3] - p1DLut[pre_index + 3]) * (i * 64 - p1DLut[pre_index]) / (p1DLut[cur_index] - p1DLut[pre_index]);
913 point = j;
914 break;
915 }
916 else
917 {
918 MHW_ASSERTMESSAGE("Error in map 256 LUT to 1k LUT");
919 }
920 }
921 }
922 }
923 }
924 else
925 {
926 MHW_NORMALMESSAGE("Fall back to the identity 1k 1dlut");
927 for (uint32_t i = 0; i < 1023; i++)
928 {
929 pShaper1KLut[i].DW0.RChannelValue = (uint16_t)(i * 64);
930 pShaper1KLut[i].DW1.GChannelValue = (uint16_t)(i * 64);
931 pShaper1KLut[i].DW1.BChannelValue = (uint16_t)(i * 64);
932 }
933 pShaper1KLut[1023].DW0.RChannelValue = 0xffff;
934 pShaper1KLut[1023].DW1.GChannelValue = 0xffff;
935 pShaper1KLut[1023].DW1.BChannelValue = 0xffff;
936 }
937 return MOS_STATUS_SUCCESS;
938 }
939
SetVeboxGamutState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)940 MOS_STATUS SetVeboxGamutState(
941 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
942 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
943 {
944 MHW_FUNCTION_ENTER;
945
946 MHW_VEBOX_HEAP *pVeboxHeap;
947 uint32_t uiOffset;
948 uint32_t i;
949 double dInverseGamma = 0;
950 double dForwardGamma = 1.0; // init as 1.0 as default to avoid divisor be 0
951 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
952 uint16_t usGE_Values[256][8] = {0};
953 bool bEnableCCM = false;
954
955 MHW_1DLUT_PARAMS *p1DLutParams = nullptr;
956 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD * pIecpState;
957 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState, gamutCmd;
958 mhw::vebox::xe2_lpm_base_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGEGammaCorrection;
959
960 MHW_CHK_NULL_RETURN(pVeboxGamutParams);
961 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
962 MHW_CHK_NULL_RETURN(m_veboxHeap);
963
964 pVeboxHeap = m_veboxHeap;
965 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
966
967 pIecpState =
968 (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
969 pVeboxHeap->uiIecpStateOffset +
970 uiOffset);
971 pVeboxGEGammaCorrection =
972 (mhw::vebox::xe2_lpm_base_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
973 pVeboxHeap->uiGamutStateOffset +
974 uiOffset);
975
976 MHW_CHK_NULL_RETURN(pIecpState);
977 MHW_CHK_NULL_RETURN(pVeboxGEGammaCorrection);
978
979 // Must initialize VeboxIecpState even if it is not used because GCE
980 // requires GlobalIECP enable bit to be turned on
981 if (!pVeboxIecpParams)
982 {
983 IecpStateInitialization(pIecpState);
984 }
985 pGamutState = &pIecpState->GamutState;
986 MHW_CHK_NULL_RETURN(pGamutState);
987
988 if (pVeboxGamutParams->GCompMode != MHW_GAMUT_MODE_NONE)
989 {
990 if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_BASIC)
991 {
992 pGamutState->DW15.Fullrangemappingenable = false;
993
994 if (pVeboxGamutParams->GCompBasicMode == gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR)
995 {
996 pGamutState->DW17.GccBasicmodeselection = gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR;
997 pGamutState->DW17.Basicmodescalingfactor =
998 pVeboxGamutParams->iBasicModeScalingFactor;
999 }
1000 }
1001 else if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_ADVANCED)
1002 {
1003 pGamutState->DW15.Fullrangemappingenable = true;
1004 pGamutState->DW15.D1Out = pVeboxGamutParams->iDout;
1005 pGamutState->DW15.DOutDefault = pVeboxGamutParams->iDoutDefault;
1006 pGamutState->DW15.DInDefault = pVeboxGamutParams->iDinDefault;
1007 pGamutState->DW16.D1In = pVeboxGamutParams->iDin;
1008 }
1009 else
1010 {
1011 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
1012 }
1013
1014 // Set Vertex Table if Gamut Compression is enabled
1015 SetVeboxVertexTable(pVeboxGamutParams->ColorSpace);
1016 }
1017
1018 // Initialize the Gamut_Expansion_Gamma_Correction.
1019 *pVeboxGEGammaCorrection = VeboxGEGammaCorrection;
1020 if (pVeboxGamutParams->bColorBalance)
1021 {
1022 // Need to convert YUV input to RGB before GE
1023 pIecpState->CscState.DW0.TransformEnable = true;
1024 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1025 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1026 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1027 {
1028 pIecpState->CscState.DW0.C0 = 76309;
1029 pIecpState->CscState.DW1.C1 = 0;
1030 pIecpState->CscState.DW2.C2 = 104597;
1031 pIecpState->CscState.DW3.C3 = 76309;
1032 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-25675, 19);
1033 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-53279, 19);
1034 pIecpState->CscState.DW6.C6 = 76309;
1035 pIecpState->CscState.DW7.C7 = 132201;
1036 pIecpState->CscState.DW8.C8 = 0;
1037 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1038 pIecpState->CscState.DW9.OffsetOut1 = 0;
1039 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1040 pIecpState->CscState.DW10.OffsetOut2 = 0;
1041 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1042 pIecpState->CscState.DW11.OffsetOut3 = 0;
1043 }
1044 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1045 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1046 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1047 {
1048 pIecpState->CscState.DW0.C0 = 76309;
1049 pIecpState->CscState.DW1.C1 = 0;
1050 pIecpState->CscState.DW2.C2 = 117489;
1051 pIecpState->CscState.DW3.C3 = 76309;
1052 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-13975, 19);
1053 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-34925, 19);
1054 pIecpState->CscState.DW6.C6 = 76309;
1055 pIecpState->CscState.DW7.C7 = 138438;
1056 pIecpState->CscState.DW8.C8 = 0;
1057 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1058 pIecpState->CscState.DW9.OffsetOut1 = 0;
1059 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1060 pIecpState->CscState.DW10.OffsetOut2 = 0;
1061 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1062 pIecpState->CscState.DW11.OffsetOut3 = 0;
1063 }
1064 else
1065 {
1066 MHW_ASSERTMESSAGE("Unknown primary");
1067 }
1068
1069 pGamutState->DW0.GlobalModeEnable = true;
1070 pGamutState->DW1.CmW = 1023;
1071
1072 pGamutState->DW1.C0 = pVeboxGamutParams->Matrix[0][0];
1073 pGamutState->DW0.C1 = pVeboxGamutParams->Matrix[0][1];
1074 pGamutState->DW3.C2 = pVeboxGamutParams->Matrix[0][2];
1075 pGamutState->DW2.C3 = pVeboxGamutParams->Matrix[1][0];
1076 pGamutState->DW5.C4 = pVeboxGamutParams->Matrix[1][1];
1077 pGamutState->DW4.C5 = pVeboxGamutParams->Matrix[1][2];
1078 pGamutState->DW7.C6 = pVeboxGamutParams->Matrix[2][0];
1079 pGamutState->DW6.C7 = pVeboxGamutParams->Matrix[2][1];
1080 pGamutState->DW8.C8 = pVeboxGamutParams->Matrix[2][2];
1081 pGamutState->DW9.OffsetInR = 0;
1082 pGamutState->DW10.OffsetInG = 0;
1083 pGamutState->DW11.OffsetInB = 0;
1084 pGamutState->DW12.OffsetOutR = 0;
1085 pGamutState->DW13.OffsetOutG = 0;
1086 pGamutState->DW14.OffsetOutB = 0;
1087
1088 for (i = 0; i < 256; i++)
1089 {
1090 usGE_Values[i][0] = 257 * i;
1091 usGE_Values[i][1] =
1092 usGE_Values[i][2] =
1093 usGE_Values[i][3] = 257 * i;
1094
1095 usGE_Values[i][4] = 257 * i;
1096 usGE_Values[i][5] =
1097 usGE_Values[i][6] =
1098 usGE_Values[i][7] = 257 * i;
1099 }
1100 // Copy two uint16_t to one DW (UNT32).
1101 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1102 }
1103 else if(pVeboxGamutParams->GExpMode != MHW_GAMUT_MODE_NONE)
1104 {
1105 // Need to convert YUV input to RGB before GE
1106 pIecpState->CscState.DW0.TransformEnable = true;
1107 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1108 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1109 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1110 {
1111 pIecpState->CscState.DW0.C0 = 1192;
1112 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-2, 19);
1113 pIecpState->CscState.DW2.C2 = 1634;
1114 pIecpState->CscState.DW3.C3 = 1192;
1115 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-401, 19);
1116 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-833, 19);
1117 pIecpState->CscState.DW6.C6 = 1192;
1118 pIecpState->CscState.DW7.C7 = 2066;
1119 pIecpState->CscState.DW8.C8 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1120 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1121 pIecpState->CscState.DW9.OffsetOut1 = 0;
1122 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1123 pIecpState->CscState.DW10.OffsetOut2 = 0;
1124 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1125 pIecpState->CscState.DW11.OffsetOut3 = 0;
1126 }
1127 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1128 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1129 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1130 {
1131 pIecpState->CscState.DW0.C0 = 1192;
1132 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1133 pIecpState->CscState.DW2.C2 = 1835;
1134 pIecpState->CscState.DW3.C3 = 1192;
1135 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-218, 19);
1136 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-537, 19);
1137 pIecpState->CscState.DW6.C6 = 1192;
1138 pIecpState->CscState.DW7.C7 = 2164;
1139 pIecpState->CscState.DW8.C8 = 1;
1140 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1141 pIecpState->CscState.DW9.OffsetOut1 = 0;
1142 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1143 pIecpState->CscState.DW10.OffsetOut2 = 0;
1144 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1145 pIecpState->CscState.DW11.OffsetOut3 = 0;
1146 }
1147 else
1148 {
1149 MHW_ASSERTMESSAGE("Unknown primary");
1150 }
1151
1152 if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_BASIC)
1153 {
1154 pGamutState->DW0.GlobalModeEnable = true;
1155 pGamutState->DW1.CmW = 1023;
1156 }
1157 else if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_ADVANCED)
1158 {
1159 pGamutState->DW0.GlobalModeEnable = false;
1160 }
1161 else
1162 {
1163 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
1164 }
1165
1166 pGamutState->DW1.C0 = pVeboxGamutParams->Matrix[0][0];
1167 pGamutState->DW0.C1 = pVeboxGamutParams->Matrix[0][1];
1168 pGamutState->DW3.C2 = pVeboxGamutParams->Matrix[0][2];
1169 pGamutState->DW2.C3 = pVeboxGamutParams->Matrix[1][0];
1170 pGamutState->DW5.C4 = pVeboxGamutParams->Matrix[1][1];
1171 pGamutState->DW4.C5 = pVeboxGamutParams->Matrix[1][2];
1172 pGamutState->DW7.C6 = pVeboxGamutParams->Matrix[2][0];
1173 pGamutState->DW6.C7 = pVeboxGamutParams->Matrix[2][1];
1174 pGamutState->DW8.C8 = pVeboxGamutParams->Matrix[2][2];
1175 }
1176 else if (pVeboxGamutParams->bGammaCorr)
1177 {
1178 // Need to convert YUV input to RGB before Gamma Correction
1179 pIecpState->CscState.DW0.TransformEnable = true;
1180 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1181 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1182 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1183 {
1184 pIecpState->CscState.DW0.C0 = 76309;
1185 pIecpState->CscState.DW1.C1 = 0;
1186 pIecpState->CscState.DW2.C2 = 104597;
1187 pIecpState->CscState.DW3.C3 = 76309;
1188 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-25675, 19);
1189 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-53279, 19);
1190 pIecpState->CscState.DW6.C6 = 76309;
1191 pIecpState->CscState.DW7.C7 = 132201;
1192 pIecpState->CscState.DW8.C8 = 0;
1193 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1194 pIecpState->CscState.DW9.OffsetOut1 = 0;
1195 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1196 pIecpState->CscState.DW10.OffsetOut2 = 0;
1197 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1198 pIecpState->CscState.DW11.OffsetOut3 = 0;
1199 }
1200 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1201 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1202 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1203 {
1204 pIecpState->CscState.DW0.C0 = 76309;
1205 pIecpState->CscState.DW1.C1 = 0;
1206 pIecpState->CscState.DW2.C2 = 117489;
1207 pIecpState->CscState.DW3.C3 = 76309;
1208 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-13975, 19);
1209 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-34925, 19);
1210 pIecpState->CscState.DW6.C6 = 76309;
1211 pIecpState->CscState.DW7.C7 = 138438;
1212 pIecpState->CscState.DW8.C8 = 0;
1213 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1214 pIecpState->CscState.DW9.OffsetOut1 = 0;
1215 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1216 pIecpState->CscState.DW10.OffsetOut2 = 0;
1217 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1218 pIecpState->CscState.DW11.OffsetOut3 = 0;
1219 }
1220 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020 ||
1221 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange)
1222 {
1223 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1224 }
1225 else
1226 {
1227 MHW_ASSERTMESSAGE("Unknown primary");
1228 }
1229
1230 // CCM is needed for CSC(BT2020->BT709/BT601 or vice versa with Different Gamma).
1231 bEnableCCM = (pVeboxGamutParams->InputGammaValue == pVeboxGamutParams->OutputGammaValue) ? false : true;
1232 pGamutState->DW0.GlobalModeEnable = true;
1233 pGamutState->DW1.CmW = 1023;
1234 if ((pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) && bEnableCCM)
1235 {
1236 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT709)
1237 {
1238 pGamutState->DW1.C0 = 108190;
1239 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1240 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1241 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1242 pGamutState->DW5.C4 = 74174;
1243 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1244 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1245 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1246 pGamutState->DW8.C8 = 73321;
1247 }
1248 else
1249 {
1250 pGamutState->DW1.C0 = 116420;
1251 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1252 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1253 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1254 pGamutState->DW5.C4 = 77814;
1255 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1256 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1257 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1258 pGamutState->DW8.C8 = 72864;
1259 }
1260 }
1261 else
1262 {
1263 pGamutState->DW1.C0 = 65536;
1264 pGamutState->DW0.C1 = 0;
1265 pGamutState->DW3.C2 = 0;
1266 pGamutState->DW2.C3 = 0;
1267 pGamutState->DW5.C4 = 65536;
1268 pGamutState->DW4.C5 = 0;
1269 pGamutState->DW7.C6 = 0;
1270 pGamutState->DW6.C7 = 0;
1271 pGamutState->DW8.C8 = 65536;
1272 pGamutState->DW9.OffsetInR = 0;
1273 pGamutState->DW10.OffsetInG = 0;
1274 pGamutState->DW11.OffsetInB = 0;
1275 pGamutState->DW12.OffsetOutR = 0;
1276 pGamutState->DW13.OffsetOutG = 0;
1277 pGamutState->DW14.OffsetOutB = 0;
1278 }
1279
1280 if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0)
1281 {
1282 dInverseGamma = 1.0;
1283 }
1284 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P2)
1285 {
1286 dInverseGamma = 2.2;
1287 }
1288 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P6)
1289 {
1290 dInverseGamma = 2.6;
1291 }
1292 else
1293 {
1294 MHW_ASSERTMESSAGE("Invalid InputGammaValue");
1295 }
1296
1297 if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0)
1298 {
1299 dForwardGamma = 1.0;
1300 }
1301 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P2)
1302 {
1303 dForwardGamma = 2.2;
1304 }
1305 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P6)
1306 {
1307 dForwardGamma = 2.6;
1308 }
1309 else
1310 {
1311 MHW_ASSERTMESSAGE("Invalid OutputGammaValue");
1312 }
1313 if ((pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0) && (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0))
1314 {
1315 for (i = 0; i < 256; i++)
1316 {
1317 usGE_Values[i][0] = 257 * i;
1318 usGE_Values[i][1] =
1319 usGE_Values[i][2] =
1320 usGE_Values[i][3] = 257 * i;
1321
1322 usGE_Values[i][4] = 257 * i;
1323 usGE_Values[i][5] =
1324 usGE_Values[i][6] =
1325 usGE_Values[i][7] = 257 * i;
1326 }
1327 // Copy two uint16_t to one DW (UNT32).
1328 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1329 }
1330 else
1331 {
1332 for (i = 0; i < 255; i++)
1333 {
1334 usGE_Values[i][0] = 256 * i;
1335 usGE_Values[i][1] =
1336 usGE_Values[i][2] =
1337 usGE_Values[i][3] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), dInverseGamma) * 65536);
1338
1339 usGE_Values[i][4] = 256 * i;
1340 usGE_Values[i][5] =
1341 usGE_Values[i][6] =
1342 usGE_Values[i][7] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), 1 / dForwardGamma) * 65536);
1343 }
1344 // Copy two uint16_t to one DW (UNT32).
1345 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1020, usGE_Values, sizeof(uint16_t) * 8 * 255);
1346 }
1347 }
1348 else if (pVeboxGamutParams->bH2S)
1349 {
1350 VeboxInterface_H2SManualMode(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1351 }
1352 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020 ||
1353 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // BT2020 CSC case
1354 {
1355 if (pVeboxIecpParams->s1DLutParams.bActive)
1356 {
1357 //CCM setting if 1Dlut VEBOX HDR enabled
1358 p1DLutParams = &pVeboxIecpParams->s1DLutParams;
1359
1360 pIecpState->CcmState.DW1.C0 = p1DLutParams->pCCM[0];
1361 pIecpState->CcmState.DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[1], 27);
1362 pIecpState->CcmState.DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[2], 27);
1363 pIecpState->CcmState.DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[3], 27);
1364 pIecpState->CcmState.DW5.C4 = p1DLutParams->pCCM[4];
1365 pIecpState->CcmState.DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[5], 27);
1366 pIecpState->CcmState.DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[6], 27);
1367 pIecpState->CcmState.DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[7], 27);
1368 pIecpState->CcmState.DW8.C8 = p1DLutParams->pCCM[8];
1369 pIecpState->CcmState.DW9.OffsetInR = p1DLutParams->pCCM[9];
1370 pIecpState->CcmState.DW10.OffsetInG = p1DLutParams->pCCM[10];
1371 pIecpState->CcmState.DW11.OffsetInB = p1DLutParams->pCCM[11];
1372 pIecpState->CcmState.DW12.OffsetOutR = p1DLutParams->pCCM[12];
1373 pIecpState->CcmState.DW13.OffsetOutG = p1DLutParams->pCCM[13];
1374 pIecpState->CcmState.DW14.OffsetOutB = p1DLutParams->pCCM[14];
1375
1376 pGamutState->DW0.GlobalModeEnable = false;
1377 // Still need to set CSC params here
1378 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1379
1380 return eStatus;
1381 }
1382
1383 pGamutState->DW0.GlobalModeEnable = true;
1384 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
1385 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT601)
1386 {
1387 pGamutState->DW1.C0 = 116420;
1388 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1389 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1390 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1391 pGamutState->DW5.C4 = 77814;
1392 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1393 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1394 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1395 pGamutState->DW8.C8 = 72864;
1396 }
1397 else //BT709, sRGB has same chromaticity CIE 1931
1398 {
1399 pGamutState->DW1.C0 = 108190;
1400 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1401 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1402 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1403 pGamutState->DW5.C4 = 74174;
1404 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1405 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1406 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1407 pGamutState->DW8.C8 = 73321;
1408 }
1409
1410 for (i = 0; i < 256; i++)
1411 {
1412 usGE_Values[i][0] = (uint16_t)g_Vebox_BT2020_Inverse_Pixel_Value[i];
1413 usGE_Values[i][1] =
1414 usGE_Values[i][2] =
1415 usGE_Values[i][3] = (uint16_t)g_Vebox_BT2020_Inverse_Gamma_LUT[i];
1416
1417 usGE_Values[i][4] = (uint16_t)g_Vebox_BT2020_Forward_Pixel_Value[i];
1418 usGE_Values[i][5] =
1419 usGE_Values[i][6] =
1420 usGE_Values[i][7] = (uint16_t)g_Vebox_BT2020_Forward_Gamma_LUT[i];
1421 }
1422 // Copy two UNT16 to one DW(UNT32).
1423 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1424 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
1425 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1426 }
1427 else if (pVeboxIecpParams && pVeboxIecpParams->s1DLutParams.bActive && (pVeboxIecpParams->s1DLutParams.LUTSize == 256))
1428 {
1429 MHW_NORMALMESSAGE("Use VEBOX_SHAPER_1K_LOOKUP_STATE for 1DLUT (4x 1DLUT but Gamut State only has 1DLUT)!");
1430 }
1431 else
1432 {
1433 MHW_ASSERTMESSAGE("Unknown branch!");
1434 }
1435
1436 return eStatus;
1437 }
1438
DumpDNDIStates(uint8_t * pDndiSate)1439 MOS_STATUS DumpDNDIStates(uint8_t *pDndiSate)
1440 {
1441 MHW_FUNCTION_ENTER;
1442 MHW_CHK_NULL_RETURN(pDndiSate);
1443 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_DNDI_STATE_CMD *pVeboxDndiState = (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_DNDI_STATE_CMD *)pDndiSate;
1444
1445 MHW_VERBOSEMESSAGE("VeboxDndiState, DW 34-47 is DI related DW, others is DN.");
1446 MHW_VERBOSEMESSAGE("DW0:DenoiseMaximumHistory %d, DenoiseStadThreshold %d", pVeboxDndiState->DW0.DenoiseMaximumHistory, pVeboxDndiState->DW0.DenoiseStadThreshold);
1447 MHW_VERBOSEMESSAGE("DW1:DenoiseAsdThreshold %d, DenoiseHistoryIncrease %d, DenoiseMovingPixelThreshold %d", pVeboxDndiState->DW1.DenoiseAsdThreshold, pVeboxDndiState->DW1.DenoiseHistoryIncrease, pVeboxDndiState->DW1.DenoiseMovingPixelThreshold);
1448 MHW_VERBOSEMESSAGE("DW2:InitialDenoiseHistory %d, TemporalDifferenceThreshold %d", pVeboxDndiState->DW2.InitialDenoiseHistory, pVeboxDndiState->DW2.TemporalDifferenceThreshold);
1449 MHW_VERBOSEMESSAGE("DW3:HotPixelCountLuma %d, LowTemporalDifferenceThreshold %d, ProgressiveDn %d, TemporalGneEnable %d", pVeboxDndiState->DW3.HotPixelCountLuma, pVeboxDndiState->DW3.LowTemporalDifferenceThreshold, pVeboxDndiState->DW3.ProgressiveDn, pVeboxDndiState->DW3.TemporalGneEnable);
1450 MHW_VERBOSEMESSAGE("DW4:BlockNoiseEstimateNoiseThreshold %d, DenoiseThresholdForSumOfComplexityMeasureLuma %d, DW4.HotPixelThresholdLuma %d", pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold, pVeboxDndiState->DW4.DenoiseThresholdForSumOfComplexityMeasureLuma, pVeboxDndiState->DW4.HotPixelThresholdLuma);
1451 MHW_VERBOSEMESSAGE("DW5:ChromaDenoiseStadThreshold %d, HotPixelCountChromaU %d, HotPixelThresholdChromaU %d", pVeboxDndiState->DW5.ChromaDenoiseStadThreshold, pVeboxDndiState->DW5.HotPixelCountChromaU, pVeboxDndiState->DW5.HotPixelThresholdChromaU);
1452 MHW_VERBOSEMESSAGE("DW6:BlockNoiseEstimateEdgeThreshold %d, ChromaDenoiseEnable %d, ChromaTemporalDifferenceThreshold %d", pVeboxDndiState->DW6.BlockNoiseEstimateEdgeThreshold, pVeboxDndiState->DW6.ChromaDenoiseEnable, pVeboxDndiState->DW6.ChromaTemporalDifferenceThreshold);
1453 MHW_VERBOSEMESSAGE("DW7:ChromaLowTemporalDifferenceThreshold %d, HotPixelCountChromaV %d, HotPixelThresholdChromaV %d", pVeboxDndiState->DW7.ChromaLowTemporalDifferenceThreshold, pVeboxDndiState->DW7.HotPixelCountChromaV, pVeboxDndiState->DW7.HotPixelThresholdChromaV);
1454 MHW_VERBOSEMESSAGE("DW8:ChromaDenoiseAsdThreshold %d, ChromaDenoiseMovingPixelThreshold %d, ChromaDenoiseThresholdForSumOfComplexityMeasure %d", pVeboxDndiState->DW8.ChromaDenoiseAsdThreshold, pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold, pVeboxDndiState->DW8.ChromaDenoiseThresholdForSumOfComplexityMeasure);
1455 MHW_VERBOSEMESSAGE("DW9:DnyWr040 %d, DnyWr140 %d, DnyWr240 %d, DnyWr340 %d, DnyWr440 %d, DnyWr540 %d", pVeboxDndiState->DW9.DnyWr040, pVeboxDndiState->DW9.DnyWr140, pVeboxDndiState->DW9.DnyWr240, pVeboxDndiState->DW9.DnyWr340, pVeboxDndiState->DW9.DnyWr440, pVeboxDndiState->DW9.DnyWr540);
1456 MHW_VERBOSEMESSAGE("DW10:DnyThmax120 %d, DnyThmin120 %d, DW11: DnyDynThmin120 %d, DnyPrt5120 %d", pVeboxDndiState->DW10.DnyThmax120, pVeboxDndiState->DW10.DnyThmin120, pVeboxDndiState->DW11.DnyDynThmin120, pVeboxDndiState->DW11.DnyPrt5120);
1457 MHW_VERBOSEMESSAGE("DW12:DnyPrt3120 %d, DnyPrt4120 %d, DW13:DnyPrt1120 %d, DnyPrt2120 %d", pVeboxDndiState->DW12.DnyPrt3120, pVeboxDndiState->DW12.DnyPrt4120, pVeboxDndiState->DW13.DnyPrt1120, pVeboxDndiState->DW13.DnyPrt2120);
1458 MHW_VERBOSEMESSAGE("DW14:DnyPrt0120 %d, DnyWd2040 %d, DnyWd2140 %d, DnyWd2240 %d", pVeboxDndiState->DW14.DnyPrt0120, pVeboxDndiState->DW14.DnyWd2040, pVeboxDndiState->DW14.DnyWd2140, pVeboxDndiState->DW14.DnyWd2240);
1459 MHW_VERBOSEMESSAGE("DW15:DnyWd0040 %d, DnyWd0140 %d, DnyWd0240 %d, DnyWd1040 %d, DnyWd1140 %d, DnyWd1240 %d", pVeboxDndiState->DW15.DnyWd0040, pVeboxDndiState->DW15.DnyWd0140, pVeboxDndiState->DW15.DnyWd0240, pVeboxDndiState->DW15.DnyWd1040, pVeboxDndiState->DW15.DnyWd1140, pVeboxDndiState->DW15.DnyWd1240);
1460 MHW_VERBOSEMESSAGE("DW16:DnuWr040 %d, DnuWr140 %d, DnuWr240 %d, DnuWr340 %d, DnuWr440 %d, DnuWr540 %d", pVeboxDndiState->DW16.DnuWr040, pVeboxDndiState->DW16.DnuWr140, pVeboxDndiState->DW16.DnuWr240, pVeboxDndiState->DW16.DnuWr340, pVeboxDndiState->DW16.DnuWr440, pVeboxDndiState->DW16.DnuWr540);
1461 MHW_VERBOSEMESSAGE("DW17:DnuThmax120 %d, DnuThmin120 %d", pVeboxDndiState->DW17.DnuThmax120, pVeboxDndiState->DW17.DnuThmin120);
1462 MHW_VERBOSEMESSAGE("DW18:DnuDynThmin120 %d, DnuPrt5120 %d", pVeboxDndiState->DW18.DnuDynThmin120, pVeboxDndiState->DW18.DnuPrt5120);
1463 MHW_VERBOSEMESSAGE("DW19:DnuPrt3120 %d, DnuPrt4120 %d, DW20:DnuPrt1120 %d, DnuPrt2120 %d", pVeboxDndiState->DW19.DnuPrt3120, pVeboxDndiState->DW19.DnuPrt4120, pVeboxDndiState->DW20.DnuPrt1120, pVeboxDndiState->DW20.DnuPrt2120);
1464 MHW_VERBOSEMESSAGE("DW21:DnuPrt0120 %d, DnuWd2040 %d, DnuWd2140 %d, DnuWd2240 %d", pVeboxDndiState->DW21.DnuPrt0120, pVeboxDndiState->DW21.DnuWd2040, pVeboxDndiState->DW21.DnuWd2140, pVeboxDndiState->DW21.DnuWd2240);
1465 MHW_VERBOSEMESSAGE("DW22:DnuWd0040 %d, DnuWd0140 %d, DnuWd0240 %d, DnuWd1040 %d, DnuWd1140 %d, DnuWd1240 %d", pVeboxDndiState->DW22.DnuWd0040, pVeboxDndiState->DW22.DnuWd0140, pVeboxDndiState->DW22.DnuWd0240, pVeboxDndiState->DW22.DnuWd1040, pVeboxDndiState->DW22.DnuWd1140, pVeboxDndiState->DW22.DnuWd1240);
1466 MHW_VERBOSEMESSAGE("DW23:DnvWr040 %d, DnvWr240 %d, DnvWr340 %d, DnvWr440 %d, DnvWr5140 %d, DnvWr540", pVeboxDndiState->DW23.DnvWr040, pVeboxDndiState->DW23.DnvWr240, pVeboxDndiState->DW23.DnvWr340, pVeboxDndiState->DW23.DnvWr440, pVeboxDndiState->DW23.DnvWr5140, pVeboxDndiState->DW23.DnvWr540);
1467 MHW_VERBOSEMESSAGE("DW24:DnvThmax120 %d, DnvThmin120 %d, DW25:DnvDynThmin120 %d, DnvPrt5120 %d", pVeboxDndiState->DW24.DnvThmax120, pVeboxDndiState->DW24.DnvThmin120, pVeboxDndiState->DW25.DnvDynThmin120, pVeboxDndiState->DW25.DnvPrt5120);
1468 MHW_VERBOSEMESSAGE("DW26:DnvPrt3120 %d, DnvPrt4120 %d, DW27:DnvPrt1120 %d, DnvPrt2120 %d", pVeboxDndiState->DW26.DnvPrt3120, pVeboxDndiState->DW26.DnvPrt4120, pVeboxDndiState->DW27.DnvPrt1120, pVeboxDndiState->DW27.DnvPrt2120);
1469 MHW_VERBOSEMESSAGE("DW28:DnvPrt0120 %d, DnvWd2040 %d, DnvWd2140 %d, DnvWd2240 %d", pVeboxDndiState->DW28.DnvPrt0120, pVeboxDndiState->DW28.DnvWd2040, pVeboxDndiState->DW28.DnvWd2140, pVeboxDndiState->DW28.DnvWd2240);
1470 MHW_VERBOSEMESSAGE("DW29:DnvWd0040 %d, DnvWd0140 %d, DnvWd0240 %d, DnvWd1040 %d, DnvWd1140 %d, DnvWd1240 %d", pVeboxDndiState->DW29.DnvWd0040, pVeboxDndiState->DW29.DnvWd0140, pVeboxDndiState->DW29.DnvWd0240, pVeboxDndiState->DW29.DnvWd1040, pVeboxDndiState->DW29.DnvWd1140, pVeboxDndiState->DW29.DnvWd1240);
1471 MHW_VERBOSEMESSAGE("DW30:EightDirectionEdgeThreshold %d, ValidPixelThreshold %d", pVeboxDndiState->DW30.EightDirectionEdgeThreshold, pVeboxDndiState->DW30.ValidPixelThreshold);
1472 MHW_VERBOSEMESSAGE("DW31:LargeSobelThreshold %d, SmallSobelCountThreshold %d, SmallSobelThreshold %d", pVeboxDndiState->DW31.LargeSobelThreshold, pVeboxDndiState->DW31.SmallSobelCountThreshold, pVeboxDndiState->DW31.SmallSobelThreshold);
1473 MHW_VERBOSEMESSAGE("DW32:BlockSigmaDiffThreshold %d, LargeSobelCountThreshold %d, MedianSobelCountThreshold %d, DW33:MaxSobelThreshold %d", pVeboxDndiState->DW32.BlockSigmaDiffThreshold, pVeboxDndiState->DW32.LargeSobelCountThreshold, pVeboxDndiState->DW32.MedianSobelCountThreshold, pVeboxDndiState->DW33.MaxSobelThreshold);
1474 MHW_VERBOSEMESSAGE("DW34:SmoothMvThreshold %d, SadTightThreshold %d, ContentAdaptiveThresholdSlope %d, StmmC2 %d, SignBitForSmoothMvThreshold %d, SignBitForMaximumStmm %d, SignBitForMinimumStmm %d, Reserved1104 %d",
1475 pVeboxDndiState->DW34.SmoothMvThreshold,pVeboxDndiState->DW34.SadTightThreshold,pVeboxDndiState->DW34.ContentAdaptiveThresholdSlope,pVeboxDndiState->DW34.StmmC2,pVeboxDndiState->DW34.SignBitForSmoothMvThreshold,pVeboxDndiState->DW34.SignBitForMaximumStmm, pVeboxDndiState->DW34.SignBitForMinimumStmm,pVeboxDndiState->DW34.Reserved1104);
1476 MHW_VERBOSEMESSAGE("DW35:MaximumStmm %d, MultiplierForVecm %d, Reserved1134 %d, BlendingConstantAcrossTimeForSmallValuesOfStmm %d, BlendingConstantAcrossTimeForLargeValuesOfStmm %d, StmmBlendingConstantSelect %d",
1477 pVeboxDndiState->DW35.MaximumStmm,pVeboxDndiState->DW35.MultiplierForVecm,pVeboxDndiState->DW35.Reserved1134,pVeboxDndiState->DW35.BlendingConstantAcrossTimeForSmallValuesOfStmm,pVeboxDndiState->DW35.BlendingConstantAcrossTimeForLargeValuesOfStmm,pVeboxDndiState->DW35.StmmBlendingConstantSelect);
1478 MHW_VERBOSEMESSAGE("DW36:FmdTemporalDifferenceThreshold %d, LumatdmWt %d, ChromatdmWt %d, StmmOutputShift %d, StmmShiftUp %d, StmmShiftDown %d, MinimumStmm %d",
1479 pVeboxDndiState->DW36.FmdTemporalDifferenceThreshold,pVeboxDndiState->DW36.LumatdmWt,pVeboxDndiState->DW36.ChromatdmWt,pVeboxDndiState->DW36.StmmOutputShift,pVeboxDndiState->DW36.StmmShiftUp,pVeboxDndiState->DW36.StmmShiftDown,pVeboxDndiState->DW36.MinimumStmm);
1480 MHW_VERBOSEMESSAGE("DW37:CoringThresholdForSvcm %d, DeltabitValueForSvcm %d, Reserved1196 %d, CoringThresholdForShcm %d, DeltabitValueForShcm %d, Reserved1212 %d",
1481 pVeboxDndiState->DW37.CoringThresholdForSvcm,pVeboxDndiState->DW37.DeltabitValueForSvcm,pVeboxDndiState->DW37.Reserved1196,pVeboxDndiState->DW37.CoringThresholdForShcm,pVeboxDndiState->DW37.DeltabitValueForShcm,pVeboxDndiState->DW37.Reserved1212);
1482 MHW_VERBOSEMESSAGE("DW38:Reserved1216 %d, DnDiTopFirst %d, Reserved1220 %d, McdiEnable %d, FmdTearThreshold %d, CatThreshold %d, Fmd2VerticalDifferenceThreshold %d, Fmd1VerticalDifferenceThreshold %d",
1483 pVeboxDndiState->DW38.Reserved1216,pVeboxDndiState->DW38.DnDiTopFirst,pVeboxDndiState->DW38.Reserved1220,pVeboxDndiState->DW38.McdiEnable,pVeboxDndiState->DW38.FmdTearThreshold,pVeboxDndiState->DW38.CatThreshold,pVeboxDndiState->DW38.Fmd2VerticalDifferenceThreshold,pVeboxDndiState->DW38.Fmd1VerticalDifferenceThreshold);
1484 MHW_VERBOSEMESSAGE("DW39:SadTha %d, SadThb %d, ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame %d, McPixelConsistencyThreshold %d, ProgressiveCadenceReconstructionForSecondFieldOfPreviousFrame %d, Reserved1266 %d, NeighborPixelThreshold %d, ChromaSmallerWindowForTdm %d, LumaSmallerWindowForTdm %d, Fastercovergence %d, Reserved1274 %d",
1485 pVeboxDndiState->DW39.SadTha,pVeboxDndiState->DW39.SadThb,pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame,pVeboxDndiState->DW39.McPixelConsistencyThreshold,pVeboxDndiState->DW39.ProgressiveCadenceReconstructionForSecondFieldOfPreviousFrame,
1486 pVeboxDndiState->DW39.Reserved1266,pVeboxDndiState->DW39.NeighborPixelThreshold,pVeboxDndiState->DW39.ChromaSmallerWindowForTdm, pVeboxDndiState->DW39.LumaSmallerWindowForTdm,pVeboxDndiState->DW39.Fastercovergence,pVeboxDndiState->DW39.Reserved1274);
1487 MHW_VERBOSEMESSAGE("DW40:SadWt0 %d, SadWt1 %d, SadWt2 %d, SadWt3 %d", pVeboxDndiState->DW40.SadWt0, pVeboxDndiState->DW40.SadWt1, pVeboxDndiState->DW40.SadWt2, pVeboxDndiState->DW40.SadWt3);
1488 MHW_VERBOSEMESSAGE("DW41:SadWt4 %d, SadWt6 %d, CoringThresholdForLumaSadCalculation %d, CoringThresholdForChromaSadCalculation %d", pVeboxDndiState->DW41.SadWt4, pVeboxDndiState->DW41.SadWt6, pVeboxDndiState->DW41.CoringThresholdForLumaSadCalculation, pVeboxDndiState->DW41.CoringThresholdForChromaSadCalculation);
1489 MHW_VERBOSEMESSAGE("DW42:ParDiffcheckslackthreshold %d, ParTearinghighthreshold %d, ParTearinglowthreshold %d, ParDirectioncheckth %d, ParSyntheticcontentcheck %d, ParLocalcheck %d, ParUsesyntheticcontentmedian %d, BypassDeflicker %d, Reserved1375 %d",
1490 pVeboxDndiState->DW42.ParDiffcheckslackthreshold,pVeboxDndiState->DW42.ParTearinghighthreshold,pVeboxDndiState->DW42.ParTearinglowthreshold,pVeboxDndiState->DW42.ParDirectioncheckth,pVeboxDndiState->DW42.ParSyntheticcontentcheck,
1491 pVeboxDndiState->DW42.ParLocalcheck,pVeboxDndiState->DW42.ParUsesyntheticcontentmedian,pVeboxDndiState->DW42.BypassDeflicker, pVeboxDndiState->DW42.Reserved1375);
1492 MHW_VERBOSEMESSAGE("DW43:Lpfwtlut0 %d, Lpfwtlut1 %d, Lpfwtlut2 %d, Lpfwtlut3 %d", pVeboxDndiState->DW43.Lpfwtlut0, pVeboxDndiState->DW43.Lpfwtlut1, pVeboxDndiState->DW43.Lpfwtlut2, pVeboxDndiState->DW43.Lpfwtlut3);
1493 MHW_VERBOSEMESSAGE("DW44:Lpfwtlut4 %d, Lpfwtlut5 %d, Lpfwtlut6 %d, Lpfwtlut7 %d", pVeboxDndiState->DW44.Lpfwtlut4, pVeboxDndiState->DW44.Lpfwtlut5, pVeboxDndiState->DW44.Lpfwtlut6, pVeboxDndiState->DW44.Lpfwtlut7);
1494 MHW_VERBOSEMESSAGE("DW45:TdmUvThreshold %d, HvUvThreshold %d, TdmHarmonicFactorSynthetic %d, TdmHarmonicFactorNatural %d, SynthticFrame %d, SyntheticContentThreshold %d", pVeboxDndiState->DW45.TdmUvThreshold, pVeboxDndiState->DW45.HvUvThreshold, pVeboxDndiState->DW45.TdmHarmonicFactorSynthetic, pVeboxDndiState->DW45.TdmHarmonicFactorNatural, pVeboxDndiState->DW45.SynthticFrame, pVeboxDndiState->DW45.SyntheticContentThreshold);
1495 MHW_VERBOSEMESSAGE("DW46:SvcmHarmonicFactorSynthetic %d, ShcmHarmonicFactorSynthetic %d, SvcmHarmonicFactorNatural %d, ShcmHarmonicFactorNatural %d, HarmonicCounterThreshold %d, MaxHarmonicCounterThreshold %d, NaturalContentThreshold %d, Reserved1501 %d",
1496 pVeboxDndiState->DW46.SvcmHarmonicFactorSynthetic, pVeboxDndiState->DW46.ShcmHarmonicFactorSynthetic, pVeboxDndiState->DW46.SvcmHarmonicFactorNatural, pVeboxDndiState->DW46.ShcmHarmonicFactorNatural, pVeboxDndiState->DW46.HarmonicCounterThreshold, pVeboxDndiState->DW46.MaxHarmonicCounterThreshold, pVeboxDndiState->DW46.NaturalContentThreshold, pVeboxDndiState->DW46.Reserved1501);
1497 MHW_VERBOSEMESSAGE("DW47:MaximumValue %d, DW48:ShiftingValue %d, HvYThreshold %d, NumInlinerNumeratorThreshold %d, NumInlinerDenominatorThreshold %d, Reserved1556 %d", pVeboxDndiState->DW47.MaximumValue, pVeboxDndiState->DW48.ShiftingValue, pVeboxDndiState->DW48.HvYThreshold, pVeboxDndiState->DW48.NumInlinerNumeratorThreshold, pVeboxDndiState->DW48.NumInlinerDenominatorThreshold, pVeboxDndiState->DW48.Reserved1556);
1498 MHW_VERBOSEMESSAGE("DW49:ChromaStadTh %d, LumaStadTh %d", pVeboxDndiState->DW49.ChromaStadTh, pVeboxDndiState->DW49.LumaStadTh);
1499 MHW_VERBOSEMESSAGE("DW50:LumaUniformityHighTh1 %d, LumaUniformityHighTh2 %d, LumaUniformityLowTh1 %d, LumaUniformityLowTh2 %d", pVeboxDndiState->DW50.LumaUniformityHighTh1, pVeboxDndiState->DW50.LumaUniformityHighTh2, pVeboxDndiState->DW50.LumaUniformityLowTh1, pVeboxDndiState->DW50.LumaUniformityLowTh2);
1500 MHW_VERBOSEMESSAGE("DW51: ChromaUniformityHighTh1 %d, ChromaUniformityHighTh2 %d, ChromaUniformityLowTh1 %d, ChromaUniformityLowTh2 %d", pVeboxDndiState->DW51.ChromaUniformityHighTh1, pVeboxDndiState->DW51.ChromaUniformityHighTh2, pVeboxDndiState->DW51.ChromaUniformityLowTh1, pVeboxDndiState->DW51.ChromaUniformityLowTh2);
1501 MHW_VERBOSEMESSAGE("DW52:_4X4TemporalGneThresholdCount %d", pVeboxDndiState->DW52._4X4TemporalGneThresholdCount);
1502
1503 return MOS_STATUS_SUCCESS;
1504 }
1505
SetVeboxDndiState(PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)1506 MOS_STATUS SetVeboxDndiState(
1507 PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)
1508 {
1509 MHW_FUNCTION_ENTER;
1510
1511 MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
1512 uint32_t uiOffset = 0;
1513 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1514
1515 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_DNDI_STATE_CMD *pVeboxDndiState, mVeboxDndiState;
1516
1517 MHW_CHK_NULL_RETURN(pVeboxDndiParams);
1518 MHW_CHK_NULL_RETURN(m_veboxHeap);
1519 pVeboxHeap = m_veboxHeap;
1520
1521 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1522 pVeboxDndiState =
1523 (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_DNDI_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1524 pVeboxHeap->uiDndiStateOffset +
1525 uiOffset);
1526
1527 MHW_CHK_NULL_RETURN(pVeboxDndiState);
1528
1529 *pVeboxDndiState = mVeboxDndiState;
1530
1531 pVeboxDndiState->DW0.DenoiseMaximumHistory = pVeboxDndiParams->dwDenoiseMaximumHistory;
1532 pVeboxDndiState->DW0.DenoiseStadThreshold = pVeboxDndiParams->dwDenoiseSTADThreshold > 4095 ? 4095 : pVeboxDndiParams->dwDenoiseSTADThreshold;
1533 pVeboxDndiState->DW1.DenoiseAsdThreshold = pVeboxDndiParams->dwDenoiseASDThreshold;
1534 pVeboxDndiState->DW1.DenoiseHistoryIncrease = pVeboxDndiParams->dwDenoiseHistoryDelta;
1535 pVeboxDndiState->DW1.DenoiseMovingPixelThreshold = pVeboxDndiParams->dwDenoiseMPThreshold;
1536 pVeboxDndiState->DW2.TemporalDifferenceThreshold = pVeboxDndiParams->dwTDThreshold;
1537 pVeboxDndiState->DW3.LowTemporalDifferenceThreshold = pVeboxDndiParams->dwLTDThreshold;
1538 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
1539 pVeboxDndiState->DW3.HotPixelCountLuma = pVeboxDndiParams->dwHotPixelCount;
1540 pVeboxDndiState->DW4.DenoiseThresholdForSumOfComplexityMeasureLuma = pVeboxDndiParams->dwDenoiseSCMThreshold;
1541 pVeboxDndiState->DW4.HotPixelThresholdLuma = pVeboxDndiParams->dwHotPixelThreshold;
1542 pVeboxDndiState->DW5.ChromaDenoiseStadThreshold = pVeboxDndiParams->dwChromaSTADThreshold;
1543 pVeboxDndiState->DW5.HotPixelCountChromaU = m_chromaParams.dwHotPixelCountChromaU;
1544 pVeboxDndiState->DW5.HotPixelThresholdChromaU = m_chromaParams.dwHotPixelThresholdChromaU;
1545 pVeboxDndiState->DW6.ChromaDenoiseEnable = pVeboxDndiParams->bChromaDNEnable;
1546 pVeboxDndiState->DW6.ChromaTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaTDThreshold;
1547 pVeboxDndiState->DW7.ChromaLowTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaLTDThreshold;
1548 pVeboxDndiState->DW7.HotPixelCountChromaV = m_chromaParams.dwHotPixelCountChromaV;
1549 pVeboxDndiState->DW7.HotPixelThresholdChromaV = m_chromaParams.dwHotPixelThresholdChromaV;
1550 pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold = m_chromaParams.dwHotPixelThresholdChromaV;
1551
1552 pVeboxDndiState->DW9.DnyWr040 = pVeboxDndiParams->dwPixRangeWeight[0];
1553 pVeboxDndiState->DW9.DnyWr140 = pVeboxDndiParams->dwPixRangeWeight[1];
1554 pVeboxDndiState->DW9.DnyWr240 = pVeboxDndiParams->dwPixRangeWeight[2];
1555 pVeboxDndiState->DW9.DnyWr340 = pVeboxDndiParams->dwPixRangeWeight[3];
1556 pVeboxDndiState->DW9.DnyWr440 = pVeboxDndiParams->dwPixRangeWeight[4];
1557 pVeboxDndiState->DW9.DnyWr540 = pVeboxDndiParams->dwPixRangeWeight[5];
1558
1559 pVeboxDndiState->DW11.DnyPrt5120 = pVeboxDndiParams->dwPixRangeThreshold[5];
1560 pVeboxDndiState->DW12.DnyPrt4120 = pVeboxDndiParams->dwPixRangeThreshold[4];
1561 pVeboxDndiState->DW12.DnyPrt3120 = pVeboxDndiParams->dwPixRangeThreshold[3];
1562 pVeboxDndiState->DW13.DnyPrt2120 = pVeboxDndiParams->dwPixRangeThreshold[2];
1563 pVeboxDndiState->DW13.DnyPrt1120 = pVeboxDndiParams->dwPixRangeThreshold[1];
1564 pVeboxDndiState->DW14.DnyPrt0120 = pVeboxDndiParams->dwPixRangeThreshold[0];
1565
1566 pVeboxDndiState->DW16.DnuWr040 = m_chromaParams.dwPixRangeWeightChromaU[0];
1567 pVeboxDndiState->DW16.DnuWr140 = m_chromaParams.dwPixRangeWeightChromaU[1];
1568 pVeboxDndiState->DW16.DnuWr240 = m_chromaParams.dwPixRangeWeightChromaU[2];
1569 pVeboxDndiState->DW16.DnuWr340 = m_chromaParams.dwPixRangeWeightChromaU[3];
1570 pVeboxDndiState->DW16.DnuWr440 = m_chromaParams.dwPixRangeWeightChromaU[4];
1571 pVeboxDndiState->DW16.DnuWr540 = m_chromaParams.dwPixRangeWeightChromaU[5];
1572
1573 pVeboxDndiState->DW18.DnuPrt5120 = m_chromaParams.dwPixRangeThresholdChromaU[5];
1574 pVeboxDndiState->DW19.DnuPrt4120 = m_chromaParams.dwPixRangeThresholdChromaU[4];
1575 pVeboxDndiState->DW19.DnuPrt3120 = m_chromaParams.dwPixRangeThresholdChromaU[3];
1576 pVeboxDndiState->DW20.DnuPrt2120 = m_chromaParams.dwPixRangeThresholdChromaU[2];
1577 pVeboxDndiState->DW20.DnuPrt1120 = m_chromaParams.dwPixRangeThresholdChromaU[1];
1578 pVeboxDndiState->DW21.DnuPrt0120 = m_chromaParams.dwPixRangeThresholdChromaU[0];
1579
1580 pVeboxDndiState->DW23.DnvWr040 = m_chromaParams.dwPixRangeWeightChromaV[0];
1581 pVeboxDndiState->DW23.DnvWr5140 = m_chromaParams.dwPixRangeWeightChromaV[1];
1582 pVeboxDndiState->DW23.DnvWr240 = m_chromaParams.dwPixRangeWeightChromaV[2];
1583 pVeboxDndiState->DW23.DnvWr340 = m_chromaParams.dwPixRangeWeightChromaV[3];
1584 pVeboxDndiState->DW23.DnvWr440 = m_chromaParams.dwPixRangeWeightChromaV[4];
1585 pVeboxDndiState->DW23.DnvWr540 = m_chromaParams.dwPixRangeWeightChromaV[5];
1586
1587 pVeboxDndiState->DW25.DnvPrt5120 = m_chromaParams.dwPixRangeThresholdChromaV[5];
1588 pVeboxDndiState->DW26.DnvPrt4120 = m_chromaParams.dwPixRangeThresholdChromaV[4];
1589 pVeboxDndiState->DW26.DnvPrt3120 = m_chromaParams.dwPixRangeThresholdChromaV[3];
1590 pVeboxDndiState->DW27.DnvPrt2120 = m_chromaParams.dwPixRangeThresholdChromaV[2];
1591 pVeboxDndiState->DW27.DnvPrt1120 = m_chromaParams.dwPixRangeThresholdChromaV[1];
1592 pVeboxDndiState->DW28.DnvPrt0120 = m_chromaParams.dwPixRangeThresholdChromaV[0];
1593
1594 pVeboxDndiState->DW38.DnDiTopFirst = pVeboxDndiParams->bDNDITopFirst;
1595
1596 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame = pVeboxDndiParams->dwFMDFirstFieldCurrFrame;
1597 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionForSecondFieldOfPreviousFrame = pVeboxDndiParams->dwFMDSecondFieldPrevFrame;
1598
1599 // Improved Deinterlacing
1600 pVeboxDndiState->DW36.LumatdmWt = pVeboxDndiParams->dwLumaTDMWeight;
1601 pVeboxDndiState->DW36.ChromatdmWt = pVeboxDndiParams->dwChromaTDMWeight;
1602
1603 pVeboxDndiState->DW37.CoringThresholdForSvcm = pVeboxDndiParams->dwSVCMThreshold;
1604 pVeboxDndiState->DW37.DeltabitValueForSvcm = pVeboxDndiParams->dwSVCMDelta;
1605 pVeboxDndiState->DW37.CoringThresholdForShcm = pVeboxDndiParams->dwSHCMThreshold;
1606 pVeboxDndiState->DW37.DeltabitValueForShcm = pVeboxDndiParams->dwSHCMDelta;
1607
1608 pVeboxDndiState->DW39.ChromaSmallerWindowForTdm = pVeboxDndiParams->bTDMChromaSmallerWindow;
1609 pVeboxDndiState->DW39.LumaSmallerWindowForTdm = pVeboxDndiParams->bTDMLumaSmallerWindow;
1610 pVeboxDndiState->DW39.Fastercovergence = pVeboxDndiParams->bFasterConvergence;
1611
1612 pVeboxDndiState->DW40.SadWt0 = pVeboxDndiParams->dwSADWT0;
1613 pVeboxDndiState->DW40.SadWt1 = pVeboxDndiParams->dwSADWT1;
1614 pVeboxDndiState->DW40.SadWt2 = pVeboxDndiParams->dwSADWT2;
1615 pVeboxDndiState->DW40.SadWt3 = pVeboxDndiParams->dwSADWT3;
1616 pVeboxDndiState->DW41.SadWt4 = pVeboxDndiParams->dwSADWT4;
1617 pVeboxDndiState->DW41.SadWt6 = pVeboxDndiParams->dwSADWT6;
1618
1619 pVeboxDndiState->DW41.CoringThresholdForLumaSadCalculation = pVeboxDndiParams->dwLumaTDMCoringThreshold;
1620 pVeboxDndiState->DW41.CoringThresholdForChromaSadCalculation = pVeboxDndiParams->dwChromaTDMCoringThreshold;
1621
1622 pVeboxDndiState->DW42.ParDiffcheckslackthreshold = pVeboxDndiParams->dwDiffCheckSlackThreshold;
1623 pVeboxDndiState->DW42.ParTearinghighthreshold = pVeboxDndiParams->dwTearingHighThreshold;
1624 pVeboxDndiState->DW42.ParTearinglowthreshold = pVeboxDndiParams->dwTearingLowThreshold;
1625 pVeboxDndiState->DW42.ParDirectioncheckth = pVeboxDndiParams->dwDirectionCheckThreshold;
1626 pVeboxDndiState->DW42.ParSyntheticcontentcheck = pVeboxDndiParams->bSyntheticContentCheck;
1627 pVeboxDndiState->DW42.ParLocalcheck = pVeboxDndiParams->bLocalCheck;
1628 pVeboxDndiState->DW42.ParUsesyntheticcontentmedian = pVeboxDndiParams->bUseSyntheticContentMedian;
1629 pVeboxDndiState->DW42.BypassDeflicker = pVeboxDndiParams->bBypassDeflickerFilter;
1630
1631 pVeboxDndiState->DW43.Lpfwtlut0 = pVeboxDndiParams->dwLPFWtLUT0;
1632 pVeboxDndiState->DW43.Lpfwtlut1 = pVeboxDndiParams->dwLPFWtLUT1;
1633 pVeboxDndiState->DW43.Lpfwtlut2 = pVeboxDndiParams->dwLPFWtLUT2;
1634 pVeboxDndiState->DW43.Lpfwtlut3 = pVeboxDndiParams->dwLPFWtLUT3;
1635 pVeboxDndiState->DW44.Lpfwtlut4 = pVeboxDndiParams->dwLPFWtLUT4;
1636 pVeboxDndiState->DW44.Lpfwtlut5 = pVeboxDndiParams->dwLPFWtLUT5;
1637 pVeboxDndiState->DW44.Lpfwtlut6 = pVeboxDndiParams->dwLPFWtLUT6;
1638 pVeboxDndiState->DW44.Lpfwtlut7 = pVeboxDndiParams->dwLPFWtLUT7;
1639
1640 pVeboxDndiState->DW10.DnyThmin120 = 512;
1641 pVeboxDndiState->DW10.DnyThmax120 = 2048;
1642 pVeboxDndiState->DW11.DnyDynThmin120 = 256;
1643
1644 pVeboxDndiState->DW14.DnyWd2040 = 10;
1645 pVeboxDndiState->DW14.DnyWd2140 = 10;
1646 pVeboxDndiState->DW14.DnyWd2240 = 8;
1647 pVeboxDndiState->DW15.DnyWd0040 = 12;
1648 pVeboxDndiState->DW15.DnyWd0140 = 12;
1649 pVeboxDndiState->DW15.DnyWd0240 = 10;
1650 pVeboxDndiState->DW15.DnyWd1040 = 12;
1651 pVeboxDndiState->DW15.DnyWd1140 = 11;
1652 pVeboxDndiState->DW15.DnyWd1240 = 10;
1653
1654 pVeboxDndiState->DW17.DnuThmin120 = 512;
1655 pVeboxDndiState->DW17.DnuThmax120 = 2048;
1656 pVeboxDndiState->DW18.DnuDynThmin120 = 256;
1657
1658 pVeboxDndiState->DW21.DnuWd2040 = 10;
1659 pVeboxDndiState->DW21.DnuWd2140 = 10;
1660 pVeboxDndiState->DW21.DnuWd2240 = 8;
1661 pVeboxDndiState->DW22.DnuWd0040 = 12;
1662 pVeboxDndiState->DW22.DnuWd0140 = 12;
1663 pVeboxDndiState->DW22.DnuWd0240 = 10;
1664 pVeboxDndiState->DW22.DnuWd1040 = 12;
1665 pVeboxDndiState->DW22.DnuWd1140 = 11;
1666 pVeboxDndiState->DW22.DnuWd1240 = 10;
1667
1668 pVeboxDndiState->DW24.DnvThmin120 = 512;
1669 pVeboxDndiState->DW24.DnvThmax120 = 2048;
1670 pVeboxDndiState->DW25.DnvDynThmin120 = 256;
1671
1672 pVeboxDndiState->DW28.DnvWd2040 = 10;
1673 pVeboxDndiState->DW28.DnvWd2140 = 10;
1674 pVeboxDndiState->DW28.DnvWd2240 = 8;
1675 pVeboxDndiState->DW29.DnvWd0040 = 12;
1676 pVeboxDndiState->DW29.DnvWd0140 = 12;
1677 pVeboxDndiState->DW29.DnvWd0240 = 10;
1678 pVeboxDndiState->DW29.DnvWd1040 = 12;
1679 pVeboxDndiState->DW29.DnvWd1140 = 11;
1680 pVeboxDndiState->DW29.DnvWd1240 = 10;
1681
1682 pVeboxDndiState->DW31.SmallSobelCountThreshold = 6;
1683 pVeboxDndiState->DW32.LargeSobelCountThreshold = 6;
1684 pVeboxDndiState->DW32.MedianSobelCountThreshold = 40;
1685
1686 pVeboxDndiState->DW34.StmmC2 = 2;
1687 pVeboxDndiState->DW35.MaximumStmm = 150;
1688 pVeboxDndiState->DW35.MultiplierForVecm = 30;
1689 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForSmallValuesOfStmm = 125;
1690 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForLargeValuesOfStmm = 64;
1691
1692 pVeboxDndiState->DW36.FmdTemporalDifferenceThreshold = 175;
1693 pVeboxDndiState->DW36.StmmOutputShift = 5;
1694 pVeboxDndiState->DW36.StmmShiftUp = 1;
1695 pVeboxDndiState->DW36.MinimumStmm = 118;
1696
1697 pVeboxDndiState->DW38.McdiEnable = 1;
1698 pVeboxDndiState->DW38.FmdTearThreshold = 2;
1699 pVeboxDndiState->DW38.Fmd2VerticalDifferenceThreshold = 100;
1700 pVeboxDndiState->DW38.Fmd1VerticalDifferenceThreshold = 16;
1701
1702 pVeboxDndiState->DW45.SynthticFrame = pVeboxDndiParams->bSyntheticFrame;
1703
1704 // copy the DW0-DW33 SLIM_IPU_DN_PARAMS to VEBOX_DNDI_STATE, DW34-DW48 for DI according to DI DDI setting.
1705 if (pVeboxDndiParams->bEnableSlimIPUDenoise)
1706 {
1707 uint32_t slimIpuDnCmdSize = MHW_VEBOX_SLIM_IPU_DN_CMD_SIZE_INUSE * sizeof(pVeboxDndiState->DW0); //buffer size in use for SLIM IPU DN
1708
1709 if (nullptr == pVeboxDndiParams->pSystemMem || pVeboxDndiParams->MemSizeInBytes != sizeof(*pVeboxDndiState) || pVeboxDndiParams->MemSizeInBytes < slimIpuDnCmdSize)
1710 {
1711 MHW_ASSERTMESSAGE("SlimIPUDenoise size is invaild");
1712 return MOS_STATUS_INVALID_PARAMETER;
1713 }
1714
1715 MOS_SecureMemcpy(pVeboxDndiState, sizeof(*pVeboxDndiState), pVeboxDndiParams->pSystemMem, slimIpuDnCmdSize); // only copy dw0 - dw33 for DN
1716
1717 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
1718 }
1719
1720 if (pVeboxDndiParams->bSCDEnable)
1721 {
1722 pVeboxDndiState->DW34.SignBitForMinimumStmm = 1;
1723 pVeboxDndiState->DW34.SignBitForMaximumStmm = 1;
1724 pVeboxDndiState->DW34.SignBitForSmoothMvThreshold = 1;
1725 }
1726 else
1727 {
1728 pVeboxDndiState->DW34.SignBitForMinimumStmm = 0;
1729 pVeboxDndiState->DW34.SignBitForMaximumStmm = 0;
1730 pVeboxDndiState->DW34.SignBitForSmoothMvThreshold = 0;
1731 }
1732
1733 // GNE setting
1734 if (bTGNEEnable)
1735 {
1736 pVeboxDndiState->DW3.TemporalGneEnable = bTGNEEnable;
1737 pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold = 720;
1738 pVeboxDndiState->DW6.BlockNoiseEstimateEdgeThreshold = 200;
1739 pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold = 2;
1740 pVeboxDndiState->DW8.ChromaDenoiseAsdThreshold = 512;
1741 pVeboxDndiState->DW8.ChromaDenoiseThresholdForSumOfComplexityMeasure = 512;
1742 pVeboxDndiState->DW30.EightDirectionEdgeThreshold = 3200;
1743 pVeboxDndiState->DW30.ValidPixelThreshold = 336;
1744 pVeboxDndiState->DW49.ChromaStadTh = dwChromaStadTh;
1745 pVeboxDndiState->DW49.LumaStadTh = dwLumaStadTh;
1746 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 50;
1747 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 15;
1748 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 2;
1749 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 2;
1750 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 30;
1751 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 15;
1752 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 2;
1753 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 1;
1754 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = dw4X4TGNEThCnt;
1755 }
1756 else
1757 {
1758 pVeboxDndiState->DW3.TemporalGneEnable = 0;
1759 pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold = 720;
1760 pVeboxDndiState->DW6.BlockNoiseEstimateEdgeThreshold = 200;
1761 pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold = 2;
1762 pVeboxDndiState->DW8.ChromaDenoiseAsdThreshold = 512;
1763 pVeboxDndiState->DW8.ChromaDenoiseThresholdForSumOfComplexityMeasure = 512;
1764 pVeboxDndiState->DW30.EightDirectionEdgeThreshold = 3200;
1765 pVeboxDndiState->DW30.ValidPixelThreshold = 336;
1766 pVeboxDndiState->DW49.ChromaStadTh = 0;
1767 pVeboxDndiState->DW49.LumaStadTh = 0;
1768 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 0;
1769 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 0;
1770 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 0;
1771 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 0;
1772 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 0;
1773 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 0;
1774 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 0;
1775 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 0;
1776 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = 0;
1777 }
1778 DumpDNDIStates((uint8_t *)pVeboxDndiState);
1779 return eStatus;
1780 }
1781
1782 //!
1783 //! \brief Set Vebox Iecp STDSTE State
1784 //! \details Set STE part of the VEBOX IECP States
1785 //! \param [in] pVeboxStdSteState
1786 //! Pointer to VEBOX IECP STD/E States
1787 //! \param [in] pColorPipeParams
1788 //! Pointer to COLOR PIPE Params
1789 //! \return void
1790 //!
SetVeboxIecpStateSTE(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_STD_STE_STATE_CMD * pVeboxStdSteState,PMHW_COLORPIPE_PARAMS pColorPipeParams)1791 MOS_STATUS SetVeboxIecpStateSTE(
1792 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_STD_STE_STATE_CMD* pVeboxStdSteState,
1793 PMHW_COLORPIPE_PARAMS pColorPipeParams)
1794 {
1795 MHW_FUNCTION_ENTER;
1796
1797 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1798
1799 MHW_CHK_NULL_RETURN(pVeboxStdSteState);
1800 MHW_CHK_NULL_RETURN(pColorPipeParams);
1801
1802 // STD detects the skin like colors and passes a grade of skin tone
1803 // color to STE (Skin Tone Enhancement). STD operates in the YUV color
1804 // space.The level of skin tone detection is determined through skin
1805 // tone factors in UV plane. If skin tone detection in VY plane is also
1806 // enabled, the final skin tone factor is given by the minimum of STD
1807 // in the (U, V) plane and (V, Y) plane.
1808 //
1809 // The skin tone factor will also be passed to ACE and TCC to indicate
1810 // the strength of skin tone likelihood.
1811 pVeboxStdSteState->DW0.StdEnable = true;
1812
1813 // Enable skin tone detection in VY plane
1814 pVeboxStdSteState->DW3.VyStdEnable = true;
1815
1816 // Enable STE (Skin Tone Enhancement)
1817 // STE modify the saturation and hue of the pixels which were detected
1818 // as the skin-tone pixels by STD
1819 if (pColorPipeParams->bEnableSTE &&
1820 pColorPipeParams->SteParams.dwSTEFactor > 0)
1821 {
1822 pVeboxStdSteState->DW0.SteEnable = true;
1823
1824 if (pColorPipeParams->SteParams.dwSTEFactor <= MHW_STE_OPTIMAL)
1825 {
1826 pVeboxStdSteState->DW15.Satb1 = MOS_BITFIELD_VALUE((uint32_t)-8, 10);
1827 pVeboxStdSteState->DW15.Satp3 = 31;
1828 pVeboxStdSteState->DW15.Satp2 = 6;
1829 pVeboxStdSteState->DW15.Satp1 = pColorPipeParams->SteParams.satP1;
1830
1831 pVeboxStdSteState->DW16.Sats0 = pColorPipeParams->SteParams.satS0;
1832 pVeboxStdSteState->DW16.Satb3 = 124;
1833 pVeboxStdSteState->DW16.Satb2 = 8;
1834
1835 pVeboxStdSteState->DW17.Sats2 = 297;
1836 pVeboxStdSteState->DW17.Sats1 = pColorPipeParams->SteParams.satS1;
1837
1838 pVeboxStdSteState->DW18.Huep3 = 14;
1839 pVeboxStdSteState->DW18.Huep2 = 6;
1840 pVeboxStdSteState->DW18.Huep1 = MOS_BITFIELD_VALUE((uint32_t)-6, 7);
1841 pVeboxStdSteState->DW18.Sats3 = 256;
1842
1843 pVeboxStdSteState->DW19.Hueb3 = 56;
1844 pVeboxStdSteState->DW19.Hueb2 = 8;
1845 pVeboxStdSteState->DW19.Hueb1 = MOS_BITFIELD_VALUE((uint32_t)-8, 10);
1846
1847 pVeboxStdSteState->DW20.Hues1 = 85;
1848 pVeboxStdSteState->DW20.Hues0 = 384;
1849
1850 pVeboxStdSteState->DW21.Hues3 = 256;
1851 pVeboxStdSteState->DW21.Hues2 = 384;
1852 }
1853 else // if (pColorPipeParams->SteParams.dwSTEFactor > MHW_STE_OPTIMAL)
1854 {
1855 pVeboxStdSteState->DW15.Satb1 = 0;
1856 pVeboxStdSteState->DW15.Satp3 = 31;
1857 pVeboxStdSteState->DW15.Satp2 = 31;
1858 pVeboxStdSteState->DW15.Satp1 = pColorPipeParams->SteParams.satP1;
1859
1860 pVeboxStdSteState->DW16.Sats0 = pColorPipeParams->SteParams.satS0;
1861 pVeboxStdSteState->DW16.Satb3 = 124;
1862 pVeboxStdSteState->DW16.Satb2 = 124;
1863
1864 pVeboxStdSteState->DW17.Sats2 = 256;
1865 pVeboxStdSteState->DW17.Sats1 = pColorPipeParams->SteParams.satS1;
1866
1867 pVeboxStdSteState->DW18.Huep3 = 14;
1868 pVeboxStdSteState->DW18.Huep2 = 14;
1869 pVeboxStdSteState->DW18.Huep1 = 14;
1870 pVeboxStdSteState->DW18.Sats3 = 256;
1871
1872 pVeboxStdSteState->DW19.Hueb3 = 56;
1873 pVeboxStdSteState->DW19.Hueb2 = 56;
1874 pVeboxStdSteState->DW19.Hueb1 = 56;
1875
1876 pVeboxStdSteState->DW20.Hues1 = 256;
1877 pVeboxStdSteState->DW20.Hues0 = 256;
1878
1879 pVeboxStdSteState->DW21.Hues3 = 256;
1880 pVeboxStdSteState->DW21.Hues2 = 256;
1881 }
1882 }
1883 else if (pColorPipeParams->bEnableSTD)
1884 {
1885 if (nullptr == pColorPipeParams->StdParams.param || pColorPipeParams->StdParams.paraSizeInBytes > pVeboxStdSteState->byteSize)
1886 {
1887 MHW_CHK_STATUS_RETURN(MOS_STATUS_INVALID_PARAMETER);
1888 }
1889
1890 MOS_SecureMemcpy(pVeboxStdSteState, pColorPipeParams->StdParams.paraSizeInBytes, pColorPipeParams->StdParams.param, pColorPipeParams->StdParams.paraSizeInBytes);
1891
1892 }
1893 // Enable Skin Score Output surface to be written by Vebox
1894 pVeboxStdSteState->DW1.StdScoreOutput = (pColorPipeParams->bEnableLACE && pColorPipeParams->LaceParams.bSTD) || pColorPipeParams->bEnableSTD;
1895
1896 return eStatus;
1897 }
1898
1899 //!
1900 //! \brief Set VEBOX IECP TCC State
1901 //! \details Set Vebox TCC state
1902 //! \param [in] pVeboxTccState
1903 //! Pointer to VEBOX IECP TCC States
1904 //! \param [in] pColorPipeParams
1905 //! Pointer to COLOR PIPE Params
1906 //! \return void
1907 //!
SetVeboxIecpStateTCC(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_TCC_STATE_CMD * pVeboxTccState,PMHW_COLORPIPE_PARAMS pColorPipeParams)1908 void SetVeboxIecpStateTCC(
1909 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_TCC_STATE_CMD* pVeboxTccState,
1910 PMHW_COLORPIPE_PARAMS pColorPipeParams)
1911 {
1912 MHW_FUNCTION_ENTER;
1913
1914 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxTccState);
1915 MHW_CHK_NULL_NO_STATUS_RETURN(pColorPipeParams);
1916
1917 // TCC allows users to custom the color scheme by choosing different
1918 // grades of saturation for each of the six basic colors (red, green,
1919 // blue, magenta, yellow, and cyan).
1920 pVeboxTccState->DW0.TccEnable = true;
1921 pVeboxTccState->DW0.Satfactor1 = pColorPipeParams->TccParams.Magenta;
1922 pVeboxTccState->DW0.Satfactor2 = pColorPipeParams->TccParams.Red;
1923 pVeboxTccState->DW0.Satfactor3 = pColorPipeParams->TccParams.Yellow;
1924 pVeboxTccState->DW1.Satfactor4 = pColorPipeParams->TccParams.Green;
1925 pVeboxTccState->DW1.Satfactor5 = pColorPipeParams->TccParams.Cyan;
1926 pVeboxTccState->DW1.Satfactor6 = pColorPipeParams->TccParams.Blue;
1927 }
1928
1929 //!
1930 //! \brief Set Vebox Iecp ACE/LACE State
1931 //! \details Set VEBOX IECP Ace and Lace States
1932 //! \param [in, out] pVeboxAceLaceState
1933 //! Pointer to VEBOX IECP ACE/LACE States
1934 //! \param [in, out] pVeboxAlphaAoiState
1935 //! Pointer to VEBOX IECP ALPHA/AOI States
1936 //! \param [in] bEnableLACE
1937 //! LACE enabled or not
1938 //! \return void
1939 //!
SetVeboxIecpStateACELACE(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_ACE_LACE_STATE_CMD * pVeboxAceLaceState,mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_ALPHA_AOI_STATE_CMD * pVeboxAlphaAoiState,bool bEnableLACE)1940 void SetVeboxIecpStateACELACE(
1941 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_ACE_LACE_STATE_CMD* pVeboxAceLaceState,
1942 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_ALPHA_AOI_STATE_CMD* pVeboxAlphaAoiState,
1943 bool bEnableLACE)
1944 {
1945 MHW_FUNCTION_ENTER;
1946
1947 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxAceLaceState);
1948 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxAlphaAoiState);
1949
1950 // ACE improves the overall contrast of the image and emphasizing
1951 // details when relevant (such as in dark areas)
1952 pVeboxAceLaceState->DW0.AceEnable = true;
1953
1954 // On SKL FullImageHistogram is set in Alpha/AOI state
1955 pVeboxAlphaAoiState->DW0.FullImageHistogram = true;
1956
1957 if (bEnableLACE)
1958 {
1959 // Enable Block level histogram generation
1960 pVeboxAceLaceState->DW0.LaceHistogramEnable = true;
1961 }
1962 else
1963 {
1964 pVeboxAceLaceState->DW0.LaceHistogramEnable = false;
1965 }
1966 }
1967
SetVeboxIecpState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)1968 MOS_STATUS SetVeboxIecpState(
1969 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
1970 {
1971 MHW_FUNCTION_ENTER;
1972
1973 bool bEnableFECSC = false;
1974 PMHW_FORWARD_GAMMA_SEG pFwdGammaSeg;
1975 uint8_t * p3DLUT;
1976 MHW_VEBOX_HEAP *pVeboxHeap;
1977 uint32_t uiOffset;
1978 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1979
1980 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
1981
1982 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
1983 MHW_CHK_NULL_RETURN(m_veboxHeap);
1984
1985 pVeboxHeap = m_veboxHeap;
1986 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1987 pVeboxIecpState = (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1988 pVeboxHeap->uiIecpStateOffset +
1989 uiOffset);
1990
1991 MHW_CHK_NULL_RETURN(pVeboxIecpState);
1992 if (pVeboxIecpParams->iecpstateforFDFB)
1993 {
1994 IecpStateInitializationforFDFB(pVeboxIecpState);
1995 return MOS_STATUS_SUCCESS;
1996 }
1997 else
1998 {
1999 IecpStateInitialization(pVeboxIecpState);
2000 }
2001
2002 if (pVeboxIecpParams->ColorPipeParams.bActive)
2003 {
2004 // Enable STD/E (Skin Tone Detection/Enhancement)
2005 SetVeboxIecpStateSTE(
2006 &pVeboxIecpState->StdSteState,
2007 &pVeboxIecpParams->ColorPipeParams);
2008
2009 // Enable TCC (Total Color Control)
2010 if (pVeboxIecpParams->ColorPipeParams.bEnableTCC)
2011 {
2012 SetVeboxIecpStateTCC(
2013 &pVeboxIecpState->TccState,
2014 &pVeboxIecpParams->ColorPipeParams);
2015 }
2016 }
2017
2018 // Enable ACE (Automatic Contrast Enhancement). Enable LACE if it's enabled.
2019 if (pVeboxIecpParams->bAce ||
2020 (pVeboxIecpParams->ColorPipeParams.bActive &&
2021 pVeboxIecpParams->ColorPipeParams.bEnableACE))
2022 {
2023 SetVeboxIecpStateACELACE(
2024 &pVeboxIecpState->AceState,
2025 &pVeboxIecpState->AlphaAoiState,
2026 (pVeboxIecpParams->ColorPipeParams.bEnableLACE == true) ? true : false);
2027 }
2028
2029 if (pVeboxIecpParams->CapPipeParams.bActive)
2030 {
2031 // IECP needs to operate in YUV space
2032 if ((pVeboxIecpParams->srcFormat != Format_AYUV) &&
2033 (pVeboxIecpParams->dstFormat == Format_AYUV ||
2034 pVeboxIecpParams->dstFormat == Format_Y416 ||
2035 pVeboxIecpParams->ProcAmpParams.bActive ||
2036 pVeboxIecpParams->ColorPipeParams.bActive))
2037 {
2038 bEnableFECSC = true;
2039 }
2040 else if (pVeboxIecpParams->CapPipeParams.FECSCParams.bActive)
2041 {
2042 bEnableFECSC = true;
2043 }
2044 else
2045 {
2046 bEnableFECSC = false;
2047 }
2048
2049 // Enable Front End CSC so that input to IECP will be in YUV color space
2050 if (bEnableFECSC)
2051 {
2052 SetVeboxIecpStateFecsc(&pVeboxIecpState->FrontEndCsc, pVeboxIecpParams);
2053 }
2054
2055 // Enable Color Correction Matrix
2056 if (pVeboxIecpParams->CapPipeParams.ColorCorrectionParams.bActive)
2057 {
2058 SetVeboxIecpStateCcm(
2059 pVeboxIecpState,
2060 &pVeboxIecpParams->CapPipeParams,
2061 65536);
2062 }
2063 }
2064
2065 // Enable Back End CSC for capture pipeline or Vebox output pipe
2066 if (pVeboxIecpParams->CapPipeParams.bActive ||
2067 pVeboxIecpParams->bCSCEnable)
2068 {
2069 SetVeboxIecpStateBecsc(
2070 pVeboxIecpState,
2071 pVeboxIecpParams,
2072 bEnableFECSC);
2073 }
2074
2075 // Enable ProcAmp
2076 if (pVeboxIecpParams->ProcAmpParams.bActive &&
2077 pVeboxIecpParams->ProcAmpParams.bEnabled)
2078 {
2079 SetVeboxIecpStateProcAmp(
2080 &pVeboxIecpState->ProcampState,
2081 &pVeboxIecpParams->ProcAmpParams);
2082 }
2083
2084 if (pVeboxIecpParams && pVeboxIecpParams->CapPipeParams.bActive)
2085 {
2086 SetVeboxCapPipeState(
2087 &pVeboxIecpParams->CapPipeParams);
2088 }
2089
2090 if (pVeboxIecpParams &&
2091 pVeboxIecpParams->CapPipeParams.bActive &&
2092 pVeboxIecpParams->CapPipeParams.FwdGammaParams.bActive)
2093 {
2094 pFwdGammaSeg =
2095 (PMHW_FORWARD_GAMMA_SEG)(pVeboxHeap->pLockedDriverResourceMem +
2096 pVeboxHeap->uiGammaCorrectionStateOffset +
2097 uiOffset);
2098
2099 MHW_CHK_NULL_RETURN(pFwdGammaSeg);
2100 MOS_SecureMemcpy(
2101 pFwdGammaSeg,
2102 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT,
2103 &pVeboxIecpParams->CapPipeParams.FwdGammaParams.Segment[0],
2104 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT);
2105 }
2106
2107 return eStatus;
2108 }
2109
SetDisableHistogram(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2110 MOS_STATUS SetDisableHistogram(
2111 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2112 {
2113 MHW_FUNCTION_ENTER;
2114
2115 MHW_VEBOX_HEAP *veboxHeap = nullptr;
2116 uint32_t Offset = 0;
2117 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2118
2119 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *veboxIecpState = nullptr;
2120
2121 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
2122 MHW_CHK_NULL_RETURN(m_veboxHeap);
2123
2124 veboxHeap = m_veboxHeap;
2125 Offset = veboxHeap->uiCurState * veboxHeap->uiInstanceSize;
2126 veboxIecpState = (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *)(veboxHeap->pLockedDriverResourceMem +
2127 veboxHeap->uiIecpStateOffset +
2128 Offset);
2129 veboxIecpState->AlphaAoiState.DW0.DisableHistogram = true;
2130
2131 return eStatus;
2132 }
2133
SetVeboxIecpAceState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2134 MOS_STATUS SetVeboxIecpAceState(
2135 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2136 {
2137 MHW_FUNCTION_ENTER;
2138
2139 MHW_ACE_PARAMS *pAceParams;
2140 MHW_LACE_PARAMS *pLaceParams;
2141 MHW_VEBOX_HEAP *pVeboxHeap;
2142 int32_t uiOffset;
2143 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2144 const uint32_t uiFullRangeYOffsetInU16 = 0;
2145 const uint32_t uiLimitedRangeYOffsetInU16 = 4096;
2146 const uint32_t uiUOffsetInU16 = 32768;
2147 const uint32_t uiVOffsetInU16 = 32768;
2148
2149 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
2150
2151 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
2152 MHW_CHK_NULL_RETURN(m_veboxHeap);
2153
2154 pVeboxHeap = m_veboxHeap;
2155 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2156
2157 pVeboxIecpState = (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2158 pVeboxHeap->uiIecpStateOffset +
2159 uiOffset);
2160
2161 MHW_CHK_NULL_RETURN(pVeboxIecpState);
2162
2163 SetVeboxAceLaceState(pVeboxIecpParams, pVeboxIecpState);
2164
2165 if (pVeboxIecpParams->ColorPipeParams.bActive &&
2166 pVeboxIecpParams->ColorPipeParams.bEnableLACE)
2167 {
2168 pLaceParams = &pVeboxIecpParams->ColorPipeParams.LaceParams;
2169
2170 pVeboxIecpState->AceState.DW0.MinAceLuma = pLaceParams->wMinAceLuma;
2171 pVeboxIecpState->AceState.DW12.MaxAceLuma = pLaceParams->wMaxAceLuma;
2172
2173 pVeboxIecpState->AceState.DW13.LaceColorCorrectionEnable = m_laceColorCorrection.bColorCorrectionEnable;
2174 if (m_laceColorCorrection.bYUVFullRange)
2175 {
2176 pVeboxIecpState->AceState.DW13.LaceYOffset = uiFullRangeYOffsetInU16;
2177 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2178 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2179 }
2180 else
2181 {
2182 pVeboxIecpState->AceState.DW13.LaceYOffset = uiLimitedRangeYOffsetInU16;
2183 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2184 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2185 }
2186
2187 pVeboxIecpState->AceState.DW15.LaceGammaCurveBias0 = m_laceColorCorrection.colorWeightLut.iBias[0];
2188 pVeboxIecpState->AceState.DW15.LaceGammaCurvePoint0 = m_laceColorCorrection.colorWeightLut.iPoint[0];
2189 pVeboxIecpState->AceState.DW15.LaceGammaCurveSlope0 = m_laceColorCorrection.colorWeightLut.iSlope[0];
2190
2191 pVeboxIecpState->AceState.DW16.LaceGammaCurveBias1 = m_laceColorCorrection.colorWeightLut.iBias[1];
2192 pVeboxIecpState->AceState.DW16.LaceGammaCurvePoint1 = m_laceColorCorrection.colorWeightLut.iPoint[1];
2193 pVeboxIecpState->AceState.DW16.LaceGammaCurveSlope1 = m_laceColorCorrection.colorWeightLut.iSlope[1];
2194
2195 pVeboxIecpState->AceState.DW17.LaceGammaCurveBias2 = m_laceColorCorrection.colorWeightLut.iBias[2];
2196 pVeboxIecpState->AceState.DW17.LaceGammaCurvePoint2 = m_laceColorCorrection.colorWeightLut.iPoint[2];
2197 pVeboxIecpState->AceState.DW17.LaceGammaCurveSlope2 = m_laceColorCorrection.colorWeightLut.iSlope[2];
2198
2199 pVeboxIecpState->AceState.DW18.LaceGammaCurveBias3 = m_laceColorCorrection.colorWeightLut.iBias[3];
2200 pVeboxIecpState->AceState.DW18.LaceGammaCurvePoint3 = m_laceColorCorrection.colorWeightLut.iPoint[3];
2201 pVeboxIecpState->AceState.DW18.LaceGammaCurveSlope3 = m_laceColorCorrection.colorWeightLut.iSlope[3];
2202
2203 pVeboxIecpState->AceState.DW19.LaceGammaCurveBias4 = m_laceColorCorrection.colorWeightLut.iBias[4];
2204 pVeboxIecpState->AceState.DW19.LaceGammaCurvePoint4 = m_laceColorCorrection.colorWeightLut.iPoint[4];
2205 pVeboxIecpState->AceState.DW19.LaceGammaCurveSlope4 = m_laceColorCorrection.colorWeightLut.iSlope[4];
2206
2207 pVeboxIecpState->AceState.DW20.LaceGammaCurveBias5 = m_laceColorCorrection.colorWeightLut.iBias[5];
2208 pVeboxIecpState->AceState.DW20.LaceGammaCurvePoint5 = m_laceColorCorrection.colorWeightLut.iPoint[5];
2209 pVeboxIecpState->AceState.DW20.LaceGammaCurveSlope5 = m_laceColorCorrection.colorWeightLut.iSlope[5];
2210
2211 pVeboxIecpState->AceState.DW21.LaceGammaCurveBias6 = m_laceColorCorrection.colorWeightLut.iBias[6];
2212 pVeboxIecpState->AceState.DW21.LaceGammaCurvePoint6 = m_laceColorCorrection.colorWeightLut.iPoint[6];
2213 pVeboxIecpState->AceState.DW21.LaceGammaCurveSlope6 = m_laceColorCorrection.colorWeightLut.iSlope[6];
2214
2215 pVeboxIecpState->AceState.DW22.LaceGammaCurveBias7 = m_laceColorCorrection.colorWeightLut.iBias[7];
2216 pVeboxIecpState->AceState.DW22.LaceGammaCurvePoint7 = m_laceColorCorrection.colorWeightLut.iPoint[7];
2217 pVeboxIecpState->AceState.DW22.LaceGammaCurveSlope7 = m_laceColorCorrection.colorWeightLut.iSlope[7];
2218
2219 pVeboxIecpState->AceState.DW23.LaceGammaCurveBias8 = m_laceColorCorrection.colorWeightLut.iBias[8];
2220 pVeboxIecpState->AceState.DW23.LaceGammaCurvePoint8 = m_laceColorCorrection.colorWeightLut.iPoint[8];
2221 pVeboxIecpState->AceState.DW23.LaceGammaCurveSlope8 = m_laceColorCorrection.colorWeightLut.iSlope[8];
2222
2223 pVeboxIecpState->AceState.DW24.LaceGammaCurveBias9 = m_laceColorCorrection.colorWeightLut.iBias[9];
2224 pVeboxIecpState->AceState.DW24.LaceGammaCurvePoint9 = m_laceColorCorrection.colorWeightLut.iPoint[9];
2225 pVeboxIecpState->AceState.DW24.LaceGammaCurveSlope9 = m_laceColorCorrection.colorWeightLut.iSlope[9];
2226
2227 pVeboxIecpState->AceState.DW25.LaceGammaCurveBias10 = m_laceColorCorrection.colorWeightLut.iBias[10];
2228 pVeboxIecpState->AceState.DW25.LaceGammaCurvePoint10 = m_laceColorCorrection.colorWeightLut.iPoint[10];
2229 pVeboxIecpState->AceState.DW25.LaceGammaCurveSlope10 = m_laceColorCorrection.colorWeightLut.iSlope[10];
2230
2231 pVeboxIecpState->AceState.DW26.LaceGammaCurveBias11 = m_laceColorCorrection.colorWeightLut.iBias[11];
2232 pVeboxIecpState->AceState.DW26.LaceGammaCurvePoint11 = m_laceColorCorrection.colorWeightLut.iPoint[11];
2233 pVeboxIecpState->AceState.DW26.LaceGammaCurveSlope11 = m_laceColorCorrection.colorWeightLut.iSlope[11];
2234
2235 pVeboxIecpState->AceState.DW27.LaceGammaCurveBias12 = m_laceColorCorrection.colorWeightLut.iBias[12];
2236 pVeboxIecpState->AceState.DW27.LaceGammaCurvePoint12 = m_laceColorCorrection.colorWeightLut.iPoint[12];
2237 pVeboxIecpState->AceState.DW27.LaceGammaCurveSlope12 = m_laceColorCorrection.colorWeightLut.iSlope[12];
2238
2239 pVeboxIecpState->AceState.DW28.LaceGammaCurveBias13 = m_laceColorCorrection.colorWeightLut.iBias[13];
2240 pVeboxIecpState->AceState.DW28.LaceGammaCurvePoint13 = m_laceColorCorrection.colorWeightLut.iPoint[13];
2241 pVeboxIecpState->AceState.DW28.LaceGammaCurveSlope13 = m_laceColorCorrection.colorWeightLut.iSlope[13];
2242
2243 pVeboxIecpState->AceState.DW29.LaceGammaCurveBias14 = m_laceColorCorrection.colorWeightLut.iBias[14];
2244 pVeboxIecpState->AceState.DW29.LaceGammaCurvePoint14 = m_laceColorCorrection.colorWeightLut.iPoint[14];
2245 pVeboxIecpState->AceState.DW29.LaceGammaCurveSlope14 = m_laceColorCorrection.colorWeightLut.iSlope[14];
2246
2247 pVeboxIecpState->AceState.DW30.LaceGammaCurveBias15 = m_laceColorCorrection.colorWeightLut.iBias[15];
2248 pVeboxIecpState->AceState.DW30.LaceGammaCurvePoint15 = m_laceColorCorrection.colorWeightLut.iPoint[15];
2249 pVeboxIecpState->AceState.DW30.LaceGammaCurveSlope15 = m_laceColorCorrection.colorWeightLut.iSlope[15];
2250 }
2251
2252 return eStatus;
2253 }
2254
VeboxInterface_BT2020YUVToRGB(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2255 MOS_STATUS VeboxInterface_BT2020YUVToRGB(
2256 PMHW_VEBOX_HEAP pVeboxHeapInput,
2257 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2258 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2259 {
2260 MHW_FUNCTION_ENTER;
2261
2262 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *pIecpState;
2263 MHW_VEBOX_HEAP *pVeboxHeap;
2264 uint32_t uiOffset;
2265 MOS_STATUS eStatus = MOS_STATUS_NULL_POINTER;
2266
2267 MHW_CHK_NULL_RETURN(pVeboxHeapInput);
2268
2269 MOS_UNUSED(pVeboxIecpParams);
2270 MOS_UNUSED(pVeboxGamutParams);
2271
2272 pVeboxHeap = pVeboxHeapInput;
2273 MHW_CHK_NULL_RETURN(pVeboxHeap);
2274
2275 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2276 pIecpState = (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2277
2278 MHW_CHK_NULL_RETURN(pIecpState);
2279
2280 pIecpState->CscState.DW0.TransformEnable = true;
2281
2282 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) // Limited->Full
2283 {
2284 if (pVeboxIecpParams && pVeboxIecpParams->s1DLutParams.bActive)
2285 {
2286 // The updated value for TGL VEBOX HDR and Fp16 path
2287 pIecpState->CscState.DW0.C0 = 76533;
2288 pIecpState->CscState.DW1.C1 = 0;
2289 pIecpState->CscState.DW2.C2 = 110337;
2290 pIecpState->CscState.DW3.C3 = 76533;
2291 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12312, 19);
2292 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42751, 19);
2293 pIecpState->CscState.DW6.C6 = 76533;
2294 pIecpState->CscState.DW7.C7 = 140776;
2295 pIecpState->CscState.DW8.C8 = 0;
2296
2297 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2298 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2299 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2300
2301 pIecpState->CscState.DW9.OffsetOut1 = 0;
2302 pIecpState->CscState.DW10.OffsetOut2 = 0;
2303 pIecpState->CscState.DW11.OffsetOut3 = 0;
2304 }
2305 else
2306 {
2307 pIecpState->CscState.DW0.C0 = 76607;
2308 pIecpState->CscState.DW1.C1 = 0;
2309 pIecpState->CscState.DW2.C2 = 110443;
2310 pIecpState->CscState.DW3.C3 = 76607;
2311 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12325, 19);
2312 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42793, 19);
2313 pIecpState->CscState.DW6.C6 = 76607;
2314 pIecpState->CscState.DW7.C7 = 140911;
2315 pIecpState->CscState.DW8.C8 = 0;
2316
2317 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2318 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2319 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2320
2321 pIecpState->CscState.DW9.OffsetOut1 = 0;
2322 pIecpState->CscState.DW10.OffsetOut2 = 0;
2323 pIecpState->CscState.DW11.OffsetOut3 = 0;
2324 }
2325 }
2326 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // Full->Full
2327 {
2328 pIecpState->CscState.DW0.C0 = 65536;
2329 pIecpState->CscState.DW1.C1 = 0;
2330 pIecpState->CscState.DW2.C2 = 96639;
2331 pIecpState->CscState.DW3.C3 = 65536;
2332 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-10784, 19);
2333 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-37444, 19);
2334 pIecpState->CscState.DW6.C6 = 65536;
2335 pIecpState->CscState.DW7.C7 = 123299;
2336 pIecpState->CscState.DW8.C8 = 0;
2337
2338 pIecpState->CscState.DW9.OffsetIn1 = 0;
2339 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2340 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2341
2342 pIecpState->CscState.DW9.OffsetOut1 = 0;
2343 pIecpState->CscState.DW10.OffsetOut2 = 0;
2344 pIecpState->CscState.DW11.OffsetOut3 = 0;
2345 }
2346 else
2347 {
2348 MHW_ASSERTMESSAGE("Unsupported BeCSC input color space");
2349 }
2350
2351 eStatus = MOS_STATUS_SUCCESS;
2352
2353 return eStatus;
2354 }
2355
VeboxInterface_H2SManualMode(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2356 MOS_STATUS VeboxInterface_H2SManualMode(
2357 PMHW_VEBOX_HEAP pVeboxHeapInput,
2358 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2359 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2360 {
2361 MHW_FUNCTION_ENTER;
2362
2363 MHW_VEBOX_HEAP *pVeboxHeap;
2364 uint32_t uiOffset;
2365
2366 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD * pIecpState;
2367 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState;
2368 mhw::vebox::xe2_lpm_base_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGeGammaCorrection;
2369 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2370
2371 // HDR H2S algorithm related
2372 int32_t iToneMappingX[5] = {40, 200, 1000, 2000, 4000};
2373 int32_t iToneMappingY[4] = {2500, 5000, 10000, 10000};
2374 float fPivotX[5] = {0.0, 0.0, 0.0, 0.0, 0.0};
2375 float fPivotY[4] = {0.0, 0.0, 0.0, 0.0};
2376 float fSlope[5] = {0.0, 0.0, 0.0, 0.0, 0.0};
2377 float fMaxCLL = 0.0;
2378 // OETF parameters, corresponding to input
2379 uint32_t uiOETF[HDR_OETF_1DLUT_POINT_NUMBER] = {0};
2380 uint16_t usGE_Values[256][8] = {0};
2381
2382 MHW_CHK_NULL_RETURN(pVeboxGamutParams);
2383 MHW_CHK_NULL_RETURN(pVeboxHeapInput);
2384
2385 pVeboxHeap = pVeboxHeapInput;
2386 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2387 pIecpState = (mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2388 pVeboxGEGammaCorrection = (mhw::vebox::xe2_lpm_base_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiGamutStateOffset + uiOffset);
2389 fMaxCLL = (65535 * (float)pVeboxGamutParams->uiMaxCLL) / 10000;
2390
2391 MHW_CHK_NULL_RETURN(pIecpState);
2392 MHW_CHK_NULL_RETURN(pVeboxGEGammaCorrection);
2393
2394 // Must initialize VeboxIecpState even if it is not used because GCE
2395 // requires GlobalIECP enable bit to be turned on
2396 if (!pVeboxIecpParams)
2397 {
2398 IecpStateInitialization(pIecpState);
2399 }
2400 pGamutState = &pIecpState->GamutState;
2401
2402 for (int32_t i = 0; i < 4; i++)
2403 {
2404 fPivotX[i] = (iToneMappingY[i] < 10000) ? (65535 * (float)iToneMappingX[i]) / 10000 : MOS_MIN((65535 * (float)iToneMappingX[i]) / 10000, fMaxCLL);
2405 fPivotY[i] = (65535 * (float)iToneMappingY[i]) / 10000;
2406 }
2407 fPivotX[4] = MOS_MIN((65535 * (float)iToneMappingX[4]) / 10000, fMaxCLL);
2408
2409 // Slope
2410 fSlope[0] = fPivotX[0] > 0 ? (float)(fPivotY[0] / fPivotX[0]) : 0;
2411 fPivotY[0] = fSlope[0] * fPivotX[0];
2412 for (int32_t i = 1; i < 4; i++)
2413 {
2414 fSlope[i] = (fPivotX[i] - fPivotX[i - 1]) > 0 ? (float)(fPivotY[i] - fPivotY[i - 1]) / (fPivotX[i] - fPivotX[i - 1]) : 0;
2415 fPivotY[i] = fSlope[i] * (fPivotX[i] - fPivotX[i - 1]) + fPivotY[i - 1];
2416 }
2417 fSlope[4] = (fPivotX[4] - fPivotX[3]) > 0 ? (float)(65535 - fPivotY[3]) / (fPivotX[4] - fPivotX[3]) : 0;
2418
2419 // Linear Operation
2420 for (int32_t n = 1; n < HDR_OETF_1DLUT_POINT_NUMBER; n++)
2421 {
2422 if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[0] * fPivotX[0])
2423 {
2424 uiOETF[n] = (uint32_t)((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input[n]) / fSlope[0]);
2425 }
2426 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[1] * (fPivotX[1] - fPivotX[0]) + fPivotY[0])
2427 {
2428 uiOETF[n] = (uint32_t)(((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input[n]) - fPivotY[0]) / fSlope[1] + fPivotX[0]);
2429 }
2430 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[2] * (fPivotX[2] - fPivotX[1]) + fPivotY[1])
2431 {
2432 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] - fPivotY[1]) / fSlope[2] + fPivotX[1]);
2433 }
2434 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[3] * (fPivotX[3] - fPivotX[2]) + fPivotY[2])
2435 {
2436 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] - fPivotY[2]) / fSlope[3] + fPivotX[2]);
2437 }
2438 else
2439 {
2440 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] - fPivotY[3]) / fSlope[4] + fPivotX[3]);
2441 }
2442 }
2443 uiOETF[0] = 0;
2444 uiOETF[255] = 65535;
2445
2446 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
2447 VeboxInterface_BT2020YUVToRGB(pVeboxHeap, pVeboxIecpParams, pVeboxGamutParams);
2448
2449 // Global setting
2450 pGamutState->DW0.GlobalModeEnable = true;
2451 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
2452
2453 // CCM
2454 pGamutState->DW1.C0 = 108822;
2455 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38511, 21);
2456 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4774, 21);
2457 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-8163, 21);
2458 pGamutState->DW5.C4 = 74246;
2459 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-547, 21);
2460 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1190, 21);
2461 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6592, 21);
2462 pGamutState->DW8.C8 = 73317;
2463
2464 // Gamma Expansion
2465 *pVeboxGEGammaCorrection = VeboxGeGammaCorrection;
2466 for (int32_t i = 0; i < 255; i++)
2467 {
2468 usGE_Values[i][0] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Input[i];
2469 usGE_Values[i][1] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output[i];
2470 usGE_Values[i][2] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output[i];
2471 usGE_Values[i][3] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output[i];
2472
2473 usGE_Values[i][4] = (uint16_t)uiOETF[i];
2474 usGE_Values[i][5] = g_Hdr_ColorCorrect_OETF_Rec709_Output[i];
2475 usGE_Values[i][6] = g_Hdr_ColorCorrect_OETF_Rec709_Output[i];
2476 usGE_Values[i][7] = g_Hdr_ColorCorrect_OETF_Rec709_Output[i];
2477 }
2478 // Keep the last 4 DWs' value as defult 65535.See mhw_vebox_g10_X::Gamut_Expansion_Gamma_Correction_CMD();
2479 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1020, usGE_Values, sizeof(uint16_t) * 2040);
2480
2481 return eStatus;
2482 }
2483
SetVeboxSurfaceControlBits(PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,uint32_t * pSurfCtrlBits)2484 MOS_STATUS SetVeboxSurfaceControlBits(
2485 PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,
2486 uint32_t * pSurfCtrlBits)
2487 {
2488 MHW_FUNCTION_ENTER;
2489
2490 PLATFORM Platform = {};
2491 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2492
2493 mhw::vebox::xe2_lpm_base_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *pVeboxSurfCtrlBits;
2494 MEDIA_FEATURE_TABLE * skuTable = nullptr;
2495
2496 MHW_CHK_NULL_RETURN(pVeboxSurfCntlParams);
2497 MHW_CHK_NULL_RETURN(pSurfCtrlBits);
2498 MHW_CHK_NULL_RETURN(this->m_osItf);
2499
2500 this->m_osItf->pfnGetPlatform(this->m_osItf, &Platform);
2501 skuTable = this->m_osItf->pfnGetSkuTable(this->m_osItf);
2502 MHW_CHK_NULL_RETURN(skuTable);
2503
2504 pVeboxSurfCtrlBits = (mhw::vebox::xe2_lpm_base_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *)pSurfCtrlBits;
2505
2506 return eStatus;
2507 }
2508
VeboxInputFormat(PMHW_VEBOX_SURFACE_PARAMS pCurrSurf,uint32_t * dwFormat)2509 MOS_STATUS VeboxInputFormat(
2510 PMHW_VEBOX_SURFACE_PARAMS pCurrSurf,
2511 uint32_t *dwFormat)
2512 {
2513 MHW_FUNCTION_ENTER;
2514
2515 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2516 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_SURFACE_STATE_CMD VeboxSurfaceState;
2517
2518 switch (pCurrSurf->Format)
2519 {
2520 case Format_NV12:
2521 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR4208;
2522 break;
2523
2524 case Format_YUYV:
2525 case Format_YUY2:
2526 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBNORMAL;
2527 break;
2528
2529 case Format_UYVY:
2530 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPY;
2531 break;
2532
2533 case Format_AYUV:
2534 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED444A8;
2535 break;
2536
2537 case Format_Y416:
2538 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44416;
2539 break;
2540
2541 case Format_Y410:
2542 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44410;
2543 break;
2544
2545 case Format_YVYU:
2546 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUV;
2547 break;
2548
2549 case Format_VYUY:
2550 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUVY;
2551 break;
2552
2553 case Format_A8B8G8R8:
2554 case Format_X8B8G8R8:
2555 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2556 break;
2557
2558 case Format_A16B16G16R16:
2559 case Format_A16R16G16B16:
2560 case Format_A16B16G16R16F:
2561 case Format_A16R16G16B16F:
2562 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R16G16B16A16;
2563 break;
2564
2565 case Format_L8:
2566 case Format_P8:
2567 case Format_Y8:
2568 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y8UNORM;
2569 break;
2570
2571 case Format_IRW0:
2572 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2573 break;
2574
2575 case Format_IRW1:
2576 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2577 break;
2578
2579 case Format_IRW2:
2580 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2581 break;
2582
2583 case Format_IRW3:
2584 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2585 break;
2586
2587 case Format_IRW4:
2588 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2589 break;
2590
2591 case Format_IRW5:
2592 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2593 break;
2594
2595 case Format_IRW6:
2596 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2597 break;
2598
2599 case Format_IRW7:
2600 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2601 break;
2602
2603 case Format_P010:
2604 case Format_P016:
2605 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42016;
2606 break;
2607
2608 case Format_A8R8G8B8:
2609 case Format_X8R8G8B8:
2610 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2611 break;
2612
2613 case Format_R10G10B10A2:
2614 case Format_B10G10R10A2:
2615 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R10G10B10A2UNORMR10G10B10A2UNORMSRGB;
2616 break;
2617
2618 case Format_Y216:
2619 case Format_Y210:
2620 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED42216;
2621 break;
2622
2623 case Format_P216:
2624 case Format_P210:
2625 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42216;
2626 break;
2627
2628 case Format_Y16S:
2629 case Format_Y16U:
2630 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y16UNORM;
2631 break;
2632
2633 default:
2634 MHW_ASSERTMESSAGE("Unsupported format.");
2635 break;
2636 }
2637
2638 return eStatus;
2639 }
2640
AddVeboxTilingConvert(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VEBOX_SURFACE_PARAMS inSurParams,PMHW_VEBOX_SURFACE_PARAMS outSurParams)2641 MOS_STATUS AddVeboxTilingConvert(
2642 PMOS_COMMAND_BUFFER cmdBuffer,
2643 PMHW_VEBOX_SURFACE_PARAMS inSurParams,
2644 PMHW_VEBOX_SURFACE_PARAMS outSurParams)
2645 {
2646 MHW_FUNCTION_ENTER;
2647
2648 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2649 PMOS_RESOURCE surface = nullptr;
2650 PMOS_RESOURCE inputSurface;
2651 PMOS_RESOURCE outputSurface;
2652 mhw::vebox::xe2_lpm_base_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD veboxInputSurfCtrlBits, veboxOutputSurfCtrlBits;
2653 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_TILING_CONVERT_CMD cmd;
2654 MHW_RESOURCE_PARAMS ResourceParams = {0};
2655
2656 MHW_CHK_NULL_RETURN(cmdBuffer);
2657 MHW_CHK_NULL_RETURN(this->m_osItf);
2658 MHW_CHK_NULL_RETURN(inSurParams);
2659 MHW_CHK_NULL_RETURN(outSurParams);
2660
2661 inputSurface = inSurParams->pOsResource;
2662 outputSurface = outSurParams->pOsResource;
2663
2664 MHW_CHK_NULL_RETURN(inputSurface);
2665 MHW_CHK_NULL_RETURN(outputSurface);
2666
2667 // Set up VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS
2668 MOS_ZeroMemory(&veboxInputSurfCtrlBits, sizeof(veboxInputSurfCtrlBits));
2669 MOS_ZeroMemory(&veboxOutputSurfCtrlBits, sizeof(veboxOutputSurfCtrlBits));
2670
2671 switch (inputSurface->TileType)
2672 {
2673 case MOS_TILE_YF:
2674 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
2675 break;
2676 case MOS_TILE_YS:
2677 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
2678 break;
2679 default:
2680 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
2681 break;
2682 }
2683
2684 surface = outputSurface;
2685
2686 if (surface)
2687 {
2688 switch (surface->TileType)
2689 {
2690 case MOS_TILE_YF:
2691 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
2692 break;
2693 case MOS_TILE_YS:
2694 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
2695 break;
2696 default:
2697 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
2698 break;
2699 }
2700 }
2701
2702 veboxInputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
2703 veboxOutputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
2704 (this->m_osItf->pfnCachePolicyGetMemoryObject(
2705 MOS_HW_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_FF,
2706 this->m_osItf->pfnGetGmmClientContext(this->m_osItf)))
2707 .XE_LPG.Index;
2708
2709 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
2710 InitMocsParams(ResourceParams, &cmd.DW1_2.Value[0], 1, 6);
2711 ResourceParams.presResource = inputSurface;
2712 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
2713
2714 // set up DW[2:1], input graphics address
2715 ResourceParams.dwLocationInCmd = 1;
2716 ResourceParams.pdwCmd = &(cmd.DW1_2.Value[0]);
2717 ResourceParams.bIsWritable = false;
2718 ResourceParams.dwOffset = inSurParams->dwOffset + veboxInputSurfCtrlBits.DW0.Value;
2719 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
2720 this->m_osItf,
2721 cmdBuffer,
2722 &ResourceParams));
2723 cmd.DW1_2.InputSurfaceControlBits = veboxInputSurfCtrlBits.DW0.Value;
2724
2725 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
2726 InitMocsParams(ResourceParams, &cmd.DW3_4.Value[0], 1, 6);
2727 ResourceParams.presResource = outputSurface;
2728 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
2729
2730 // set up DW[4:3], output graphics address
2731 ResourceParams.dwLocationInCmd = 3;
2732 ResourceParams.pdwCmd = &(cmd.DW3_4.Value[0]);
2733 ResourceParams.bIsWritable = true;
2734 ResourceParams.dwOffset = outSurParams->dwOffset + veboxOutputSurfCtrlBits.DW0.Value;;
2735 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
2736 this->m_osItf,
2737 cmdBuffer,
2738 &ResourceParams));
2739
2740 cmd.DW3_4.OutputSurfaceControlBits = veboxOutputSurfCtrlBits.DW0.Value;
2741 m_osItf->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize);
2742
2743 return eStatus;
2744 }
2745
SetVeboxSurfaces(PMHW_VEBOX_SURFACE_PARAMS pInputSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pOutputSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,bool bIsOutputSurface,bool bDIEnable,PMOS_COMMAND_BUFFER pCmdBufferInUse)2746 void SetVeboxSurfaces(
2747 PMHW_VEBOX_SURFACE_PARAMS pInputSurfaceParam,
2748 PMHW_VEBOX_SURFACE_PARAMS pOutputSurfaceParam,
2749 PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,
2750 PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,
2751 bool bIsOutputSurface,
2752 bool bDIEnable,
2753 PMOS_COMMAND_BUFFER pCmdBufferInUse)
2754 {
2755 MHW_FUNCTION_ENTER;
2756
2757 uint32_t dwFormat = 0;
2758 uint32_t dwInputFormat = 0;
2759 uint32_t dwSurfaceWidth = 0;
2760 uint32_t dwSurfaceHeight = 0;
2761 uint32_t dwSurfacePitch = 0;
2762 bool bHalfPitchForChroma = false;
2763 bool bInterleaveChroma = false;
2764 uint16_t wUXOffset = 0;
2765 uint16_t wUYOffset = 0;
2766 uint16_t wVXOffset = 0;
2767 uint16_t wVYOffset = 0;
2768 uint8_t bBayerOffset = 0;
2769 uint8_t bBayerStride = 0;
2770 uint8_t bBayerInputAlignment = 0;
2771 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam = nullptr;
2772
2773 mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_SURFACE_STATE_CMD VeboxSurfaceState;
2774
2775 MHW_CHK_NULL_NO_STATUS_RETURN(pInputSurfaceParam);
2776 MHW_CHK_NULL_NO_STATUS_RETURN(pOutputSurfaceParam);
2777
2778 if (!bIsOutputSurface)
2779 {
2780 pSurfaceParam = pInputSurfaceParam;
2781 }
2782 else
2783 {
2784 pSurfaceParam = pOutputSurfaceParam;
2785 }
2786
2787 switch (pSurfaceParam->Format)
2788 {
2789 case Format_NV12:
2790 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR4208;
2791 bInterleaveChroma = true;
2792 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
2793 break;
2794
2795 case Format_YUYV:
2796 case Format_YUY2:
2797 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBNORMAL;
2798 break;
2799
2800 case Format_UYVY:
2801 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPY;
2802 break;
2803
2804 case Format_AYUV:
2805 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED444A8;
2806 break;
2807
2808 case Format_Y416:
2809 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44416;
2810 break;
2811
2812 case Format_Y410:
2813 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44410;
2814 break;
2815
2816 case Format_YVYU:
2817 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUV;
2818 break;
2819
2820 case Format_VYUY:
2821 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUVY;
2822 break;
2823
2824 case Format_A8B8G8R8:
2825 case Format_X8B8G8R8:
2826 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2827 break;
2828
2829 case Format_A16B16G16R16:
2830 case Format_A16R16G16B16:
2831 case Format_A16B16G16R16F:
2832 case Format_A16R16G16B16F:
2833 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R16G16B16A16;
2834 break;
2835
2836 case Format_L8:
2837 case Format_P8:
2838 case Format_Y8:
2839 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y8UNORM;
2840 break;
2841
2842 case Format_IRW0:
2843 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2844 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
2845 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2846 break;
2847
2848 case Format_IRW1:
2849 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2850 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
2851 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2852 break;
2853
2854 case Format_IRW2:
2855 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2856 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
2857 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2858 break;
2859
2860 case Format_IRW3:
2861 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2862 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
2863 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2864 break;
2865
2866 case Format_IRW4:
2867 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2868 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
2869 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2870 break;
2871
2872 case Format_IRW5:
2873 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2874 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
2875 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2876 break;
2877
2878 case Format_IRW6:
2879 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2880 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
2881 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2882 break;
2883
2884 case Format_IRW7:
2885 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2886 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
2887 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2888 break;
2889
2890 case Format_P010:
2891 case Format_P016:
2892 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42016;
2893 bInterleaveChroma = true;
2894 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
2895 break;
2896
2897 case Format_A8R8G8B8:
2898 case Format_X8R8G8B8:
2899 if (bIsOutputSurface)
2900 {
2901 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_B8G8R8A8UNORM;
2902 }
2903 else
2904 {
2905 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2906 }
2907 break;
2908
2909 case Format_R10G10B10A2:
2910 case Format_B10G10R10A2:
2911 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R10G10B10A2UNORMR10G10B10A2UNORMSRGB;
2912 break;
2913
2914 case Format_Y216:
2915 case Format_Y210:
2916 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED42216;
2917 break;
2918
2919 case Format_P216:
2920 case Format_P210:
2921 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42216;
2922 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
2923 break;
2924
2925 case Format_Y16S:
2926 case Format_Y16U:
2927 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y16UNORM;
2928 break;
2929
2930 default:
2931 MHW_ASSERTMESSAGE("Unsupported format.");
2932 return;
2933 break;
2934 }
2935
2936 if (!bIsOutputSurface)
2937 {
2938 // camera pipe will use 10/12/14 for LSB, 0 for MSB. For other pipeline,
2939 // dwBitDepth is inherited from pSrc->dwDepth which may not among (0,10,12,14)
2940 // For such cases should use MSB as default value.
2941 switch (pSurfaceParam->dwBitDepth)
2942 {
2943 case 10:
2944 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_10BITLSBALIGNEDDATA;
2945 break;
2946
2947 case 12:
2948 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_12BITLSBALIGNEDDATA;
2949 break;
2950
2951 case 14:
2952 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_14BITLSBALIGNEDDATA;
2953 break;
2954
2955 case 0:
2956 default:
2957 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
2958 break;
2959 }
2960 }
2961 else
2962 {
2963 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
2964 }
2965
2966 // adjust boundary for vebox
2967 VeboxAdjustBoundary(
2968 pSurfaceParam,
2969 &dwSurfaceWidth,
2970 &dwSurfaceHeight,
2971 bDIEnable);
2972
2973 dwSurfacePitch = (pSurfaceParam->TileType == MOS_TILE_LINEAR) ? MOS_ALIGN_CEIL(pSurfaceParam->dwPitch, MHW_VEBOX_LINEAR_PITCH) : pSurfaceParam->dwPitch;
2974
2975 // Setup Surface State
2976 auto& par = MHW_GETPAR_F(VEBOX_SURFACE_STATE)();
2977 par = {};
2978 par.SurfaceIdentification = bIsOutputSurface;
2979 par.SurfaceFormat = dwFormat;
2980 par.Width = dwSurfaceWidth - 1;
2981 par.Height = dwSurfaceHeight - 1;
2982 par.HalfPitchForChroma = bHalfPitchForChroma;
2983 par.InterleaveChroma = bInterleaveChroma;
2984 par.BayerInputAlignment = bBayerInputAlignment;
2985 par.BayerPatternOffset = bBayerOffset;
2986 par.BayerPatternFormat = bBayerStride;
2987 par.SurfacePitch = dwSurfacePitch - 1;
2988 par.TileMode = MosGetHWTileType(pSurfaceParam->TileType, pSurfaceParam->TileModeGMM, pSurfaceParam->bGMMTileEnabled);
2989 par.XOffsetForU = wUXOffset;
2990 par.YOffsetForU = wUYOffset;
2991 par.XOffsetForV = wVXOffset;
2992 par.YOffsetForV = wVYOffset;
2993
2994 // May fix this for stereo surfaces
2995 par.YOffsetForFrame = pSurfaceParam->dwYoffset;
2996 par.XOffsetForFrame = 0;
2997
2998 par.DerivedSurfacePitch = pDerivedSurfaceParam->dwPitch - 1;
2999 par.SurfacePitchForSkinScoreOutputSurfaces = (bIsOutputSurface && pSkinScoreSurfaceParam->bActive) ? (pSkinScoreSurfaceParam->dwPitch - 1) : 0;
3000 par.CompressionFormat = pSurfaceParam->dwCompressionFormat;
3001
3002 if (bIsOutputSurface && (pInputSurfaceParam->Format == pOutputSurfaceParam->Format))
3003 {
3004 VeboxInputFormat(pInputSurfaceParam, &dwInputFormat);
3005 par.SurfaceFormat = dwInputFormat;
3006 }
3007
3008 MHW_ADDCMD_F(VEBOX_SURFACE_STATE)(pCmdBufferInUse);
3009
3010 return;
3011 }
3012
AddVeboxSurfaces(PMOS_COMMAND_BUFFER pCmdBufferInUse,PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)3013 MOS_STATUS AddVeboxSurfaces(
3014 PMOS_COMMAND_BUFFER pCmdBufferInUse,
3015 PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)
3016 {
3017 MHW_FUNCTION_ENTER;
3018
3019 MOS_STATUS eStatus;
3020 bool bOutputValid;
3021
3022 MHW_CHK_NULL_RETURN(pCmdBufferInUse);
3023 MHW_CHK_NULL_RETURN(this->m_osItf);
3024 MHW_CHK_NULL_RETURN(pVeboxSurfaceStateCmdParams);
3025 MHW_CHK_NULL_RETURN(this->m_osItf->pfnGetMemoryCompressionFormat);
3026
3027 eStatus = MOS_STATUS_SUCCESS;
3028 bOutputValid = pVeboxSurfaceStateCmdParams->bOutputValid;
3029
3030 if (!pVeboxSurfaceStateCmdParams->SurfInput.dwCompressionFormat)
3031 {
3032 this->m_osItf->pfnGetMemoryCompressionFormat(this->m_osItf, pVeboxSurfaceStateCmdParams->SurfInput.pOsResource, &pVeboxSurfaceStateCmdParams->SurfInput.dwCompressionFormat);
3033 }
3034
3035 // Setup Surface State for Input surface
3036 SetVeboxSurfaces(
3037 &pVeboxSurfaceStateCmdParams->SurfInput,
3038 &pVeboxSurfaceStateCmdParams->SurfOutput,
3039 &pVeboxSurfaceStateCmdParams->SurfSTMM,
3040 nullptr,
3041 false,
3042 pVeboxSurfaceStateCmdParams->bDIEnable,
3043 pCmdBufferInUse);
3044
3045 // Setup Surface State for Output surface
3046 if (bOutputValid)
3047 {
3048 if (!pVeboxSurfaceStateCmdParams->SurfOutput.dwCompressionFormat)
3049 this->m_osItf->pfnGetMemoryCompressionFormat(this->m_osItf, pVeboxSurfaceStateCmdParams->SurfOutput.pOsResource, &pVeboxSurfaceStateCmdParams->SurfOutput.dwCompressionFormat);
3050
3051 SetVeboxSurfaces(
3052 &pVeboxSurfaceStateCmdParams->SurfInput,
3053 &pVeboxSurfaceStateCmdParams->SurfOutput,
3054 &pVeboxSurfaceStateCmdParams->SurfDNOutput,
3055 &pVeboxSurfaceStateCmdParams->SurfSkinScoreOutput,
3056 true,
3057 pVeboxSurfaceStateCmdParams->bDIEnable,
3058 pCmdBufferInUse);
3059 }
3060
3061 return eStatus;
3062 }
3063
3064 #if (_DEBUG || _RELEASE_INTERNAL)
ValidateVeboxScalabilityConfig()3065 MOS_STATUS ValidateVeboxScalabilityConfig()
3066 {
3067 MHW_FUNCTION_ENTER;
3068
3069 MEDIA_ENGINE_INFO mediaSysInfo = {};
3070 MOS_FORCE_VEBOX eForceVebox;
3071 bool bScalableVEMode;
3072 bool bUseVE1, bUseVE2, bUseVE3, bUseVE4;
3073 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3074
3075 MHW_CHK_NULL_RETURN(this->m_osItf);
3076
3077 eForceVebox = this->m_osItf->eForceVebox;
3078 bScalableVEMode = ((this->m_osItf->bVeboxScalabilityMode) ? true : false);
3079 eStatus = this->m_osItf->pfnGetMediaEngineInfo(this->m_osItf, mediaSysInfo);
3080 MHW_CHK_STATUS_RETURN(eStatus);
3081
3082 if (eForceVebox != MOS_FORCE_VEBOX_NONE &&
3083 eForceVebox != MOS_FORCE_VEBOX_1 &&
3084 eForceVebox != MOS_FORCE_VEBOX_2 &&
3085 eForceVebox != MOS_FORCE_VEBOX_1_2 &&
3086 eForceVebox != MOS_FORCE_VEBOX_1_2_3 &&
3087 eForceVebox != MOS_FORCE_VEBOX_1_2_3_4)
3088 {
3089 eStatus = MOS_STATUS_INVALID_PARAMETER;
3090 MHW_ASSERTMESSAGE("eForceVebox value is invalid.");
3091 return eStatus;
3092 }
3093
3094 if (!bScalableVEMode &&
3095 (eForceVebox == MOS_FORCE_VEBOX_1_2 ||
3096 eForceVebox == MOS_FORCE_VEBOX_1_2_3 ||
3097 eForceVebox == MOS_FORCE_VEBOX_1_2_3_4))
3098 {
3099 eStatus = MOS_STATUS_INVALID_PARAMETER;
3100 MHW_ASSERTMESSAGE("eForceVebox value is not consistent with scalability mode.");
3101 return eStatus;
3102 }
3103
3104 if (bScalableVEMode && !m_veboxScalabilitySupported)
3105 {
3106 eStatus = MOS_STATUS_INVALID_PARAMETER;
3107 MHW_ASSERTMESSAGE("scalability mode is not allowed on current platform!");
3108 return eStatus;
3109 }
3110
3111 bUseVE1 = bUseVE2 = bUseVE3 = bUseVE4 = false;
3112 if (eForceVebox == MOS_FORCE_VEBOX_NONE)
3113 {
3114 bUseVE1 = true;
3115 }
3116 else
3117 {
3118 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_1, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE1);
3119 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_2, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE2);
3120 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_3, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE3);
3121 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_4, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE4);
3122 }
3123
3124 if (!mediaSysInfo.VEBoxInfo.IsValid ||
3125 (uint32_t)(bUseVE1 + bUseVE2 + bUseVE3 + bUseVE4) > mediaSysInfo.VEBoxInfo.NumberOfVEBoxEnabled)
3126 {
3127 eStatus = MOS_STATUS_INVALID_PARAMETER;
3128 MHW_ASSERTMESSAGE("the forced VEBOX is not enabled in current platform.");
3129 return eStatus;
3130 }
3131
3132 return eStatus;
3133 }
3134 #endif
3135
_MHW_SETCMD_OVERRIDE_DECL(VEBOX_STATE)3136 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_STATE)
3137 {
3138 MHW_FUNCTION_ENTER;
3139
3140 _MHW_SETCMD_CALLBASE(VEBOX_STATE);
3141
3142 MOS_STATUS eStatus;
3143 PMOS_INTERFACE pOsInterface;
3144 PMOS_CONTEXT pOsContext = nullptr;
3145 PMOS_RESOURCE pVeboxParamResource = nullptr;
3146 PMOS_RESOURCE pVeboxHeapResource = nullptr;
3147 MHW_VEBOX_HEAP* pVeboxHeap;
3148 uint32_t uiInstanceBaseAddr = 0;
3149 MHW_RESOURCE_PARAMS ResourceParams = {};
3150 MOS_ALLOC_GFXRES_PARAMS AllocParamsForBufferLinear = {};
3151 uint32_t *pIndirectState = nullptr;
3152
3153 MHW_CHK_NULL_RETURN(this->m_osItf);
3154 MHW_CHK_NULL_RETURN(this->m_osItf->pOsContext);
3155 MHW_CHK_NULL_RETURN(this->m_currentCmdBuf);
3156
3157 // Initialize
3158 eStatus = MOS_STATUS_SUCCESS;
3159 pOsInterface = this->m_osItf;
3160 pOsContext = this->m_osItf->pOsContext;
3161
3162 if (!params.bNoUseVeboxHeap)
3163 {
3164 MHW_CHK_NULL_RETURN(m_veboxHeap);
3165
3166 pVeboxHeap = m_veboxHeap;
3167 if (params.bCmBuffer)
3168 {
3169 pVeboxParamResource = params.pVeboxParamSurf;
3170 }
3171 else
3172 {
3173 pVeboxHeapResource = params.bUseVeboxHeapKernelResource ? &pVeboxHeap->KernelResource : &pVeboxHeap->DriverResource;
3174
3175 // Calculate the instance base address
3176 uiInstanceBaseAddr = pVeboxHeap->uiInstanceSize * pVeboxHeap->uiCurState;
3177 }
3178
3179 TraceIndirectStateInfo(*this->m_currentCmdBuf, *pOsContext, params.bCmBuffer, params.bUseVeboxHeapKernelResource);
3180
3181 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3182 if (params.bCmBuffer)
3183 {
3184 ResourceParams.presResource = pVeboxParamResource;
3185 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset;
3186 }
3187 else
3188 {
3189 ResourceParams.presResource = pVeboxHeapResource;
3190 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset + uiInstanceBaseAddr;
3191 }
3192 ResourceParams.pdwCmd = &(cmd.DW2.Value);
3193 ResourceParams.dwLocationInCmd = 2;
3194 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3195
3196 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3197 pOsInterface,
3198 this->m_currentCmdBuf,
3199 &ResourceParams));
3200 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3201 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3202 {
3203 // add DNDI indirect state dump
3204 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3205 pOsInterface->pfnAddIndirectState(pOsInterface,
3206 sizeof(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_DNDI_STATE_CMD),
3207 pIndirectState,
3208 ResourceParams.pdwCmd,
3209 ResourceParams.pdwCmd + 1,
3210 "VEBOX_DNDI_STATE_CMD");
3211 }
3212 #endif
3213
3214 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiDndiStateSize);
3215
3216 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3217 if (params.bCmBuffer)
3218 {
3219 ResourceParams.presResource = pVeboxParamResource;
3220 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset;
3221 }
3222 else
3223 {
3224 ResourceParams.presResource = pVeboxHeapResource;
3225 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset + uiInstanceBaseAddr;
3226 }
3227 ResourceParams.pdwCmd = &(cmd.DW4.Value);
3228 ResourceParams.dwLocationInCmd = 4;
3229 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3230 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3231
3232 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3233 pOsInterface,
3234 this->m_currentCmdBuf,
3235 &ResourceParams));
3236 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3237 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3238 {
3239 // add IECP indirect state dump
3240 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3241 pOsInterface->pfnAddIndirectState(pOsInterface,
3242 sizeof(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_IECP_STATE_CMD),
3243 pIndirectState,
3244 ResourceParams.pdwCmd,
3245 ResourceParams.pdwCmd + 1,
3246 "VEBOX_IECP_STATE_CMD");
3247 }
3248 #endif
3249
3250 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiIecpStateSize);
3251
3252 // Gamut Expansion, HDR and Forward Gamma Correction are mutually exclusive.
3253 if (params.VeboxMode.Hdr1DLutEnable)
3254 {
3255 // If HDR is enabled, this points to a buffer containing the HDR state.
3256 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3257 if (params.bCmBuffer)
3258 {
3259 ResourceParams.presResource = pVeboxParamResource;
3260 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset;
3261 }
3262 else
3263 {
3264 ResourceParams.presResource = pVeboxHeapResource;
3265 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset + uiInstanceBaseAddr;
3266 }
3267 ResourceParams.pdwCmd = &(cmd.DW6.Value);
3268 ResourceParams.dwLocationInCmd = 6;
3269 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3270 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3271
3272 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3273 pOsInterface,
3274 this->m_currentCmdBuf,
3275 &ResourceParams));
3276 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3277 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3278 {
3279 // add HDR indirect state dump
3280 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3281 pOsInterface->pfnAddIndirectState(pOsInterface,
3282 sizeof(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_HDR_STATE_CMD),
3283 pIndirectState,
3284 ResourceParams.pdwCmd,
3285 ResourceParams.pdwCmd + 1,
3286 "VEBOX_HDR_STATE_CMD");
3287 }
3288 #endif
3289 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiHdrStateSize);
3290 }
3291 else
3292 {
3293 // If Gamut Expansion is enabled, this points to a buffer containing the Gamut Expansion Gamma Correction state.
3294 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3295 if (params.bCmBuffer)
3296 {
3297 ResourceParams.presResource = pVeboxParamResource;
3298 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset;
3299 }
3300 else
3301 {
3302 ResourceParams.presResource = pVeboxHeapResource;
3303 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset + uiInstanceBaseAddr;
3304 }
3305 ResourceParams.pdwCmd = &(cmd.DW6.Value);
3306 ResourceParams.dwLocationInCmd = 6;
3307 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3308 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3309
3310 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3311 pOsInterface,
3312 this->m_currentCmdBuf,
3313 &ResourceParams));
3314 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3315 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3316 {
3317 // add Gamut Expansion Gamma Correctionindirect state dump
3318 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3319 pOsInterface->pfnAddIndirectState(pOsInterface,
3320 sizeof(mhw::vebox::xe2_lpm_base_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD),
3321 pIndirectState,
3322 ResourceParams.pdwCmd,
3323 ResourceParams.pdwCmd + 1,
3324 "Gamut_Expansion_Gamma_Correction_CMD");
3325 }
3326 #endif
3327
3328 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGamutStateSize);
3329 }
3330
3331 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3332 if (params.bCmBuffer)
3333 {
3334 ResourceParams.presResource = pVeboxParamResource;
3335 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset;
3336 }
3337 else
3338 {
3339 ResourceParams.presResource = pVeboxHeapResource;
3340 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset + uiInstanceBaseAddr;
3341 }
3342 ResourceParams.pdwCmd = &(cmd.DW8.Value);
3343 ResourceParams.dwLocationInCmd = 8;
3344 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3345 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3346
3347 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3348 pOsInterface,
3349 this->m_currentCmdBuf,
3350 &ResourceParams));
3351 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3352 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3353 {
3354 // add Vertex Table state dump
3355 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3356 pOsInterface->pfnAddIndirectState(pOsInterface,
3357 sizeof(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_VERTEX_TABLE_CMD),
3358 pIndirectState,
3359 ResourceParams.pdwCmd,
3360 ResourceParams.pdwCmd + 1,
3361 "VEBOX_VERTEX_TABLE_CMD");
3362 }
3363 #endif
3364 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiVertexTableSize);
3365
3366 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3367 if (params.bCmBuffer)
3368 {
3369 ResourceParams.presResource = pVeboxParamResource;
3370 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset;
3371 }
3372 else
3373 {
3374 ResourceParams.presResource = pVeboxHeapResource;
3375 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset + uiInstanceBaseAddr;
3376 }
3377
3378 ResourceParams.pdwCmd = &(cmd.DW10.Value);
3379 ResourceParams.dwLocationInCmd = 10;
3380 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3381 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3382
3383 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3384 pOsInterface,
3385 this->m_currentCmdBuf,
3386 &ResourceParams));
3387 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3388 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3389 {
3390 // add CAPTURE PIPE STATE CMD state dump
3391 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3392 pOsInterface->pfnAddIndirectState(pOsInterface,
3393 sizeof(mhw::vebox::xe2_lpm_base_next::Cmd::VEBOX_CAPTURE_PIPE_STATE_CMD),
3394 pIndirectState,
3395 ResourceParams.pdwCmd,
3396 ResourceParams.pdwCmd + 1,
3397 "VEBOX_CAPTURE_PIPE_STATE_CMD");
3398 }
3399 #endif
3400
3401 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiCapturePipeStateSize);
3402
3403 if (params.pLaceLookUpTables)
3404 {
3405 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3406 ResourceParams.presResource = params.pLaceLookUpTables;
3407 ResourceParams.dwOffset = 0;
3408 ResourceParams.pdwCmd = &(cmd.DW12.Value);
3409 ResourceParams.dwLocationInCmd = 12;
3410 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3411 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3412
3413 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3414 pOsInterface,
3415 this->m_currentCmdBuf,
3416 &ResourceParams));
3417 }
3418
3419 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3420 if (params.bCmBuffer)
3421 {
3422 ResourceParams.presResource = pVeboxParamResource;
3423 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset;
3424 }
3425 else
3426 {
3427 ResourceParams.presResource = pVeboxHeapResource;
3428 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset + uiInstanceBaseAddr;
3429 }
3430 ResourceParams.pdwCmd = &(cmd.DW14_15.Value[0]);
3431 ResourceParams.dwLocationInCmd = 14;
3432 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3433 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3434
3435 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3436 pOsInterface,
3437 this->m_currentCmdBuf,
3438 &ResourceParams));
3439 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3440 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3441 {
3442 // add Gamma Correction state dump
3443 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3444 pOsInterface->pfnAddIndirectState(pOsInterface,
3445 sizeof(PMHW_FORWARD_GAMMA_SEG),
3446 pIndirectState,
3447 ResourceParams.pdwCmd,
3448 ResourceParams.pdwCmd + 1,
3449 "PMHW_FORWARD_GAMMA_SEG");
3450 }
3451 #endif
3452 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGammaCorrectionStateSize);
3453
3454 if (params.pVebox3DLookUpTables)
3455 {
3456 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3457 ResourceParams.presResource = params.pVebox3DLookUpTables;
3458 ResourceParams.dwOffset = 0;
3459 ResourceParams.pdwCmd = &(cmd.DW16.Value);
3460 ResourceParams.dwLocationInCmd = 16;
3461 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3462 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3463
3464 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3465 pOsInterface,
3466 this->m_currentCmdBuf,
3467 &ResourceParams));
3468 }
3469
3470 if (params.pVebox1DLookUpTables)
3471 {
3472 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3473 ResourceParams.presResource = params.pVebox1DLookUpTables;
3474 ResourceParams.dwOffset = 0;
3475 ResourceParams.pdwCmd = &(cmd.DW21.Value);
3476 ResourceParams.dwLocationInCmd = 21;
3477 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3478 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3479
3480 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3481 pOsInterface,
3482 this->m_currentCmdBuf,
3483 &ResourceParams));
3484 }
3485 }
3486 else
3487 {
3488 // Allocate Resource to avoid Page Fault issue since HW will access it
3489 if (Mos_ResourceIsNull(params.DummyIecpResource))
3490 {
3491 AllocParamsForBufferLinear.Type = MOS_GFXRES_BUFFER;
3492 AllocParamsForBufferLinear.TileType = MOS_TILE_LINEAR;
3493 AllocParamsForBufferLinear.Format = Format_Buffer;
3494 AllocParamsForBufferLinear.dwBytes = m_veboxSettings.uiIecpStateSize;
3495 AllocParamsForBufferLinear.pBufName = "DummyIecpResource";
3496 AllocParamsForBufferLinear.ResUsageType = MOS_HW_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_FF;
3497
3498 MHW_CHK_STATUS_RETURN(pOsInterface->pfnAllocateResource(
3499 pOsInterface,
3500 &AllocParamsForBufferLinear,
3501 params.DummyIecpResource));
3502 }
3503
3504 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3505 ResourceParams.presResource = params.DummyIecpResource;
3506 ResourceParams.dwOffset = 0;
3507 ResourceParams.pdwCmd = &(cmd.DW4.Value);
3508 ResourceParams.dwLocationInCmd = 4;
3509 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3510 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3511
3512 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3513 pOsInterface,
3514 this->m_currentCmdBuf,
3515 &ResourceParams));
3516
3517 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, 0, true, 0);
3518 }
3519
3520 cmd.DW1.ColorGamutExpansionEnable = params.VeboxMode.ColorGamutExpansionEnable;
3521 cmd.DW1.ColorGamutCompressionEnable = params.VeboxMode.ColorGamutCompressionEnable;
3522 cmd.DW1.GlobalIecpEnable = params.VeboxMode.GlobalIECPEnable;
3523 cmd.DW1.DnEnable = params.VeboxMode.DNEnable;
3524 cmd.DW1.DiEnable = params.VeboxMode.DIEnable;
3525 cmd.DW1.DnDiFirstFrame = params.VeboxMode.DNDIFirstFrame;
3526 cmd.DW1.DiOutputFrames = params.VeboxMode.DIOutputFrames;
3527 cmd.DW1.DemosaicEnable = params.VeboxMode.DemosaicEnable;
3528 cmd.DW1.VignetteEnable = params.VeboxMode.VignetteEnable;
3529 cmd.DW1.AlphaPlaneEnable = params.VeboxMode.AlphaPlaneEnable;
3530 cmd.DW1.HotPixelFilteringEnable = params.VeboxMode.HotPixelFilteringEnable;
3531 cmd.DW1.LaceCorrectionEnable = params.VeboxMode.LACECorrectionEnable;
3532 cmd.DW1.DisableEncoderStatistics = params.VeboxMode.DisableEncoderStatistics;
3533 cmd.DW1.DisableTemporalDenoiseFilter = params.VeboxMode.DisableTemporalDenoiseFilter;
3534 cmd.DW1.SinglePipeEnable = params.VeboxMode.SinglePipeIECPEnable;
3535 cmd.DW1.ScalarMode = params.VeboxMode.ScalarMode;
3536 cmd.DW1.ForwardGammaCorrectionEnable = params.VeboxMode.ForwardGammaCorrectionEnable;
3537 cmd.DW1.HdrEnable = params.VeboxMode.Hdr1DLutEnable;
3538 cmd.DW1.Fp16ModeEnable = params.VeboxMode.Fp16ModeEnable;
3539 cmd.DW1.StateSurfaceControlBits = (pOsInterface->pfnCachePolicyGetMemoryObject(
3540 MOS_HW_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_FF,
3541 pOsInterface->pfnGetGmmClientContext(pOsInterface))).DwordValue;
3542
3543 cmd.DW17.EncDataControlFor3DLUT = 0;
3544 cmd.DW17.ChannelMappingSwapForLut3D = params.LUT3D.ChannelMappingSwapForLut3D; // B->Y, G->U, R->V for DV Perf
3545
3546 cmd.DW17.ArbitrationPriorityControlForLut3D = params.LUT3D.ArbitrationPriorityControl;
3547 // In GmmCachePolicyExt.h, Gen9/Gen10/Gen11/Gen12/MTL+ has the same definition for MEMORY_OBJECT_CONTROL_STATE.
3548 // In MHW_MEMORY_OBJECT_CONTROL_PARAMS, we only defined Gen9 which intended to use for Gen9 later, so reuse Gen9 index.
3549 cmd.DW17.Lut3DMocsTable = params.Vebox3DLookUpTablesSurfCtrl.Gen9.Index;
3550 cmd.DW18.Lut3DEnable = params.LUT3D.Lut3dEnable;
3551 cmd.DW18.Lut3DSize = params.LUT3D.Lut3dSize;
3552
3553 cmd.DW18.ChromaUpsamplingCoSitedHorizontalOffset = params.ChromaSampling.ChromaUpsamplingCoSitedHorizontalOffset;
3554 cmd.DW18.ChromaUpsamplingCoSitedVerticalOffset = params.ChromaSampling.ChromaUpsamplingCoSitedVerticalOffset;
3555 cmd.DW18.ChromaDownsamplingCoSitedHorizontalOffset = params.ChromaSampling.ChromaDownsamplingCoSitedHorizontalOffset;
3556 cmd.DW18.ChromaDownsamplingCoSitedVerticalOffset = params.ChromaSampling.ChromaDownsamplingCoSitedVerticalOffset;
3557 cmd.DW18.BypassChromaUpsampling = params.ChromaSampling.BypassChromaUpsampling;
3558 cmd.DW18.BypassChromaDownsampling = params.ChromaSampling.BypassChromaDownsampling;
3559 cmd.DW18._1DLutSize = params.VeboxMode.Hdr1K1DLut;
3560
3561 return eStatus;
3562 }
3563
_MHW_SETCMD_OVERRIDE_DECL(VEBOX_TILING_CONVERT)3564 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_TILING_CONVERT)
3565 {
3566 _MHW_SETCMD_CALLBASE(VEBOX_TILING_CONVERT);
3567 return MOS_STATUS_SUCCESS;
3568 }
3569
_MHW_SETCMD_OVERRIDE_DECL(VEB_DI_IECP)3570 _MHW_SETCMD_OVERRIDE_DECL(VEB_DI_IECP)
3571 {
3572 MHW_FUNCTION_ENTER;
3573
3574 _MHW_SETCMD_CALLBASE(VEB_DI_IECP);
3575 MHW_RESOURCE_PARAMS resourceParams = {};
3576
3577 MHW_CHK_NULL_RETURN(this->m_osItf);
3578 MHW_CHK_NULL_RETURN(this->m_currentCmdBuf);
3579
3580 //MHW_CHK_NULL_RETURN_RETURN(pVeboxDiIecpCmdParams);
3581 MHW_ASSERT(MOS_IS_ALIGNED(params.dwCurrInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
3582 MHW_ASSERT(MOS_IS_ALIGNED(params.dwPrevInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
3583
3584 if (params.pOsResCurrInput)
3585 {
3586 if (params.CurInputSurfMMCState != MOS_MEMCOMP_DISABLED)
3587 {
3588 mhw::vebox::xe2_lpm_base_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD* pSurfCtrlBits;
3589 pSurfCtrlBits = (mhw::vebox::xe2_lpm_base_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD*)¶ms.CurrInputSurfCtrl.Value;
3590 }
3591
3592 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3593 resourceParams.presResource = params.pOsResCurrInput;
3594 resourceParams.dwOffset = params.dwCurrInputSurfOffset + params.CurrInputSurfCtrl.Value;
3595 resourceParams.pdwCmd = &(cmd.DW2.Value);
3596 resourceParams.dwLocationInCmd = 2;
3597 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3598
3599 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3600 this->m_osItf,
3601 this->m_currentCmdBuf,
3602 &resourceParams));
3603 }
3604
3605 if (params.pOsResPrevInput)
3606 {
3607 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3608 resourceParams.presResource = params.pOsResPrevInput;
3609 resourceParams.dwOffset = params.PrevInputSurfCtrl.Value + params.dwPrevInputSurfOffset;
3610 resourceParams.pdwCmd = &(cmd.DW4.Value);
3611 resourceParams.dwLocationInCmd = 4;
3612 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3613
3614 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3615 this->m_osItf,
3616 this->m_currentCmdBuf,
3617 &resourceParams));
3618 }
3619
3620 if (params.pOsResStmmInput)
3621 {
3622 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3623 resourceParams.presResource = params.pOsResStmmInput;
3624 resourceParams.dwOffset = params.StmmInputSurfCtrl.Value;
3625 resourceParams.pdwCmd = &(cmd.DW6.Value);
3626 resourceParams.dwLocationInCmd = 6;
3627 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3628
3629 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3630 this->m_osItf,
3631 this->m_currentCmdBuf,
3632 &resourceParams));
3633 }
3634
3635 if (params.pOsResStmmOutput)
3636 {
3637 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3638 resourceParams.presResource = params.pOsResStmmOutput;
3639 resourceParams.dwOffset = params.StmmOutputSurfCtrl.Value;
3640 resourceParams.pdwCmd = &(cmd.DW8.Value);
3641 resourceParams.dwLocationInCmd = 8;
3642 resourceParams.bIsWritable = true;
3643 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3644
3645 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3646 this->m_osItf,
3647 this->m_currentCmdBuf,
3648 &resourceParams));
3649 }
3650
3651 if (params.pOsResDenoisedCurrOutput)
3652 {
3653 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3654 resourceParams.presResource = params.pOsResDenoisedCurrOutput;
3655 resourceParams.dwOffset = params.DenoisedCurrOutputSurfCtrl.Value;
3656 resourceParams.pdwCmd = &(cmd.DW10.Value);
3657 resourceParams.dwLocationInCmd = 10;
3658 resourceParams.bIsWritable = true;
3659 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3660
3661 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3662 this->m_osItf,
3663 this->m_currentCmdBuf,
3664 &resourceParams));
3665 }
3666
3667 if (params.pOsResCurrOutput)
3668 {
3669 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3670 resourceParams.presResource = params.pOsResCurrOutput;
3671 resourceParams.dwOffset = params.CurrOutputSurfCtrl.Value + params.dwCurrOutputSurfOffset;
3672 resourceParams.pdwCmd = &(cmd.DW12.Value);
3673 resourceParams.dwLocationInCmd = 12;
3674 resourceParams.bIsWritable = true;
3675 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3676
3677 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3678 this->m_osItf,
3679 this->m_currentCmdBuf,
3680 &resourceParams));
3681 }
3682
3683 if (params.pOsResPrevOutput)
3684 {
3685 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3686 resourceParams.presResource = params.pOsResPrevOutput;
3687 resourceParams.dwOffset = params.PrevOutputSurfCtrl.Value;
3688 resourceParams.pdwCmd = &(cmd.DW14.Value);
3689 resourceParams.dwLocationInCmd = 14;
3690 resourceParams.bIsWritable = true;
3691 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3692
3693 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3694 this->m_osItf,
3695 this->m_currentCmdBuf,
3696 &resourceParams));
3697 }
3698
3699 if (params.pOsResStatisticsOutput)
3700 {
3701 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3702 resourceParams.presResource = params.pOsResStatisticsOutput;
3703 resourceParams.dwOffset = params.StatisticsOutputSurfCtrl.Value;
3704 resourceParams.pdwCmd = &(cmd.DW16.Value);
3705 resourceParams.dwLocationInCmd = 16;
3706 resourceParams.bIsWritable = true;
3707 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3708
3709 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3710 this->m_osItf,
3711 this->m_currentCmdBuf,
3712 &resourceParams));
3713 }
3714
3715 if (params.pOsResAlphaOrVignette)
3716 {
3717 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3718 resourceParams.presResource = params.pOsResAlphaOrVignette;
3719 resourceParams.dwOffset = params.AlphaOrVignetteSurfCtrl.Value;
3720 resourceParams.pdwCmd = &(cmd.DW18.Value);
3721 resourceParams.dwLocationInCmd = 18;
3722 resourceParams.bIsWritable = true;
3723 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3724
3725 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3726 this->m_osItf,
3727 this->m_currentCmdBuf,
3728 &resourceParams));
3729 }
3730
3731 if (params.pOsResLaceOrAceOrRgbHistogram)
3732 {
3733 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3734 resourceParams.presResource = params.pOsResLaceOrAceOrRgbHistogram;
3735 resourceParams.dwOffset = params.LaceOrAceOrRgbHistogramSurfCtrl.Value;
3736 resourceParams.pdwCmd = &(cmd.DW20.Value);
3737 resourceParams.dwLocationInCmd = 20;
3738 resourceParams.bIsWritable = true;
3739 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3740
3741 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3742 this->m_osItf,
3743 this->m_currentCmdBuf,
3744 &resourceParams));
3745 }
3746
3747 if (params.pOsResSkinScoreSurface)
3748 {
3749 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3750 resourceParams.presResource = params.pOsResSkinScoreSurface;
3751 resourceParams.dwOffset = params.SkinScoreSurfaceSurfCtrl.Value;
3752 resourceParams.pdwCmd = &(cmd.DW22.Value);
3753 resourceParams.dwLocationInCmd = 22;
3754 resourceParams.bIsWritable = true;
3755 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3756
3757 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3758 this->m_osItf,
3759 this->m_currentCmdBuf,
3760 &resourceParams));
3761 }
3762
3763 if (m_veboxScalabilityEnabled == false)
3764 {
3765 cmd.DW1.EndingX = params.dwEndingX;
3766 cmd.DW1.StartingX = params.dwStartingX;
3767 }
3768 else
3769 {
3770 uint32_t iMediumX;
3771 MHW_ASSERT(params.dwEndingX >= m_numofVebox * 64 - 1);
3772
3773 iMediumX = MOS_ALIGN_FLOOR(((params.dwEndingX + 1) / m_numofVebox), 64);
3774 iMediumX = MOS_CLAMP_MIN_MAX(iMediumX, 64, (params.dwEndingX - 63));
3775
3776 if (m_numofVebox > 1)
3777 {
3778 if (m_indexofVebox == MHW_VEBOX_STARTING_INDEX)
3779 {
3780 cmd.DW1.EndingX = iMediumX - 1;
3781 cmd.DW1.StartingX = params.dwStartingX;
3782 }
3783 else if (m_indexofVebox == m_numofVebox - 1)
3784 {
3785 cmd.DW1.EndingX = params.dwEndingX;
3786 cmd.DW1.StartingX = m_indexofVebox * iMediumX;
3787 }
3788 else if (m_indexofVebox < m_numofVebox - 1)
3789 {
3790 cmd.DW1.EndingX = (m_indexofVebox + 1) * iMediumX - 1;
3791 cmd.DW1.StartingX = m_indexofVebox * iMediumX;
3792 }
3793 else
3794 {
3795 MHW_ASSERTMESSAGE("Unsupported Vebox Scalability Settings");
3796 }
3797 }
3798
3799 if (m_usingSfc)
3800 {
3801 cmd.DW1.SplitWorkloadEnable = true;
3802
3803 if ((params.dwEndingX + 1) != m_numofVebox * iMediumX)
3804 {
3805 if (m_indexofVebox < m_numofVebox - 1)
3806 {
3807 cmd.DW1.EndingX += 64;
3808 }
3809
3810 if (m_indexofVebox > MHW_VEBOX_STARTING_INDEX)
3811 {
3812 cmd.DW1.StartingX += 64;
3813 }
3814 }
3815 }
3816 else
3817 {
3818 cmd.DW1.SplitWorkloadEnable = false;
3819 }
3820
3821 cmd.DW24.OutputEndingX = cmd.DW1.EndingX;
3822 cmd.DW24.OutputStartingX = cmd.DW1.StartingX;
3823
3824 if (m_usingSfc)
3825 {
3826 // Use left overfetch for sfc split
3827 if (cmd.DW1.StartingX >= 64)
3828 {
3829 cmd.DW1.StartingX -= 64;
3830 }
3831 }
3832
3833 MT_LOG3(MT_VP_MHW_VE_SCALABILITY, MT_NORMAL, MT_VP_MHW_VE_SCALABILITY_EN, m_veboxScalabilityEnabled,
3834 MT_VP_MHW_VE_SCALABILITY_USE_SFC, m_usingSfc, MT_VP_MHW_VE_SCALABILITY_IDX, m_indexofVebox);
3835
3836 MHW_NORMALMESSAGE("VEBOX%d STATE: startx %d endx %d", m_indexofVebox, cmd.DW1.StartingX, cmd.DW1.EndingX);
3837 MHW_NORMALMESSAGE("VEBOX%d STATE: output startx %d endx %d", m_indexofVebox, cmd.DW24.OutputStartingX, cmd.DW24.OutputEndingX);
3838 }
3839
3840 cmd.DW26.StartingY = params.dwStartingY;
3841 cmd.DW26.EndingY = params.dwEndingY;
3842
3843 return MOS_STATUS_SUCCESS;
3844
3845 }
3846
3847 protected:
3848 using base_t = vebox::Impl<mhw::vebox::xe2_lpm_base_next::Cmd>;
3849
3850 MEDIA_CLASS_DEFINE_END(mhw__vebox__xe2_lpm_base_next__Impl)
3851 };
3852
3853 } // namespace xe2_lpm_base_next
3854 } // namespace vebox
3855 } // namespace mhw
3856
3857 #endif // __MHW_SFC_XE2_LPM_BASE_NEXT_IMPL_H__
3858