1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _SIEMENS_NC_FPGA_H_ 4 #define _SIEMENS_NC_FPGA_H_ 5 6 #include <stdint.h> 7 8 #define NC_MAGIC_OFFSET 0x020 9 #define NC_FPGA_MAGIC 0x4E433746 10 #define NC_CAP1_OFFSET 0x080 11 #define NC_CAP1_DSAVE_NMI_DELAY 0x008 12 #define NC_CAP1_BL_BRIGHTNESS_CTRL 0x010 13 #define NC_CAP1_FAN_CTRL 0x080 14 #define NC_CAP1_TEMP_MON 0x100 15 #define NC_DSAVE_OFFSET 0x58 16 #define NC_DIAG_CTRL_OFFSET 0x60 17 #define NC_DIAG_FW_DONE 0x10000 18 #define NC_BL_BRIGHTNESS_OFFSET 0x88 19 #define NC_BL_PWM_OFFSET 0x8C 20 #define NC_FPGA_POST_OFFSET 0xE0 21 #define NC_FANMON_CTRL_OFFSET 0x400 22 23 #define MAX_NUM_SENSORS 8 24 25 typedef struct { 26 uint16_t rmin; 27 uint16_t rmax; 28 uint16_t nmin; 29 uint16_t nmax; 30 } temp_cc_t; 31 32 typedef struct { 33 uint16_t res0; 34 uint8_t sensornum; 35 uint8_t res1; 36 uint32_t sensordelay; 37 uint32_t res2[4]; 38 temp_cc_t sensorcfg[8]; 39 uint32_t res3[4]; 40 uint8_t sensorselect; 41 uint8_t res4[3]; 42 uint16_t t_warn; 43 uint16_t t_crit; 44 uint16_t res5; 45 uint8_t res6[2]; 46 uint32_t samplingtime; 47 uint16_t setpoint; 48 uint8_t hystctrl; 49 uint8_t res7; 50 uint16_t kp; 51 uint16_t ki; 52 uint16_t kd; 53 uint16_t fanmin; 54 uint16_t res8; 55 uint16_t fanmax; 56 uint16_t hystval; 57 uint16_t hystthreshold; 58 uint16_t res9[4]; 59 uint32_t fanmon; 60 } __packed fan_ctrl_t; 61 62 void nc_fpga_post(uint8_t value); 63 void nc_fpga_remap(uint32_t new_mmio); 64 65 #endif /* _SIEMENS_NC_FPGA_H_ */ 66