1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <device/mmio.h>
4 #include <device/pci.h>
5 #include <device/pci_ids.h>
6 #include <device/pci_ops.h>
7 #include <types.h>
8
9 #include "nc_fpga.h"
10
11 static DEVTREE_CONST uint32_t fpga_bar = CONFIG_EARLY_PCI_MMIO_BASE;
12 static bool nc_fpga_present = false;
13
pci_early_device_probe(u8 bus,u8 dev,u32 mmio_base)14 int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base)
15 {
16 pci_devfn_t pci_dev = PCI_DEV(bus, dev, 0);
17 uint32_t id = pci_s_read_config32(pci_dev, PCI_VENDOR_ID);
18
19 if (id != (0x4091 << 16 | PCI_VID_SIEMENS))
20 return -1;
21
22 /* Setup base address for BAR0. */
23 pci_s_write_config32(pci_dev, PCI_BASE_ADDRESS_0, mmio_base);
24 /* Enable memory access for pci_dev. */
25 u16 reg16 = pci_s_read_config16(pci_dev, PCI_COMMAND);
26 reg16 |= PCI_COMMAND_MEMORY;
27 pci_s_write_config16(pci_dev, PCI_COMMAND, reg16);
28 nc_fpga_present = true;
29
30 return 0;
31 }
32
nc_fpga_remap(uint32_t new_mmio)33 void nc_fpga_remap(uint32_t new_mmio)
34 {
35 #if ENV_RAMSTAGE
36 fpga_bar = new_mmio;
37 #endif
38 }
39
nc_fpga_post(uint8_t value)40 void nc_fpga_post(uint8_t value)
41 {
42 /* The function pci_early_device_probe is called in bootblock and romstage. Make sure
43 that in these stages the initialization code was successful before the POST code
44 value is written to the register. */
45 if ((ENV_BOOTBLOCK || ENV_SEPARATE_ROMSTAGE) && nc_fpga_present == false)
46 return;
47 write32p(fpga_bar + NC_FPGA_POST_OFFSET, value);
48 }
49