xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/root_complex/non_pci_resources.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <amdblocks/root_complex.h>
4 #include <amdblocks/smn.h>
5 #include <device/device.h>
6 #include <types.h>
7 
8 #define IOHC_MMIO_EN	BIT(0)
9 
read_non_pci_resources(struct device * domain,unsigned long * idx)10 void read_non_pci_resources(struct device *domain, unsigned long *idx)
11 {
12 	const uint32_t iohc_misc_base = get_iohc_misc_smn_base(domain);
13 	const struct non_pci_mmio_reg *regs;
14 	size_t reg_count;
15 
16 	regs = get_iohc_non_pci_mmio_regs(&reg_count);
17 
18 	for (size_t i = 0; i < reg_count; i++) {
19 		const uint64_t reg64 = smn_read64(iohc_misc_base + regs[i].iohc_misc_offset);
20 		/* only report enabled non-PCI MMIO regions */
21 		if (!(reg64 & IOHC_MMIO_EN))
22 			continue;
23 
24 		const unsigned long res_idx = regs[i].res_idx == NON_PCI_RES_IDX_AUTO ?
25 						(*idx)++ : regs[i].res_idx;
26 		const uint64_t base = reg64 & regs[i].mask;
27 		mmio_range(domain, res_idx, base, regs[i].size);
28 	}
29 }
30