1 /*
2  * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * This file contains the CSS specific definitions for the second generation
7  * platforms based on the N2/V2 CPU.
8  */
9 
10 #ifndef NRD_CSS_DEF2_H
11 #define NRD_CSS_DEF2_H
12 
13 /*******************************************************************************
14  * CSS memory map related defines
15  ******************************************************************************/
16 
17 /* Boot ROM */
18 #define NRD_CSS_SECURE_ROM_BASE			UL(0x00000000)
19 
20 /* DRAM2 */
21 #define NRD_CSS_DRAM2_BASE			ULL(0x8080000000)
22 
23 /* NS SRAM */
24 #define NRD_CSS_NS_SRAM_BASE			UL(0x06000000)
25 
26 /* PL011 UART */
27 #define NRD_CSS_SEC_UART_BASE			UL(0x2A410000)
28 #define NRD_CSS_NSEC_UART_BASE			UL(0x2A400000)
29 #define NRD_CSS_UART_SIZE			UL(0x10000)
30 
31 /* General Peripherals */
32 #define NRD_CSS_PERIPH_BASE			UL(0x20000000)
33 #define NRD_CSS_PERIPH_SIZE			UL(0x20000000)
34 
35 /* NS RAM Error record */
36 #define NRD_CSS_NS_RAM_ERR_REC_BASE		UL(0x2A4C0000)
37 
38 /*Secure Watchdog */
39 #define NRD_CSS_SECURE_WDOG_BASE		UL(0x2A480000)
40 
41 /* MHU */
42 #define NRD_CSS_AP_SCP_S_MHU_BASE		UL(0x2A920000)
43 
44 /* GIC */
45 #define NRD_CSS_GIC_BASE			UL(0x30000000)
46 
47 #endif /* NRD_CSS_DEF2_H */
48