1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell Octeon EP (EndPoint) Ethernet Driver 3 * 4 * Copyright (C) 2020 Marvell. 5 * 6 */ 7 8 #ifndef _OCTEP_PFVF_MBOX_H_ 9 #define _OCTEP_PFVF_MBOX_H_ 10 11 #define OCTEON_SDP_16K_HW_FRS 16380UL 12 #define OCTEON_SDP_64K_HW_FRS 65531UL 13 14 /* When a new command is implemented,PF Mbox version should be bumped. 15 */ 16 enum octep_pfvf_mbox_version { 17 OCTEP_PFVF_MBOX_VERSION_V0, 18 OCTEP_PFVF_MBOX_VERSION_V1, 19 OCTEP_PFVF_MBOX_VERSION_V2, 20 }; 21 22 #define OCTEP_PFVF_MBOX_VERSION_CURRENT OCTEP_PFVF_MBOX_VERSION_V2 23 24 /* VF flags */ 25 /* PF has set VF MAC address */ 26 #define OCTEON_PFVF_FLAG_MAC_SET_BY_PF BIT(0) 27 28 enum octep_pfvf_mbox_opcode { 29 OCTEP_PFVF_MBOX_CMD_VERSION, 30 OCTEP_PFVF_MBOX_CMD_SET_MTU, 31 OCTEP_PFVF_MBOX_CMD_SET_MAC_ADDR, 32 OCTEP_PFVF_MBOX_CMD_GET_MAC_ADDR, 33 OCTEP_PFVF_MBOX_CMD_GET_LINK_INFO, 34 OCTEP_PFVF_MBOX_CMD_GET_STATS, 35 OCTEP_PFVF_MBOX_CMD_SET_RX_STATE, 36 OCTEP_PFVF_MBOX_CMD_SET_LINK_STATUS, 37 OCTEP_PFVF_MBOX_CMD_GET_LINK_STATUS, 38 OCTEP_PFVF_MBOX_CMD_GET_MTU, 39 OCTEP_PFVF_MBOX_CMD_DEV_REMOVE, 40 OCTEP_PFVF_MBOX_CMD_GET_FW_INFO, 41 OCTEP_PFVF_MBOX_CMD_SET_OFFLOADS, 42 OCTEP_PFVF_MBOX_NOTIF_LINK_STATUS, 43 OCTEP_PFVF_MBOX_CMD_MAX, 44 }; 45 46 enum octep_pfvf_mbox_word_type { 47 OCTEP_PFVF_MBOX_TYPE_CMD, 48 OCTEP_PFVF_MBOX_TYPE_RSP_ACK, 49 OCTEP_PFVF_MBOX_TYPE_RSP_NACK, 50 }; 51 52 enum octep_pfvf_mbox_cmd_status { 53 OCTEP_PFVF_MBOX_CMD_STATUS_NOT_SETUP = 1, 54 OCTEP_PFVF_MBOX_CMD_STATUS_TIMEDOUT = 2, 55 OCTEP_PFVF_MBOX_CMD_STATUS_NACK = 3, 56 OCTEP_PFVF_MBOX_CMD_STATUS_BUSY = 4 57 }; 58 59 enum octep_pfvf_mbox_state { 60 OCTEP_PFVF_MBOX_STATE_IDLE = 0, 61 OCTEP_PFVF_MBOX_STATE_BUSY = 1, 62 }; 63 64 enum octep_pfvf_link_status { 65 OCTEP_PFVF_LINK_STATUS_DOWN, 66 OCTEP_PFVF_LINK_STATUS_UP, 67 }; 68 69 enum octep_pfvf_link_speed { 70 OCTEP_PFVF_LINK_SPEED_NONE, 71 OCTEP_PFVF_LINK_SPEED_1000, 72 OCTEP_PFVF_LINK_SPEED_10000, 73 OCTEP_PFVF_LINK_SPEED_25000, 74 OCTEP_PFVF_LINK_SPEED_40000, 75 OCTEP_PFVF_LINK_SPEED_50000, 76 OCTEP_PFVF_LINK_SPEED_100000, 77 OCTEP_PFVF_LINK_SPEED_LAST, 78 }; 79 80 enum octep_pfvf_link_duplex { 81 OCTEP_PFVF_LINK_HALF_DUPLEX, 82 OCTEP_PFVF_LINK_FULL_DUPLEX, 83 }; 84 85 enum octep_pfvf_link_autoneg { 86 OCTEP_PFVF_LINK_AUTONEG, 87 OCTEP_PFVF_LINK_FIXED, 88 }; 89 90 #define OCTEP_PFVF_MBOX_TIMEOUT_MS 500 91 #define OCTEP_PFVF_MBOX_MAX_RETRIES 2 92 #define OCTEP_PFVF_MBOX_MAX_DATA_SIZE 6 93 #define OCTEP_PFVF_MBOX_MORE_FRAG_FLAG 1 94 #define OCTEP_PFVF_MBOX_WRITE_WAIT_TIME msecs_to_jiffies(1) 95 96 union octep_pfvf_mbox_word { 97 u64 u64; 98 struct { 99 u64 opcode:8; 100 u64 type:2; 101 u64 rsvd:6; 102 u64 data:48; 103 } s; 104 struct { 105 u64 opcode:8; 106 u64 type:2; 107 u64 frag:1; 108 u64 rsvd:5; 109 u8 data[6]; 110 } s_data; 111 struct { 112 u64 opcode:8; 113 u64 type:2; 114 u64 rsvd:6; 115 u64 version:48; 116 } s_version; 117 struct { 118 u64 opcode:8; 119 u64 type:2; 120 u64 rsvd:6; 121 u8 mac_addr[6]; 122 } s_set_mac; 123 struct { 124 u64 opcode:8; 125 u64 type:2; 126 u64 rsvd:6; 127 u64 mtu:48; 128 } s_set_mtu; 129 struct { 130 u64 opcode:8; 131 u64 type:2; 132 u64 rsvd:6; 133 u64 mtu:48; 134 } s_get_mtu; 135 struct { 136 u64 opcode:8; 137 u64 type:2; 138 u64 state:1; 139 u64 rsvd:53; 140 } s_link_state; 141 struct { 142 u64 opcode:8; 143 u64 type:2; 144 u64 status:1; 145 u64 rsvd:53; 146 } s_link_status; 147 struct { 148 u64 opcode:8; 149 u64 type:2; 150 u64 pkind:8; 151 u64 fsz:8; 152 u64 rx_ol_flags:16; 153 u64 tx_ol_flags:16; 154 u64 rsvd:6; 155 } s_fw_info; 156 struct { 157 u64 opcode:8; 158 u64 type:2; 159 u64 rsvd:22; 160 u64 rx_ol_flags:16; 161 u64 tx_ol_flags:16; 162 } s_offloads; 163 } __packed; 164 165 void octep_pfvf_mbox_work(struct work_struct *work); 166 int octep_setup_pfvf_mbox(struct octep_device *oct); 167 void octep_delete_pfvf_mbox(struct octep_device *oct); 168 void octep_pfvf_notify(struct octep_device *oct, struct octep_ctrl_mbox_msg *msg); 169 #endif 170