1 /*
2 * Copyright (C) 2018-2020 Collabora, Ltd.
3 * Copyright (C) 2019-2020 Icecream95
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include "compiler/nir/nir_builder.h"
26 #include "pan_ir.h"
27
28 /* Midgard can write all of color, depth and stencil in a single writeout
29 * operation, so we merge depth/stencil stores with color stores.
30 * If there are no color stores, we add a write to the "depth RT".
31 *
32 * For Bifrost, we want these combined so we can properly order
33 * +ZS_EMIT with respect to +ATEST and +BLEND, as well as combining
34 * depth/stencil stores into a single +ZS_EMIT op.
35 */
36
37 /*
38 * Get the type to report for a piece of a combined store, given the store it
39 * is combining from. If there is no store to render target #0, a dummy <0.0,
40 * 0.0, 0.0, 0.0> write is used, so report a matching float32 type.
41 */
42 static nir_alu_type
pan_nir_rt_store_type(nir_intrinsic_instr * store)43 pan_nir_rt_store_type(nir_intrinsic_instr *store)
44 {
45 return store ? nir_intrinsic_src_type(store) : nir_type_float32;
46 }
47
48 static void
pan_nir_emit_combined_store(nir_builder * b,nir_intrinsic_instr * rt0_store,unsigned writeout,nir_intrinsic_instr ** stores)49 pan_nir_emit_combined_store(nir_builder *b, nir_intrinsic_instr *rt0_store,
50 unsigned writeout, nir_intrinsic_instr **stores)
51 {
52 nir_intrinsic_instr *intr = nir_intrinsic_instr_create(
53 b->shader, nir_intrinsic_store_combined_output_pan);
54
55 intr->num_components = rt0_store ? rt0_store->src[0].ssa->num_components : 4;
56
57 if (rt0_store)
58 nir_intrinsic_set_io_semantics(intr,
59 nir_intrinsic_io_semantics(rt0_store));
60 nir_intrinsic_set_src_type(intr, pan_nir_rt_store_type(rt0_store));
61 nir_intrinsic_set_dest_type(intr, pan_nir_rt_store_type(stores[2]));
62 nir_intrinsic_set_component(intr, writeout);
63
64 nir_def *zero = nir_imm_int(b, 0);
65 nir_def *zero4 = nir_imm_ivec4(b, 0, 0, 0, 0);
66
67 nir_def *src[] = {
68 rt0_store ? rt0_store->src[0].ssa : zero4,
69 rt0_store ? rt0_store->src[1].ssa : zero,
70 stores[0] ? stores[0]->src[0].ssa : zero,
71 stores[1] ? stores[1]->src[0].ssa : zero,
72 stores[2] ? stores[2]->src[0].ssa : zero4,
73 };
74
75 for (int i = 0; i < ARRAY_SIZE(src); ++i)
76 intr->src[i] = nir_src_for_ssa(src[i]);
77
78 nir_builder_instr_insert(b, &intr->instr);
79 }
80 bool
pan_nir_lower_zs_store(nir_shader * nir)81 pan_nir_lower_zs_store(nir_shader *nir)
82 {
83 bool progress = false;
84
85 if (nir->info.stage != MESA_SHADER_FRAGMENT)
86 return false;
87
88 nir_foreach_function_impl(impl, nir) {
89 nir_intrinsic_instr *stores[3] = {NULL};
90 unsigned writeout = 0;
91
92 nir_foreach_block(block, impl) {
93 nir_foreach_instr_safe(instr, block) {
94 if (instr->type != nir_instr_type_intrinsic)
95 continue;
96
97 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
98 if (intr->intrinsic != nir_intrinsic_store_output)
99 continue;
100
101 nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
102 if (sem.location == FRAG_RESULT_DEPTH) {
103 stores[0] = intr;
104 writeout |= PAN_WRITEOUT_Z;
105 } else if (sem.location == FRAG_RESULT_STENCIL) {
106 stores[1] = intr;
107 writeout |= PAN_WRITEOUT_S;
108 } else if (sem.dual_source_blend_index) {
109 assert(!stores[2]); /* there should be only 1 source for dual blending */
110 stores[2] = intr;
111 writeout |= PAN_WRITEOUT_2;
112 }
113 }
114 }
115
116 if (!writeout)
117 continue;
118
119 nir_block *common_block = NULL;
120
121 /* Ensure all stores are in the same block */
122 for (unsigned i = 0; i < ARRAY_SIZE(stores); ++i) {
123 if (!stores[i])
124 continue;
125
126 nir_block *block = stores[i]->instr.block;
127
128 if (common_block)
129 assert(common_block == block);
130 else
131 common_block = block;
132 }
133
134 bool replaced = false;
135
136 nir_foreach_block(block, impl) {
137 nir_foreach_instr_safe(instr, block) {
138 if (instr->type != nir_instr_type_intrinsic)
139 continue;
140
141 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
142 if (intr->intrinsic != nir_intrinsic_store_output)
143 continue;
144
145 nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
146
147 if (sem.location < FRAG_RESULT_DATA0)
148 continue;
149
150 if (sem.dual_source_blend_index)
151 continue;
152
153 assert(nir_src_is_const(intr->src[1]) && "no indirect outputs");
154
155 nir_builder b =
156 nir_builder_at(nir_after_block_before_jump(instr->block));
157
158 /* Trying to write depth twice results in the
159 * wrong blend shader being executed on
160 * Midgard */
161 unsigned this_store = PAN_WRITEOUT_C | (replaced ? 0 : writeout);
162
163 pan_nir_emit_combined_store(&b, intr, this_store, stores);
164
165 nir_instr_remove(instr);
166
167 replaced = true;
168 }
169 }
170
171 /* Insert a store to the depth RT (0xff) if needed */
172 if (!replaced) {
173 nir_builder b =
174 nir_builder_at(nir_after_block_before_jump(common_block));
175
176 pan_nir_emit_combined_store(&b, NULL, writeout, stores);
177 }
178
179 for (unsigned i = 0; i < ARRAY_SIZE(stores); ++i) {
180 if (stores[i])
181 nir_instr_remove(&stores[i]->instr);
182 }
183
184 nir_metadata_preserve(impl,
185 nir_metadata_control_flow);
186 progress = true;
187 }
188
189 return progress;
190 }
191