xref: /aosp_15_r20/external/coreboot/Documentation/mainboard/pcengines/apu1.md (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c) 
1# PC Engines APU1
2
3This page describes how to run coreboot on PC Engines APU1 platform.
4
5## Technology
6
7```{eval-rst}
8+------------+--------------------------------------------------------+
9| CPU        | AMD G series T40E APU                                  |
10+------------+--------------------------------------------------------+
11| CPU core   | 1 GHz dual core (Bobcat core) with 64 bit support      |
12|            | 32K data + 32K instruction + 512KB L2 cache per core   |
13+------------+--------------------------------------------------------+
14| DRAM       | 2 or 4 GB DDR3-1066 DRAM                               |
15+------------+--------------------------------------------------------+
16| Boot       | From SD card, USB, mSATA, SATA                         |
17+------------+--------------------------------------------------------+
18| Power      | 6 to 12W of 12V power                                  |
19+------------+--------------------------------------------------------+
20| Firmware   | coreboot with support for iPXE and USB boot            |
21+------------+--------------------------------------------------------+
22```
23
24## Flashing coreboot
25
26```{eval-rst}
27+---------------------+--------------------------+
28| Type                | Value                    |
29+=====================+==========================+
30| Socketed flash      | no                       |
31+---------------------+--------------------------+
32| Model               | MX25L1606E               |
33+---------------------+--------------------------+
34| Size                | 2 MiB                    |
35+---------------------+--------------------------+
36| Package             | SOP-8                    |
37+---------------------+--------------------------+
38| Write protection    | jumper on WP# pin        |
39+---------------------+--------------------------+
40| Dual BIOS feature   | no                       |
41+---------------------+--------------------------+
42| Internal flashing   | yes                      |
43+---------------------+--------------------------+
44```
45
46### Internal programming
47
48The SPI flash can be accessed using [flashrom]. It is important to execute
49command with a `-c <chipname>` argument:
50
51    flashrom -p internal -c "MX25L1606E" -w coreboot.rom
52
53### External programming
54
55**IMPORTANT**: When programming SPI flash, first you need to enter apu1 in S5
56(Soft-off) power state. S5 state can be forced by shorting power button pin on
57J2 header.
58
59The external access to flash chip is available through standard SOP-8 clip or
60SOP-8 header next to the flash chip on the board. Notice that not all boards
61have a header soldered down originally. Hence, there could be an empty slot with
628 eyelets, so you can solder down a header on your own. The SPI flash chip and
63SPI header are marked in the picture below. Also there is SPI header pin layout
64included. Notice, that signatures at the schematic can be ambiguous:
65- J12 SPIDI = U35 SO = MISO
66- J12 SPIDO = U35 SI = MOSI
67
68There is no restrictions as to the programmer device. It is only recommended to
69flash firmware without supplying power. External programming can be performed,
70for example using OrangePi and Armbian. You can exploit linux_spi driver which
71provide communication with SPI devices. Example command to program SPI flash
72with OrangePi using linux_spi:
73
74    flashrom -w coreboot.rom -p linux_spi:dev=/dev/spidev1.0,spispeed=16000 -c
75    "MX25L1606E"
76
77
78**apu1 platform with marked in SPI header and SPI flash chip**
79
80![][apu1c1_flash]
81
82**SPI header pin layout**
83
84![][spi_header]
85
86
87### Schematics
88
89PC Engines APU platform schematics are available for free on PC Engines official
90site. Depending on the configuration:
91[apu1c](https://www.pcengines.ch/schema/apu1c.pdf) and
92[apu1d](https://www.pcengines.ch/schema/apu1d.pdf).
93
94
95[apu1c1_flash]: apu1c1.jpg
96[spi_header]: apu1_spi.jpg
97[flashrom]: https://flashrom.org/Flashrom
98