1name: sched_switch_with_ctrs
2ID: 1241
3format:
4	field:unsigned short common_type;	offset:0;	size:2;	signed:0;
5	field:unsigned char common_flags;	offset:2;	size:1;	signed:0;
6	field:unsigned char common_preempt_count;	offset:3;	size:1;	signed:0;
7	field:int common_pid;	offset:4;	size:4;	signed:1;
8
9	field:pid_t prev_pid;	offset:8;	size:4;	signed:1;
10	field:pid_t next_pid;	offset:12;	size:4;	signed:1;
11	field:char prev_comm[16];	offset:16;	size:16;	signed:0;
12	field:char next_comm[16];	offset:32;	size:16;	signed:0;
13	field:long prev_state;	offset:48;	size:8;	signed:1;
14	field:unsigned long cctr;	offset:56;	size:8;	signed:0;
15	field:unsigned long ctr0;	offset:64;	size:8;	signed:0;
16	field:unsigned long ctr1;	offset:72;	size:8;	signed:0;
17	field:unsigned long ctr2;	offset:80;	size:8;	signed:0;
18	field:unsigned long ctr3;	offset:88;	size:8;	signed:0;
19	field:unsigned long ctr4;	offset:96;	size:8;	signed:0;
20	field:unsigned long ctr5;	offset:104;	size:8;	signed:0;
21	field:unsigned long amu0;	offset:112;	size:8;	signed:0;
22	field:unsigned long amu1;	offset:120;	size:8;	signed:0;
23	field:unsigned long amu2;	offset:128;	size:8;	signed:0;
24
25print fmt: "prev_comm=%s prev_pid=%d prev_state=%s%s ==> next_comm=%s next_pid=%d CCNTR=%lu CTR0=%lu CTR1=%lu CTR2=%lu CTR3=%lu CTR4=%lu CTR5=%lu, CYC: %lu, INST: %lu, STALL: %lu", REC->prev_comm, REC->prev_pid, (REC->prev_state & ((((0x00000000 | 0x00000001 | 0x00000002 | 0x00000004 | 0x00000008 | 0x00000010 | 0x00000020 | 0x00000040) + 1) << 1) - 1)) ? __print_flags(REC->prev_state & ((((0x00000000 | 0x00000001 | 0x00000002 | 0x00000004 | 0x00000008 | 0x00000010 | 0x00000020 | 0x00000040) + 1) << 1) - 1), "|", { 0x00000001, "S" }, { 0x00000002, "D" }, { 0x00000004, "T" }, { 0x00000008, "t" }, { 0x00000010, "X" }, { 0x00000020, "Z" }, { 0x00000040, "P" }, { 0x00000080, "I" }) : "R", REC->prev_state & (((0x00000000 | 0x00000001 | 0x00000002 | 0x00000004 | 0x00000008 | 0x00000010 | 0x00000020 | 0x00000040) + 1) << 1) ? "+" : "", REC->next_comm, REC->next_pid, REC->cctr, REC->ctr0, REC->ctr1, REC->ctr2, REC->ctr3, REC->ctr4, REC->ctr5, REC->amu0, REC->amu1, REC->amu2
26