1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  */
6 
7 #ifndef __PIXELGEN_PRIVATE_H_INCLUDED__
8 #define __PIXELGEN_PRIVATE_H_INCLUDED__
9 #include "pixelgen_public.h"
10 #include "PixelGen_SysBlock_defs.h"
11 #include "device_access.h"	/* ia_css_device_load_uint32 */
12 #include "assert_support.h" /* assert */
13 
14 /*****************************************************
15  *
16  * Device level interface (DLI).
17  *
18  *****************************************************/
19 /**
20  * @brief Load the register value.
21  * Refer to "pixelgen_public.h" for details.
22  */
pixelgen_ctrl_reg_load(const pixelgen_ID_t ID,const hrt_address reg)23 STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load(
24     const pixelgen_ID_t ID,
25     const hrt_address reg)
26 {
27 	assert(ID < N_PIXELGEN_ID);
28 	assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1);
29 	return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(
30 					     hrt_data));
31 }
32 
33 /**
34  * @brief Store a value to the register.
35  * Refer to "pixelgen_ctrl_public.h" for details.
36  */
pixelgen_ctrl_reg_store(const pixelgen_ID_t ID,const hrt_address reg,const hrt_data value)37 STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_reg_store(
38     const pixelgen_ID_t ID,
39     const hrt_address reg,
40     const hrt_data value)
41 {
42 	assert(ID < N_PIXELGEN_ID);
43 	assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1);
44 
45 	ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data),
46 				   value);
47 }
48 
49 /* end of DLI */
50 
51 /*****************************************************
52  *
53  * Native command interface (NCI).
54  *
55  *****************************************************/
56 /**
57  * @brief Get the pixelgen state.
58  * Refer to "pixelgen_public.h" for details.
59  */
pixelgen_ctrl_get_state(const pixelgen_ID_t ID,pixelgen_ctrl_state_t * state)60 STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state(
61     const pixelgen_ID_t ID,
62     pixelgen_ctrl_state_t *state)
63 {
64 	state->com_enable =
65 	    pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX);
66 	state->prbs_rstval0 =
67 	    pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX);
68 	state->prbs_rstval1 =
69 	    pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX);
70 	state->syng_sid =
71 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX);
72 	state->syng_free_run =
73 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX);
74 	state->syng_pause =
75 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX);
76 	state->syng_nof_frames =
77 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX);
78 	state->syng_nof_pixels =
79 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX);
80 	state->syng_nof_line =
81 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX);
82 	state->syng_hblank_cyc =
83 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX);
84 	state->syng_vblank_cyc =
85 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX);
86 	state->syng_stat_hcnt =
87 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX);
88 	state->syng_stat_vcnt =
89 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX);
90 	state->syng_stat_fcnt =
91 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX);
92 	state->syng_stat_done =
93 	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX);
94 	state->tpg_mode =
95 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX);
96 	state->tpg_hcnt_mask =
97 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_MASK_REG_IDX);
98 	state->tpg_vcnt_mask =
99 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_MASK_REG_IDX);
100 	state->tpg_xycnt_mask =
101 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_XYCNT_MASK_REG_IDX);
102 	state->tpg_hcnt_delta =
103 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_DELTA_REG_IDX);
104 	state->tpg_vcnt_delta =
105 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_DELTA_REG_IDX);
106 	state->tpg_r1 =
107 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_R1_REG_IDX);
108 	state->tpg_g1 =
109 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_G1_REG_IDX);
110 	state->tpg_b1 =
111 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_B1_REG_IDX);
112 	state->tpg_r2 =
113 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_R2_REG_IDX);
114 	state->tpg_g2 =
115 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_G2_REG_IDX);
116 	state->tpg_b2 =
117 	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX);
118 }
119 
120 /**
121  * @brief Dump the pixelgen state.
122  * Refer to "pixelgen_public.h" for details.
123  */
pixelgen_ctrl_dump_state(const pixelgen_ID_t ID,pixelgen_ctrl_state_t * state)124 STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state(
125     const pixelgen_ID_t ID,
126     pixelgen_ctrl_state_t *state)
127 {
128 	ia_css_print("Pixel Generator ID %d Enable  0x%x\n", ID, state->com_enable);
129 	ia_css_print("Pixel Generator ID %d PRBS reset value 0 0x%x\n", ID,
130 		     state->prbs_rstval0);
131 	ia_css_print("Pixel Generator ID %d PRBS reset value 1 0x%x\n", ID,
132 		     state->prbs_rstval1);
133 	ia_css_print("Pixel Generator ID %d SYNC SID 0x%x\n", ID, state->syng_sid);
134 	ia_css_print("Pixel Generator ID %d syng free run 0x%x\n", ID,
135 		     state->syng_free_run);
136 	ia_css_print("Pixel Generator ID %d syng pause 0x%x\n", ID, state->syng_pause);
137 	ia_css_print("Pixel Generator ID %d syng no of frames 0x%x\n", ID,
138 		     state->syng_nof_frames);
139 	ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x\n", ID,
140 		     state->syng_nof_pixels);
141 	ia_css_print("Pixel Generator ID %d syng no of line 0x%x\n", ID,
142 		     state->syng_nof_line);
143 	ia_css_print("Pixel Generator ID %d syng hblank cyc  0x%x\n", ID,
144 		     state->syng_hblank_cyc);
145 	ia_css_print("Pixel Generator ID %d syng vblank cyc  0x%x\n", ID,
146 		     state->syng_vblank_cyc);
147 	ia_css_print("Pixel Generator ID %d syng stat hcnt  0x%x\n", ID,
148 		     state->syng_stat_hcnt);
149 	ia_css_print("Pixel Generator ID %d syng stat vcnt  0x%x\n", ID,
150 		     state->syng_stat_vcnt);
151 	ia_css_print("Pixel Generator ID %d syng stat fcnt  0x%x\n", ID,
152 		     state->syng_stat_fcnt);
153 	ia_css_print("Pixel Generator ID %d syng stat done  0x%x\n", ID,
154 		     state->syng_stat_done);
155 	ia_css_print("Pixel Generator ID %d tpg mode  0x%x\n", ID, state->tpg_mode);
156 	ia_css_print("Pixel Generator ID %d tpg hcnt mask  0x%x\n", ID,
157 		     state->tpg_hcnt_mask);
158 	ia_css_print("Pixel Generator ID %d tpg hcnt mask  0x%x\n", ID,
159 		     state->tpg_hcnt_mask);
160 	ia_css_print("Pixel Generator ID %d tpg xycnt mask  0x%x\n", ID,
161 		     state->tpg_xycnt_mask);
162 	ia_css_print("Pixel Generator ID %d tpg hcnt delta  0x%x\n", ID,
163 		     state->tpg_hcnt_delta);
164 	ia_css_print("Pixel Generator ID %d tpg vcnt delta  0x%x\n", ID,
165 		     state->tpg_vcnt_delta);
166 	ia_css_print("Pixel Generator ID %d tpg r1 0x%x\n", ID, state->tpg_r1);
167 	ia_css_print("Pixel Generator ID %d tpg g1 0x%x\n", ID, state->tpg_g1);
168 	ia_css_print("Pixel Generator ID %d tpg b1 0x%x\n", ID, state->tpg_b1);
169 	ia_css_print("Pixel Generator ID %d tpg r2 0x%x\n", ID, state->tpg_r2);
170 	ia_css_print("Pixel Generator ID %d tpg g2 0x%x\n", ID, state->tpg_g2);
171 	ia_css_print("Pixel Generator ID %d tpg b2 0x%x\n", ID, state->tpg_b2);
172 }
173 
174 /* end of NCI */
175 #endif /* __PIXELGEN_PRIVATE_H_INCLUDED__ */
176