1 // Copyright 2021 The Pigweed Authors 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); you may not 4 // use this file except in compliance with the License. You may obtain a copy of 5 // the License at 6 // 7 // https://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 11 // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the 12 // License for the specific language governing permissions and limitations under 13 // the License. 14 #pragma once 15 16 // TODO: b/234887943 - arch.h should be refactored out of pw_preprocessor as the 17 // scope is outside of the module. The intended scope of arch.h is only to 18 // provide architecture targeting and not any added utilities and capabilities. 19 // Perhaps it should be placed under pw_compiler along with b/234877280, e.g. 20 // pw_compiler/arch.h? 21 // Regardless, the arch defines should likely move to a trait system in Pigweed 22 // before making them public defines for others to use. 23 24 // WARNING: These are all internal to Pigweed, do not use these in downstream 25 // projects as they expected to move and be renamed in the near future. 26 27 // _PW_ARCH_ARM_V6M should be set to 1 for Cortex M0, M0+, M1. 28 // 29 // Defaults to 0 unless __ARM_ARCH_6M__ is defined as provided by GCC, Clang, 30 // CMSIS's headers, etc. 31 #if !defined(_PW_ARCH_ARM_V6M) && defined(__ARM_ARCH_6M__) 32 #define _PW_ARCH_ARM_V6M 1 33 #else 34 #define _PW_ARCH_ARM_V6M 0 35 #endif // _PW_ARCH_ARM_V6M 36 37 // _PW_ARCH_ARM_V7M should be set to 1 for Cortex M3. 38 // 39 // Defaults to 0 unless __ARM_ARCH_7M__ is defined as provided by GCC, Clang, 40 // CMSIS's headers, etc. 41 #if !defined(_PW_ARCH_ARM_V7M) && defined(__ARM_ARCH_7M__) 42 #define _PW_ARCH_ARM_V7M 1 43 #else 44 #define _PW_ARCH_ARM_V7M 0 45 #endif // _PW_ARCH_ARM_V7M 46 47 // _PW_ARCH_ARM_V7EM should be set to 1 for Cortex M4, M7. 48 // 49 // Defaults to 0 unless __ARM_ARCH_7EM__ is defined as provided by GCC, Clang, 50 // CMSIS's headers, etc. 51 #if !defined(_PW_ARCH_ARM_V7EM) && defined(__ARM_ARCH_7EM__) 52 #define _PW_ARCH_ARM_V7EM 1 53 #else 54 #define _PW_ARCH_ARM_V7EM 0 55 #endif // _PW_ARCH_ARM_V7EM 56 57 // _PW_ARCH_ARM_V8M_BASELINE should be set to 1 for Cortex M23. 58 // 59 // Defaults to 0 unless __ARM_ARCH_8M_BASE__ is defined as provided by GCC, 60 // Clang, CMSIS's headers, etc. 61 #if !defined(_PW_ARCH_ARM_V8M_BASELINE) && defined(__ARM_ARCH_8M_BASE__) 62 #define _PW_ARCH_ARM_V8M_BASELINE 1 63 #else 64 #define _PW_ARCH_ARM_V8M_BASELINE 0 65 #endif // _PW_ARCH_ARM_V8M_BASELINE 66 67 // _PW_ARCH_ARM_V8M_MAINLINE should be set to 1 for Cortex M33, M33P. 68 // 69 // Defaults to 0 unless __ARM_ARCH_8M_MAIN__ is defined as provided by GCC, 70 // Clang, CMSIS's headers, etc. 71 #if !defined(_PW_ARCH_ARM_V8M_MAINLINE) && defined(__ARM_ARCH_8M_MAIN__) 72 #define _PW_ARCH_ARM_V8M_MAINLINE 1 73 #else 74 #define _PW_ARCH_ARM_V8M_MAINLINE 0 75 #endif // _PW_ARCH_ARM_V8M_MAINLINE 76 77 // _PW_ARCH_ARM_V8_1M_MAINLINE should be set to 1 for Cortex M55. 78 // 79 // Defaults to 0 unless __ARM_ARCH_8_1M_MAIN__ is defined as provided by GCC, 80 // Clang, CMSIS's headers, etc. 81 #if !defined(_PW_ARCH_ARM_V8_1M_MAINLINE) && defined(__ARM_ARCH_8_1M_MAIN__) 82 #define _PW_ARCH_ARM_V8_1M_MAINLINE 1 83 #else 84 #define _PW_ARCH_ARM_V8_1M_MAINLINE 0 85 #endif // _PW_ARCH_ARM_V8_1M_MAINLINE 86 87 #define _PW_ARCH_ARM_CORTEX_M_ACTIVE_COUNT \ 88 (_PW_ARCH_ARM_V6M + _PW_ARCH_ARM_V7M + _PW_ARCH_ARM_V7EM + \ 89 _PW_ARCH_ARM_V8M_BASELINE + _PW_ARCH_ARM_V8M_MAINLINE + \ 90 _PW_ARCH_ARM_V8_1M_MAINLINE) 91 #if _PW_ARCH_ARM_CORTEX_M_ACTIVE_COUNT > 1 92 #error "More than one ARM Cortex M architecture is active." 93 #elif _PW_ARCH_ARM_CORTEX_M_ACTIVE_COUNT == 1 94 #define _PW_ARCH_ARM_CORTEX_M 1 95 #endif 96