1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#include <arch/encoding.h> 4#include <bits.h> 5#include <mcall.h> 6 7.section ".text._start", "ax", %progbits 8.globl _start 9_start: 10 # The romstage may pass the following arguments: 11 # a0: the value of mhartid 12 # a1: a pointer to the flattened devicetree 13 # a2: cbmem_top 14 15 la t0, _cbmem_top_ptr 16#if __riscv_xlen == 32 17 sw a2, (t0) 18#elif __riscv_xlen == 64 19 sd a2, (t0) 20#endif 21 # initialize stack point for each hart 22 # and the stack must be page-aligned. 23 # 0xDEADBEEF used to check stack overflow 24 csrr a0, mhartid 25 la t0, _stack 26 slli t1, a0, RISCV_PGSHIFT 27 add t0, t0, t1 28 li t1, 0xDEADBEEF 29 STORE t1, 0(t0) 30 li t1, RISCV_PGSIZE - HLS_SIZE 31 add sp, t0, t1 32 33 # initialize hart-local storage 34 csrr a0, mhartid 35 #NOTE a1 contains FDT and should not be cluttered above 36 call hls_init 37 38 li a0, CONFIG_RISCV_WORKING_HARTID 39 call smp_pause 40 41 # initialize entry of interrupt/exception 42 la t0, trap_entry 43 csrw mtvec, t0 44 45 # clear any pending interrupts 46 csrwi mip, 0 47 48 call exit_car 49 # set up the mstatus register 50 call mstatus_init 51 tail main 52 53 # These codes need to be implemented on a specific SoC 54 .weak exit_car 55exit_car: 56 ret 57