1 /*============================================================================== 2 Copyright(c) 2017 Intel Corporation 3 4 Permission is hereby granted, free of charge, to any person obtaining a 5 copy of this software and associated documentation files(the "Software"), 6 to deal in the Software without restriction, including without limitation 7 the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 and / or sell copies of the Software, and to permit persons to whom the 9 Software is furnished to do so, subject to the following conditions: 10 11 The above copyright notice and this permission notice shall be included 12 in all copies or substantial portions of the Software. 13 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 OTHER DEALINGS IN THE SOFTWARE. 21 ============================================================================ 22 ** 23 ** File Name: sharedata.h 24 ** 25 ** Description: These are data structures that are shared between the KMD 26 ** and the UMD 27 ** 28 ==============================================================================*/ 29 30 #ifndef _SHAREDATA_H_ 31 #define _SHAREDATA_H_ 32 33 #include "../common/gtsysinfo.h" 34 #include "../common/sku_wa.h" 35 #include "../common/igfxfmid.h" 36 #include "UmKmEnum.h" 37 #include "UmKmDmaPerfTimer.h" 38 #define ADAPTER_STRING_SIZE 250 39 #ifdef __cplusplus 40 extern "C" { 41 #endif 42 43 #define UMD_KMD_MAX_REGISTRY_PATH_LENGTH (512) 44 45 //=========================================================================== 46 // typedef: 47 // DRIVER_VERION_INFO 48 // 49 // Description: 50 // This structure is used to communicate Driver Build version between 51 // KMD and UMD 52 // 53 //--------------------------------------------------------------------------- 54 typedef struct __DRIVER_VERSION_INFO 55 { 56 unsigned :16; 57 unsigned DriverBuildNumber :16; 58 }DRIVER_VERSION_INFO; 59 60 61 // BIT field, '1' (i.e. Set) means cap is supported by KMD 62 typedef struct __KMD_CAPS_INFO 63 { 64 unsigned Gamma_Rgb256x3x16 :1; 65 unsigned GDIAcceleration :1; 66 unsigned OsManagedHwContext :1; // wddm1.2+ 67 unsigned GraphicsPreemptionGranularity :3; // wddm1.2+ 68 unsigned ComputePreemptionGranularity :3; // wddm1.2+ 69 unsigned InstrumentationIsEnabled :1; // KMD instrumentation state 70 unsigned DriverStoreEnabled :1; // wddm2.1+ 71 unsigned :21; 72 } KMD_CAPS_INFO; 73 74 // Programmatically override overlay caps for testing 75 typedef struct __KMD_OVERLAY_OVERRIDE 76 { 77 uint32_t OverrideOverlayCaps : 1; // Override request 78 uint32_t RGBOverlay : 1; // RGB overlay override 79 uint32_t YUY2Overlay : 1; // YUY2 overlay override 80 uint32_t Reserved :29; 81 } KMD_OVERLAY_OVERRIDE; 82 83 // Overlay caps info needed by WDDM 1.1 Changes 84 typedef struct __KMD_OVERLAY_CAPS_INFO 85 { 86 union 87 { 88 struct 89 { 90 uint32_t FullRangeRGB : 1; // 0x00000001 91 uint32_t LimitedRangeRGB : 1; // 0x00000002 92 uint32_t YCbCr_BT601 : 1; // 0x00000004 93 uint32_t YCbCr_BT709 : 1; // 0x00000008 94 uint32_t YCbCr_BT601_xvYCC : 1; // 0x00000010 95 uint32_t YCbCr_BT709_xvYCC : 1; // 0x00000020 96 uint32_t StretchX : 1; // 0x00000040 97 uint32_t StretchY : 1; // 0x00000080 98 uint32_t Reserved :24; // 0xFFFFFF00 99 } Caps; 100 uint32_t CapsValue; 101 }; 102 103 KMD_OVERLAY_OVERRIDE OVOverride; 104 105 uint32_t MaxOverlayDisplayWidth; 106 uint32_t MaxOverlayDisplayHeight; 107 uint8_t HWScalerExists; 108 uint32_t MaxHWScalerStride; 109 } KMD_OVERLAY_CAPS_INFO; 110 111 // Frame Rate 112 typedef struct 113 { 114 uint32_t uiNumerator; 115 uint32_t uiDenominator; 116 } FRAME_RATE; 117 118 typedef struct __KM_SYSTEM_INFO 119 { 120 121 GT_SYSTEM_INFO SystemInfo; 122 // ShadowReg 119 caluclated value required for WA <WaProgramMgsrForCorrectSliceSpecificMmioReads> 123 uint32_t ShadowRegValue; 124 uint32_t ShadowRegValueforL3SpecificRegReads; // Shadow reg value for L3 bank specific MMIO reads. 125 126 uint32_t GfxDevId; // DeviceID 127 }KM_SYSTEM_INFO; 128 129 130 131 typedef struct _KM_DEFERRED_WAIT_INFO 132 { 133 uint32_t FeatureSupported; 134 uint32_t ActiveDisplay; 135 } KM_DEFERRED_WAIT_INFO; 136 137 // struct to hold Adapter's BDF 138 typedef struct _ADAPTER_BDF_ 139 { 140 union 141 { 142 struct 143 { 144 uint32_t Bus : 8; 145 uint32_t Device : 8; 146 uint32_t Function : 8; 147 uint32_t Reserved : 8; 148 }; 149 uint32_t Data; 150 }; 151 }ADAPTER_BDF; 152 153 // Private data structure for D3D callback QueryAdapterInfoCB 154 155 //=========================================================================== 156 // typedef: 157 // _ADAPTER_INFO 158 // 159 // Description: 160 // This structure is private data structure that get passed by UMD to 161 // KMD during QueryAdapterInfoCB 162 // 163 // Note: Structure will be filled by KMD. 164 //--------------------------------------------------------------------------- 165 #pragma pack (push,1) 166 typedef struct _ADAPTER_INFO 167 { 168 uint32_t KmdVersionInfo; // Version ID 169 DRIVER_VERSION_INFO DriverVersionInfo; // 170 PLATFORM GfxPlatform; // Chipset Gfx family, product, render core, display core, etc 171 SKU_FEATURE_TABLE SkuTable; // SKU feature table 172 WA_TABLE WaTable; // WA table 173 uint32_t GfxTimeStampFreq; // In Hz (No. of clock ticks per second). So timestamp base = 1 / GfxTimeStampFreq 174 uint32_t GfxCoreFrequency; // In MHz. 175 uint32_t FSBFrequency; // In MHz. 176 uint32_t MinRenderFreq; // In MHz. 177 uint32_t MaxRenderFreq; // In MHz. 178 uint32_t PackageTdp; // TDP Power for the platform (In Watt) 179 uint32_t MaxFillRate; // Fillrate with Alphablend (In Pix/Clk) 180 uint32_t NumberOfEUs; // Number of EUs in GT 181 182 // NOTE: Name is kept same so that we don't have to change PC_TARGET macro and usage 183 // of that. 184 uint32_t dwReleaseTarget; // PC Release Target Information supplied by INF 185 186 // Following member can be use by UMD for optimal use of DMA and 187 // command buffer 188 uint32_t SizeOfDmaBuffer; // Size of DMA buffer set (In Bytes) 189 uint32_t PatchLocationListSize; // Size of Patch Location List (In number of entries) 190 uint32_t AllocationListSize; // Size of Patch Location List (In number of entries) 191 uint32_t SmallPatchLocationListSize; // Size of Patch Location List for UMD context that needs a small Patch Location List, 192 // currently only used by media context (In number of entries) 193 uint32_t DefaultCmdBufferSize; // Size of Cmd buffer default location 194 195 // Following Members can be use for any UMD optimization (like Size of vertex buffer to allocate) 196 // any cacheline related read/write, etc 197 int64_t GfxMemorySize; // Total GFX memory (In MBytes) 198 uint32_t SystemMemorySize; // Total System Memory (In MBytes) 199 uint32_t CacheLineSize; // Processor CacheLine size 200 PROCESSOR_FAMILY ProcessorFamily; // Processor Family 201 uint8_t IsHTSupported; // Is Hyper Threaded CPU 202 uint8_t IsMutiCoreCpu; // Is Multi Core CPU 203 uint8_t IsVTDSupported; // Is Chipset VT is supported 204 char DeviceRegistryPath[UMD_KMD_MAX_REGISTRY_PATH_LENGTH]; // Array that contains the device registry path 205 uint32_t RegistryPathLength; // Actual chars (not including any trailing NULL) in the array set by the KMD 206 int64_t DedicatedVideoMemory; // Dedicated Video Memory 207 int64_t SystemSharedMemory; // System Shared Memory 208 int64_t SystemVideoMemory; // SystemVideoMemory 209 FRAME_RATE OutputFrameRate; // Output Frame Rate 210 FRAME_RATE InputFrameRate; // Input Frame Rate 211 KMD_CAPS_INFO Caps; // List of capabilities supported by the KMD 212 KMD_OVERLAY_CAPS_INFO OverlayCaps; // List of overlay capabilities supported 213 GT_SYSTEM_INFO SystemInfo; // List of system details 214 KM_DEFERRED_WAIT_INFO DeferredWaitInfo; // Indicates if DeferredWait feature is enabled and value of active display 215 216 #ifdef _WIN32 217 ADAPTER_BDF stAdapterBDF; // Adapter BDF 218 #endif 219 220 } ADAPTER_INFO, *PADAPTER_INFO; 221 #pragma pack (pop) 222 223 #define MAX_ENGINE_INSTANCE_PER_CLASS 4 224 225 // GEN11 Media Scalability 2.0: context based scheduling 226 typedef struct MEDIA_CONTEXT_REQUIREMENT_REC 227 { 228 union 229 { 230 struct 231 { 232 uint32_t UsingSFC : 1; // Use SFC or not 233 uint32_t HWRestrictedEngine : 1; 234 #if (_DEBUG || _RELEASE_INTERNAL || __KMDULT) 235 uint32_t Reserved : 29; 236 uint32_t DebugOverride : 1; // Debug & validation usage 237 #else 238 uint32_t Reserved : 30; 239 #endif 240 }; 241 242 uint32_t Flags; 243 }; 244 245 uint32_t LRCACount; 246 247 // Logical engine instances used by this context; valid only if flag DebugOverride is set. 248 uint8_t EngineInstance[MAX_ENGINE_INSTANCE_PER_CLASS]; 249 250 } MEDIA_CONTEXT_REQUIREMENT, *PMEDIA_CONTEXT_REQUIREMENT; 251 252 // Bit-Struct for Driver's Use of D3DDDI_PATCHLOCATIONLIST.DriverId 253 typedef union __D3DDDI_PATCHLOCATIONLIST_DRIVERID 254 { 255 struct 256 { 257 uint32_t UseGlobalGtt : 1; // Indicates patch is to use global GTT space address (instead of PPGTT space). 258 uint32_t HasDecryptBits : 1; 259 uint32_t RenderTargetEnable : 1; // Indicates this is an output surface that may need to be encrypted 260 int32_t DecryptBitDwordOffset : 8; // signed offset (in # of DWORDS) from the patch location to where the cmd's decrypt bit is 261 uint32_t DecryptBitNumber : 5; // which bit to set in the dword specified by DecryptBitDwordOffset (0 - 31) 262 uint32_t GpGpuCsrBaseAddress : 1; // this patch location is for the GPGPU Preempt buffer 263 uint32_t SurfaceStateBaseAddress : 1; // Indicates this is patch for SBA.SurfaceStateBaseAddress 264 uint32_t PreemptPatchType : 3; // Contains list of addresses that may need patching due to Preemption/Resubmit. 265 uint32_t PatchLowDword : 1; // 32-bit patch despite 64-bit platform--Low DWORD. 266 uint32_t PatchHighDword : 1; // 32-bit patch despite 64-bit platform--High DWORD. 267 uint32_t StateSip : 1; // STATE_SIP address that needs to be patched in the context image (for thread-level preemption) 268 uint32_t GpGpuWSDIBegin : 1; // The start of the SDI command seq before GPGPU_WALKER (for restarting thread-level workload) 269 uint32_t GpGpuWSDIEnd : 1; // The end of the SDI command seq before GPGPU_WALKER (for restarting thread-level workload) 270 uint32_t NullPatch : 1; // Don't perform KMD patching (used for SVM, Tiled/Sparse Resources and ExistingSysMem Virtual Padding). 271 uint32_t UpperBoundsPatch : 1; // Indicates the patch is for an UpperBounds/"out-of-bounds" address 272 uint32_t BindingTablePoolPatch : 1; // Indicates the patch is for Binding Table Pool. Needed for bindless head testing. Remove later. 273 }; 274 uint32_t Value; 275 } D3DDDI_PATCHLOCATIONLIST_DRIVERID; 276 277 #ifdef __cplusplus 278 } 279 #endif 280 #endif // _SHAREDATA_H_ 281