1 /*
2 * Copyright 2010 Jerome Glisse <[email protected]>
3 * Copyright 2015 Advanced Micro Devices, Inc.
4 *
5 * SPDX-License-Identifier: MIT
6 */
7
8 #include "si_pipe.h"
9 #include "util/format/u_format.h"
10 #include "util/u_log.h"
11 #include "util/u_surface.h"
12 #include "util/hash_table.h"
13 #include "ac_nir_meta.h"
14
15 enum
16 {
17 SI_COPY =
18 SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES | SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
19
20 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES | SI_SAVE_FRAGMENT_STATE,
21
22 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
23
24 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE
25 };
26
si_blitter_begin(struct si_context * sctx,enum si_blitter_op op)27 void si_blitter_begin(struct si_context *sctx, enum si_blitter_op op)
28 {
29 util_blitter_save_vertex_shader(sctx->blitter, sctx->shader.vs.cso);
30 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->shader.tcs.cso);
31 util_blitter_save_tesseval_shader(sctx->blitter, sctx->shader.tes.cso);
32 util_blitter_save_geometry_shader(sctx->blitter, sctx->shader.gs.cso);
33 util_blitter_save_so_targets(sctx->blitter, sctx->streamout.num_targets,
34 (struct pipe_stream_output_target **)sctx->streamout.targets);
35 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
36
37 if (op & SI_SAVE_FRAGMENT_STATE) {
38 struct pipe_constant_buffer fs_cb = {};
39 si_get_pipe_constant_buffer(sctx, PIPE_SHADER_FRAGMENT, 0, &fs_cb);
40
41 if (op & SI_SAVE_FRAGMENT_CONSTANT)
42 util_blitter_save_fragment_constant_buffer_slot(sctx->blitter, &fs_cb);
43
44 pipe_resource_reference(&fs_cb.buffer, NULL);
45 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
46 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
47 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
48 util_blitter_save_fragment_shader(sctx->blitter, sctx->shader.ps.cso);
49 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask, sctx->ps_iter_samples);
50 util_blitter_save_scissor(sctx->blitter, &sctx->scissors[0]);
51 util_blitter_save_window_rectangles(sctx->blitter, sctx->window_rectangles_include,
52 sctx->num_window_rectangles, sctx->window_rectangles);
53 }
54
55 if (op & SI_SAVE_FRAMEBUFFER)
56 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
57
58 if (op & SI_SAVE_TEXTURES) {
59 util_blitter_save_fragment_sampler_states(
60 sctx->blitter, 2, (void **)sctx->samplers[PIPE_SHADER_FRAGMENT].sampler_states);
61
62 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
63 sctx->samplers[PIPE_SHADER_FRAGMENT].views);
64 }
65
66 if (op & SI_DISABLE_RENDER_COND)
67 sctx->render_cond_enabled = false;
68
69 if (sctx->screen->dpbb_allowed) {
70 sctx->dpbb_force_off = true;
71 si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
72 }
73
74 /* Force-disable fbfetch because there are unsolvable recursion problems with u_blitter. */
75 si_force_disable_ps_colorbuf0_slot(sctx);
76
77 sctx->blitter_running = true;
78 }
79
si_blitter_end(struct si_context * sctx)80 void si_blitter_end(struct si_context *sctx)
81 {
82 sctx->blitter_running = false;
83
84 if (sctx->screen->dpbb_allowed) {
85 sctx->dpbb_force_off = false;
86 si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
87 }
88
89 sctx->render_cond_enabled = sctx->render_cond;
90
91 /* Restore shader pointers because the VS blit shader changed all
92 * non-global VS user SGPRs. */
93 sctx->shader_pointers_dirty |= SI_DESCS_SHADER_MASK(VERTEX);
94
95 if (sctx->gfx_level >= GFX11)
96 sctx->gs_attribute_ring_pointer_dirty = true;
97
98 /* Reset SI_SGPR_SMALL_PRIM_CULL_INFO: */
99 if (sctx->screen->use_ngg_culling)
100 si_mark_atom_dirty(sctx, &sctx->atoms.s.ngg_cull_state);
101
102 sctx->vertex_buffers_dirty = sctx->num_vertex_elements > 0;
103 si_mark_atom_dirty(sctx, &sctx->atoms.s.gfx_shader_pointers);
104
105 /* We force-disabled fbfetch for u_blitter, so recompute the state. */
106 si_update_ps_colorbuf0_slot(sctx);
107 }
108
u_max_sample(struct pipe_resource * r)109 static unsigned u_max_sample(struct pipe_resource *r)
110 {
111 return r->nr_samples ? r->nr_samples - 1 : 0;
112 }
113
si_blit_dbcb_copy(struct si_context * sctx,struct si_texture * src,struct si_texture * dst,unsigned planes,unsigned level_mask,unsigned first_layer,unsigned last_layer,unsigned first_sample,unsigned last_sample)114 static unsigned si_blit_dbcb_copy(struct si_context *sctx, struct si_texture *src,
115 struct si_texture *dst, unsigned planes, unsigned level_mask,
116 unsigned first_layer, unsigned last_layer, unsigned first_sample,
117 unsigned last_sample)
118 {
119 struct pipe_surface surf_tmpl = {{0}};
120 unsigned layer, sample, checked_last_layer, max_layer;
121 unsigned fully_copied_levels = 0;
122
123 assert(sctx->gfx_level < GFX11);
124
125 if (planes & PIPE_MASK_Z)
126 sctx->dbcb_depth_copy_enabled = true;
127 if (planes & PIPE_MASK_S)
128 sctx->dbcb_stencil_copy_enabled = true;
129 si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
130
131 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
132
133 sctx->decompression_enabled = true;
134
135 while (level_mask) {
136 unsigned level = u_bit_scan(&level_mask);
137
138 /* The smaller the mipmap level, the less layers there are
139 * as far as 3D textures are concerned. */
140 max_layer = util_max_layer(&src->buffer.b.b, level);
141 checked_last_layer = MIN2(last_layer, max_layer);
142
143 surf_tmpl.u.tex.level = level;
144
145 for (layer = first_layer; layer <= checked_last_layer; layer++) {
146 struct pipe_surface *zsurf, *cbsurf;
147
148 surf_tmpl.format = src->buffer.b.b.format;
149 surf_tmpl.u.tex.first_layer = layer;
150 surf_tmpl.u.tex.last_layer = layer;
151
152 zsurf = sctx->b.create_surface(&sctx->b, &src->buffer.b.b, &surf_tmpl);
153
154 surf_tmpl.format = dst->buffer.b.b.format;
155 cbsurf = sctx->b.create_surface(&sctx->b, &dst->buffer.b.b, &surf_tmpl);
156
157 for (sample = first_sample; sample <= last_sample; sample++) {
158 if (sample != sctx->dbcb_copy_sample) {
159 sctx->dbcb_copy_sample = sample;
160 si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
161 }
162
163 si_blitter_begin(sctx, SI_DECOMPRESS);
164 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
165 sctx->custom_dsa_flush, 1.0f);
166 si_blitter_end(sctx);
167 }
168
169 pipe_surface_reference(&zsurf, NULL);
170 pipe_surface_reference(&cbsurf, NULL);
171 }
172
173 if (first_layer == 0 && last_layer >= max_layer && first_sample == 0 &&
174 last_sample >= u_max_sample(&src->buffer.b.b))
175 fully_copied_levels |= 1u << level;
176 }
177
178 sctx->decompression_enabled = false;
179 sctx->dbcb_depth_copy_enabled = false;
180 sctx->dbcb_stencil_copy_enabled = false;
181 si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
182
183 return fully_copied_levels;
184 }
185
186 /* Helper function for si_blit_decompress_zs_in_place.
187 */
si_blit_decompress_zs_planes_in_place(struct si_context * sctx,struct si_texture * texture,unsigned planes,unsigned level_mask,unsigned first_layer,unsigned last_layer)188 static void si_blit_decompress_zs_planes_in_place(struct si_context *sctx,
189 struct si_texture *texture, unsigned planes,
190 unsigned level_mask, unsigned first_layer,
191 unsigned last_layer)
192 {
193 struct pipe_surface *zsurf, surf_tmpl = {{0}};
194 unsigned layer, max_layer, checked_last_layer;
195 unsigned fully_decompressed_mask = 0;
196
197 assert(sctx->gfx_level < GFX12);
198
199 if (!level_mask)
200 return;
201
202 if (planes & PIPE_MASK_S)
203 sctx->db_flush_stencil_inplace = true;
204 if (planes & PIPE_MASK_Z)
205 sctx->db_flush_depth_inplace = true;
206 si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
207
208 surf_tmpl.format = texture->buffer.b.b.format;
209
210 sctx->decompression_enabled = true;
211
212 while (level_mask) {
213 unsigned level = u_bit_scan(&level_mask);
214
215 surf_tmpl.u.tex.level = level;
216
217 /* The smaller the mipmap level, the less layers there are
218 * as far as 3D textures are concerned. */
219 max_layer = util_max_layer(&texture->buffer.b.b, level);
220 checked_last_layer = MIN2(last_layer, max_layer);
221
222 for (layer = first_layer; layer <= checked_last_layer; layer++) {
223 surf_tmpl.u.tex.first_layer = layer;
224 surf_tmpl.u.tex.last_layer = layer;
225
226 zsurf = sctx->b.create_surface(&sctx->b, &texture->buffer.b.b, &surf_tmpl);
227
228 si_blitter_begin(sctx, SI_DECOMPRESS);
229 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0, sctx->custom_dsa_flush,
230 1.0f);
231 si_blitter_end(sctx);
232
233 pipe_surface_reference(&zsurf, NULL);
234 }
235
236 /* The texture will always be dirty if some layers aren't flushed.
237 * I don't think this case occurs often though. */
238 if (first_layer == 0 && last_layer >= max_layer) {
239 fully_decompressed_mask |= 1u << level;
240 }
241 }
242
243 if (planes & PIPE_MASK_Z)
244 texture->dirty_level_mask &= ~fully_decompressed_mask;
245 if (planes & PIPE_MASK_S)
246 texture->stencil_dirty_level_mask &= ~fully_decompressed_mask;
247
248 sctx->decompression_enabled = false;
249 sctx->db_flush_depth_inplace = false;
250 sctx->db_flush_stencil_inplace = false;
251 si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
252 }
253
254 /* Helper function of si_flush_depth_texture: decompress the given levels
255 * of Z and/or S planes in place.
256 */
si_blit_decompress_zs_in_place(struct si_context * sctx,struct si_texture * texture,unsigned levels_z,unsigned levels_s,unsigned first_layer,unsigned last_layer)257 static void si_blit_decompress_zs_in_place(struct si_context *sctx, struct si_texture *texture,
258 unsigned levels_z, unsigned levels_s,
259 unsigned first_layer, unsigned last_layer)
260 {
261 unsigned both = levels_z & levels_s;
262
263 /* First, do combined Z & S decompresses for levels that need it. */
264 if (both) {
265 si_blit_decompress_zs_planes_in_place(sctx, texture, PIPE_MASK_Z | PIPE_MASK_S, both,
266 first_layer, last_layer);
267 levels_z &= ~both;
268 levels_s &= ~both;
269 }
270
271 /* Now do separate Z and S decompresses. */
272 if (levels_z) {
273 si_blit_decompress_zs_planes_in_place(sctx, texture, PIPE_MASK_Z, levels_z, first_layer,
274 last_layer);
275 }
276
277 if (levels_s) {
278 si_blit_decompress_zs_planes_in_place(sctx, texture, PIPE_MASK_S, levels_s, first_layer,
279 last_layer);
280 }
281 }
282
si_decompress_depth(struct si_context * sctx,struct si_texture * tex,unsigned required_planes,unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer)283 static void si_decompress_depth(struct si_context *sctx, struct si_texture *tex,
284 unsigned required_planes, unsigned first_level, unsigned last_level,
285 unsigned first_layer, unsigned last_layer)
286 {
287 unsigned inplace_planes = 0;
288 unsigned copy_planes = 0;
289 unsigned level_mask = u_bit_consecutive(first_level, last_level - first_level + 1);
290 unsigned levels_z = 0;
291 unsigned levels_s = 0;
292
293 assert(sctx->gfx_level < GFX12);
294
295 if (required_planes & PIPE_MASK_Z) {
296 levels_z = level_mask & tex->dirty_level_mask;
297
298 if (levels_z) {
299 if (si_can_sample_zs(tex, false))
300 inplace_planes |= PIPE_MASK_Z;
301 else
302 copy_planes |= PIPE_MASK_Z;
303 }
304 }
305 if (required_planes & PIPE_MASK_S) {
306 levels_s = level_mask & tex->stencil_dirty_level_mask;
307
308 if (levels_s) {
309 if (si_can_sample_zs(tex, true))
310 inplace_planes |= PIPE_MASK_S;
311 else
312 copy_planes |= PIPE_MASK_S;
313 }
314 }
315
316 if (unlikely(sctx->log))
317 u_log_printf(sctx->log,
318 "\n------------------------------------------------\n"
319 "Decompress Depth (levels %u - %u, levels Z: 0x%x S: 0x%x)\n\n",
320 first_level, last_level, levels_z, levels_s);
321
322 /* We may have to allocate the flushed texture here when called from
323 * si_decompress_subresource.
324 */
325 if (copy_planes &&
326 (tex->flushed_depth_texture || si_init_flushed_depth_texture(&sctx->b, &tex->buffer.b.b))) {
327 struct si_texture *dst = tex->flushed_depth_texture;
328 unsigned fully_copied_levels;
329 unsigned levels = 0;
330
331 assert(tex->flushed_depth_texture);
332
333 if (util_format_is_depth_and_stencil(dst->buffer.b.b.format))
334 copy_planes = PIPE_MASK_Z | PIPE_MASK_S;
335
336 if (copy_planes & PIPE_MASK_Z) {
337 levels |= levels_z;
338 levels_z = 0;
339 }
340 if (copy_planes & PIPE_MASK_S) {
341 levels |= levels_s;
342 levels_s = 0;
343 }
344
345 fully_copied_levels = si_blit_dbcb_copy(sctx, tex, dst, copy_planes, levels, first_layer,
346 last_layer, 0, u_max_sample(&tex->buffer.b.b));
347
348 if (copy_planes & PIPE_MASK_Z)
349 tex->dirty_level_mask &= ~fully_copied_levels;
350 if (copy_planes & PIPE_MASK_S)
351 tex->stencil_dirty_level_mask &= ~fully_copied_levels;
352 }
353
354 if (inplace_planes) {
355 bool has_htile = si_htile_enabled(tex, first_level, inplace_planes);
356 bool tc_compat_htile = vi_tc_compat_htile_enabled(tex, first_level, inplace_planes);
357
358 /* Don't decompress if there is no HTILE or when HTILE is
359 * TC-compatible. */
360 if (has_htile && !tc_compat_htile) {
361 si_blit_decompress_zs_in_place(sctx, tex, levels_z, levels_s, first_layer, last_layer);
362 } else {
363 /* This is only a cache flush.
364 *
365 * Only clear the mask that we are flushing, because
366 * si_make_DB_shader_coherent() treats different levels
367 * and depth and stencil differently.
368 */
369 if (inplace_planes & PIPE_MASK_Z)
370 tex->dirty_level_mask &= ~levels_z;
371 if (inplace_planes & PIPE_MASK_S)
372 tex->stencil_dirty_level_mask &= ~levels_s;
373 }
374
375 /* We just had to completely decompress Z/S for texturing. Enable
376 * TC-compatible HTILE on the next clear, so that the decompression
377 * doesn't have to be done for this texture ever again.
378 *
379 * TC-compatible HTILE might slightly reduce Z/S performance, but
380 * the decompression is much worse.
381 */
382 if (has_htile && !tc_compat_htile &&
383 /* We can only transition the whole buffer in one clear, so no mipmapping: */
384 tex->buffer.b.b.last_level == 0 &&
385 tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE &&
386 (inplace_planes & PIPE_MASK_Z || !tex->htile_stencil_disabled))
387 tex->enable_tc_compatible_htile_next_clear = true;
388
389 /* Only in-place decompression needs to flush DB caches, or
390 * when we don't decompress but TC-compatible planes are dirty.
391 */
392 si_make_DB_shader_coherent(sctx, tex->buffer.b.b.nr_samples, inplace_planes & PIPE_MASK_S,
393 tc_compat_htile);
394 }
395 /* set_framebuffer_state takes care of coherency for single-sample.
396 * The DB->CB copy uses CB for the final writes.
397 */
398 if (copy_planes && tex->buffer.b.b.nr_samples > 1)
399 si_make_CB_shader_coherent(sctx, tex->buffer.b.b.nr_samples, false, true /* no DCC */);
400 }
401
si_decompress_sampler_depth_textures(struct si_context * sctx,struct si_samplers * textures)402 static bool si_decompress_sampler_depth_textures(struct si_context *sctx,
403 struct si_samplers *textures)
404 {
405 unsigned i;
406 unsigned mask = textures->needs_depth_decompress_mask;
407 bool need_flush = false;
408
409 assert(sctx->gfx_level < GFX12);
410
411 while (mask) {
412 struct pipe_sampler_view *view;
413 struct si_sampler_view *sview;
414 struct si_texture *tex;
415
416 i = u_bit_scan(&mask);
417
418 view = textures->views[i];
419 assert(view);
420 sview = (struct si_sampler_view *)view;
421
422 tex = (struct si_texture *)view->texture;
423 assert(tex->db_compatible);
424
425 si_decompress_depth(sctx, tex, sview->is_stencil_sampler ? PIPE_MASK_S : PIPE_MASK_Z,
426 view->u.tex.first_level, view->u.tex.last_level, 0,
427 util_max_layer(&tex->buffer.b.b, view->u.tex.first_level));
428
429 if (tex->need_flush_after_depth_decompression) {
430 need_flush = true;
431 tex->need_flush_after_depth_decompression = false;
432 }
433 }
434
435 return need_flush;
436 }
437
si_blit_decompress_color(struct si_context * sctx,struct si_texture * tex,unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,bool need_dcc_decompress,bool need_fmask_expand)438 static void si_blit_decompress_color(struct si_context *sctx, struct si_texture *tex,
439 unsigned first_level, unsigned last_level,
440 unsigned first_layer, unsigned last_layer,
441 bool need_dcc_decompress, bool need_fmask_expand)
442 {
443 void *custom_blend;
444 unsigned layer, checked_last_layer, max_layer;
445 unsigned level_mask = u_bit_consecutive(first_level, last_level - first_level + 1);
446
447 /* No decompression is ever needed on Gfx12. */
448 assert(sctx->gfx_level < GFX12);
449
450 if (!need_dcc_decompress)
451 level_mask &= tex->dirty_level_mask;
452 if (!level_mask)
453 goto expand_fmask;
454
455 /* No color decompression is needed on GFX11. */
456 assert(sctx->gfx_level < GFX11 || need_dcc_decompress);
457
458 if (unlikely(sctx->log))
459 u_log_printf(sctx->log,
460 "\n------------------------------------------------\n"
461 "Decompress Color (levels %u - %u, mask 0x%x)\n\n",
462 first_level, last_level, level_mask);
463
464 if (need_dcc_decompress) {
465 custom_blend = sctx->custom_blend_dcc_decompress;
466
467 /* DCC_DECOMPRESS and ELIMINATE_FAST_CLEAR require MSAA_NUM_SAMPLES=0. */
468 if (sctx->gfx_level >= GFX11) {
469 sctx->gfx11_force_msaa_num_samples_zero = true;
470 si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_config);
471 }
472
473 assert(vi_dcc_enabled(tex, first_level));
474
475 /* disable levels without DCC */
476 for (int i = first_level; i <= last_level; i++) {
477 if (!vi_dcc_enabled(tex, i))
478 level_mask &= ~(1 << i);
479 }
480 } else if (tex->surface.fmask_size) {
481 assert(sctx->gfx_level < GFX11);
482 custom_blend = sctx->custom_blend_fmask_decompress;
483 } else {
484 assert(sctx->gfx_level < GFX11);
485 custom_blend = sctx->custom_blend_eliminate_fastclear;
486 }
487
488 sctx->decompression_enabled = true;
489
490 while (level_mask) {
491 unsigned level = u_bit_scan(&level_mask);
492
493 /* The smaller the mipmap level, the less layers there are
494 * as far as 3D textures are concerned. */
495 max_layer = util_max_layer(&tex->buffer.b.b, level);
496 checked_last_layer = MIN2(last_layer, max_layer);
497
498 for (layer = first_layer; layer <= checked_last_layer; layer++) {
499 struct pipe_surface *cbsurf, surf_tmpl;
500
501 surf_tmpl.format = tex->buffer.b.b.format;
502 surf_tmpl.u.tex.level = level;
503 surf_tmpl.u.tex.first_layer = layer;
504 surf_tmpl.u.tex.last_layer = layer;
505 cbsurf = sctx->b.create_surface(&sctx->b, &tex->buffer.b.b, &surf_tmpl);
506
507 /* Required before and after FMASK and DCC_DECOMPRESS. */
508 if (custom_blend == sctx->custom_blend_fmask_decompress ||
509 custom_blend == sctx->custom_blend_dcc_decompress) {
510 sctx->barrier_flags |= SI_BARRIER_SYNC_AND_INV_CB;
511 si_mark_atom_dirty(sctx, &sctx->atoms.s.barrier);
512 }
513
514 si_blitter_begin(sctx, SI_DECOMPRESS);
515 util_blitter_custom_color(sctx->blitter, cbsurf, custom_blend);
516 si_blitter_end(sctx);
517
518 if (custom_blend == sctx->custom_blend_fmask_decompress ||
519 custom_blend == sctx->custom_blend_dcc_decompress) {
520 sctx->barrier_flags |= SI_BARRIER_SYNC_AND_INV_CB;
521 si_mark_atom_dirty(sctx, &sctx->atoms.s.barrier);
522 }
523
524 /* When running FMASK decompression with DCC, we need to run the "eliminate fast clear" pass
525 * separately because FMASK decompression doesn't eliminate DCC fast clear. This makes
526 * render->texture transitions more expensive. It can be disabled by
527 * allow_dcc_msaa_clear_to_reg_for_bpp.
528 *
529 * TODO: When we get here, change the compression to TC-compatible on the next clear
530 * to disable both the FMASK decompression and fast clear elimination passes.
531 */
532 if (sctx->screen->allow_dcc_msaa_clear_to_reg_for_bpp[util_logbase2(tex->surface.bpe)] &&
533 custom_blend == sctx->custom_blend_fmask_decompress &&
534 vi_dcc_enabled(tex, level)) {
535 si_blitter_begin(sctx, SI_DECOMPRESS);
536 util_blitter_custom_color(sctx->blitter, cbsurf, sctx->custom_blend_eliminate_fastclear);
537 si_blitter_end(sctx);
538 }
539
540 pipe_surface_reference(&cbsurf, NULL);
541 }
542
543 /* The texture will always be dirty if some layers aren't flushed.
544 * I don't think this case occurs often though. */
545 if (first_layer == 0 && last_layer >= max_layer) {
546 tex->dirty_level_mask &= ~(1 << level);
547 }
548 }
549
550 sctx->decompression_enabled = false;
551 si_make_CB_shader_coherent(sctx, tex->buffer.b.b.nr_samples, vi_dcc_enabled(tex, first_level),
552 tex->surface.u.gfx9.color.dcc.pipe_aligned);
553
554 /* Restore gfx11_force_msaa_num_samples_zero. */
555 if (sctx->gfx11_force_msaa_num_samples_zero) {
556 sctx->gfx11_force_msaa_num_samples_zero = false;
557 si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_config);
558 }
559
560 expand_fmask:
561 if (need_fmask_expand && tex->surface.fmask_offset && !tex->fmask_is_identity) {
562 assert(sctx->gfx_level < GFX11); /* no FMASK on gfx11 */
563 si_compute_expand_fmask(&sctx->b, &tex->buffer.b.b);
564 tex->fmask_is_identity = true;
565 }
566 }
567
si_decompress_color_texture(struct si_context * sctx,struct si_texture * tex,unsigned first_level,unsigned last_level,bool need_fmask_expand)568 static void si_decompress_color_texture(struct si_context *sctx, struct si_texture *tex,
569 unsigned first_level, unsigned last_level,
570 bool need_fmask_expand)
571 {
572 assert(sctx->gfx_level < GFX11);
573
574 /* CMASK or DCC can be discarded and we can still end up here. */
575 if (!tex->cmask_buffer && !tex->surface.fmask_size &&
576 !vi_dcc_enabled(tex, first_level))
577 return;
578
579 si_blit_decompress_color(sctx, tex, first_level, last_level, 0,
580 util_max_layer(&tex->buffer.b.b, first_level), false,
581 need_fmask_expand);
582 }
583
si_decompress_sampler_color_textures(struct si_context * sctx,struct si_samplers * textures)584 static void si_decompress_sampler_color_textures(struct si_context *sctx,
585 struct si_samplers *textures)
586 {
587 unsigned i;
588 unsigned mask = textures->needs_color_decompress_mask;
589
590 assert(sctx->gfx_level < GFX11);
591
592 while (mask) {
593 struct pipe_sampler_view *view;
594 struct si_texture *tex;
595
596 i = u_bit_scan(&mask);
597
598 view = textures->views[i];
599 assert(view);
600
601 tex = (struct si_texture *)view->texture;
602
603 si_decompress_color_texture(sctx, tex, view->u.tex.first_level, view->u.tex.last_level,
604 false);
605 }
606 }
607
si_decompress_image_color_textures(struct si_context * sctx,struct si_images * images)608 static void si_decompress_image_color_textures(struct si_context *sctx, struct si_images *images)
609 {
610 unsigned i;
611 unsigned mask = images->needs_color_decompress_mask;
612
613 assert(sctx->gfx_level < GFX11);
614
615 while (mask) {
616 const struct pipe_image_view *view;
617 struct si_texture *tex;
618
619 i = u_bit_scan(&mask);
620
621 view = &images->views[i];
622 assert(view->resource->target != PIPE_BUFFER);
623
624 tex = (struct si_texture *)view->resource;
625
626 si_decompress_color_texture(sctx, tex, view->u.tex.level, view->u.tex.level,
627 view->access & PIPE_IMAGE_ACCESS_WRITE);
628 }
629 }
630
si_check_render_feedback_texture(struct si_context * sctx,struct si_texture * tex,unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer)631 static void si_check_render_feedback_texture(struct si_context *sctx, struct si_texture *tex,
632 unsigned first_level, unsigned last_level,
633 unsigned first_layer, unsigned last_layer)
634 {
635 bool render_feedback = false;
636
637 assert(sctx->gfx_level < GFX12);
638
639 if (!vi_dcc_enabled(tex, first_level))
640 return;
641
642 for (unsigned j = 0; j < sctx->framebuffer.state.nr_cbufs; ++j) {
643 struct si_surface *surf;
644
645 if (!sctx->framebuffer.state.cbufs[j])
646 continue;
647
648 surf = (struct si_surface *)sctx->framebuffer.state.cbufs[j];
649
650 if (tex == (struct si_texture *)surf->base.texture && surf->base.u.tex.level >= first_level &&
651 surf->base.u.tex.level <= last_level && surf->base.u.tex.first_layer <= last_layer &&
652 surf->base.u.tex.last_layer >= first_layer) {
653 render_feedback = true;
654 break;
655 }
656 }
657
658 if (render_feedback)
659 si_texture_disable_dcc(sctx, tex);
660 }
661
si_check_render_feedback_textures(struct si_context * sctx,struct si_samplers * textures,uint32_t in_use_mask)662 static void si_check_render_feedback_textures(struct si_context *sctx, struct si_samplers *textures,
663 uint32_t in_use_mask)
664 {
665 uint32_t mask = textures->enabled_mask & in_use_mask;
666
667 assert(sctx->gfx_level < GFX12);
668
669 while (mask) {
670 const struct pipe_sampler_view *view;
671 struct si_texture *tex;
672
673 unsigned i = u_bit_scan(&mask);
674
675 view = textures->views[i];
676 if (view->texture->target == PIPE_BUFFER)
677 continue;
678
679 tex = (struct si_texture *)view->texture;
680
681 si_check_render_feedback_texture(sctx, tex, view->u.tex.first_level, view->u.tex.last_level,
682 view->u.tex.first_layer, view->u.tex.last_layer);
683 }
684 }
685
si_check_render_feedback_images(struct si_context * sctx,struct si_images * images,uint32_t in_use_mask)686 static void si_check_render_feedback_images(struct si_context *sctx, struct si_images *images,
687 uint32_t in_use_mask)
688 {
689 uint32_t mask = images->enabled_mask & in_use_mask;
690
691 assert(sctx->gfx_level < GFX12);
692
693 while (mask) {
694 const struct pipe_image_view *view;
695 struct si_texture *tex;
696
697 unsigned i = u_bit_scan(&mask);
698
699 view = &images->views[i];
700 if (view->resource->target == PIPE_BUFFER)
701 continue;
702
703 tex = (struct si_texture *)view->resource;
704
705 si_check_render_feedback_texture(sctx, tex, view->u.tex.level, view->u.tex.level,
706 view->u.tex.first_layer, view->u.tex.last_layer);
707 }
708 }
709
si_check_render_feedback_resident_textures(struct si_context * sctx)710 static void si_check_render_feedback_resident_textures(struct si_context *sctx)
711 {
712 assert(sctx->gfx_level < GFX12);
713
714 util_dynarray_foreach (&sctx->resident_tex_handles, struct si_texture_handle *, tex_handle) {
715 struct pipe_sampler_view *view;
716 struct si_texture *tex;
717
718 view = (*tex_handle)->view;
719 if (view->texture->target == PIPE_BUFFER)
720 continue;
721
722 tex = (struct si_texture *)view->texture;
723
724 si_check_render_feedback_texture(sctx, tex, view->u.tex.first_level, view->u.tex.last_level,
725 view->u.tex.first_layer, view->u.tex.last_layer);
726 }
727 }
728
si_check_render_feedback_resident_images(struct si_context * sctx)729 static void si_check_render_feedback_resident_images(struct si_context *sctx)
730 {
731 assert(sctx->gfx_level < GFX12);
732
733 util_dynarray_foreach (&sctx->resident_img_handles, struct si_image_handle *, img_handle) {
734 struct pipe_image_view *view;
735 struct si_texture *tex;
736
737 view = &(*img_handle)->view;
738 if (view->resource->target == PIPE_BUFFER)
739 continue;
740
741 tex = (struct si_texture *)view->resource;
742
743 si_check_render_feedback_texture(sctx, tex, view->u.tex.level, view->u.tex.level,
744 view->u.tex.first_layer, view->u.tex.last_layer);
745 }
746 }
747
si_check_render_feedback(struct si_context * sctx)748 static void si_check_render_feedback(struct si_context *sctx)
749 {
750 assert(sctx->gfx_level < GFX12);
751
752 if (!sctx->need_check_render_feedback)
753 return;
754
755 /* There is no render feedback if color writes are disabled.
756 * (e.g. a pixel shader with image stores)
757 */
758 if (!si_any_colorbuffer_written(sctx))
759 return;
760
761 for (int i = 0; i < SI_NUM_GRAPHICS_SHADERS; ++i) {
762 if (!sctx->shaders[i].cso)
763 continue;
764
765 struct si_shader_info *info = &sctx->shaders[i].cso->info;
766 si_check_render_feedback_images(sctx, &sctx->images[i],
767 u_bit_consecutive(0, info->base.num_images));
768 si_check_render_feedback_textures(sctx, &sctx->samplers[i],
769 info->base.textures_used[0]);
770 }
771
772 si_check_render_feedback_resident_images(sctx);
773 si_check_render_feedback_resident_textures(sctx);
774
775 sctx->need_check_render_feedback = false;
776 }
777
si_decompress_resident_color_textures(struct si_context * sctx)778 static void si_decompress_resident_color_textures(struct si_context *sctx)
779 {
780 assert(sctx->gfx_level < GFX11);
781
782 util_dynarray_foreach (&sctx->resident_tex_needs_color_decompress, struct si_texture_handle *,
783 tex_handle) {
784 struct pipe_sampler_view *view = (*tex_handle)->view;
785 struct si_texture *tex = (struct si_texture *)view->texture;
786
787 si_decompress_color_texture(sctx, tex, view->u.tex.first_level, view->u.tex.last_level,
788 false);
789 }
790 }
791
si_decompress_resident_depth_textures(struct si_context * sctx)792 static void si_decompress_resident_depth_textures(struct si_context *sctx)
793 {
794 util_dynarray_foreach (&sctx->resident_tex_needs_depth_decompress, struct si_texture_handle *,
795 tex_handle) {
796 struct pipe_sampler_view *view = (*tex_handle)->view;
797 struct si_sampler_view *sview = (struct si_sampler_view *)view;
798 struct si_texture *tex = (struct si_texture *)view->texture;
799
800 si_decompress_depth(sctx, tex, sview->is_stencil_sampler ? PIPE_MASK_S : PIPE_MASK_Z,
801 view->u.tex.first_level, view->u.tex.last_level, 0,
802 util_max_layer(&tex->buffer.b.b, view->u.tex.first_level));
803 }
804 }
805
si_decompress_resident_images(struct si_context * sctx)806 static void si_decompress_resident_images(struct si_context *sctx)
807 {
808 assert(sctx->gfx_level < GFX11);
809
810 util_dynarray_foreach (&sctx->resident_img_needs_color_decompress, struct si_image_handle *,
811 img_handle) {
812 struct pipe_image_view *view = &(*img_handle)->view;
813 struct si_texture *tex = (struct si_texture *)view->resource;
814
815 si_decompress_color_texture(sctx, tex, view->u.tex.level, view->u.tex.level,
816 view->access & PIPE_IMAGE_ACCESS_WRITE);
817 }
818 }
819
gfx6_decompress_textures(struct si_context * sctx,unsigned shader_mask)820 void gfx6_decompress_textures(struct si_context *sctx, unsigned shader_mask)
821 {
822 unsigned compressed_colortex_counter, mask;
823 bool need_flush = false;
824
825 if (sctx->blitter_running)
826 return;
827
828 /* Update the compressed_colortex_mask if necessary. */
829 compressed_colortex_counter = p_atomic_read(&sctx->screen->compressed_colortex_counter);
830 if (compressed_colortex_counter != sctx->last_compressed_colortex_counter) {
831 sctx->last_compressed_colortex_counter = compressed_colortex_counter;
832 si_update_needs_color_decompress_masks(sctx);
833 }
834
835 /* Decompress color & depth textures if needed. */
836 mask = sctx->shader_needs_decompress_mask & shader_mask;
837 while (mask) {
838 unsigned i = u_bit_scan(&mask);
839
840 if (sctx->samplers[i].needs_depth_decompress_mask) {
841 need_flush |= si_decompress_sampler_depth_textures(sctx, &sctx->samplers[i]);
842 }
843 if (sctx->samplers[i].needs_color_decompress_mask) {
844 si_decompress_sampler_color_textures(sctx, &sctx->samplers[i]);
845 }
846 if (sctx->images[i].needs_color_decompress_mask) {
847 si_decompress_image_color_textures(sctx, &sctx->images[i]);
848 }
849 }
850
851 if (sctx->gfx_level == GFX10_3 && need_flush) {
852 /* This fixes a corruption with the following sequence:
853 * - fast clear depth
854 * - decompress depth
855 * - draw
856 * (see https://gitlab.freedesktop.org/drm/amd/-/issues/1810#note_1170171)
857 */
858 sctx->b.flush(&sctx->b, NULL, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW);
859 }
860
861 if (shader_mask & u_bit_consecutive(0, SI_NUM_GRAPHICS_SHADERS)) {
862 if (sctx->uses_bindless_samplers) {
863 si_decompress_resident_color_textures(sctx);
864 si_decompress_resident_depth_textures(sctx);
865 }
866 if (sctx->uses_bindless_images)
867 si_decompress_resident_images(sctx);
868
869 if (sctx->ps_uses_fbfetch) {
870 struct pipe_surface *cb0 = sctx->framebuffer.state.cbufs[0];
871 si_decompress_color_texture(sctx, (struct si_texture *)cb0->texture,
872 cb0->u.tex.first_layer, cb0->u.tex.last_layer, false);
873 }
874
875 si_check_render_feedback(sctx);
876 } else if (shader_mask & (1 << PIPE_SHADER_COMPUTE)) {
877 if (sctx->cs_shader_state.program->sel.info.uses_bindless_samplers) {
878 si_decompress_resident_color_textures(sctx);
879 si_decompress_resident_depth_textures(sctx);
880 }
881 if (sctx->cs_shader_state.program->sel.info.uses_bindless_images)
882 si_decompress_resident_images(sctx);
883 }
884 }
885
gfx11_decompress_textures(struct si_context * sctx,unsigned shader_mask)886 void gfx11_decompress_textures(struct si_context *sctx, unsigned shader_mask)
887 {
888 if (sctx->blitter_running)
889 return;
890
891 /* Decompress depth textures if needed. */
892 unsigned mask = sctx->shader_needs_decompress_mask & shader_mask;
893 u_foreach_bit(i, mask) {
894 assert(sctx->samplers[i].needs_depth_decompress_mask);
895 si_decompress_sampler_depth_textures(sctx, &sctx->samplers[i]);
896 }
897
898 /* Decompress bindless depth textures and disable DCC for render feedback. */
899 if (shader_mask & u_bit_consecutive(0, SI_NUM_GRAPHICS_SHADERS)) {
900 if (sctx->uses_bindless_samplers)
901 si_decompress_resident_depth_textures(sctx);
902
903 si_check_render_feedback(sctx);
904 } else if (shader_mask & (1 << PIPE_SHADER_COMPUTE)) {
905 if (sctx->cs_shader_state.program->sel.info.uses_bindless_samplers)
906 si_decompress_resident_depth_textures(sctx);
907 }
908 }
909
910 /* Helper for decompressing a portion of a color or depth resource before
911 * blitting if any decompression is needed.
912 * The driver doesn't decompress resources automatically while u_blitter is
913 * rendering. */
si_decompress_subresource(struct pipe_context * ctx,struct pipe_resource * tex,unsigned planes,unsigned level,unsigned first_layer,unsigned last_layer,bool need_fmask_expand)914 void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *tex, unsigned planes,
915 unsigned level, unsigned first_layer, unsigned last_layer,
916 bool need_fmask_expand)
917 {
918 struct si_context *sctx = (struct si_context *)ctx;
919 struct si_texture *stex = (struct si_texture *)tex;
920
921 if (sctx->gfx_level >= GFX12)
922 return;
923
924 if (stex->db_compatible) {
925 planes &= PIPE_MASK_Z | PIPE_MASK_S;
926
927 if (!stex->surface.has_stencil)
928 planes &= ~PIPE_MASK_S;
929
930 /* If we've rendered into the framebuffer and it's a blitting
931 * source, make sure the decompression pass is invoked
932 * by dirtying the framebuffer.
933 */
934 if (sctx->framebuffer.state.zsbuf && sctx->framebuffer.state.zsbuf->u.tex.level == level &&
935 sctx->framebuffer.state.zsbuf->texture == tex)
936 si_fb_barrier_after_rendering(sctx, SI_FB_BARRIER_SYNC_DB);
937
938 si_decompress_depth(sctx, stex, planes, level, level, first_layer, last_layer);
939 } else if (stex->surface.fmask_size || stex->cmask_buffer ||
940 vi_dcc_enabled(stex, level)) {
941 /* If we've rendered into the framebuffer and it's a blitting
942 * source, make sure the decompression pass is invoked
943 * by dirtying the framebuffer.
944 */
945 for (unsigned i = 0; i < sctx->framebuffer.state.nr_cbufs; i++) {
946 if (sctx->framebuffer.state.cbufs[i] &&
947 sctx->framebuffer.state.cbufs[i]->u.tex.level == level &&
948 sctx->framebuffer.state.cbufs[i]->texture == tex) {
949 si_fb_barrier_after_rendering(sctx, SI_FB_BARRIER_SYNC_CB);
950 break;
951 }
952 }
953
954 si_blit_decompress_color(sctx, stex, level, level, first_layer, last_layer, false,
955 need_fmask_expand);
956 }
957 }
958
si_resource_copy_region(struct pipe_context * ctx,struct pipe_resource * dst,unsigned dst_level,unsigned dstx,unsigned dsty,unsigned dstz,struct pipe_resource * src,unsigned src_level,const struct pipe_box * src_box)959 void si_resource_copy_region(struct pipe_context *ctx, struct pipe_resource *dst,
960 unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz,
961 struct pipe_resource *src, unsigned src_level,
962 const struct pipe_box *src_box)
963 {
964 struct si_context *sctx = (struct si_context *)ctx;
965
966 /* Handle buffers first. */
967 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
968 si_barrier_before_simple_buffer_op(sctx, 0, dst, src);
969 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width);
970 si_barrier_after_simple_buffer_op(sctx, 0, dst, src);
971 return;
972 }
973
974 if (si_compute_copy_image(sctx, dst, dst_level, src, src_level, dstx, dsty, dstz, src_box, true))
975 return;
976
977 si_gfx_copy_image(sctx, dst, dst_level, dstx, dsty, dstz, src, src_level, src_box);
978 }
979
si_gfx_copy_image(struct si_context * sctx,struct pipe_resource * dst,unsigned dst_level,unsigned dstx,unsigned dsty,unsigned dstz,struct pipe_resource * src,unsigned src_level,const struct pipe_box * src_box)980 void si_gfx_copy_image(struct si_context *sctx, struct pipe_resource *dst,
981 unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz,
982 struct pipe_resource *src, unsigned src_level,
983 const struct pipe_box *src_box)
984 {
985 struct si_texture *ssrc = (struct si_texture *)src;
986 struct pipe_surface *dst_view, dst_templ;
987 struct pipe_sampler_view src_templ, *src_view;
988 struct pipe_box dstbox;
989
990 /* If the blitter isn't available fail here instead of crashing. */
991 if (!sctx->blitter) {
992 fprintf(stderr, "si_resource_copy_region failed src_format: %s dst_format: %s\n",
993 util_format_name(src->format), util_format_name(dst->format));
994 return;
995 }
996
997 assert(u_max_sample(dst) == u_max_sample(src));
998
999 /* The driver doesn't decompress resources automatically while
1000 * u_blitter is rendering. */
1001 si_decompress_subresource(&sctx->b, src, PIPE_MASK_RGBAZS, src_level, src_box->z,
1002 src_box->z + src_box->depth - 1, false);
1003
1004 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
1005 util_blitter_default_src_texture(sctx->blitter, &src_templ, src, src_level);
1006
1007 assert(!util_format_is_compressed(src->format) && !util_format_is_compressed(dst->format));
1008 assert(!util_format_is_subsampled_422(src->format));
1009
1010 /* We can't blit as floats because it wouldn't preserve NaNs.
1011 * Z32_FLOAT needs to keep using floats.
1012 */
1013 if ((util_format_is_float(dst_templ.format) &&
1014 !util_format_is_depth_or_stencil(dst_templ.format)) ||
1015 !util_blitter_is_copy_supported(sctx->blitter, dst, src)) {
1016 switch (ssrc->surface.bpe) {
1017 case 1:
1018 dst_templ.format = src_templ.format = PIPE_FORMAT_R8_UINT;
1019 break;
1020 case 2:
1021 dst_templ.format = src_templ.format = PIPE_FORMAT_R16_UINT;
1022 break;
1023 case 4:
1024 dst_templ.format = src_templ.format = PIPE_FORMAT_R32_UINT;
1025 break;
1026 case 8:
1027 dst_templ.format = src_templ.format = PIPE_FORMAT_R32G32_UINT;
1028 break;
1029 case 16:
1030 dst_templ.format = src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
1031 break;
1032 default:
1033 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
1034 util_format_short_name(src->format), ssrc->surface.bpe);
1035 assert(0);
1036 }
1037 }
1038
1039 /* SNORM blitting has precision issues on some chips. Use the SINT
1040 * equivalent instead, which doesn't force DCC decompression.
1041 */
1042 if (util_format_is_snorm(dst_templ.format))
1043 dst_templ.format = src_templ.format = util_format_snorm_to_sint(dst_templ.format);
1044
1045 vi_disable_dcc_if_incompatible_format(sctx, dst, dst_level, dst_templ.format);
1046 vi_disable_dcc_if_incompatible_format(sctx, src, src_level, src_templ.format);
1047
1048 /* Initialize the surface. */
1049 dst_view = sctx->b.create_surface(&sctx->b, dst, &dst_templ);
1050
1051 /* Initialize the sampler view. */
1052 src_view = sctx->b.create_sampler_view(&sctx->b, src, &src_templ);
1053
1054 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height), abs(src_box->depth),
1055 &dstbox);
1056
1057 /* Copy. */
1058 si_blitter_begin(sctx, SI_COPY);
1059 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox, src_view, src_box, src->width0,
1060 src->height0, PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
1061 false, false, 0, NULL);
1062 si_blitter_end(sctx);
1063
1064 pipe_surface_reference(&dst_view, NULL);
1065 pipe_sampler_view_reference(&src_view, NULL);
1066 }
1067
si_do_CB_resolve(struct si_context * sctx,const struct pipe_blit_info * info,struct pipe_resource * dst,unsigned dst_level,unsigned dst_z,enum pipe_format format)1068 static void si_do_CB_resolve(struct si_context *sctx, const struct pipe_blit_info *info,
1069 struct pipe_resource *dst, unsigned dst_level, unsigned dst_z,
1070 enum pipe_format format)
1071 {
1072 /* Required before and after CB_RESOLVE. */
1073 sctx->barrier_flags |= SI_BARRIER_SYNC_AND_INV_CB;
1074 si_mark_atom_dirty(sctx, &sctx->atoms.s.barrier);
1075
1076 si_blitter_begin(
1077 sctx, SI_COLOR_RESOLVE | (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
1078 util_blitter_custom_resolve_color(sctx->blitter, dst, dst_level, dst_z, info->src.resource,
1079 info->src.box.z, ~0, sctx->custom_blend_resolve, format);
1080 si_blitter_end(sctx);
1081
1082 /* Flush caches for possible texturing. */
1083 si_make_CB_shader_coherent(sctx, 1, false, true /* no DCC */);
1084 }
1085
resolve_formats_compatible(enum pipe_format src,enum pipe_format dst,bool src_swaps_rgb_to_bgr,bool * need_rgb_to_bgr)1086 static bool resolve_formats_compatible(enum pipe_format src, enum pipe_format dst,
1087 bool src_swaps_rgb_to_bgr, bool *need_rgb_to_bgr)
1088 {
1089 *need_rgb_to_bgr = false;
1090
1091 if (src_swaps_rgb_to_bgr) {
1092 /* We must only check the swapped format. */
1093 enum pipe_format swapped_src = util_format_rgb_to_bgr(src);
1094 assert(swapped_src);
1095 return util_is_format_compatible(util_format_description(swapped_src),
1096 util_format_description(dst));
1097 }
1098
1099 if (util_is_format_compatible(util_format_description(src), util_format_description(dst)))
1100 return true;
1101
1102 enum pipe_format swapped_src = util_format_rgb_to_bgr(src);
1103 *need_rgb_to_bgr = util_is_format_compatible(util_format_description(swapped_src),
1104 util_format_description(dst));
1105 return *need_rgb_to_bgr;
1106 }
1107
si_msaa_resolve_blit_via_CB(struct pipe_context * ctx,const struct pipe_blit_info * info,bool fail_if_slow)1108 bool si_msaa_resolve_blit_via_CB(struct pipe_context *ctx, const struct pipe_blit_info *info,
1109 bool fail_if_slow)
1110 {
1111 struct si_context *sctx = (struct si_context *)ctx;
1112
1113 /* Gfx11 doesn't have CB_RESOLVE. */
1114 if (sctx->gfx_level >= GFX11)
1115 return false;
1116
1117 struct si_texture *src = (struct si_texture *)info->src.resource;
1118 struct si_texture *dst = (struct si_texture *)info->dst.resource;
1119 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
1120 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
1121 enum pipe_format format = info->src.format;
1122 unsigned num_channels = util_format_description(format)->nr_channels;
1123
1124 /* Check basic requirements for hw resolve. */
1125 if (!(info->src.resource->nr_samples > 1 && info->dst.resource->nr_samples <= 1 &&
1126 !util_format_is_pure_integer(format) && !util_format_is_depth_or_stencil(format) &&
1127 util_max_layer(info->src.resource, 0) == 0))
1128 return false;
1129
1130 /* Return if this is slower than alternatives. */
1131 if (fail_if_slow) {
1132 /* CB_RESOLVE is much slower without FMASK. */
1133 if (sctx->screen->debug_flags & DBG(NO_FMASK))
1134 return false;
1135
1136 /* Verified on: Tahiti, Hawaii, Tonga, Vega10, Navi10, Navi21 */
1137 switch (sctx->gfx_level) {
1138 case GFX6:
1139 return false;
1140
1141 case GFX7:
1142 if (src->surface.bpe != 16)
1143 return false;
1144 break;
1145
1146 case GFX8:
1147 case GFX9:
1148 case GFX10:
1149 return false;
1150
1151 case GFX10_3:
1152 if (!(src->surface.bpe == 8 && src->buffer.b.b.nr_samples == 8 && num_channels == 4) &&
1153 !(src->surface.bpe == 16 && src->buffer.b.b.nr_samples == 4))
1154 return false;
1155 break;
1156
1157 default:
1158 unreachable("unexpected gfx version");
1159 }
1160 }
1161
1162 /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and
1163 * the format is R16G16. Use R16A16, which does work.
1164 */
1165 if (format == PIPE_FORMAT_R16G16_UNORM)
1166 format = PIPE_FORMAT_R16A16_UNORM;
1167 if (format == PIPE_FORMAT_R16G16_SNORM)
1168 format = PIPE_FORMAT_R16A16_SNORM;
1169
1170 bool need_rgb_to_bgr = false;
1171
1172 /* Check the remaining requirements for hw resolve. */
1173 if (util_max_layer(info->dst.resource, info->dst.level) == 0 && !info->scissor_enable &&
1174 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
1175 resolve_formats_compatible(info->src.format, info->dst.format,
1176 src->swap_rgb_to_bgr, &need_rgb_to_bgr) &&
1177 dst_width == info->src.resource->width0 && dst_height == info->src.resource->height0 &&
1178 info->dst.box.x == 0 && info->dst.box.y == 0 && info->dst.box.width == dst_width &&
1179 info->dst.box.height == dst_height && info->dst.box.depth == 1 && info->src.box.x == 0 &&
1180 info->src.box.y == 0 && info->src.box.width == dst_width &&
1181 info->src.box.height == dst_height && info->src.box.depth == 1 && !dst->surface.is_linear &&
1182 (!dst->cmask_buffer || !dst->dirty_level_mask)) { /* dst cannot be fast-cleared */
1183 /* Check the remaining constraints. */
1184 if (src->surface.micro_tile_mode != dst->surface.micro_tile_mode ||
1185 need_rgb_to_bgr) {
1186 /* Changing the microtile mode is not possible with GFX10. */
1187 if (sctx->gfx_level >= GFX10)
1188 return false;
1189
1190 /* The next fast clear will switch to this mode to
1191 * get direct hw resolve next time if the mode is
1192 * different now.
1193 */
1194 if (src->surface.micro_tile_mode != dst->surface.micro_tile_mode)
1195 src->last_msaa_resolve_target_micro_mode = dst->surface.micro_tile_mode;
1196 if (need_rgb_to_bgr)
1197 src->swap_rgb_to_bgr_on_next_clear = true;
1198
1199 return false;
1200 }
1201
1202 /* Resolving into a surface with DCC is unsupported. Since
1203 * it's being overwritten anyway, clear it to uncompressed.
1204 */
1205 if (vi_dcc_enabled(dst, info->dst.level)) {
1206 struct si_clear_info clear_info;
1207
1208 if (!vi_dcc_get_clear_info(sctx, dst, info->dst.level, DCC_UNCOMPRESSED, &clear_info))
1209 return false;
1210
1211 si_execute_clears(sctx, &clear_info, 1, SI_CLEAR_TYPE_DCC, info->render_condition_enable);
1212 dst->dirty_level_mask &= ~(1 << info->dst.level);
1213 }
1214
1215 /* Resolve directly from src to dst. */
1216 si_do_CB_resolve(sctx, info, info->dst.resource, info->dst.level, info->dst.box.z, format);
1217 return true;
1218 }
1219
1220 return false;
1221 }
1222
si_blit(struct pipe_context * ctx,const struct pipe_blit_info * info)1223 static void si_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
1224 {
1225 struct si_context *sctx = (struct si_context *)ctx;
1226 struct si_texture *sdst = (struct si_texture *)info->dst.resource;
1227
1228 if (sctx->gfx_level >= GFX7 &&
1229 (info->dst.resource->bind & PIPE_BIND_PRIME_BLIT_DST) && sdst->surface.is_linear &&
1230 /* Use SDMA or async compute when copying to a DRI_PRIME imported linear surface. */
1231 info->dst.box.x == 0 && info->dst.box.y == 0 && info->dst.box.z == 0 &&
1232 info->src.box.x == 0 && info->src.box.y == 0 && info->src.box.z == 0 &&
1233 info->dst.level == 0 && info->src.level == 0 &&
1234 info->src.box.width == info->dst.resource->width0 &&
1235 info->src.box.height == info->dst.resource->height0 &&
1236 info->src.box.depth == 1 &&
1237 util_can_blit_via_copy_region(info, true, sctx->render_cond != NULL)) {
1238 struct si_texture *ssrc = (struct si_texture *)info->src.resource;
1239
1240 /* Try SDMA first... */
1241 if (si_sdma_copy_image(sctx, sdst, ssrc))
1242 return;
1243
1244 /* ... and use async compute as the fallback. */
1245 struct si_screen *sscreen = sctx->screen;
1246
1247 simple_mtx_lock(&sscreen->async_compute_context_lock);
1248 if (!sscreen->async_compute_context)
1249 si_init_aux_async_compute_ctx(sscreen);
1250
1251 if (sscreen->async_compute_context) {
1252 si_compute_copy_image((struct si_context*)sctx->screen->async_compute_context,
1253 info->dst.resource, 0, info->src.resource, 0, 0, 0, 0,
1254 &info->src.box, false);
1255 si_flush_gfx_cs((struct si_context*)sctx->screen->async_compute_context, 0, NULL);
1256 simple_mtx_unlock(&sscreen->async_compute_context_lock);
1257 return;
1258 }
1259
1260 simple_mtx_unlock(&sscreen->async_compute_context_lock);
1261 }
1262
1263 if (unlikely(sctx->sqtt_enabled))
1264 sctx->sqtt_next_event = EventCmdResolveImage;
1265
1266 if (si_msaa_resolve_blit_via_CB(ctx, info, true))
1267 return;
1268
1269 if (unlikely(sctx->sqtt_enabled))
1270 sctx->sqtt_next_event = EventCmdCopyImage;
1271
1272 if (si_compute_blit(sctx, info, NULL, 0, 0, true))
1273 return;
1274
1275 si_gfx_blit(ctx, info);
1276 }
1277
si_gfx_blit(struct pipe_context * ctx,const struct pipe_blit_info * info)1278 void si_gfx_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
1279 {
1280 struct si_context *sctx = (struct si_context *)ctx;
1281
1282 assert(util_blitter_is_blit_supported(sctx->blitter, info));
1283
1284 /* The driver doesn't decompress resources automatically while
1285 * u_blitter is rendering. */
1286 vi_disable_dcc_if_incompatible_format(sctx, info->src.resource, info->src.level,
1287 info->src.format);
1288 vi_disable_dcc_if_incompatible_format(sctx, info->dst.resource, info->dst.level,
1289 info->dst.format);
1290 si_decompress_subresource(ctx, info->src.resource, PIPE_MASK_RGBAZS, info->src.level,
1291 info->src.box.z, info->src.box.z + info->src.box.depth - 1,
1292 false);
1293
1294 if (unlikely(sctx->sqtt_enabled))
1295 sctx->sqtt_next_event = EventCmdBlitImage;
1296
1297 /* Use a custom MSAA resolving pixel shader. */
1298 void *fs = NULL;
1299 if (!util_format_is_depth_or_stencil(info->dst.resource->format) &&
1300 !util_format_is_depth_or_stencil(info->src.resource->format) &&
1301 !util_format_is_pure_integer(info->dst.format) &&
1302 info->dst.resource->nr_samples <= 1 &&
1303 info->src.resource->nr_samples >= 2 &&
1304 !info->sample0_only &&
1305 (info->filter == PIPE_TEX_FILTER_NEAREST ||
1306 /* No scaling */
1307 (info->dst.box.width == abs(info->src.box.width) &&
1308 info->dst.box.height == abs(info->src.box.height)))) {
1309 union ac_ps_resolve_key key;
1310 key.key = 0;
1311
1312 /* LLVM is slower on GFX10.3 and older because it doesn't form VMEM clauses and it's more
1313 * difficult to force them with optimization barriers when FMASK is used.
1314 */
1315 key.use_aco = true;
1316 key.src_is_array = info->src.resource->target == PIPE_TEXTURE_1D_ARRAY ||
1317 info->src.resource->target == PIPE_TEXTURE_2D_ARRAY ||
1318 info->src.resource->target == PIPE_TEXTURE_CUBE ||
1319 info->src.resource->target == PIPE_TEXTURE_CUBE_ARRAY;
1320 key.log_samples = util_logbase2(info->src.resource->nr_samples);
1321 key.last_dst_channel = util_format_get_last_component(info->dst.format);
1322 key.last_src_channel = util_format_get_last_component(info->src.format);
1323 key.last_src_channel = MIN2(key.last_src_channel, key.last_dst_channel);
1324 key.x_clamp_to_edge = si_should_blit_clamp_to_edge(info, BITFIELD_BIT(0));
1325 key.y_clamp_to_edge = si_should_blit_clamp_to_edge(info, BITFIELD_BIT(1));
1326 key.a16 = sctx->gfx_level >= GFX9 && util_is_box_sint16(&info->dst.box) &&
1327 util_is_box_sint16(&info->src.box);
1328 unsigned max_dst_chan_size = util_format_get_max_channel_size(info->dst.format);
1329 unsigned max_src_chan_size = util_format_get_max_channel_size(info->src.format);
1330
1331 if (key.use_aco && util_format_is_float(info->dst.format) && max_dst_chan_size == 32) {
1332 /* TODO: ACO doesn't meet precision expectations of this test when the destination format
1333 * is R32G32B32A32_FLOAT, the source format is R8G8B8A8_UNORM, and the resolving math uses
1334 * FP16. It's theoretically arguable whether FP16 is legal in this case. LLVM passes
1335 * the test.
1336 *
1337 * piglit/bin/copyteximage CUBE -samples=2 -auto
1338 */
1339 key.d16 = 0;
1340 } else {
1341 /* Resolving has precision issues all the way down to R11G11B10_FLOAT. */
1342 key.d16 = ((!key.use_aco && !sctx->screen->use_aco && sctx->gfx_level >= GFX8) ||
1343 /* ACO doesn't support D16 on GFX8 */
1344 ((key.use_aco || sctx->screen->use_aco) && sctx->gfx_level >= GFX9)) &&
1345 MIN2(max_dst_chan_size, max_src_chan_size) <= 10;
1346 }
1347
1348 fs = _mesa_hash_table_u64_search(sctx->ps_resolve_shaders, key.key);
1349 if (!fs) {
1350 struct ac_ps_resolve_options options = {
1351 .nir_options = sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR,
1352 PIPE_SHADER_FRAGMENT),
1353 .info = &sctx->screen->info,
1354 .use_aco = sctx->screen->use_aco,
1355 .no_fmask = sctx->screen->debug_flags & DBG(NO_FMASK),
1356 .print_key = si_can_dump_shader(sctx->screen, MESA_SHADER_FRAGMENT, SI_DUMP_SHADER_KEY),
1357 };
1358
1359 fs = si_create_shader_state(sctx, ac_create_resolve_ps(&options, &key));
1360 _mesa_hash_table_u64_insert(sctx->ps_resolve_shaders, key.key, fs);
1361 }
1362 }
1363
1364 si_blitter_begin(sctx, SI_BLIT | (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
1365 util_blitter_blit(sctx->blitter, info, fs);
1366 si_blitter_end(sctx);
1367 }
1368
si_generate_mipmap(struct pipe_context * ctx,struct pipe_resource * tex,enum pipe_format format,unsigned base_level,unsigned last_level,unsigned first_layer,unsigned last_layer)1369 static bool si_generate_mipmap(struct pipe_context *ctx, struct pipe_resource *tex,
1370 enum pipe_format format, unsigned base_level, unsigned last_level,
1371 unsigned first_layer, unsigned last_layer)
1372 {
1373 struct si_context *sctx = (struct si_context *)ctx;
1374 struct si_texture *stex = (struct si_texture *)tex;
1375
1376 if (!util_blitter_is_copy_supported(sctx->blitter, tex, tex))
1377 return false;
1378
1379 /* The driver doesn't decompress resources automatically while
1380 * u_blitter is rendering. */
1381 vi_disable_dcc_if_incompatible_format(sctx, tex, base_level, format);
1382 si_decompress_subresource(ctx, tex, PIPE_MASK_RGBAZS, base_level, first_layer, last_layer,
1383 false);
1384
1385 /* Clear dirty_level_mask for the levels that will be overwritten. */
1386 assert(base_level < last_level);
1387 stex->dirty_level_mask &= ~u_bit_consecutive(base_level + 1, last_level - base_level);
1388
1389 sctx->generate_mipmap_for_depth = stex->is_depth;
1390
1391 si_blitter_begin(sctx, SI_BLIT | SI_DISABLE_RENDER_COND);
1392 util_blitter_generate_mipmap(sctx->blitter, tex, format, base_level, last_level, first_layer,
1393 last_layer);
1394 si_blitter_end(sctx);
1395
1396 sctx->generate_mipmap_for_depth = false;
1397 return true;
1398 }
1399
si_flush_resource(struct pipe_context * ctx,struct pipe_resource * res)1400 static void si_flush_resource(struct pipe_context *ctx, struct pipe_resource *res)
1401 {
1402 struct si_context *sctx = (struct si_context *)ctx;
1403 struct si_texture *tex = (struct si_texture *)res;
1404
1405 if (sctx->gfx_level >= GFX12 || res->target == PIPE_BUFFER)
1406 return;
1407
1408 if (!tex->is_depth && (tex->cmask_buffer || vi_dcc_enabled(tex, 0))) {
1409 si_blit_decompress_color(sctx, tex, 0, res->last_level, 0, util_max_layer(res, 0),
1410 false, false);
1411
1412 if (tex->surface.display_dcc_offset && tex->displayable_dcc_dirty) {
1413 si_retile_dcc(sctx, tex);
1414 tex->displayable_dcc_dirty = false;
1415 }
1416 }
1417 }
1418
si_flush_implicit_resources(struct si_context * sctx)1419 void si_flush_implicit_resources(struct si_context *sctx)
1420 {
1421 assert(sctx->gfx_level < GFX12);
1422
1423 hash_table_foreach(sctx->dirty_implicit_resources, entry) {
1424 si_flush_resource(&sctx->b, entry->data);
1425 pipe_resource_reference((struct pipe_resource **)&entry->data, NULL);
1426 }
1427 _mesa_hash_table_clear(sctx->dirty_implicit_resources, NULL);
1428 }
1429
si_decompress_dcc(struct si_context * sctx,struct si_texture * tex)1430 void si_decompress_dcc(struct si_context *sctx, struct si_texture *tex)
1431 {
1432 assert(sctx->gfx_level < GFX12);
1433 assert(!tex->is_depth);
1434
1435 /* If graphics is disabled, we can't decompress DCC, but it shouldn't
1436 * be compressed either. The caller should simply discard it.
1437 * If blitter is running, we can't decompress DCC either because it
1438 * will cause a blitter recursion.
1439 */
1440 if (!tex->surface.meta_offset || !sctx->has_graphics || sctx->blitter_running)
1441 return;
1442
1443 si_blit_decompress_color(sctx, tex, 0, tex->buffer.b.b.last_level, 0,
1444 util_max_layer(&tex->buffer.b.b, 0), true, false);
1445 }
1446
si_init_blit_functions(struct si_context * sctx)1447 void si_init_blit_functions(struct si_context *sctx)
1448 {
1449 sctx->b.resource_copy_region = si_resource_copy_region;
1450
1451 if (sctx->has_graphics) {
1452 sctx->b.blit = si_blit;
1453 sctx->b.flush_resource = si_flush_resource;
1454 sctx->b.generate_mipmap = si_generate_mipmap;
1455 }
1456 }
1457