xref: /aosp_15_r20/external/libopus/silk/fixed/x86/vector_ops_FIX_sse4_1.c (revision a58d3d2adb790c104798cd88c8a3aff4fa8b82cc)
1 /* Copyright (c) 2014, Cisco Systems, INC
2    Written by XiangMingZhu WeiZhou MinPeng YanWang
3 
4    Redistribution and use in source and binary forms, with or without
5    modification, are permitted provided that the following conditions
6    are met:
7 
8    - Redistributions of source code must retain the above copyright
9    notice, this list of conditions and the following disclaimer.
10 
11    - Redistributions in binary form must reproduce the above copyright
12    notice, this list of conditions and the following disclaimer in the
13    documentation and/or other materials provided with the distribution.
14 
15    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
19    OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20    EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21    PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
22    PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
23    LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
24    NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27 
28 #ifdef HAVE_CONFIG_H
29 #include "config.h"
30 #endif
31 
32 #include <xmmintrin.h>
33 #include <emmintrin.h>
34 #include <smmintrin.h>
35 #include "main.h"
36 
37 #include "SigProc_FIX.h"
38 #include "pitch.h"
39 #include "celt/x86/x86cpu.h"
40 
silk_inner_prod16_sse4_1(const opus_int16 * inVec1,const opus_int16 * inVec2,const opus_int len)41 opus_int64 silk_inner_prod16_sse4_1(
42     const opus_int16            *inVec1,            /*    I input vector 1                                              */
43     const opus_int16            *inVec2,            /*    I input vector 2                                              */
44     const opus_int              len                 /*    I vector lengths                                              */
45 )
46 {
47     opus_int  i, dataSize4;
48     opus_int64 sum;
49 
50     __m128i xmm_prod_20, xmm_prod_31;
51     __m128i inVec1_3210, acc1;
52     __m128i inVec2_3210, acc2;
53 
54     sum = 0;
55     dataSize4 = len & ~3;
56 
57     acc1 = _mm_setzero_si128();
58     acc2 = _mm_setzero_si128();
59 
60     for( i = 0; i < dataSize4; i += 4 ) {
61         inVec1_3210 = OP_CVTEPI16_EPI32_M64( &inVec1[i + 0] );
62         inVec2_3210 = OP_CVTEPI16_EPI32_M64( &inVec2[i + 0] );
63         xmm_prod_20 = _mm_mul_epi32( inVec1_3210, inVec2_3210 );
64 
65         inVec1_3210 = _mm_shuffle_epi32( inVec1_3210, _MM_SHUFFLE( 0, 3, 2, 1 ) );
66         inVec2_3210 = _mm_shuffle_epi32( inVec2_3210, _MM_SHUFFLE( 0, 3, 2, 1 ) );
67         xmm_prod_31 = _mm_mul_epi32( inVec1_3210, inVec2_3210 );
68 
69         acc1 = _mm_add_epi64( acc1, xmm_prod_20 );
70         acc2 = _mm_add_epi64( acc2, xmm_prod_31 );
71     }
72 
73     acc1 = _mm_add_epi64( acc1, acc2 );
74 
75     /* equal shift right 8 bytes */
76     acc2 = _mm_shuffle_epi32( acc1, _MM_SHUFFLE( 0, 0, 3, 2 ) );
77     acc1 = _mm_add_epi64( acc1, acc2 );
78 
79     _mm_storel_epi64( (__m128i *)&sum, acc1 );
80 
81     for( ; i < len; i++ ) {
82         sum = silk_SMLALBB( sum, inVec1[ i ], inVec2[ i ] );
83     }
84 
85 #ifdef OPUS_CHECK_ASM
86     {
87         opus_int64 sum_c = silk_inner_prod16_c( inVec1, inVec2, len );
88         silk_assert( sum == sum_c );
89     }
90 #endif
91 
92     return sum;
93 }
94