1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <arch/io.h> 4 #include <device/pci_def.h> 5 #include <device/pci_ops.h> 6 #include <device/smbus_host.h> 7 #include <device/pci_type.h> 8 #include <intelblocks/smbus.h> 9 #include <soc/pci_devs.h> 10 #include <stdint.h> 11 12 #include "smbuslib.h" 13 smbus_common_init(void)14void smbus_common_init(void) 15 { 16 const pci_devfn_t dev = PCH_DEV_SMBUS; 17 18 /* Set SMBus I/O base address */ 19 pci_write_config32(dev, PCI_BASE_ADDRESS_4, SMBUS_IO_BASE); 20 /* Set SMBus enable */ 21 pci_write_config8(dev, HOSTC, HST_EN); 22 /* Enable I/O access */ 23 pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); 24 /* Disable interrupts */ 25 outb(0, SMBUS_IO_BASE + SMBHSTCTL); 26 /* Clear errors */ 27 outb(0xff, SMBUS_IO_BASE + SMBHSTSTAT); 28 } 29 smbus_base(void)30uintptr_t smbus_base(void) 31 { 32 return SMBUS_IO_BASE; 33 } 34