1 /*
2 * Copyright (c) 2022 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #pragma once
26
27 #ifdef __ARM_FEATURE_SVE
28
29
30 namespace {
31
sme_transpose_interleave_16VL_2x2(uint16_t * out,const uint16_t * in,size_t width,size_t in_stride,size_t height)32 void sme_transpose_interleave_16VL_2x2(uint16_t *out, const uint16_t *in, size_t width, size_t in_stride, size_t height)
33 {
34 uint16_t *pad_row = reinterpret_cast<uint16_t *>(alloca(width * sizeof(uint16_t)));
35
36 if (height % 2) {
37 memset(pad_row, 0, width * sizeof(uint16_t));
38 }
39
40 size_t out_stride = 16 * roundup<size_t>(height, 2) * sme::get_vector_length<uint16_t>();
41
42 __asm__ __volatile__(
43 ".inst 0xd503477f // SMSTART ZA\n"
44 "ptrue p5.b\n"
45 "1:" // Main row loop: Head
46 "mov x23, %x[in]\n"
47 "add x22, x23, %x[in_stride]\n"
48 "cmp %x[height], #0x1\n"
49 "add %x[in], x22, %x[in_stride]\n"
50 "mov x21, %x[out]\n"
51 "csel x22, x22, %x[pad_row], GT\n"
52 "sub %x[height], %x[height], #0x2\n"
53 "mov x20, %x[width]\n"
54 "2:" // Main row loop: Column loop
55 "mov x19, x20\n"
56 "whilelt p2.h, XZR, x19\n"
57 "ld1h { z17.h }, p2/Z, [x23]\n"
58 "dech x19\n"
59 "whilelt p1.h, XZR, x19\n"
60 "ld1h { z19.h }, p1/Z, [x23, #1, MUL VL]\n"
61 "dech x19\n"
62 "whilelt p0.h, XZR, x19\n"
63 "ld1h { z21.h }, p0/Z, [x23, #2, MUL VL]\n"
64 "dech x19\n"
65 "whilelt p4.h, XZR, x19\n"
66 "ld1h { z20.h }, p4/Z, [x23, #3, MUL VL]\n"
67 "dech x19\n"
68 "whilelt p3.h, XZR, x19\n"
69 "ld1h { z16.h }, p2/Z, [x22]\n"
70 "zip1 z0.h, z17.h, z16.h\n"
71 "dech x19\n"
72 "whilelt p2.h, XZR, x19\n"
73 "ld1h { z18.h }, p1/Z, [x22, #1, MUL VL]\n"
74 "zip2 z31.h, z17.h, z16.h\n"
75 "dech x19\n"
76 "whilelt p1.h, XZR, x19\n"
77 "ld1h { z17.h }, p0/Z, [x22, #2, MUL VL]\n"
78 "zip1 z30.h, z19.h, z18.h\n"
79 "dech x19\n"
80 "whilelt p0.h, XZR, x19\n"
81 "ld1h { z16.h }, p4/Z, [x22, #3, MUL VL]\n"
82 "zip2 z29.h, z19.h, z18.h\n"
83 "ld1h { z19.h }, p3/Z, [x23, #4, MUL VL]\n"
84 "mov x19, x21\n"
85 "decw x20, ALL, MUL #16\n"
86 "zip1 z28.h, z21.h, z17.h\n"
87 "ld1h { z18.h }, p2/Z, [x23, #5, MUL VL]\n"
88 "zip2 z27.h, z21.h, z17.h\n"
89 "zip1 z26.h, z20.h, z16.h\n"
90 "cmp x20, #0x0\n"
91 "ld1h { z17.h }, p1/Z, [x23, #6, MUL VL]\n"
92 "zip2 z25.h, z20.h, z16.h\n"
93 "add x21, x21, %x[out_stride]\n"
94 "ld1h { z24.h }, p0/Z, [x23, #7, MUL VL]\n"
95 "addvl x23, x23, #8\n"
96 "ld1h { z16.h }, p3/Z, [x22, #4, MUL VL]\n"
97 "zip1 z23.h, z19.h, z16.h\n"
98 "zip2 z22.h, z19.h, z16.h\n"
99 "ld1h { z16.h }, p2/Z, [x22, #5, MUL VL]\n"
100 "zip1 z21.h, z18.h, z16.h\n"
101 "zip2 z20.h, z18.h, z16.h\n"
102 "ld1h { z16.h }, p1/Z, [x22, #6, MUL VL]\n"
103 "zip1 z19.h, z17.h, z16.h\n"
104 "zip2 z18.h, z17.h, z16.h\n"
105 "ld1h { z16.h }, p0/Z, [x22, #7, MUL VL]\n"
106 "st1h { z0.h }, p5, [x19]\n"
107 "addvl x22, x22, #8\n"
108 "zip1 z17.h, z24.h, z16.h\n"
109 "st1h { z31.h }, p5, [x19, #1, MUL VL]\n"
110 "zip2 z16.h, z24.h, z16.h\n"
111 "st1h { z30.h }, p5, [x19, #2, MUL VL]\n"
112 "st1h { z29.h }, p5, [x19, #3, MUL VL]\n"
113 "st1h { z28.h }, p5, [x19, #4, MUL VL]\n"
114 "st1h { z27.h }, p5, [x19, #5, MUL VL]\n"
115 "st1h { z26.h }, p5, [x19, #6, MUL VL]\n"
116 "st1h { z25.h }, p5, [x19, #7, MUL VL]\n"
117 "addvl x19, x19, #16\n"
118 "st1h { z23.h }, p5, [x19, #-8, MUL VL]\n"
119 "st1h { z22.h }, p5, [x19, #-7, MUL VL]\n"
120 "st1h { z21.h }, p5, [x19, #-6, MUL VL]\n"
121 "st1h { z20.h }, p5, [x19, #-5, MUL VL]\n"
122 "st1h { z19.h }, p5, [x19, #-4, MUL VL]\n"
123 "st1h { z18.h }, p5, [x19, #-3, MUL VL]\n"
124 "st1h { z17.h }, p5, [x19, #-2, MUL VL]\n"
125 "st1h { z16.h }, p5, [x19, #-1, MUL VL]\n"
126 "bgt 2b\n"
127 "3:" // Main row loop: Column loop skip
128 "cmp %x[height], #0x1\n"
129 "addvl %x[out], %x[out], #16\n"
130 "bge 1b\n"
131 ".inst 0xd503467f // SMSTOP\n"
132 : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out)
133 : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [pad_row] "r" (pad_row), [width] "r" (width)
134 : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
135 );
136 }
137
138 } // anonymous namespace
139
140 template<>
Transform(bfloat16 * out,const bfloat16 * in,int stride,int x0,int xmax,int k0,int kmax)141 void Transform<16, 2, true, VLType::SME>(
142 bfloat16 *out, const bfloat16 *in, int stride, int x0, int xmax, int k0, int kmax)
143 {
144 sme_transpose_interleave_16VL_2x2(
145 reinterpret_cast<uint16_t *>(out),
146 reinterpret_cast<const uint16_t *>(in + k0 * stride + x0),
147 (xmax-x0) * sizeof(bfloat16) / 2,
148 stride * sizeof(bfloat16),
149 (kmax-k0)
150 );
151 }
152
153 #endif // __ARM_FEATURE_SVE
154