1 /*
2 * Copyright (c) 2022 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #pragma once
26
27 #ifdef __ARM_FEATURE_SVE
28
29
30 namespace {
31
sme_transpose_interleave_4VL_2x2(uint16_t * out,const uint16_t * in,size_t width,size_t in_stride,size_t height)32 void sme_transpose_interleave_4VL_2x2(uint16_t *out, const uint16_t *in, size_t width, size_t in_stride, size_t height)
33 {
34 uint16_t *pad_row = reinterpret_cast<uint16_t *>(alloca(width * sizeof(uint16_t)));
35
36 if (height % 2) {
37 memset(pad_row, 0, width * sizeof(uint16_t));
38 }
39
40 size_t out_stride = 4 * roundup<size_t>(height, 2) * sme::get_vector_length<uint16_t>();
41
42 __asm__ __volatile__(
43 ".inst 0xd503477f // SMSTART ZA\n"
44 "cmp %x[height], #0x4\n"
45 "ptrue p2.b\n"
46 "blt 4f\n"
47 "1:" // Main row loop: Head
48 "mov x25, %x[in]\n"
49 "add x24, x25, %x[in_stride]\n"
50 "add x23, x24, %x[in_stride]\n"
51 "add x22, x23, %x[in_stride]\n"
52 "add %x[in], x22, %x[in_stride]\n"
53 "mov x21, %x[out]\n"
54 "sub %x[height], %x[height], #0x4\n"
55 "mov x20, %x[width]\n"
56 "2:" // Main row loop: Column loop
57 "mov x19, x20\n"
58 "whilelt p1.h, XZR, x19\n"
59 "ld1h { z19.h }, p1/Z, [x25]\n"
60 "dech x19\n"
61 "whilelt p0.h, XZR, x19\n"
62 "ld1h { z18.h }, p0/Z, [x25, #1, MUL VL]\n"
63 "ld1h { z17.h }, p1/Z, [x24]\n"
64 "decw x20, ALL, MUL #4\n"
65 "cmp x20, #0x0\n"
66 "zip1 z24.h, z19.h, z17.h\n"
67 "ld1h { z16.h }, p0/Z, [x24, #1, MUL VL]\n"
68 "addvl x25, x25, #2\n"
69 "addvl x24, x24, #2\n"
70 "zip2 z23.h, z19.h, z17.h\n"
71 "ld1h { z17.h }, p1/Z, [x23]\n"
72 "zip1 z22.h, z18.h, z16.h\n"
73 "zip2 z21.h, z18.h, z16.h\n"
74 "ld1h { z20.h }, p0/Z, [x23, #1, MUL VL]\n"
75 "addvl x23, x23, #2\n"
76 "ld1h { z16.h }, p1/Z, [x22]\n"
77 "zip1 z19.h, z17.h, z16.h\n"
78 "zip2 z18.h, z17.h, z16.h\n"
79 "ld1h { z16.h }, p0/Z, [x22, #1, MUL VL]\n"
80 "addvl x22, x22, #2\n"
81 "zip1 z17.h, z20.h, z16.h\n"
82 "zip2 z16.h, z20.h, z16.h\n"
83 "st1h { z24.h }, p2, [x21]\n"
84 "st1h { z23.h }, p2, [x21, #1, MUL VL]\n"
85 "st1h { z22.h }, p2, [x21, #2, MUL VL]\n"
86 "st1h { z21.h }, p2, [x21, #3, MUL VL]\n"
87 "st1h { z19.h }, p2, [x21, #4, MUL VL]\n"
88 "st1h { z18.h }, p2, [x21, #5, MUL VL]\n"
89 "st1h { z17.h }, p2, [x21, #6, MUL VL]\n"
90 "st1h { z16.h }, p2, [x21, #7, MUL VL]\n"
91 "add x21, x21, %x[out_stride]\n"
92 "bgt 2b\n"
93 "3:" // Main row loop: Column loop skip
94 "cmp %x[height], #0x4\n"
95 "addvl %x[out], %x[out], #8\n"
96 "bge 1b\n"
97 "cbz %x[height], 8f\n"
98 "4:" // Main loop skip
99 "5:" // Tail row loop: Head
100 "mov x25, %x[in]\n"
101 "add x24, x25, %x[in_stride]\n"
102 "cmp %x[height], #0x1\n"
103 "add %x[in], x24, %x[in_stride]\n"
104 "mov x21, %x[out]\n"
105 "csel x24, x24, %x[pad_row], GT\n"
106 "sub %x[height], %x[height], #0x2\n"
107 "mov x20, %x[width]\n"
108 "6:" // Tail row loop: Column loop
109 "mov x19, x20\n"
110 "whilelt p1.h, XZR, x19\n"
111 "ld1h { z18.h }, p1/Z, [x25]\n"
112 "dech x19\n"
113 "whilelt p0.h, XZR, x19\n"
114 "ld1h { z20.h }, p0/Z, [x25, #1, MUL VL]\n"
115 "ld1h { z17.h }, p1/Z, [x24]\n"
116 "decw x20, ALL, MUL #4\n"
117 "cmp x20, #0x0\n"
118 "zip1 z19.h, z18.h, z17.h\n"
119 "ld1h { z16.h }, p0/Z, [x24, #1, MUL VL]\n"
120 "addvl x25, x25, #2\n"
121 "addvl x24, x24, #2\n"
122 "zip2 z18.h, z18.h, z17.h\n"
123 "zip1 z17.h, z20.h, z16.h\n"
124 "zip2 z16.h, z20.h, z16.h\n"
125 "st1h { z19.h }, p2, [x21]\n"
126 "st1h { z18.h }, p2, [x21, #1, MUL VL]\n"
127 "st1h { z17.h }, p2, [x21, #2, MUL VL]\n"
128 "st1h { z16.h }, p2, [x21, #3, MUL VL]\n"
129 "add x21, x21, %x[out_stride]\n"
130 "bgt 6b\n"
131 "7:" // Tail row loop: Column loop skip
132 "cmp %x[height], #0x1\n"
133 "addvl %x[out], %x[out], #4\n"
134 "bge 5b\n"
135 "8:" // Done
136 ".inst 0xd503467f // SMSTOP\n"
137 : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out)
138 : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [pad_row] "r" (pad_row), [width] "r" (width)
139 : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
140 );
141 }
142
143 } // anonymous namespace
144
145 template<>
Transform(bfloat16 * out,const bfloat16 * in,int stride,int x0,int xmax,int k0,int kmax)146 void Transform<4, 2, true, VLType::SME>(
147 bfloat16 *out, const bfloat16 *in, int stride, int x0, int xmax, int k0, int kmax)
148 {
149 sme_transpose_interleave_4VL_2x2(
150 reinterpret_cast<uint16_t *>(out),
151 reinterpret_cast<const uint16_t *>(in + k0 * stride + x0),
152 (xmax-x0) * sizeof(bfloat16) / 2,
153 stride * sizeof(bfloat16),
154 (kmax-k0)
155 );
156 }
157
158 #endif
159