xref: /aosp_15_r20/external/coreboot/src/soc/qualcomm/sc7280/include/soc/display/edp_aux.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _EDP_AUX_H
4 #define _EDP_AUX_H
5 
6 #include <types.h>
7 
8 #define DP_AUX_I2C_WRITE		0x0
9 #define DP_AUX_I2C_READ			0x1
10 #define DP_AUX_I2C_STATUS		0x2
11 #define DP_AUX_I2C_MOT			0x4
12 #define DP_AUX_NATIVE_WRITE		0x8
13 #define DP_AUX_NATIVE_READ		0x9
14 #define REG_EDP_AUX_CTRL			(0x00000030)
15 #define EDP_AUX_CTRL_ENABLE			(0x00000001)
16 #define EDP_AUX_CTRL_RESET			(0x00000002)
17 
18 #define REG_EDP_AUX_DATA			(0x00000034)
19 #define EDP_AUX_DATA_READ			(0x00000001)
20 #define EDP_AUX_DATA_DATA__MASK			(0x0000ff00)
21 #define EDP_AUX_DATA_DATA__SHIFT		(8)
22 
23 #define EDP_AUX_DATA_INDEX__MASK		(0x00ff0000)
24 #define EDP_AUX_DATA_INDEX__SHIFT		(16)
25 
26 #define EDP_AUX_DATA_INDEX_WRITE		(0x80000000)
27 
28 #define REG_EDP_AUX_TRANS_CTRL			(0x00000038)
29 #define EDP_AUX_TRANS_CTRL_I2C			(0x00000100)
30 #define EDP_AUX_TRANS_CTRL_GO			(0x00000200)
31 #define EDP_AUX_TRANS_CTRL_NO_SEND_ADDR		(0x00000400)
32 #define EDP_AUX_TRANS_CTRL_NO_SEND_STOP		(0x00000800)
33 
34 #define REG_EDP_TIMEOUT_COUNT			(0x0000003C)
35 #define REG_EDP_AUX_LIMITS			(0x00000040)
36 #define REG_EDP_AUX_STATUS			(0x00000044)
37 #define AUX_CMD_READ				(BIT(4))
38 
39 enum {
40 	EDID_LENGTH = 128,
41 	EDID_I2C_ADDR = 0x50,
42 	EDID_EXTENSION_FLAG = 0x7e,
43 };
44 
EDP_AUX_DATA_DATA(uint32_t val)45 static inline uint32_t EDP_AUX_DATA_DATA(uint32_t val)
46 {
47 	return ((val) << EDP_AUX_DATA_DATA__SHIFT) & EDP_AUX_DATA_DATA__MASK;
48 }
49 
EDP_AUX_DATA_INDEX(uint32_t val)50 static inline uint32_t EDP_AUX_DATA_INDEX(uint32_t val)
51 {
52 	return ((val) << EDP_AUX_DATA_INDEX__SHIFT) & EDP_AUX_DATA_INDEX__MASK;
53 }
54 
55 void edp_aux_ctrl(int enable);
56 int edp_read_edid(struct edid *out);
57 ssize_t edp_aux_transfer(unsigned int address, u8 request, void *buffer, size_t size);
58 
59 #endif
60