1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef __SOC_MEDIATEK_MT6359P_H__ 4 #define __SOC_MEDIATEK_MT6359P_H__ 5 6 #include <types.h> 7 8 enum { 9 PMIC_HWCID = 0x0008, 10 PMIC_SWCID = 0x000a, 11 PMIC_TOP_CKPDN_CON0 = 0x010c, 12 PMIC_TOP_CKHWEN_CON0 = 0x012a, 13 PMIC_TOP_RST_MISC_SET = 0x014c, 14 PMIC_TOP_RST_MISC_CLR = 0x014e, 15 PMIC_OTP_CON0 = 0x038a, 16 PMIC_OTP_CON8 = 0x039a, 17 PMIC_OTP_CON11 = 0x03a0, 18 PMIC_OTP_CON12 = 0x03a2, 19 PMIC_OTP_CON13 = 0x03a4, 20 PMIC_PWRHOLD = 0x0a08, 21 PMIC_VCORE_DBG0 = 0x1526, 22 PMIC_VCORE_ELR0 = 0x152c, 23 PMIC_VGPU11_DBG0 = 0x15a6, 24 PMIC_VGPU11_ELR0 = 0x15b4, 25 PMIC_VS2_VOTER = 0x18aa, 26 PMIC_VS2_VOTER_CFG = 0x18b0, 27 PMIC_VS2_ELR0 = 0x18b4, 28 PMIC_VPA_CON0 = 0x1908, 29 PMIC_VPA_CON1 = 0x190e, 30 PMIC_VPA_DBG0 = 0x1914, 31 PMIC_BUCK_VPA_DLC_CON0 = 0x1918, 32 PMIC_BUCK_VPA_DLC_CON1 = 0x191a, 33 PMIC_VSIM1_CON0 = 0x1cd0, 34 PMIC_VSRAM_PROC1_ELR = 0x1b44, 35 PMIC_VSRAM_PROC2_ELR = 0x1b46, 36 PMIC_VM18_CON0 = 0x1d88, 37 PMIC_VSRAM_PROC1_VOSEL1 = 0x1e90, 38 PMIC_VSRAM_PROC2_VOSEL1 = 0x1eb0, 39 PMIC_VSIM1_ANA_CON0 = 0x1fa2, 40 PMIC_VM18_ANA_CON0 = 0x2020, 41 }; 42 43 struct pmic_setting { 44 unsigned short addr; 45 unsigned short val; 46 unsigned short mask; 47 unsigned char shift; 48 }; 49 50 struct pmic_efuse { 51 unsigned short efuse_bit; 52 unsigned short addr; 53 unsigned short mask; 54 unsigned char shift; 55 }; 56 57 enum { 58 MT6359P_GPU11 = 0, 59 MT6359P_SRAM_PROC1, 60 MT6359P_SRAM_PROC2, 61 MT6359P_CORE, 62 MT6359P_PA, 63 MT6359P_SIM1, 64 MT6359P_VM18, 65 MT6359P_MAX, 66 }; 67 68 #define VSIM1_VOL_REG_SHIFT 8 69 #define VSIM1_VOL_OFFSET_1 1400 70 #define VSIM1_VOL_OFFSET_2 1900 71 72 #define VM18_VOL_REG_SHIFT 8 73 #define VM18_VOL_OFFSET 600 74 75 #define EFUSE_WAIT_US 5000 76 #define EFUSE_BUSY 1 77 78 #define EFUSE_RG_VPA_OC_FT 78 79 80 void mt6359p_init(void); 81 void mt6359p_buck_set_voltage(u32 buck_id, u32 buck_uv); 82 u32 mt6359p_buck_get_voltage(u32 buck_id); 83 void mt6359p_set_vm18_voltage(u32 vm18_uv); 84 u32 mt6359p_get_vm18_voltage(void); 85 void mt6359p_set_vsim1_voltage(u32 vsim1_uv); 86 u32 mt6359p_get_vsim1_voltage(void); 87 void mt6359p_enable_vpa(bool enable); 88 void mt6359p_enable_vsim1(bool enable); 89 void mt6359p_enable_vm18(bool enable); 90 void mt6359p_init_pmif_arb(void); 91 void mt6359p_write_field(u32 reg, u32 val, u32 mask, u32 shift); 92 void pmic_init_setting(void); 93 void pmic_lp_setting(void); 94 #endif /* __SOC_MEDIATEK_MT6359P_H__ */ 95