xref: /aosp_15_r20/external/coreboot/src/soc/nvidia/tegra210/include/soc/secure_boot.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _TEGRA210_SECURE_BOOT_H_
4 #define _TEGRA210_SECURE_BOOT_H_
5 
6 struct tegra_secure_boot {
7 	u32 sb_csr;		/* offset 0x00 */
8 	u32 sb_pirom_start;	/* offset 0x04 */
9 	u32 sb_pfcfg;		/* offset 0x08 */
10 	u32 sb_secure_spare_0;	/* offset 0x0c */
11 	u32 sb_secure_spare_1;	/* offset 0x10 */
12 	u32 sb_secure_spare_2;	/* offset 0x14 */
13 	u32 sb_secure_spare_3;	/* offset 0x18 */
14 	u32 sb_secure_spare_4;	/* offset 0x1c */
15 	u32 sb_secure_spare_5;	/* offset 0x20 */
16 	u32 sb_secure_spare_6;	/* offset 0x24 */
17 	u32 sb_secure_spare_7;	/* offset 0x28 */
18 	u32 rsvd;		/* offset 0x2c */
19 	u32 sb_aa64_reset_low;	/* offset 0x30 */
20 	u32 sb_aa64_reset_high;	/* offset 0x3c */
21 };
22 
23 #endif	/* _TEGRA210_SECURE_BOOT_H_ */
24