xref: /aosp_15_r20/external/coreboot/src/southbridge/intel/common/spi.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 
2 /* SPDX-License-Identifier: GPL-2.0-only */
3 
4 #ifndef SOUTHBRIDGE_INTEL_SPI_H
5 #define SOUTHBRIDGE_INTEL_SPI_H
6 
7 enum optype {
8 	READ_NO_ADDR = 0,
9 	WRITE_NO_ADDR = 1,
10 	READ_WITH_ADDR = 2,
11 	WRITE_WITH_ADDR = 3
12 };
13 
14 struct intel_spi_op {
15 	u8 op;
16 	enum optype type;
17 };
18 
19 struct intel_swseq_spi_config {
20 	u8 opprefixes[2];
21 	struct intel_spi_op ops[8];
22 };
23 
24 void spi_finalize_ops(void);
25 void intel_southbridge_override_spi(struct intel_swseq_spi_config *spi_config);
26 
27 #endif
28