1 /*
2 * Copyright (c) 2022 Samsung Electronics Co., Ltd.
3 * All Rights Reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * - Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * - Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * - Neither the name of the copyright owner, nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "oapv_sad_avx.h"
33
34 #if X86_SSE
35
ssd_16b_sse_8x8_avx(int w,int h,void * src1,void * src2,int s_src1,int s_src2,int bit_depth)36 static s64 ssd_16b_sse_8x8_avx(int w, int h, void* src1, void* src2, int s_src1, int s_src2, int bit_depth)
37 {
38 s16* s1 = (s16*)src1;
39 s16* s2 = (s16*)src2;
40 int t[8] = { 0 };
41 __m256i sum = _mm256_setzero_si256();
42 __m256i v1, v2;
43
44 for (int i = 0; i < 64; i += 8)
45 {
46 v1 = _mm256_loadu_si256((const __m256i*)(s1 + i));
47 v2 = _mm256_loadu_si256((const __m256i*)(s2 + i));
48 v2 = _mm256_sub_epi16(v1, v2);
49 v2 = _mm256_madd_epi16(v2, v2);
50 sum = _mm256_add_epi32(sum, v2);
51 _mm256_storeu_si256((__m256i*)(t), sum);
52 }
53 return t[0] + t[1] + t[2] + t[3];
54 }
55
56 const oapv_fn_ssd_t oapv_tbl_fn_ssd_16b_avx[2] =
57 {
58 ssd_16b_sse_8x8_avx,
59 NULL
60 };
61
62 #endif