1 /* Copyright 2022 Advanced Micro Devices, Inc. 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the "Software"), 5 * to deal in the Software without restriction, including without limitation 6 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 * and/or sell copies of the Software, and to permit persons to whom the 8 * Software is furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 * OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * Authors: AMD 22 * 23 */ 24 #pragma once 25 26 #include "opp.h" 27 #include "reg_helper.h" 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 #define OPP_REG_LIST_VPE10_COMMON(id) \ 34 SRIDFVL(VPFMT_CLAMP_COMPONENT_R, VPFMT, id), \ 35 SRIDFVL(VPFMT_CLAMP_COMPONENT_G, VPFMT, id), \ 36 SRIDFVL(VPFMT_CLAMP_COMPONENT_B, VPFMT, id), \ 37 SRIDFVL(VPFMT_DYNAMIC_EXP_CNTL, VPFMT, id), \ 38 SRIDFVL(VPFMT_CONTROL, VPFMT, id), \ 39 SRIDFVL(VPFMT_BIT_DEPTH_CONTROL, VPFMT, id), \ 40 SRIDFVL(VPFMT_DITHER_RAND_R_SEED, VPFMT, id), \ 41 SRIDFVL(VPFMT_DITHER_RAND_G_SEED, VPFMT, id), \ 42 SRIDFVL(VPFMT_DITHER_RAND_B_SEED, VPFMT, id), \ 43 SRIDFVL(VPFMT_CLAMP_CNTL, VPFMT, id), \ 44 SRIDFVL(VPOPP_PIPE_CONTROL, VPOPP_PIPE, id) 45 46 47 #define OPP_REG_LIST_VPE10(id) \ 48 OPP_REG_LIST_VPE10_COMMON(id), \ 49 SRIDFVL(VPOPP_TOP_CLK_CONTROL, VPOPP_TOP, id), \ 50 SRIDFVL(VPOPP_PIPE_CRC_CONTROL, VPOPP_PIPE_CRC, id) 51 52 #define OPP_FIELD_LIST_VPE10_COMMON(post_fix) \ 53 SFRB(VPFMT_CLAMP_LOWER_R, VPFMT_CLAMP_COMPONENT_R, post_fix), \ 54 SFRB(VPFMT_CLAMP_UPPER_R, VPFMT_CLAMP_COMPONENT_R, post_fix), \ 55 SFRB(VPFMT_CLAMP_LOWER_G, VPFMT_CLAMP_COMPONENT_G, post_fix), \ 56 SFRB(VPFMT_CLAMP_UPPER_G, VPFMT_CLAMP_COMPONENT_G, post_fix), \ 57 SFRB(VPFMT_CLAMP_LOWER_B, VPFMT_CLAMP_COMPONENT_B, post_fix), \ 58 SFRB(VPFMT_CLAMP_UPPER_B, VPFMT_CLAMP_COMPONENT_B, post_fix), \ 59 SFRB(VPFMT_DYNAMIC_EXP_EN, VPFMT_DYNAMIC_EXP_CNTL, post_fix), \ 60 SFRB(VPFMT_DYNAMIC_EXP_MODE, VPFMT_DYNAMIC_EXP_CNTL, post_fix), \ 61 SFRB(VPFMT_SPATIAL_DITHER_FRAME_COUNTER_MAX, VPFMT_CONTROL, post_fix), \ 62 SFRB(VPFMT_SPATIAL_DITHER_FRAME_COUNTER_BIT_SWAP, VPFMT_CONTROL, post_fix), \ 63 SFRB(VPFMT_CBCR_BIT_REDUCTION_BYPASS, VPFMT_CONTROL, post_fix), \ 64 SFRB(VPFMT_DOUBLE_BUFFER_REG_UPDATE_PENDING, VPFMT_CONTROL, post_fix), \ 65 SFRB(VPFMT_TRUNCATE_EN, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 66 SFRB(VPFMT_TRUNCATE_MODE, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 67 SFRB(VPFMT_TRUNCATE_DEPTH, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 68 SFRB(VPFMT_SPATIAL_DITHER_EN, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 69 SFRB(VPFMT_SPATIAL_DITHER_MODE, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 70 SFRB(VPFMT_SPATIAL_DITHER_DEPTH, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 71 SFRB(VPFMT_FRAME_RANDOM_ENABLE, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 72 SFRB(VPFMT_RGB_RANDOM_ENABLE, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 73 SFRB(VPFMT_HIGHPASS_RANDOM_ENABLE, VPFMT_BIT_DEPTH_CONTROL, post_fix), \ 74 SFRB(VPFMT_RAND_R_SEED, VPFMT_DITHER_RAND_R_SEED, post_fix), \ 75 SFRB(VPFMT_OFFSET_R_CR, VPFMT_DITHER_RAND_R_SEED, post_fix), \ 76 SFRB(VPFMT_RAND_G_SEED, VPFMT_DITHER_RAND_G_SEED, post_fix), \ 77 SFRB(VPFMT_OFFSET_G_Y, VPFMT_DITHER_RAND_G_SEED, post_fix), \ 78 SFRB(VPFMT_RAND_B_SEED, VPFMT_DITHER_RAND_B_SEED, post_fix), \ 79 SFRB(VPFMT_OFFSET_B_CB, VPFMT_DITHER_RAND_B_SEED, post_fix), \ 80 SFRB(VPFMT_CLAMP_DATA_EN, VPFMT_CLAMP_CNTL, post_fix), \ 81 SFRB(VPFMT_CLAMP_COLOR_FORMAT, VPFMT_CLAMP_CNTL, post_fix), \ 82 SFRB(VPOPP_PIPE_CLOCK_ON, VPOPP_PIPE_CONTROL, post_fix), \ 83 SFRB(VPOPP_PIPE_DIGITAL_BYPASS_EN, VPOPP_PIPE_CONTROL, post_fix), \ 84 SFRB(VPOPP_PIPE_ALPHA, VPOPP_PIPE_CONTROL, post_fix), \ 85 SFRB(VPOPP_VPECLK_R_GATE_DIS, VPOPP_TOP_CLK_CONTROL, post_fix), \ 86 SFRB(VPOPP_VPECLK_G_GATE_DIS, VPOPP_TOP_CLK_CONTROL, post_fix) 87 88 #define OPP_FIELD_LIST_VPE10(post_fix) \ 89 OPP_FIELD_LIST_VPE10_COMMON(post_fix), \ 90 SFRB(VPOPP_PIPE_CRC_EN, VPOPP_PIPE_CRC_CONTROL, post_fix), \ 91 SFRB(VPOPP_PIPE_CRC_CONT_EN, VPOPP_PIPE_CRC_CONTROL, post_fix), \ 92 SFRB(VPOPP_PIPE_CRC_PIXEL_SELECT, VPOPP_PIPE_CRC_CONTROL, post_fix) 93 94 #define OPP_REG_VARIABLE_LIST_VPE10_COMMON \ 95 reg_id_val VPFMT_CLAMP_COMPONENT_R; \ 96 reg_id_val VPFMT_CLAMP_COMPONENT_G; \ 97 reg_id_val VPFMT_CLAMP_COMPONENT_B; \ 98 reg_id_val VPFMT_DYNAMIC_EXP_CNTL; \ 99 reg_id_val VPFMT_CONTROL; \ 100 reg_id_val VPFMT_BIT_DEPTH_CONTROL; \ 101 reg_id_val VPFMT_DITHER_RAND_R_SEED; \ 102 reg_id_val VPFMT_DITHER_RAND_G_SEED; \ 103 reg_id_val VPFMT_DITHER_RAND_B_SEED; \ 104 reg_id_val VPFMT_CLAMP_CNTL; \ 105 reg_id_val VPOPP_TOP_CLK_CONTROL; \ 106 reg_id_val VPOPP_PIPE_CONTROL; 107 108 109 #define OPP_REG_VARIABLE_LIST_VPE10 \ 110 OPP_REG_VARIABLE_LIST_VPE10_COMMON \ 111 reg_id_val VPOPP_PIPE_CRC_CONTROL; 112 113 #define OPP_FIELD_VARIABLE_LIST_VPE10_COMMON(type) \ 114 type VPFMT_CLAMP_LOWER_R; \ 115 type VPFMT_CLAMP_UPPER_R; \ 116 type VPFMT_CLAMP_LOWER_G; \ 117 type VPFMT_CLAMP_UPPER_G; \ 118 type VPFMT_CLAMP_LOWER_B; \ 119 type VPFMT_CLAMP_UPPER_B; \ 120 type VPFMT_DYNAMIC_EXP_EN; \ 121 type VPFMT_DYNAMIC_EXP_MODE; \ 122 type VPFMT_SPATIAL_DITHER_FRAME_COUNTER_MAX; \ 123 type VPFMT_SPATIAL_DITHER_FRAME_COUNTER_BIT_SWAP; \ 124 type VPFMT_CBCR_BIT_REDUCTION_BYPASS; \ 125 type VPFMT_DOUBLE_BUFFER_REG_UPDATE_PENDING; \ 126 type VPFMT_TRUNCATE_EN; \ 127 type VPFMT_TRUNCATE_MODE; \ 128 type VPFMT_TRUNCATE_DEPTH; \ 129 type VPFMT_SPATIAL_DITHER_EN; \ 130 type VPFMT_SPATIAL_DITHER_MODE; \ 131 type VPFMT_SPATIAL_DITHER_DEPTH; \ 132 type VPFMT_FRAME_RANDOM_ENABLE; \ 133 type VPFMT_RGB_RANDOM_ENABLE; \ 134 type VPFMT_HIGHPASS_RANDOM_ENABLE; \ 135 type VPFMT_RAND_R_SEED; \ 136 type VPFMT_OFFSET_R_CR; \ 137 type VPFMT_RAND_G_SEED; \ 138 type VPFMT_OFFSET_G_Y; \ 139 type VPFMT_RAND_B_SEED; \ 140 type VPFMT_OFFSET_B_CB; \ 141 type VPFMT_CLAMP_DATA_EN; \ 142 type VPFMT_CLAMP_COLOR_FORMAT; \ 143 type VPOPP_PIPE_CLOCK_ON; \ 144 type VPOPP_PIPE_DIGITAL_BYPASS_EN; \ 145 type VPOPP_PIPE_ALPHA; \ 146 type VPOPP_VPECLK_R_GATE_DIS; \ 147 type VPOPP_VPECLK_G_GATE_DIS; 148 149 #define OPP_FIELD_VARIABLE_LIST_VPE10(type) \ 150 OPP_FIELD_VARIABLE_LIST_VPE10_COMMON(type) \ 151 type VPOPP_PIPE_CRC_EN; \ 152 type VPOPP_PIPE_CRC_CONT_EN; \ 153 type VPOPP_PIPE_CRC_PIXEL_SELECT; 154 155 struct vpe10_opp_registers { 156 OPP_REG_VARIABLE_LIST_VPE10 157 }; 158 159 struct vpe10_opp_shift { 160 OPP_FIELD_VARIABLE_LIST_VPE10(uint8_t) 161 }; 162 163 struct vpe10_opp_mask { 164 OPP_FIELD_VARIABLE_LIST_VPE10(uint32_t) 165 }; 166 167 struct vpe10_opp { 168 struct opp base; 169 struct vpe10_opp_registers *regs; 170 const struct vpe10_opp_shift *shift; 171 const struct vpe10_opp_mask *mask; 172 }; 173 174 void vpe10_construct_opp(struct vpe_priv *vpe_priv, struct opp *opp); 175 176 enum color_depth vpe10_opp_check_color_depth(enum vpe_surface_pixel_format format); 177 178 void vpe10_opp_set_clamping( 179 struct opp *opp, const struct clamping_and_pixel_encoding_params *params); 180 181 void vpe10_opp_set_dyn_expansion(struct opp *opp, bool enable, enum color_depth color_dpth); 182 183 void vpe10_opp_set_truncation(struct opp *opp, const struct bit_depth_reduction_params *params); 184 185 void vpe10_opp_set_spatial_dither(struct opp *opp, const struct bit_depth_reduction_params *params); 186 187 void vpe10_opp_program_bit_depth_reduction( 188 struct opp *opp, const struct bit_depth_reduction_params *fmt_bit_depth); 189 190 void vpe10_opp_program_fmt(struct opp *opp, struct bit_depth_reduction_params *fmt_bit_depth, 191 struct clamping_and_pixel_encoding_params *clamping); 192 193 void vpe10_opp_program_pipe_alpha(struct opp *opp, uint16_t alpha); 194 195 void vpe10_opp_program_pipe_bypass(struct opp *opp, bool enable); 196 197 void vpe10_opp_program_pipe_crc(struct opp *opp, bool enable); 198 #ifdef __cplusplus 199 } 200 #endif 201