1/* 2 * Copyright (c) 2020-2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24namespace arm_compute 25{ 26#if defined(ARM_COMPUTE_ENABLE_SVE2) 27inline svuint8_t svmla_qasymm8_z(svbool_t pg, svuint8_t vd, svfloat32_t vs, svfloat32_t vo) 28{ 29 // Convert uint8 vectors to uint16 vectors 30 auto vd_low_u16 = svmovlb_u16(vd); 31 auto vd_high_u16 = svmovlt_u16(vd); 32 33 // Convert uint16 vectors to uint32 vectors 34 auto A_u32 = svmovlb_u32(vd_low_u16); 35 auto B_u32 = svmovlt_u32(vd_low_u16); 36 auto C_u32 = svmovlb_u32(vd_high_u16); 37 auto D_u32 = svmovlt_u32(vd_high_u16); 38 39 // Convert uint32 vectors to float32 vectors 40 auto A_f32 = svcvt_f32_u32_z(pg, A_u32); 41 auto B_f32 = svcvt_f32_u32_z(pg, B_u32); 42 auto C_f32 = svcvt_f32_u32_z(pg, C_u32); 43 auto D_f32 = svcvt_f32_u32_z(pg, D_u32); 44 45 // vd = vd*vs + vo 46 A_f32 = svmla_f32_z(pg, vo, A_f32, vs); 47 B_f32 = svmla_f32_z(pg, vo, B_f32, vs); 48 C_f32 = svmla_f32_z(pg, vo, C_f32, vs); 49 D_f32 = svmla_f32_z(pg, vo, D_f32, vs); 50 51 // Convert float32 vectors to uint32 vectors 52 A_u32 = svcvt_u32_f32_z(pg, A_f32); 53 B_u32 = svcvt_u32_f32_z(pg, B_f32); 54 C_u32 = svcvt_u32_f32_z(pg, C_f32); 55 D_u32 = svcvt_u32_f32_z(pg, D_f32); 56 57 // Convert uint32 vectors to uint16 vectors (with saturation) 58 vd_low_u16 = svqxtnt_u32(svqxtnb_u32(A_u32), B_u32); 59 vd_high_u16 = svqxtnt_u32(svqxtnb_u32(C_u32), D_u32); 60 61 // convert uint16 vectors to uint8 vectors (with saturation) 62 const auto res = svqxtnt_u16(svqxtnb_u16(vd_low_u16), vd_high_u16); 63 return res; 64} 65 66inline svint8_t svmla_qasymm8_signed_z(svbool_t pg, svint8_t vd, svfloat32_t vs, svfloat32_t vo) 67{ 68 // Convert uint8 vectors to int16 vectors 69 auto vd_low_s16 = svmovlb_s16(vd); 70 auto vd_high_s16 = svmovlt_s16(vd); 71 72 // Convert int16 vectors to int32 vectors 73 auto A_s32 = svmovlb_s32(vd_low_s16); 74 auto B_s32 = svmovlt_s32(vd_low_s16); 75 auto C_s32 = svmovlb_s32(vd_high_s16); 76 auto D_s32 = svmovlt_s32(vd_high_s16); 77 78 // Convert int32 vectors to float32 vectors 79 auto A_f32 = svcvt_f32_s32_z(pg, A_s32); 80 auto B_f32 = svcvt_f32_s32_z(pg, B_s32); 81 auto C_f32 = svcvt_f32_s32_z(pg, C_s32); 82 auto D_f32 = svcvt_f32_s32_z(pg, D_s32); 83 84 // vd = vd*vs + vo 85 A_f32 = svmla_f32_z(pg, vo, A_f32, vs); 86 B_f32 = svmla_f32_z(pg, vo, B_f32, vs); 87 C_f32 = svmla_f32_z(pg, vo, C_f32, vs); 88 D_f32 = svmla_f32_z(pg, vo, D_f32, vs); 89 90 // Convert float32 vectors to int32 vectors 91 A_s32 = svcvt_s32_f32_z(pg, A_f32); 92 B_s32 = svcvt_s32_f32_z(pg, B_f32); 93 C_s32 = svcvt_s32_f32_z(pg, C_f32); 94 D_s32 = svcvt_s32_f32_z(pg, D_f32); 95 96 // Convert uint32 vectors to uint16 vectors (with saturation) 97 vd_low_s16 = svqxtnt_s32(svqxtnb_s32(A_s32), B_s32); 98 vd_high_s16 = svqxtnt_s32(svqxtnb_s32(C_s32), D_s32); 99 100 // convert uint16 vectors to uint8 vectors (with saturation) 101 const auto res = svqxtnt_s16(svqxtnb_s16(vd_low_s16), vd_high_s16); 102 return res; 103} 104#endif /* (ARM_COMPUTE_ENABLE_SVE2) */ 105} // namespace arm_compute 106