1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. 5 * SPDX-License-Identifier: MIT 6 * 7 ***********************************************************************************************************************/ 8 9 10 /** 11 **************************************************************************************************** 12 * @file addrlib1.h 13 * @brief Contains the Addr::V1::Lib class definition. 14 **************************************************************************************************** 15 */ 16 17 #ifndef __ADDR_LIB1_H__ 18 #define __ADDR_LIB1_H__ 19 20 #include "addrlib.h" 21 22 namespace Addr 23 { 24 namespace V1 25 { 26 27 /** 28 **************************************************************************************************** 29 * @brief Neutral enums that define bank swap size 30 **************************************************************************************************** 31 */ 32 enum SampleSplitSize 33 { 34 ADDR_SAMPLESPLIT_1KB = 1024, 35 ADDR_SAMPLESPLIT_2KB = 2048, 36 ADDR_SAMPLESPLIT_4KB = 4096, 37 ADDR_SAMPLESPLIT_8KB = 8192, 38 }; 39 40 /** 41 **************************************************************************************************** 42 * @brief Flags for AddrTileMode 43 **************************************************************************************************** 44 */ 45 struct TileModeFlags 46 { 47 UINT_32 thickness : 4; 48 UINT_32 isLinear : 1; 49 UINT_32 isMicro : 1; 50 UINT_32 isMacro : 1; 51 UINT_32 isMacro3d : 1; 52 UINT_32 isPrt : 1; 53 UINT_32 isPrtNoRotation : 1; 54 UINT_32 isBankSwapped : 1; 55 }; 56 57 static const UINT_32 Block64K = 0x10000; 58 static const UINT_32 PrtTileSize = Block64K; 59 60 /** 61 **************************************************************************************************** 62 * @brief This class contains asic independent address lib functionalities 63 **************************************************************************************************** 64 */ 65 class Lib : public Addr::Lib 66 { 67 public: 68 virtual ~Lib(); 69 70 static Lib* GetLib( 71 ADDR_HANDLE hLib); 72 73 /// Returns tileIndex support UseTileIndex(INT_32 index)74 BOOL_32 UseTileIndex(INT_32 index) const 75 { 76 return m_configFlags.useTileIndex && (index != TileIndexInvalid); 77 } 78 79 /// Returns combined swizzle support UseCombinedSwizzle()80 BOOL_32 UseCombinedSwizzle() const 81 { 82 return m_configFlags.useCombinedSwizzle; 83 } 84 85 // 86 // Interface stubs 87 // 88 ADDR_E_RETURNCODE ComputeSurfaceInfo( 89 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 90 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 91 92 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord( 93 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 94 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 95 96 ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr( 97 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 98 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; 99 100 ADDR_E_RETURNCODE ComputeSliceTileSwizzle( 101 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, 102 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; 103 104 ADDR_E_RETURNCODE ExtractBankPipeSwizzle( 105 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, 106 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; 107 108 ADDR_E_RETURNCODE CombineBankPipeSwizzle( 109 const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, 110 ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; 111 112 ADDR_E_RETURNCODE ComputeBaseSwizzle( 113 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, 114 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; 115 116 ADDR_E_RETURNCODE ComputeFmaskInfo( 117 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 118 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); 119 120 ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord( 121 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 122 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 123 124 ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr( 125 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 126 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; 127 128 ADDR_E_RETURNCODE ConvertTileInfoToHW( 129 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 130 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; 131 132 ADDR_E_RETURNCODE ConvertTileIndex( 133 const ADDR_CONVERT_TILEINDEX_INPUT* pIn, 134 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; 135 136 ADDR_E_RETURNCODE GetMacroModeIndex( 137 const ADDR_GET_MACROMODEINDEX_INPUT* pIn, 138 ADDR_GET_MACROMODEINDEX_OUTPUT* pOut) const; 139 140 ADDR_E_RETURNCODE ConvertTileIndex1( 141 const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, 142 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; 143 144 ADDR_E_RETURNCODE GetTileIndex( 145 const ADDR_GET_TILEINDEX_INPUT* pIn, 146 ADDR_GET_TILEINDEX_OUTPUT* pOut) const; 147 148 ADDR_E_RETURNCODE ComputeHtileInfo( 149 const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, 150 ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; 151 152 ADDR_E_RETURNCODE ComputeCmaskInfo( 153 const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, 154 ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; 155 156 ADDR_E_RETURNCODE ComputeDccInfo( 157 const ADDR_COMPUTE_DCCINFO_INPUT* pIn, 158 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; 159 160 ADDR_E_RETURNCODE ComputeHtileAddrFromCoord( 161 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, 162 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const; 163 164 ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord( 165 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, 166 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 167 168 ADDR_E_RETURNCODE ComputeHtileCoordFromAddr( 169 const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, 170 ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const; 171 172 ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr( 173 const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, 174 ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const; 175 176 ADDR_E_RETURNCODE ComputePrtInfo( 177 const ADDR_PRT_INFO_INPUT* pIn, 178 ADDR_PRT_INFO_OUTPUT* pOut) const; 179 protected: 180 Lib(); // Constructor is protected 181 Lib(const Client* pClient); 182 183 /// Pure Virtual function for Hwl computing surface info 184 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( 185 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 186 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 187 188 /// Pure Virtual function for Hwl computing surface address from coord 189 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( 190 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 191 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0; 192 193 /// Pure Virtual function for Hwl computing surface coord from address 194 virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( 195 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 196 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0; 197 198 /// Pure Virtual function for Hwl computing surface tile swizzle 199 virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( 200 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, 201 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0; 202 203 /// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b 204 virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( 205 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, 206 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0; 207 208 /// Pure Virtual function for Hwl combining bank/pipe swizzle 209 virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( 210 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, 211 UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0; 212 213 /// Pure Virtual function for Hwl computing base swizzle 214 virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( 215 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, 216 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0; 217 218 /// Pure Virtual function for Hwl computing HTILE base align 219 virtual UINT_32 HwlComputeHtileBaseAlign( 220 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0; 221 222 /// Pure Virtual function for Hwl computing HTILE bpp 223 virtual UINT_32 HwlComputeHtileBpp( 224 BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0; 225 226 /// Pure Virtual function for Hwl computing HTILE bytes 227 virtual UINT_64 HwlComputeHtileBytes( 228 UINT_32 pitch, UINT_32 height, UINT_32 bpp, 229 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0; 230 231 /// Pure Virtual function for Hwl computing FMASK info 232 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( 233 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 234 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0; 235 236 /// Pure Virtual function for Hwl FMASK address from coord 237 virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( 238 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 239 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0; 240 241 /// Pure Virtual function for Hwl FMASK coord from address 242 virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( 243 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 244 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0; 245 246 /// Pure Virtual function for Hwl convert tile info from real value to HW value 247 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( 248 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 249 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0; 250 251 /// Pure Virtual function for Hwl compute mipmap info 252 virtual BOOL_32 HwlComputeMipLevel( 253 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0; 254 255 /// Pure Virtual function for Hwl compute max cmask blockMax value 256 virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0; 257 258 /// Pure Virtual function for Hwl compute fmask bits 259 virtual UINT_32 HwlComputeFmaskBits( 260 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 261 UINT_32* pNumSamples) const = 0; 262 263 /// Virtual function to get index (not pure then no need to implement this in all hwls HwlGetTileIndex(const ADDR_GET_TILEINDEX_INPUT * pIn,ADDR_GET_TILEINDEX_OUTPUT * pOut)264 virtual ADDR_E_RETURNCODE HwlGetTileIndex( 265 const ADDR_GET_TILEINDEX_INPUT* pIn, 266 ADDR_GET_TILEINDEX_OUTPUT* pOut) const 267 { 268 return ADDR_NOTSUPPORTED; 269 } 270 271 /// Virtual function for Hwl to compute Dcc info HwlComputeDccInfo(const ADDR_COMPUTE_DCCINFO_INPUT * pIn,ADDR_COMPUTE_DCCINFO_OUTPUT * pOut)272 virtual ADDR_E_RETURNCODE HwlComputeDccInfo( 273 const ADDR_COMPUTE_DCCINFO_INPUT* pIn, 274 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const 275 { 276 return ADDR_NOTSUPPORTED; 277 } 278 279 /// Virtual function to get cmask address for tc compatible cmask HwlComputeCmaskAddrFromCoord(const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT * pIn,ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT * pOut)280 virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( 281 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, 282 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const 283 { 284 return ADDR_NOTSUPPORTED; 285 } 286 287 /// Virtual function to get htile address for tc compatible htile HwlComputeHtileAddrFromCoord(const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT * pIn,ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT * pOut)288 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( 289 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, 290 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const 291 { 292 return ADDR_NOTSUPPORTED; 293 } 294 295 // Compute attributes 296 297 // HTILE 298 UINT_32 ComputeHtileInfo( 299 ADDR_HTILE_FLAGS flags, 300 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, 301 BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 302 ADDR_TILEINFO* pTileInfo, 303 UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes, 304 UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL, 305 UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const; 306 307 // CMASK 308 ADDR_E_RETURNCODE ComputeCmaskInfo( 309 ADDR_CMASK_FLAGS flags, 310 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear, 311 ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes, 312 UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL, 313 UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const; 314 315 virtual VOID HwlComputeTileDataWidthAndHeightLinear( 316 UINT_32* pMacroWidth, UINT_32* pMacroHeight, 317 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; 318 319 // CMASK & HTILE addressing 320 virtual UINT_64 HwlComputeXmaskAddrFromCoord( 321 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, 322 UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, 323 BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, 324 UINT_32* bitPosition) const; 325 326 virtual VOID HwlComputeXmaskCoordFromAddr( 327 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 328 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 329 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; 330 331 // Surface mipmap 332 VOID ComputeMipLevel( 333 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 334 335 /// Pure Virtual function for Hwl to get macro tiled alignment info 336 virtual BOOL_32 HwlGetAlignmentInfoMacroTiled( 337 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 338 UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0; 339 340 HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)341 virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 342 { 343 // not supported in hwl layer 344 } 345 HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)346 virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 347 { 348 // not supported in hwl layer 349 } 350 HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)351 virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 352 { 353 // not supported in hwl layer 354 } 355 356 AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const; 357 358 VOID PadDimensions( 359 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 360 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, 361 UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32* pHeight, UINT_32 heightAlign, 362 UINT_32* pSlices, UINT_32 sliceAlign) const; 363 HwlPadDimensions(AddrTileMode tileMode,UINT_32 bpp,ADDR_SURFACE_FLAGS flags,UINT_32 numSamples,ADDR_TILEINFO * pTileInfo,UINT_32 mipLevel,UINT_32 * pPitch,UINT_32 * pPitchAlign,UINT_32 height,UINT_32 heightAlign)364 virtual VOID HwlPadDimensions( 365 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 366 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, 367 UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32 height, UINT_32 heightAlign) const 368 { 369 } 370 371 // 372 // Addressing shared for linear/1D tiling 373 // 374 UINT_64 ComputeSurfaceAddrFromCoordLinear( 375 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, 376 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 377 UINT_32* pBitPosition) const; 378 379 VOID ComputeSurfaceCoordFromAddrLinear( 380 UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp, 381 UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 382 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; 383 384 VOID ComputeSurfaceCoordFromAddrMicroTiled( 385 UINT_64 addr, UINT_32 bitPosition, 386 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 387 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 388 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, 389 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; 390 391 ADDR_E_RETURNCODE ComputeMicroTileEquation( 392 UINT_32 bpp, AddrTileMode tileMode, 393 AddrTileType microTileType, ADDR_EQUATION* pEquation) const; 394 395 UINT_32 ComputePixelIndexWithinMicroTile( 396 UINT_32 x, UINT_32 y, UINT_32 z, 397 UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const; 398 399 /// Pure Virtual function for Hwl computing coord from offset inside micro tile 400 virtual VOID HwlComputePixelCoordFromOffset( 401 UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, 402 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 403 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, 404 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0; 405 406 // 407 // Addressing shared by all 408 // 409 virtual UINT_32 HwlGetPipes( 410 const ADDR_TILEINFO* pTileInfo) const; 411 412 UINT_32 ComputePipeFromAddr( 413 UINT_64 addr, UINT_32 numPipes) const; 414 ComputePipeEquation(UINT_32 log2BytesPP,UINT_32 threshX,UINT_32 threshY,ADDR_TILEINFO * pTileInfo,ADDR_EQUATION * pEquation)415 virtual ADDR_E_RETURNCODE ComputePipeEquation( 416 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const 417 { 418 return ADDR_NOTSUPPORTED; 419 } 420 421 /// Pure Virtual function for Hwl computing pipe from coord 422 virtual UINT_32 ComputePipeFromCoord( 423 UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode, 424 UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0; 425 426 /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile 427 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( 428 UINT_32 pipe, UINT_32 x) const = 0; 429 430 // 431 // Misc helper 432 // 433 static const TileModeFlags ModeFlags[ADDR_TM_COUNT]; 434 435 static UINT_32 Thickness( 436 AddrTileMode tileMode); 437 438 // Checking tile mode 439 static BOOL_32 IsMacroTiled(AddrTileMode tileMode); 440 static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode); 441 static BOOL_32 IsLinear(AddrTileMode tileMode); 442 static BOOL_32 IsMicroTiled(AddrTileMode tileMode); 443 static BOOL_32 IsPrtTileMode(AddrTileMode tileMode); 444 static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode); 445 446 /// Return TRUE if tile info is needed UseTileInfo()447 BOOL_32 UseTileInfo() const 448 { 449 return !m_configFlags.ignoreTileInfo; 450 } 451 452 /// Adjusts pitch alignment for flipping surface 453 VOID AdjustPitchAlignment( 454 ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const; 455 456 /// Overwrite tile config according to tile index 457 virtual ADDR_E_RETURNCODE HwlSetupTileCfg( 458 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, 459 ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const; 460 461 /// Overwrite macro tile config according to tile index 462 virtual INT_32 HwlComputeMacroModeIndex( 463 INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, 464 ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL 465 ) const 466 { 467 return TileIndexNoMacroIndex; 468 } 469 470 /// Pre-handler of 3x pitch (96 bit) adjustment 471 virtual UINT_32 HwlPreHandleBaseLvl3xPitch( 472 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 473 /// Post-handler of 3x pitch adjustment 474 virtual UINT_32 HwlPostHandleBaseLvl3xPitch( 475 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 476 /// Check miplevel after surface adjustment 477 ADDR_E_RETURNCODE PostComputeMipLevel( 478 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 479 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 480 481 /// Quad buffer stereo support, has its implementation in ind. layer 482 VOID ComputeQbStereoInfo( 483 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 484 485 /// Pure virutual function to compute stereo bank swizzle for right eye 486 virtual UINT_32 HwlComputeQbStereoRightSwizzle( 487 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 488 489 VOID OptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 490 491 /// Overwrite tile setting to PRT HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)492 virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 493 { 494 } 495 496 static BOOL_32 DegradeTo1D( 497 UINT_32 width, UINT_32 height, 498 UINT_32 macroTilePitchAlign, UINT_32 macroTileHeightAlign); 499 500 private: 501 // Disallow the copy constructor 502 Lib(const Lib& a); 503 504 // Disallow the assignment operator 505 Lib& operator=(const Lib& a); 506 507 UINT_32 ComputeCmaskBaseAlign( 508 ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const; 509 510 UINT_64 ComputeCmaskBytes( 511 UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const; 512 513 // 514 // CMASK/HTILE shared methods 515 // 516 VOID ComputeTileDataWidthAndHeight( 517 UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo, 518 UINT_32* pMacroWidth, UINT_32* pMacroHeight) const; 519 520 UINT_32 ComputeXmaskCoordYFromPipe( 521 UINT_32 pipe, UINT_32 x) const; 522 }; 523 524 } // V1 525 } // Addr 526 527 #endif 528 529