1 /* 2 * Copyright 2019 The libgav1 Authors 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef LIBGAV1_SRC_DSP_X86_INVERSE_TRANSFORM_SSE4_H_ 18 #define LIBGAV1_SRC_DSP_X86_INVERSE_TRANSFORM_SSE4_H_ 19 20 #include "src/dsp/dsp.h" 21 #include "src/utils/cpu.h" 22 23 namespace libgav1 { 24 namespace dsp { 25 26 // Initializes Dsp::inverse_transforms, see the defines below for specifics. 27 // This function is not thread-safe. 28 void InverseTransformInit_SSE4_1(); 29 30 } // namespace dsp 31 } // namespace libgav1 32 33 // If sse4 is enabled and the baseline isn't set due to a higher level of 34 // optimization being enabled, signal the sse4 implementation should be used. 35 #if LIBGAV1_TARGETING_SSE4_1 36 37 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dDct 38 #define LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dDct LIBGAV1_CPU_SSE4_1 39 #endif 40 41 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize8_Transform1dDct 42 #define LIBGAV1_Dsp8bpp_Transform1dSize8_Transform1dDct LIBGAV1_CPU_SSE4_1 43 #endif 44 45 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize16_Transform1dDct 46 #define LIBGAV1_Dsp8bpp_Transform1dSize16_Transform1dDct LIBGAV1_CPU_SSE4_1 47 #endif 48 49 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize32_Transform1dDct 50 #define LIBGAV1_Dsp8bpp_Transform1dSize32_Transform1dDct LIBGAV1_CPU_SSE4_1 51 #endif 52 53 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize64_Transform1dDct 54 #define LIBGAV1_Dsp8bpp_Transform1dSize64_Transform1dDct LIBGAV1_CPU_SSE4_1 55 #endif 56 57 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dAdst 58 #define LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dAdst LIBGAV1_CPU_SSE4_1 59 #endif 60 61 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize8_Transform1dAdst 62 #define LIBGAV1_Dsp8bpp_Transform1dSize8_Transform1dAdst LIBGAV1_CPU_SSE4_1 63 #endif 64 65 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize16_Transform1dAdst 66 #define LIBGAV1_Dsp8bpp_Transform1dSize16_Transform1dAdst LIBGAV1_CPU_SSE4_1 67 #endif 68 69 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dIdentity 70 #define LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dIdentity LIBGAV1_CPU_SSE4_1 71 #endif 72 73 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize8_Transform1dIdentity 74 #define LIBGAV1_Dsp8bpp_Transform1dSize8_Transform1dIdentity LIBGAV1_CPU_SSE4_1 75 #endif 76 77 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize16_Transform1dIdentity 78 #define LIBGAV1_Dsp8bpp_Transform1dSize16_Transform1dIdentity LIBGAV1_CPU_SSE4_1 79 #endif 80 81 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize32_Transform1dIdentity 82 #define LIBGAV1_Dsp8bpp_Transform1dSize32_Transform1dIdentity LIBGAV1_CPU_SSE4_1 83 #endif 84 85 #ifndef LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dWht 86 #define LIBGAV1_Dsp8bpp_Transform1dSize4_Transform1dWht LIBGAV1_CPU_SSE4_1 87 #endif 88 #endif // LIBGAV1_TARGETING_SSE4_1 89 #endif // LIBGAV1_SRC_DSP_X86_INVERSE_TRANSFORM_SSE4_H_ 90