1 // Auto-generated file. Do not edit!
2 // Template: src/f16-dwconv/up-neonfp16arith.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/dwconv.h>
15
16
xnn_f16_dwconv_minmax_ukernel_up8x9__neonfp16arith_acc2(size_t channels,size_t output_width,const void ** input,const void * weights,void * output_ptr,size_t input_stride,size_t output_increment,size_t input_offset,const void * zero,const union xnn_f16_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f16_dwconv_minmax_ukernel_up8x9__neonfp16arith_acc2(
18 size_t channels,
19 size_t output_width,
20 const void** input,
21 const void* weights,
22 void* output_ptr,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const void* zero,
27 const union xnn_f16_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 __fp16* output = (__fp16*) output_ptr;
33 const float16x8_t vmax = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neon.max));
34 const float16x8_t vmin = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neon.min));
35 do {
36 const __fp16* i0 = (const __fp16*) input[0];
37 assert(i0 != NULL);
38 if XNN_UNPREDICTABLE(i0 != (const __fp16*) zero) {
39 i0 = (const __fp16*) ((uintptr_t) i0 + input_offset);
40 }
41 const __fp16* i1 = (const __fp16*) input[1];
42 assert(i1 != NULL);
43 if XNN_UNPREDICTABLE(i1 != (const __fp16*) zero) {
44 i1 = (const __fp16*) ((uintptr_t) i1 + input_offset);
45 }
46 const __fp16* i2 = (const __fp16*) input[2];
47 assert(i2 != NULL);
48 if XNN_UNPREDICTABLE(i2 != (const __fp16*) zero) {
49 i2 = (const __fp16*) ((uintptr_t) i2 + input_offset);
50 }
51 const __fp16* i3 = (const __fp16*) input[3];
52 assert(i3 != NULL);
53 if XNN_UNPREDICTABLE(i3 != (const __fp16*) zero) {
54 i3 = (const __fp16*) ((uintptr_t) i3 + input_offset);
55 }
56 const __fp16* i4 = (const __fp16*) input[4];
57 assert(i4 != NULL);
58 if XNN_UNPREDICTABLE(i4 != (const __fp16*) zero) {
59 i4 = (const __fp16*) ((uintptr_t) i4 + input_offset);
60 }
61 const __fp16* i5 = (const __fp16*) input[5];
62 assert(i5 != NULL);
63 if XNN_UNPREDICTABLE(i5 != (const __fp16*) zero) {
64 i5 = (const __fp16*) ((uintptr_t) i5 + input_offset);
65 }
66 const __fp16* i6 = (const __fp16*) input[6];
67 assert(i6 != NULL);
68 if XNN_UNPREDICTABLE(i6 != (const __fp16*) zero) {
69 i6 = (const __fp16*) ((uintptr_t) i6 + input_offset);
70 }
71 const __fp16* i7 = (const __fp16*) input[7];
72 assert(i7 != NULL);
73 if XNN_UNPREDICTABLE(i7 != (const __fp16*) zero) {
74 i7 = (const __fp16*) ((uintptr_t) i7 + input_offset);
75 }
76 const __fp16* i8 = (const __fp16*) input[8];
77 assert(i8 != NULL);
78 if XNN_UNPREDICTABLE(i8 != (const __fp16*) zero) {
79 i8 = (const __fp16*) ((uintptr_t) i8 + input_offset);
80 }
81
82 input = (const void**) ((uintptr_t) input + input_stride);
83
84 size_t c = channels;
85 const __fp16* w = (const __fp16*) weights;
86 for (; c >= 8; c -= 8) {
87 float16x8_t vacc01234567p0 = vld1q_f16(w); w += 8;
88
89
90 const float16x8_t vi0x01234567 = vld1q_f16(i0); i0 += 8;
91 const float16x8_t vk0x01234567 = vld1q_f16(w); w += 8;
92 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi0x01234567, vk0x01234567);
93
94 const float16x8_t vi1x01234567 = vld1q_f16(i1); i1 += 8;
95 const float16x8_t vk1x01234567 = vld1q_f16(w); w += 8;
96 float16x8_t vacc01234567p1 = vmulq_f16(vi1x01234567, vk1x01234567);
97
98 const float16x8_t vi2x01234567 = vld1q_f16(i2); i2 += 8;
99 const float16x8_t vk2x01234567 = vld1q_f16(w); w += 8;
100 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi2x01234567, vk2x01234567);
101
102 const float16x8_t vi3x01234567 = vld1q_f16(i3); i3 += 8;
103 const float16x8_t vk3x01234567 = vld1q_f16(w); w += 8;
104 vacc01234567p1 = vfmaq_f16(vacc01234567p1, vi3x01234567, vk3x01234567);
105
106 const float16x8_t vi4x01234567 = vld1q_f16(i4); i4 += 8;
107 const float16x8_t vk4x01234567 = vld1q_f16(w); w += 8;
108 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi4x01234567, vk4x01234567);
109
110 const float16x8_t vi5x01234567 = vld1q_f16(i5); i5 += 8;
111 const float16x8_t vk5x01234567 = vld1q_f16(w); w += 8;
112 vacc01234567p1 = vfmaq_f16(vacc01234567p1, vi5x01234567, vk5x01234567);
113
114 const float16x8_t vi6x01234567 = vld1q_f16(i6); i6 += 8;
115 const float16x8_t vk6x01234567 = vld1q_f16(w); w += 8;
116 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi6x01234567, vk6x01234567);
117
118 const float16x8_t vi7x01234567 = vld1q_f16(i7); i7 += 8;
119 const float16x8_t vk7x01234567 = vld1q_f16(w); w += 8;
120 vacc01234567p1 = vfmaq_f16(vacc01234567p1, vi7x01234567, vk7x01234567);
121
122 const float16x8_t vi8x01234567 = vld1q_f16(i8); i8 += 8;
123 const float16x8_t vk8x01234567 = vld1q_f16(w); w += 8;
124 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi8x01234567, vk8x01234567);
125
126 // Add up all accumulators to vacc01234567p0
127 vacc01234567p0 = vaddq_f16(vacc01234567p0, vacc01234567p1);
128
129 float16x8_t vacc01234567 = vmaxq_f16(vacc01234567p0, vmin);
130 vacc01234567 = vminq_f16(vacc01234567, vmax);
131
132 vst1q_f16(output, vacc01234567); output += 8;
133 }
134 if XNN_UNLIKELY(c != 0) {
135 float16x8_t vacc01234567p0 = vld1q_f16(w); w += 8;
136
137
138 const float16x8_t vi0x01234567 = vld1q_f16(i0);
139 const float16x8_t vk0x01234567 = vld1q_f16(w); w += 8;
140 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi0x01234567, vk0x01234567);
141
142 const float16x8_t vi1x01234567 = vld1q_f16(i1);
143 const float16x8_t vk1x01234567 = vld1q_f16(w); w += 8;
144 float16x8_t vacc01234567p1 = vmulq_f16(vi1x01234567, vk1x01234567);
145
146 const float16x8_t vi2x01234567 = vld1q_f16(i2);
147 const float16x8_t vk2x01234567 = vld1q_f16(w); w += 8;
148 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi2x01234567, vk2x01234567);
149
150 const float16x8_t vi3x01234567 = vld1q_f16(i3);
151 const float16x8_t vk3x01234567 = vld1q_f16(w); w += 8;
152 vacc01234567p1 = vfmaq_f16(vacc01234567p1, vi3x01234567, vk3x01234567);
153
154 const float16x8_t vi4x01234567 = vld1q_f16(i4);
155 const float16x8_t vk4x01234567 = vld1q_f16(w); w += 8;
156 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi4x01234567, vk4x01234567);
157
158 const float16x8_t vi5x01234567 = vld1q_f16(i5);
159 const float16x8_t vk5x01234567 = vld1q_f16(w); w += 8;
160 vacc01234567p1 = vfmaq_f16(vacc01234567p1, vi5x01234567, vk5x01234567);
161
162 const float16x8_t vi6x01234567 = vld1q_f16(i6);
163 const float16x8_t vk6x01234567 = vld1q_f16(w); w += 8;
164 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi6x01234567, vk6x01234567);
165
166 const float16x8_t vi7x01234567 = vld1q_f16(i7);
167 const float16x8_t vk7x01234567 = vld1q_f16(w); w += 8;
168 vacc01234567p1 = vfmaq_f16(vacc01234567p1, vi7x01234567, vk7x01234567);
169
170 const float16x8_t vi8x01234567 = vld1q_f16(i8);
171 const float16x8_t vk8x01234567 = vld1q_f16(w); w += 8;
172 vacc01234567p0 = vfmaq_f16(vacc01234567p0, vi8x01234567, vk8x01234567);
173
174 // Add up all accumulators to vacc01234567p0
175 vacc01234567p0 = vaddq_f16(vacc01234567p0, vacc01234567p1);
176
177 float16x8_t vacc01234567 = vmaxq_f16(vacc01234567p0, vmin);
178 vacc01234567 = vminq_f16(vacc01234567, vmax);
179
180 float16x4_t vacc0123 = vget_low_f16(vacc01234567);
181 if (c & 4) {
182 vst1_f16(output, vacc0123); output += 4;
183 vacc0123 = vget_high_f16(vacc01234567);
184 }
185 if (c & 2) {
186 vst1_lane_u32((void*) output, vreinterpret_u32_f16(vacc0123), 0); output += 2;
187 vacc0123 = vext_f16(vacc0123, vacc0123, 2);
188 }
189 if (c & 1) {
190 vst1_lane_f16(output, vacc0123, 0); output += 1;
191 }
192 }
193
194 output = (__fp16*) ((uintptr_t) output + output_increment);
195 } while (--output_width != 0);
196 }
197