1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-avx.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/dwconv.h>
15
16
xnn_f32_dwconv_minmax_ukernel_up8x9__fma3(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up8x9__fma3(
18 size_t channels,
19 size_t output_width,
20 const float** input,
21 const float* weights,
22 float* output,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const float* zero,
27 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const __m256 vmax = _mm256_load_ps(params->avx.max);
33 const __m256 vmin = _mm256_load_ps(params->avx.min);
34 do {
35 const float* i0 = input[0];
36 assert(i0 != NULL);
37 if XNN_UNPREDICTABLE(i0 != zero) {
38 i0 = (const float*) ((uintptr_t) i0 + input_offset);
39 }
40 const float* i1 = input[1];
41 assert(i1 != NULL);
42 if XNN_UNPREDICTABLE(i1 != zero) {
43 i1 = (const float*) ((uintptr_t) i1 + input_offset);
44 }
45 const float* i2 = input[2];
46 assert(i2 != NULL);
47 if XNN_UNPREDICTABLE(i2 != zero) {
48 i2 = (const float*) ((uintptr_t) i2 + input_offset);
49 }
50 const float* i3 = input[3];
51 assert(i3 != NULL);
52 if XNN_UNPREDICTABLE(i3 != zero) {
53 i3 = (const float*) ((uintptr_t) i3 + input_offset);
54 }
55 const float* i4 = input[4];
56 assert(i4 != NULL);
57 if XNN_UNPREDICTABLE(i4 != zero) {
58 i4 = (const float*) ((uintptr_t) i4 + input_offset);
59 }
60 const float* i5 = input[5];
61 assert(i5 != NULL);
62 if XNN_UNPREDICTABLE(i5 != zero) {
63 i5 = (const float*) ((uintptr_t) i5 + input_offset);
64 }
65 const float* i6 = input[6];
66 assert(i6 != NULL);
67 if XNN_UNPREDICTABLE(i6 != zero) {
68 i6 = (const float*) ((uintptr_t) i6 + input_offset);
69 }
70 const float* i7 = input[7];
71 assert(i7 != NULL);
72 if XNN_UNPREDICTABLE(i7 != zero) {
73 i7 = (const float*) ((uintptr_t) i7 + input_offset);
74 }
75 const float* i8 = input[8];
76 assert(i8 != NULL);
77 if XNN_UNPREDICTABLE(i8 != zero) {
78 i8 = (const float*) ((uintptr_t) i8 + input_offset);
79 }
80 input = (const float**) ((uintptr_t) input + input_stride);
81
82 size_t c = channels;
83 const float* w = weights;
84 for (; c >= 8; c -= 8) {
85 __m256 vacc01234567p0 = _mm256_load_ps(w);
86
87
88 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
89 i0 += 8;
90
91 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
92 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
93
94 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
95 i1 += 8;
96
97 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
98 vacc01234567p0 = _mm256_fmadd_ps(vi1x01234567, vk1x01234567, vacc01234567p0);
99
100 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
101 i2 += 8;
102
103 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
104 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
105
106 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
107 i3 += 8;
108
109 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
110 vacc01234567p0 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p0);
111
112 const __m256 vi4x01234567 = _mm256_loadu_ps(i4);
113 i4 += 8;
114
115 const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
116 vacc01234567p0 = _mm256_fmadd_ps(vi4x01234567, vk4x01234567, vacc01234567p0);
117
118 const __m256 vi5x01234567 = _mm256_loadu_ps(i5);
119 i5 += 8;
120
121 const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
122 vacc01234567p0 = _mm256_fmadd_ps(vi5x01234567, vk5x01234567, vacc01234567p0);
123
124 const __m256 vi6x01234567 = _mm256_loadu_ps(i6);
125 i6 += 8;
126
127 const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
128 vacc01234567p0 = _mm256_fmadd_ps(vi6x01234567, vk6x01234567, vacc01234567p0);
129
130 const __m256 vi7x01234567 = _mm256_loadu_ps(i7);
131 i7 += 8;
132
133 const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
134 vacc01234567p0 = _mm256_fmadd_ps(vi7x01234567, vk7x01234567, vacc01234567p0);
135
136 const __m256 vi8x01234567 = _mm256_loadu_ps(i8);
137 i8 += 8;
138
139 const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
140 vacc01234567p0 = _mm256_fmadd_ps(vi8x01234567, vk8x01234567, vacc01234567p0);
141
142 w += 80;
143
144
145 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
146 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
147
148 _mm256_storeu_ps(output, vacc01234567);
149 output += 8;
150 }
151 if XNN_UNLIKELY(c != 0) {
152 assert(c >= 1);
153 assert(c <= 7);
154 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ¶ms->avx.mask_table[7 - c]);
155
156 __m256 vacc01234567p0 = _mm256_load_ps(w);
157
158 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
159 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
160 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
161
162 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
163 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
164 vacc01234567p0 = _mm256_fmadd_ps(vi1x01234567, vk1x01234567, vacc01234567p0);
165
166 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
167 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
168 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
169
170 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
171 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
172 vacc01234567p0 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p0);
173
174 const __m256 vi4x01234567 = _mm256_maskload_ps(i4, vmask);
175 const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
176 vacc01234567p0 = _mm256_fmadd_ps(vi4x01234567, vk4x01234567, vacc01234567p0);
177
178 const __m256 vi5x01234567 = _mm256_maskload_ps(i5, vmask);
179 const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
180 vacc01234567p0 = _mm256_fmadd_ps(vi5x01234567, vk5x01234567, vacc01234567p0);
181
182 const __m256 vi6x01234567 = _mm256_maskload_ps(i6, vmask);
183 const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
184 vacc01234567p0 = _mm256_fmadd_ps(vi6x01234567, vk6x01234567, vacc01234567p0);
185
186 const __m256 vi7x01234567 = _mm256_maskload_ps(i7, vmask);
187 const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
188 vacc01234567p0 = _mm256_fmadd_ps(vi7x01234567, vk7x01234567, vacc01234567p0);
189
190 const __m256 vi8x01234567 = _mm256_maskload_ps(i8, vmask);
191 const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
192 vacc01234567p0 = _mm256_fmadd_ps(vi8x01234567, vk8x01234567, vacc01234567p0);
193
194
195 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
196 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
197
198 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
199 if (c & 4) {
200 _mm_storeu_ps(output, vacc0123);
201 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
202 output += 4;
203 }
204 if (c & 2) {
205 _mm_storel_pi((__m64*) output, vacc0123);
206 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
207 output += 2;
208 }
209 if (c & 1) {
210 _mm_store_ss(output, vacc0123);
211 output += 1;
212 }
213 }
214
215 output = (float*) ((uintptr_t) output + output_increment);
216 } while (--output_width != 0);
217 }
218