xref: /aosp_15_r20/external/XNNPACK/src/f32-igemm/wasmsimd-s4.c.in (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1// Copyright 2020 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
5
6$assert NR % 4 == 0
7$assert ACTIVATION != "MINMAX" or ARCH in ["ARM", "X86", "RELAXED"]
8$assert not FMA or ARCH == "RELAXED"
9$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
10#include <assert.h>
11
12#include <wasm_simd128.h>
13
14#include <xnnpack/igemm.h>
15
16
17$assert ACTIVATION in ["LINEAR", "RELU", "MINMAX"]
18$if ACTIVATION == "MINMAX":
19$  WASM_F32X4_MIN={"ARM": "wasm_f32x4_min", "X86": "wasm_f32x4_pmin", "RELAXED": "__builtin_wasm_relaxed_min_f32x4"}[ARCH]
20$  WASM_F32X4_MAX={"ARM": "wasm_f32x4_max", "X86": "wasm_f32x4_pmax", "RELAXED": "__builtin_wasm_relaxed_max_f32x4"}[ARCH]
21$ACTIVATION_SUFFIX = {"LINEAR": ""}.get(ACTIVATION, "_" + ACTIVATION.lower())
22$ISA = "wasmsimd" if not FMA and (ACTIVATION in ["LINEAR", "RELU"] or ARCH != "RELAXED") else "wasmrelaxedsimd"
23$ARCH_SUFFIX = "" if not FMA and (ACTIVATION in ["LINEAR", "RELU"] or ARCH == "RELAXED") else "_" + ("fma" if FMA else ARCH.lower())
24$PARAMS = {"LINEAR": "xnn_f32_default_params", "RELU": "xnn_f32_relu_params", "MINMAX": "xnn_f32_minmax_params"}[ACTIVATION]
25void xnn_f32_igemm${ACTIVATION_SUFFIX}_ukernel_${MR}x${NR}s4__${ISA}${ARCH_SUFFIX}(
26    size_t mr,
27    size_t nc,
28    size_t kc,
29    size_t ks,
30    const float**restrict a,
31    const float*restrict w,
32    float*restrict c,
33    size_t cm_stride,
34    size_t cn_stride,
35    size_t a_offset,
36    const float* zero,
37    const union ${PARAMS} params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
38{
39  assert(mr != 0);
40  assert(mr <= ${MR});
41  assert(nc != 0);
42  assert(kc != 0);
43  assert(kc % sizeof(float) == 0);
44  assert(ks != 0);
45  assert(ks % (${MR} * sizeof(void*)) == 0);
46  assert(a_offset % sizeof(float) == 0);
47  assert(a != NULL);
48  assert(w != NULL);
49  assert(c != NULL);
50
51  float* c0 = c;
52  $for M in range(1, MR):
53    float* c${M} = (float*) ((uintptr_t) c${M-1} + cm_stride);
54    $if M % 2 == 0:
55      if XNN_UNPREDICTABLE(mr <= ${M}) {
56        c${M} = c${M-1};
57      }
58    $elif M + 1 == MR:
59      if XNN_UNPREDICTABLE(mr != ${M+1}) {
60        c${M} = c${M-1};
61      }
62    $else:
63      if XNN_UNPREDICTABLE(mr < ${M+1}) {
64        c${M} = c${M-1};
65      }
66
67  $if ACTIVATION == "MINMAX":
68    const v128_t vmin = wasm_v128_load64_splat(params->wasmsimd.min);
69    const v128_t vmax = wasm_v128_load64_splat(params->wasmsimd.max);
70  do {
71    v128_t vacc0x${ABC[0:4]} = wasm_v128_load(w);
72    $for N in range(4, NR, 4):
73      v128_t vacc0x${ABC[N:N+4]} = wasm_v128_load(w + ${N});
74    $for M in range(1, MR):
75      $for N in range(0, NR, 4):
76        v128_t vacc${M}x${ABC[N:N+4]} = vacc0x${ABC[N:N+4]};
77    w += ${NR};
78
79    size_t p = ks;
80    do {
81      $for M in range(MR):
82        const float* restrict a${M} = a[${M}];
83        assert(a${M} != NULL);
84        if XNN_UNPREDICTABLE(a${M} != zero) {
85          a${M} = (const float*) ((uintptr_t) a${M} + a_offset);
86        }
87      a += ${MR};
88
89      size_t k = kc;
90      while (k >= 4 * sizeof(float)) {
91        $for M in range(MR):
92          v128_t va${M} = wasm_v128_load(a${M});
93          a${M} += 4;
94
95        $for L in range(4):
96
97          $for N in range(0, NR, 4):
98            const v128_t vb${ABC[N:N+4]}c${L} = wasm_v128_load(w + ${L * NR + N});
99
100          $for N in range(0, NR, 4):
101            $for M in range(MR):
102              $if FMA:
103                vacc${M}x${ABC[N:N+4]} = __builtin_wasm_fma_f32x4(vacc${M}x${ABC[N:N+4]}, va${M}, vb${ABC[N:N+4]}c${L});
104              $else:
105                vacc${M}x${ABC[N:N+4]} = wasm_f32x4_add(vacc${M}x${ABC[N:N+4]}, wasm_f32x4_mul(va${M}, vb${ABC[N:N+4]}c${L}));
106
107          $if L + 1 != 4:
108            $for M in range(MR):
109              va${M} = wasm_v32x4_shuffle(va${M}, va${M}, 1, 2, 3, 0);
110
111        w += ${4 * NR};
112        k -= 4 * sizeof(float);
113      }
114      if XNN_UNLIKELY(k != 0) {
115        $for M in range(MR):
116          v128_t va${M} = wasm_v128_load(a${M});
117          a${M} = (const float*) ((uintptr_t) a${M} + k);
118
119        const v128_t vzero = wasm_f32x4_const_splat(0.0f);
120        $for L in range(4):
121
122          $for N in range(0, NR, 4):
123            const v128_t vb${ABC[N:N+4]}c${L} = wasm_v128_load(w + ${L * NR + N});
124
125          $for N in range(0, NR, 4):
126            $for M in range(MR):
127              $if FMA:
128                vacc${M}x${ABC[N:N+4]} = __builtin_wasm_fma_f32x4(vacc${M}x${ABC[N:N+4]}, wasm_v128_andnot(va${M}, wasm_f32x4_eq(vb${ABC[N:N+4]}c${L}, vzero)), vb${ABC[N:N+4]}c${L});
129              $else:
130                vacc${M}x${ABC[N:N+4]} = wasm_f32x4_add(vacc${M}x${ABC[N:N+4]}, wasm_f32x4_mul(wasm_v128_andnot(va${M}, wasm_f32x4_eq(vb${ABC[N:N+4]}c${L}, vzero)), vb${ABC[N:N+4]}c${L}));
131
132          $if L + 1 != 4:
133            $for M in range(MR):
134              va${M} = wasm_v32x4_shuffle(va${M}, va${M}, 1, 2, 3, 0);
135
136        w += ${4 * NR};
137      }
138      p -= ${MR} * sizeof(void*);
139    } while (p != 0);
140
141    $if ACTIVATION == "MINMAX":
142      $for N in range(0, NR, 4):
143        $for M in range(MR):
144          vacc${M}x${ABC[N:N+4]} = ${WASM_F32X4_MAX}(vmin, vacc${M}x${ABC[N:N+4]});
145
146      $for N in range(0, NR, 4):
147        $for M in range(MR):
148          vacc${M}x${ABC[N:N+4]} = ${WASM_F32X4_MIN}(vmax, vacc${M}x${ABC[N:N+4]});
149    $elif ACTIVATION == "RELU":
150      const v128_t vzero = wasm_i32x4_const_splat(0);
151      $for N in range(0, NR, 4):
152        $for M in range(MR):
153          vacc${M}x${ABC[N:N+4]} = wasm_i32x4_max(vacc${M}x${ABC[N:N+4]}, vzero);
154
155    if XNN_LIKELY(nc >= ${NR}) {
156      $for M in reversed(range(MR)):
157        wasm_v128_store(c${M}, vacc${M}x${ABC[0:4]});
158        $for N in range(4, NR, 4):
159          wasm_v128_store(c${M} + ${N}, vacc${M}x${ABC[N:N+4]});
160        c${M} = (float*) ((uintptr_t) c${M} + cn_stride);
161
162      a = (const float**restrict) ((uintptr_t) a - ks);
163      nc -= ${NR};
164    } else {
165      $for LOG2N in reversed(range(NR.bit_length())):
166        $if NR != 1 << LOG2N:
167          if (nc & ${1 << LOG2N}) {
168            $if LOG2N >= 2:
169              $for M in reversed(range(MR)):
170                wasm_v128_store(c${M}, vacc${M}x${ABC[0:4]});
171                $for N in range(4, 1 << LOG2N, 4):
172                  wasm_v128_store(c${M} + ${N}, vacc${M}x${ABC[N:N+4]});
173
174              $for M in reversed(range(MR)):
175                $for N in range(0, 1 << (LOG2N - 1), 4):
176                  vacc${M}x${ABC[N:N+4]} = vacc${M}x${ABC[N + (1 << LOG2N):N + (1 << LOG2N)+4]};
177
178              $for M in reversed(range(MR)):
179                c${M} += ${1 << LOG2N};
180            $elif LOG2N == 1:
181              $for M in reversed(range(MR)):
182                *((double*) c${M}) = wasm_f64x2_extract_lane(vacc${M}x${ABC[0:4]}, 0);
183
184              $for M in reversed(range(MR)):
185                vacc${M}x${ABC[0:4]} = wasm_v32x4_shuffle(vacc${M}x${ABC[0:4]}, vacc${M}x${ABC[0:4]}, 2, 3, 2, 3);
186
187              $for M in reversed(range(MR)):
188                c${M} += 2;
189            $elif LOG2N == 0:
190              $for M in reversed(range(MR)):
191                *c${M} = wasm_f32x4_extract_lane(vacc${M}x${ABC[0:4]}, 0);
192          }
193
194      nc = 0;
195    }
196  } while (nc != 0);
197}
198