1 // Auto-generated file. Do not edit!
2 // Template: src/f32-vmulcaddc/wasmsimd.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/math.h>
15 #include <xnnpack/vmulcaddc.h>
16
17
xnn_f32_vmulcaddc_minmax_ukernel_c4__wasmsimd_x86_2x(size_t rows,size_t channels,const float * restrict input,size_t input_stride,const float * restrict weights,float * restrict output,size_t output_stride,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_vmulcaddc_minmax_ukernel_c4__wasmsimd_x86_2x(
19 size_t rows,
20 size_t channels,
21 const float*restrict input,
22 size_t input_stride,
23 const float*restrict weights,
24 float*restrict output,
25 size_t output_stride,
26 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
27 {
28 assert(rows != 0);
29 assert(channels != 0);
30 assert(channels % sizeof(float) == 0);
31
32 const float* i0 = input;
33 float* o0 = output;
34 const float* i1 = (const float*) ((uintptr_t) i0 + input_stride);
35 float* o1 = (float*) ((uintptr_t) o0 + output_stride);
36
37 const size_t input_increment = input_stride * 2 - channels;
38 const size_t output_increment = output_stride * 2 - channels;
39
40 const v128_t vmin = wasm_v128_load64_splat(params->wasmsimd.min);
41 const v128_t vmax = wasm_v128_load64_splat(params->wasmsimd.max);
42 do {
43 if XNN_UNPREDICTABLE(rows < 2) {
44 i1 = i0;
45 o1 = o0;
46 }
47
48 const float* w = weights;
49 size_t c = channels;
50 for (; c >= 4 * sizeof(float); c -= 4 * sizeof(float)) {
51 const v128_t vscale0123 = wasm_v128_load(w);
52
53 v128_t vacc0x0123 = wasm_v128_load(i0);
54 i0 += 4;
55 v128_t vacc1x0123 = wasm_v128_load(i1);
56 i1 += 4;
57
58 const v128_t vbias0123 = wasm_v128_load(w + 4);
59
60 vacc0x0123 = wasm_f32x4_add(vbias0123, wasm_f32x4_mul(vscale0123, vacc0x0123));
61 vacc1x0123 = wasm_f32x4_add(vbias0123, wasm_f32x4_mul(vscale0123, vacc1x0123));
62
63 vacc0x0123 = wasm_f32x4_pmax(vmin, vacc0x0123);
64 vacc1x0123 = wasm_f32x4_pmax(vmin, vacc1x0123);
65
66 vacc0x0123 = wasm_f32x4_pmin(vmax, vacc0x0123);
67 vacc1x0123 = wasm_f32x4_pmin(vmax, vacc1x0123);
68
69 wasm_v128_store(o0, vacc0x0123);
70 o0 += 4;
71 wasm_v128_store(o1, vacc1x0123);
72 o1 += 4;
73
74 w += 8;
75 }
76 if XNN_UNLIKELY(c != 0) {
77 const v128_t vscale = wasm_v128_load(w);
78
79 v128_t vacc0 = wasm_v128_load(i0);
80 i0 = (const float*) ((uintptr_t) i0 + c);
81 v128_t vacc1 = wasm_v128_load(i1);
82 i1 = (const float*) ((uintptr_t) i1 + c);
83
84 const v128_t vbias = wasm_v128_load(w + 4);
85
86 vacc0 = wasm_f32x4_add(vbias, wasm_f32x4_mul(vscale, vacc0));
87 vacc1 = wasm_f32x4_add(vbias, wasm_f32x4_mul(vscale, vacc1));
88
89 vacc0 = wasm_f32x4_pmax(vmin, vacc0);
90 vacc1 = wasm_f32x4_pmax(vmin, vacc1);
91
92 vacc0 = wasm_f32x4_pmin(vmax, vacc0);
93 vacc1 = wasm_f32x4_pmin(vmax, vacc1);
94
95 if (c & (2 * sizeof(float))) {
96 *((double*) o0) = wasm_f64x2_extract_lane(vacc0, 0);
97 *((double*) o1) = wasm_f64x2_extract_lane(vacc1, 0);
98
99 vacc0 = wasm_v32x4_shuffle(vacc0, vacc0, 2, 3, 2, 3);
100 vacc1 = wasm_v32x4_shuffle(vacc1, vacc1, 2, 3, 2, 3);
101
102 o0 += 2;
103 o1 += 2;
104 }
105 if (c & (1 * sizeof(float))) {
106 *o0++ = wasm_f32x4_extract_lane(vacc0, 0);
107 *o1++ = wasm_f32x4_extract_lane(vacc1, 0);
108 }
109 }
110 i0 = (const float*) ((uintptr_t) i0 + input_increment);
111 o0 = (float*) ((uintptr_t) o0 + output_increment);
112 i1 = (const float*) ((uintptr_t) i1 + input_increment);
113 o1 = (float*) ((uintptr_t) o1 + output_increment);
114 rows = doz(rows, 2);
115 } while (rows != 0);
116 }
117