xref: /aosp_15_r20/external/mesa3d/src/amd/addrlib/src/gfx12/gfx12addrlib.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2 ************************************************************************************************************************
3 *
4 *  Copyright (C) 2023 Advanced Micro Devices, Inc.  All rights reserved.
5 *  SPDX-License-Identifier: MIT
6 *
7 ***********************************************************************************************************************/
8 
9 /**
10 ************************************************************************************************************************
11 * @file  gfx12addrlib.h
12 * @brief Contains the Gfx12Lib class definition.
13 ************************************************************************************************************************
14 */
15 
16 #ifndef __GFX12_ADDR_LIB_H__
17 #define __GFX12_ADDR_LIB_H__
18 
19 #include "addrlib3.h"
20 #include "coord.h"
21 #include "gfx12SwizzlePattern.h"
22 
23 
24 namespace Addr
25 {
26 namespace V3
27 {
28 
29 /**
30 ************************************************************************************************************************
31 * @brief This class is the GFX12 specific address library
32 *        function set.
33 ************************************************************************************************************************
34 */
35 class Gfx12Lib : public Lib
36 {
37 public:
38     /// Creates Gfx12Lib object
CreateObj(const Client * pClient)39     static Addr::Lib* CreateObj(const Client* pClient)
40     {
41         VOID* pMem = Object::ClientAlloc(sizeof(Gfx12Lib), pClient);
42         return (pMem != NULL) ? new (pMem) Gfx12Lib(pClient) : NULL;
43     }
44 
45 protected:
46     Gfx12Lib(const Client* pClient);
47     virtual ~Gfx12Lib();
48 
49     // Meta surfaces such as Hi-S/Z are essentially images on GFX12, so just return the max
50     // image alignment.
HwlComputeMaxMetaBaseAlignments()51     virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const override { return 256 * 1024; }
52 
53     UINT_32 GetMaxNumMipsInTail(
54         const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn) const;
55 
IsInMipTail(const ADDR_EXTENT3D & mipTailDim,const ADDR_EXTENT3D & mipDims,INT_32 maxNumMipsInTail,INT_32 numMipsToTheEnd)56     BOOL_32 IsInMipTail(
57         const ADDR_EXTENT3D&  mipTailDim,       ///< The output of GetMipTailDim() function which is dimensions of the
58                                                 ///  largest mip level in the tail (again, only 4kb/64kb/256kb block).
59         const ADDR_EXTENT3D&  mipDims,          ///< The dimensions of the mip level being queried now.
60         INT_32                maxNumMipsInTail, ///< The output of GetMaxNumMipsInTail() function which is the maximal
61                                                 ///  number of the mip levels that could fit in the tail of larger
62                                                 ///  block.
63         INT_32                numMipsToTheEnd   ///< This is (numMipLevels - mipIdx) and it may be negative when called
64                                                 ///  in SanityCheckSurfSize() since mipIdx has to be in [0, 16].
65         ) const
66     {
67         BOOL_32 inTail = ((mipDims.width   <= mipTailDim.width)  &&
68                           (mipDims.height  <= mipTailDim.height) &&
69                           (numMipsToTheEnd <= maxNumMipsInTail));
70 
71         return inTail;
72     }
73 
74     virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordLinear(
75         const ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
76         const ADDR3_COMPUTE_SURFACE_INFO_INPUT*          pSurfInfoIn,
77         ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut) const override;
78 
79     virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled(
80         const ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
81         ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut) const override;
82 
83     virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView(
84         const ADDR3_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
85         ADDR3_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT*      pOut) const override;
86 
87     virtual VOID HwlComputeSubResourceOffsetForSwizzlePattern(
88         const ADDR3_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
89         ADDR3_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT*      pOut) const override;
90 
91     virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor(
92         const ADDR3_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
93         ADDR3_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT*      pOut) const override;
94 
95     virtual UINT_32 HwlGetEquationIndex(
96         const ADDR3_COMPUTE_SURFACE_INFO_INPUT* pIn) const override;
97 
HwlGetEquationTableInfo(const ADDR_EQUATION ** ppEquationTable)98     virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const override
99     {
100         *ppEquationTable = m_equationTable;
101 
102         return m_numEquations;
103     }
104 
105     BOOL_32 HwlValidateNonSwModeParams(const ADDR3_GET_POSSIBLE_SWIZZLE_MODE_INPUT* pIn) const override;
106 
107     virtual ADDR_E_RETURNCODE HwlGetPossibleSwizzleModes(
108         const ADDR3_GET_POSSIBLE_SWIZZLE_MODE_INPUT*   pIn,
109         ADDR3_GET_POSSIBLE_SWIZZLE_MODE_OUTPUT*        pOut) const override;
110 
111     virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision) override;
112 
113 protected:
114     virtual VOID HwlCalcBlockSize(
115         const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn,
116         ADDR_EXTENT3D*                                 pExtent) const override final;
117 
118     ADDR_EXTENT3D HwlGetMicroBlockSize(
119         const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn) const;
120 
121     virtual ADDR_EXTENT3D HwlGetMipInTailMaxSize(
122         const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn,
123         const ADDR_EXTENT3D&                           blockDims) const override final;
124 
125 private:
126     static const SwizzleModeFlags SwizzleModeTable[ADDR3_MAX_TYPE];
127 
128     // Number of unique swizzle patterns (one entry per swizzle mode + MSAA + bpp configuration)
129     static const UINT_32 NumSwizzlePatterns  = 19 * MaxElementBytesLog2;
130 
131     // Equation table
132     ADDR_EQUATION        m_equationTable[NumSwizzlePatterns];
133 
134     /**
135     ************************************************************************************************************************
136     * @brief Bitmasks for swizzle mode determination on GFX12
137     ************************************************************************************************************************
138     */
139     static const UINT_32 Blk256KBSwModeMask = (1u << ADDR3_256KB_2D)  |
140                                               (1u << ADDR3_256KB_3D);
141     static const UINT_32 Blk64KBSwModeMask  = (1u << ADDR3_64KB_2D)   |
142                                               (1u << ADDR3_64KB_3D);
143     static const UINT_32 Blk4KBSwModeMask   = (1u << ADDR3_4KB_2D)    |
144                                               (1u << ADDR3_4KB_3D);
145     static const UINT_32 Blk256BSwModeMask  = (1u << ADDR3_256B_2D);
146 
147     static const UINT_32 MaxImageDim  = 32768; // Max image size is 32k
148     static const UINT_32 MaxMipLevels = 16;
149 
150     virtual ADDR_E_RETURNCODE HwlComputePipeBankXor(
151         const ADDR3_COMPUTE_PIPEBANKXOR_INPUT* pIn,
152         ADDR3_COMPUTE_PIPEBANKXOR_OUTPUT*      pOut) const override;
153 
154     virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn) override;
155 
156     virtual ADDR_E_RETURNCODE HwlComputeStereoInfo(
157         const ADDR3_COMPUTE_SURFACE_INFO_INPUT* pIn,
158         UINT_32*                                pAlignY,
159         UINT_32*                                pRightXor) const override;
160 
161     void SanityCheckSurfSize(
162         const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT*   pIn,
163         const ADDR3_COMPUTE_SURFACE_INFO_OUTPUT*         pOut) const;
164 
165     UINT_32           m_numSwizzleBits;
166 
167     // Initialize equation table
168     VOID InitEquationTable();
169 
170     // Initialize block dimension table
171     VOID InitBlockDimensionTable();
172 
GetSwizzlePatternFromPatternInfo(const ADDR_SW_PATINFO * pPatInfo,ADDR_BIT_SETTING (& pSwizzle)[Log2Size256K])173     VOID GetSwizzlePatternFromPatternInfo(
174         const ADDR_SW_PATINFO* pPatInfo,
175         ADDR_BIT_SETTING       (&pSwizzle)[Log2Size256K]) const
176     {
177         memcpy(pSwizzle,
178                GFX12_SW_PATTERN_NIBBLE1[pPatInfo->nibble1Idx],
179                sizeof(GFX12_SW_PATTERN_NIBBLE1[pPatInfo->nibble1Idx]));
180 
181         memcpy(&pSwizzle[8],
182                GFX12_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx],
183                sizeof(GFX12_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx]));
184 
185         memcpy(&pSwizzle[12],
186                GFX12_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx],
187                sizeof(GFX12_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx]));
188 
189         memcpy(&pSwizzle[16],
190                GFX12_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx],
191                sizeof(GFX12_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx]));
192     }
193 
194     VOID ConvertSwizzlePatternToEquation(
195         UINT_32                elemLog2,
196         Addr3SwizzleMode       swMode,
197         const ADDR_SW_PATINFO* pPatInfo,
198         ADDR_EQUATION*         pEquation) const;
199 
200     ADDR_EXTENT3D GetBaseMipExtents(
201         const ADDR3_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
202 
203     INT_32 CalcMipInTail(
204         const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT*  pIn,
205         const ADDR3_COMPUTE_SURFACE_INFO_OUTPUT*        pOut,
206         UINT_32                                         mipLevel) const;
207 
208     UINT_32 CalcMipOffset(
209         const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn,
210         UINT_32                                        mipInTail) const;
211 
212     virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
213          const ADDR3_COMPUTE_SURFACE_INFO_INPUT* pIn,
214          ADDR3_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const override;
215 
GetMipExtent(const ADDR_EXTENT3D & mip0,UINT_32 mipId)216     static ADDR_EXTENT3D GetMipExtent(
217         const ADDR_EXTENT3D&  mip0,
218         UINT_32               mipId)
219     {
220         return {
221             ShiftCeil(Max(mip0.width, 1u),  mipId),
222             ShiftCeil(Max(mip0.height, 1u), mipId),
223             ShiftCeil(Max(mip0.depth, 1u),  mipId)
224         };
225     }
226 
227     UINT_32 ComputeOffsetFromEquation(
228         const ADDR_EQUATION* pEq,
229         UINT_32              x,
230         UINT_32              y,
231         UINT_32              z,
232         UINT_32              s) const;
233 
234     const ADDR_SW_PATINFO* GetSwizzlePatternInfo(
235         Addr3SwizzleMode swizzleMode,
236         UINT_32          log2Elem,
237         UINT_32          numFrag) const;
238 
239     VOID GetMipOffset(
240          const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn,
241          ADDR3_COMPUTE_SURFACE_INFO_OUTPUT*             pOut) const;
242 
243     VOID GetMipOrigin(
244          const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn,
245          const ADDR_EXTENT3D&                           mipExtentFirstInTail,
246          ADDR3_COMPUTE_SURFACE_INFO_OUTPUT*             pOut) const;
247 
248 };
249 
250 } // V3
251 } // Addr
252 
253 #endif
254