1 /*
2 * Copyright (c) 2020-2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "arm_compute/runtime/CL/functions/CLLogicalOr.h"
25 #include "arm_compute/core/CL/ICLTensor.h"
26 #include "src/gpu/cl/kernels/ClElementwiseKernel.h"
27
28 #include "src/common/utils/Log.h"
29
30 #include <utility>
31
32 namespace arm_compute
33 {
34 namespace experimental
35 {
configure(const CLCompileContext & compile_context,ITensorInfo * input1,ITensorInfo * input2,ITensorInfo * output)36 void CLLogicalOr::configure(const CLCompileContext &compile_context, ITensorInfo *input1, ITensorInfo *input2, ITensorInfo *output)
37 {
38 ARM_COMPUTE_LOG_PARAMS(input1, input2, output);
39 auto k = std::make_unique<arm_compute::opencl::kernels::ClLogicalBinaryKernel>();
40 k->configure(compile_context, LogicalOperation::Or, input1, input2, output);
41 _kernel = std::move(k);
42 }
43
validate(const ITensorInfo * input1,const ITensorInfo * input2,const ITensorInfo * output)44 Status CLLogicalOr::validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output)
45 {
46 return arm_compute::opencl::kernels::ClLogicalBinaryKernel::validate(LogicalOperation::Or, input1, input2, output);
47 }
48
run(ITensorPack & tensors)49 void CLLogicalOr::run(ITensorPack &tensors)
50 {
51 ICLOperator::run(tensors);
52 }
53 } // namespace experimental
54
55 struct CLLogicalOr::Impl
56 {
57 const ICLTensor *src0{ nullptr };
58 const ICLTensor *src1{ nullptr };
59 ICLTensor *dst{ nullptr };
60 std::unique_ptr<experimental::CLLogicalOr> op{ nullptr };
61 };
62
CLLogicalOr()63 CLLogicalOr::CLLogicalOr()
64 : _impl(std::make_unique<Impl>())
65 {
66 }
67 CLLogicalOr::CLLogicalOr(CLLogicalOr &&) = default;
68 CLLogicalOr &CLLogicalOr::operator=(CLLogicalOr &&) = default;
69 CLLogicalOr::~CLLogicalOr() = default;
70
configure(ICLTensor * input1,ICLTensor * input2,ICLTensor * output)71 void CLLogicalOr::configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output)
72 {
73 configure(CLKernelLibrary::get().get_compile_context(), input1, input2, output);
74 }
75
configure(const CLCompileContext & compile_context,ICLTensor * input1,ICLTensor * input2,ICLTensor * output)76 void CLLogicalOr::configure(const CLCompileContext &compile_context, ICLTensor *input1, ICLTensor *input2, ICLTensor *output)
77 {
78 _impl->src0 = input1;
79 _impl->src1 = input2;
80 _impl->dst = output;
81 _impl->op = std::make_unique<experimental::CLLogicalOr>();
82 _impl->op->configure(compile_context, input1->info(), input2->info(), output->info());
83 }
84
validate(const ITensorInfo * input1,const ITensorInfo * input2,const ITensorInfo * output)85 Status CLLogicalOr::validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output)
86 {
87 return experimental::CLLogicalOr::validate(input1, input2, output);
88 }
89
run()90 void CLLogicalOr::run()
91 {
92 ITensorPack pack;
93 pack.add_tensor(TensorType::ACL_SRC_0, _impl->src0);
94 pack.add_tensor(TensorType::ACL_SRC_1, _impl->src1);
95 pack.add_tensor(TensorType::ACL_DST, _impl->dst);
96
97 _impl->op->run(pack);
98 }
99 } // namespace arm_compute
100