1 /* 2 * Copyright (c) 2022 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef SRC_RUNTIME_HEURISTICS_DWC_NATIVE_ICLDWCNATIVEKERNELCONFIG 25 #define SRC_RUNTIME_HEURISTICS_DWC_NATIVE_ICLDWCNATIVEKERNELCONFIG 26 27 #include "arm_compute/core/GPUTarget.h" 28 #include "arm_compute/core/KernelDescriptors.h" 29 #include "arm_compute/core/Types.h" 30 #include "src/core/common/Macros.h" 31 32 namespace arm_compute 33 { 34 namespace cl_dwc 35 { 36 /** Basic container for the OpenCL depthwise convolution configuration functions */ 37 template <class T> 38 class ClDWCNativeConfigArray 39 { 40 public: 41 /** Alias for F32 index */ 42 static constexpr size_t DT_F32 = 0; 43 /** Alias for F16 index */ 44 static constexpr size_t DT_F16 = 1; 45 /** Alias for Int8 index */ 46 static constexpr size_t DT_INT8 = 2; 47 48 /** Constructor 49 * 50 * @param[in] func_f32 Function to call for depthwise convolution F32 51 * @param[in] func_f16 Function to call for depthwise convolution F16 52 * @param[in] func_int8 Function to call for depthwise convolution Int8 (QASYMM8, QASYMM8_SIGNED, QSYMM8_PER_CHANNEL) 53 * 54 */ ClDWCNativeConfigArray(T func_f32,T func_f16,T func_int8)55 ClDWCNativeConfigArray(T func_f32, T func_f16, T func_int8) 56 : _configs{ func_f32, func_f16, func_int8 } 57 { 58 } 59 60 /** Method to return the depthwise convolution configuration function based on data type 61 * 62 * @param[in] data_type Input data type 63 * 64 * @return the valid function otherwise it returns nullptr if the data type is not valid 65 */ get_function(DataType data_type)66 T get_function(DataType data_type) 67 { 68 switch(data_type) 69 { 70 case DataType::F32: 71 return _configs.at(DT_F32); 72 case DataType::F16: 73 return _configs.at(DT_F16); 74 case DataType::QASYMM8: 75 case DataType::QASYMM8_SIGNED: 76 case DataType::QSYMM8_PER_CHANNEL: 77 return _configs.at(DT_INT8); 78 default: 79 return nullptr; 80 } 81 } 82 83 private: 84 std::array<T, 3> _configs; 85 }; 86 87 /** Basic interface for the depthwise convolution kernel configuration */ 88 class IClDWCNativeKernelConfig 89 { 90 public: 91 /** Constructor 92 * 93 * @param[in] arch GPU target 94 */ IClDWCNativeKernelConfig(GPUTarget arch)95 IClDWCNativeKernelConfig(GPUTarget arch) 96 : _target(arch) 97 { 98 } 99 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(IClDWCNativeKernelConfig); 100 /** Virtual destructor */ 101 virtual ~IClDWCNativeKernelConfig() = default; 102 /** This method returns the @ref DWCComputeKernelInfo for the given inputs 103 * 104 * @param[in] src Source tensor (activation tensor) 105 * @param[in] wei Weights tensor 106 * @param[in] conv_info Convolution info 107 * @param[in] dilation Kernel dilation 108 * @param[in] depth_multiplier Output feature maps multiplier 109 */ 110 virtual DWCComputeKernelInfo configure(const ITensorInfo *src, const ITensorInfo *wei, const PadStrideInfo &conv_info, const Size2D &dilation, 111 unsigned int depth_multiplier) = 0; 112 113 protected: 114 GPUTarget _target; 115 }; 116 } // namespace cl_dwc 117 } // namespace arm_compute 118 #endif /* SRC_RUNTIME_HEURISTICS_DWC_NATIVE_ICLDWCNATIVEKERNELCONFIG */ 119