xref: /btstack/port/stm32-l476rg-nucleo-sx1280/startup_stm32l476xx.s (revision 6b8177c56d8d42c688f52897394f8b5eac7ee972)
1/**
2  ******************************************************************************
3  * @file      startup_stm32l476xx.s
4  * @author    MCD Application Team
5  * @brief     STM32L476xx devices vector table GCC toolchain.
6  *            This module performs:
7  *                - Set the initial SP
8  *                - Set the initial PC == Reset_Handler,
9  *                - Set the vector table entries with the exceptions ISR address,
10  *                - Configure the clock system
11  *                - Branches to main in the C library (which eventually
12  *                  calls main()).
13  *            After Reset the Cortex-M4 processor is in Thread mode,
14  *            priority is Privileged, and the Stack is set to Main.
15  ******************************************************************************
16  * @attention
17  *
18  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
19  * All rights reserved.</center></h2>
20  *
21  * This software component is licensed by ST under BSD 3-Clause license,
22  * the "License"; You may not use this file except in compliance with the
23  * License. You may obtain a copy of the License at:
24  *                        opensource.org/licenses/BSD-3-Clause
25  *
26  ******************************************************************************
27  */
28
29  .syntax unified
30	.cpu cortex-m4
31	.fpu softvfp
32	.thumb
33
34.global	g_pfnVectors
35.global	Default_Handler
36
37/* start address for the initialization values of the .data section.
38defined in linker script */
39.word	_sidata
40/* start address for the .data section. defined in linker script */
41.word	_sdata
42/* end address for the .data section. defined in linker script */
43.word	_edata
44/* start address for the .bss section. defined in linker script */
45.word	_sbss
46/* end address for the .bss section. defined in linker script */
47.word	_ebss
48
49.equ  BootRAM,        0xF1E0F85F
50/**
51 * @brief  This is the code that gets called when the processor first
52 *          starts execution following a reset event. Only the absolutely
53 *          necessary set is performed, after which the application
54 *          supplied main() routine is called.
55 * @param  None
56 * @retval : None
57*/
58
59    .section	.text.Reset_Handler
60	.weak	Reset_Handler
61	.type	Reset_Handler, %function
62Reset_Handler:
63  ldr   sp, =_estack    /* Set stack pointer */
64
65/* Copy the data segment initializers from flash to SRAM */
66  movs	r1, #0
67  b	LoopCopyDataInit
68
69CopyDataInit:
70	ldr	r3, =_sidata
71	ldr	r3, [r3, r1]
72	str	r3, [r0, r1]
73	adds	r1, r1, #4
74
75LoopCopyDataInit:
76	ldr	r0, =_sdata
77	ldr	r3, =_edata
78	adds	r2, r0, r1
79	cmp	r2, r3
80	bcc	CopyDataInit
81	ldr	r2, =_sbss
82	b	LoopFillZerobss
83/* Zero fill the bss segment. */
84FillZerobss:
85	movs	r3, #0
86	str	r3, [r2], #4
87
88LoopFillZerobss:
89	ldr	r3, = _ebss
90	cmp	r2, r3
91	bcc	FillZerobss
92
93/* Call the clock system intitialization function.*/
94    bl  SystemInit
95/* Call static constructors */
96    bl __libc_init_array
97/* Call the application's entry point.*/
98	bl	main
99
100LoopForever:
101    b LoopForever
102
103.size	Reset_Handler, .-Reset_Handler
104
105/**
106 * @brief  This is the code that gets called when the processor receives an
107 *         unexpected interrupt.  This simply enters an infinite loop, preserving
108 *         the system state for examination by a debugger.
109 *
110 * @param  None
111 * @retval : None
112*/
113    .section	.text.Default_Handler,"ax",%progbits
114Default_Handler:
115Infinite_Loop:
116	b	Infinite_Loop
117	.size	Default_Handler, .-Default_Handler
118/******************************************************************************
119*
120* The minimal vector table for a Cortex-M4.  Note that the proper constructs
121* must be placed on this to ensure that it ends up at physical address
122* 0x0000.0000.
123*
124******************************************************************************/
125 	.section	.isr_vector,"a",%progbits
126	.type	g_pfnVectors, %object
127	.size	g_pfnVectors, .-g_pfnVectors
128
129
130g_pfnVectors:
131	.word	_estack
132	.word	Reset_Handler
133	.word	NMI_Handler
134	.word	HardFault_Handler
135	.word	MemManage_Handler
136	.word	BusFault_Handler
137	.word	UsageFault_Handler
138	.word	0
139	.word	0
140	.word	0
141	.word	0
142	.word	SVC_Handler
143	.word	DebugMon_Handler
144	.word	0
145	.word	PendSV_Handler
146	.word	SysTick_Handler
147	.word	WWDG_IRQHandler
148	.word	PVD_PVM_IRQHandler
149	.word	TAMP_STAMP_IRQHandler
150	.word	RTC_WKUP_IRQHandler
151	.word	FLASH_IRQHandler
152	.word	RCC_IRQHandler
153	.word	EXTI0_IRQHandler
154	.word	EXTI1_IRQHandler
155	.word	EXTI2_IRQHandler
156	.word	EXTI3_IRQHandler
157	.word	EXTI4_IRQHandler
158	.word	DMA1_Channel1_IRQHandler
159	.word	DMA1_Channel2_IRQHandler
160	.word	DMA1_Channel3_IRQHandler
161	.word	DMA1_Channel4_IRQHandler
162	.word	DMA1_Channel5_IRQHandler
163	.word	DMA1_Channel6_IRQHandler
164	.word	DMA1_Channel7_IRQHandler
165	.word	ADC1_2_IRQHandler
166	.word	CAN1_TX_IRQHandler
167	.word	CAN1_RX0_IRQHandler
168	.word	CAN1_RX1_IRQHandler
169	.word	CAN1_SCE_IRQHandler
170	.word	EXTI9_5_IRQHandler
171	.word	TIM1_BRK_TIM15_IRQHandler
172	.word	TIM1_UP_TIM16_IRQHandler
173	.word	TIM1_TRG_COM_TIM17_IRQHandler
174	.word	TIM1_CC_IRQHandler
175	.word	TIM2_IRQHandler
176	.word	TIM3_IRQHandler
177	.word	TIM4_IRQHandler
178	.word	I2C1_EV_IRQHandler
179	.word	I2C1_ER_IRQHandler
180	.word	I2C2_EV_IRQHandler
181	.word	I2C2_ER_IRQHandler
182	.word	SPI1_IRQHandler
183	.word	SPI2_IRQHandler
184	.word	USART1_IRQHandler
185	.word	USART2_IRQHandler
186	.word	USART3_IRQHandler
187	.word	EXTI15_10_IRQHandler
188	.word	RTC_Alarm_IRQHandler
189	.word	DFSDM1_FLT3_IRQHandler
190	.word	TIM8_BRK_IRQHandler
191	.word	TIM8_UP_IRQHandler
192	.word	TIM8_TRG_COM_IRQHandler
193	.word	TIM8_CC_IRQHandler
194	.word	ADC3_IRQHandler
195	.word	FMC_IRQHandler
196	.word	SDMMC1_IRQHandler
197	.word	TIM5_IRQHandler
198	.word	SPI3_IRQHandler
199	.word	UART4_IRQHandler
200	.word	UART5_IRQHandler
201	.word	TIM6_DAC_IRQHandler
202	.word	TIM7_IRQHandler
203	.word	DMA2_Channel1_IRQHandler
204	.word	DMA2_Channel2_IRQHandler
205	.word	DMA2_Channel3_IRQHandler
206	.word	DMA2_Channel4_IRQHandler
207	.word	DMA2_Channel5_IRQHandler
208	.word	DFSDM1_FLT0_IRQHandler
209	.word	DFSDM1_FLT1_IRQHandler
210	.word	DFSDM1_FLT2_IRQHandler
211	.word	COMP_IRQHandler
212	.word	LPTIM1_IRQHandler
213	.word	LPTIM2_IRQHandler
214	.word	OTG_FS_IRQHandler
215	.word	DMA2_Channel6_IRQHandler
216	.word	DMA2_Channel7_IRQHandler
217	.word	LPUART1_IRQHandler
218	.word	QUADSPI_IRQHandler
219	.word	I2C3_EV_IRQHandler
220	.word	I2C3_ER_IRQHandler
221	.word	SAI1_IRQHandler
222	.word	SAI2_IRQHandler
223	.word	SWPMI1_IRQHandler
224	.word	TSC_IRQHandler
225	.word	LCD_IRQHandler
226	.word 0
227	.word	RNG_IRQHandler
228	.word	FPU_IRQHandler
229
230
231/*******************************************************************************
232*
233* Provide weak aliases for each Exception handler to the Default_Handler.
234* As they are weak aliases, any function with the same name will override
235* this definition.
236*
237*******************************************************************************/
238
239  .weak	NMI_Handler
240	.thumb_set NMI_Handler,Default_Handler
241
242  .weak	HardFault_Handler
243	.thumb_set HardFault_Handler,Default_Handler
244
245  .weak	MemManage_Handler
246	.thumb_set MemManage_Handler,Default_Handler
247
248  .weak	BusFault_Handler
249	.thumb_set BusFault_Handler,Default_Handler
250
251	.weak	UsageFault_Handler
252	.thumb_set UsageFault_Handler,Default_Handler
253
254	.weak	SVC_Handler
255	.thumb_set SVC_Handler,Default_Handler
256
257	.weak	DebugMon_Handler
258	.thumb_set DebugMon_Handler,Default_Handler
259
260	.weak	PendSV_Handler
261	.thumb_set PendSV_Handler,Default_Handler
262
263	.weak	SysTick_Handler
264	.thumb_set SysTick_Handler,Default_Handler
265
266	.weak	WWDG_IRQHandler
267	.thumb_set WWDG_IRQHandler,Default_Handler
268
269	.weak	PVD_PVM_IRQHandler
270	.thumb_set PVD_PVM_IRQHandler,Default_Handler
271
272	.weak	TAMP_STAMP_IRQHandler
273	.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
274
275	.weak	RTC_WKUP_IRQHandler
276	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
277
278	.weak	FLASH_IRQHandler
279	.thumb_set FLASH_IRQHandler,Default_Handler
280
281	.weak	RCC_IRQHandler
282	.thumb_set RCC_IRQHandler,Default_Handler
283
284	.weak	EXTI0_IRQHandler
285	.thumb_set EXTI0_IRQHandler,Default_Handler
286
287	.weak	EXTI1_IRQHandler
288	.thumb_set EXTI1_IRQHandler,Default_Handler
289
290	.weak	EXTI2_IRQHandler
291	.thumb_set EXTI2_IRQHandler,Default_Handler
292
293	.weak	EXTI3_IRQHandler
294	.thumb_set EXTI3_IRQHandler,Default_Handler
295
296	.weak	EXTI4_IRQHandler
297	.thumb_set EXTI4_IRQHandler,Default_Handler
298
299	.weak	DMA1_Channel1_IRQHandler
300	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
301
302	.weak	DMA1_Channel2_IRQHandler
303	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
304
305	.weak	DMA1_Channel3_IRQHandler
306	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
307
308	.weak	DMA1_Channel4_IRQHandler
309	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
310
311	.weak	DMA1_Channel5_IRQHandler
312	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
313
314	.weak	DMA1_Channel6_IRQHandler
315	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
316
317	.weak	DMA1_Channel7_IRQHandler
318	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
319
320	.weak	ADC1_2_IRQHandler
321	.thumb_set ADC1_2_IRQHandler,Default_Handler
322
323	.weak	CAN1_TX_IRQHandler
324	.thumb_set CAN1_TX_IRQHandler,Default_Handler
325
326	.weak	CAN1_RX0_IRQHandler
327	.thumb_set CAN1_RX0_IRQHandler,Default_Handler
328
329	.weak	CAN1_RX1_IRQHandler
330	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
331
332	.weak	CAN1_SCE_IRQHandler
333	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
334
335	.weak	EXTI9_5_IRQHandler
336	.thumb_set EXTI9_5_IRQHandler,Default_Handler
337
338	.weak	TIM1_BRK_TIM15_IRQHandler
339	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
340
341	.weak	TIM1_UP_TIM16_IRQHandler
342	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
343
344	.weak	TIM1_TRG_COM_TIM17_IRQHandler
345	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
346
347	.weak	TIM1_CC_IRQHandler
348	.thumb_set TIM1_CC_IRQHandler,Default_Handler
349
350	.weak	TIM2_IRQHandler
351	.thumb_set TIM2_IRQHandler,Default_Handler
352
353	.weak	TIM3_IRQHandler
354	.thumb_set TIM3_IRQHandler,Default_Handler
355
356	.weak	TIM4_IRQHandler
357	.thumb_set TIM4_IRQHandler,Default_Handler
358
359	.weak	I2C1_EV_IRQHandler
360	.thumb_set I2C1_EV_IRQHandler,Default_Handler
361
362	.weak	I2C1_ER_IRQHandler
363	.thumb_set I2C1_ER_IRQHandler,Default_Handler
364
365	.weak	I2C2_EV_IRQHandler
366	.thumb_set I2C2_EV_IRQHandler,Default_Handler
367
368	.weak	I2C2_ER_IRQHandler
369	.thumb_set I2C2_ER_IRQHandler,Default_Handler
370
371	.weak	SPI1_IRQHandler
372	.thumb_set SPI1_IRQHandler,Default_Handler
373
374	.weak	SPI2_IRQHandler
375	.thumb_set SPI2_IRQHandler,Default_Handler
376
377	.weak	USART1_IRQHandler
378	.thumb_set USART1_IRQHandler,Default_Handler
379
380	.weak	USART2_IRQHandler
381	.thumb_set USART2_IRQHandler,Default_Handler
382
383	.weak	USART3_IRQHandler
384	.thumb_set USART3_IRQHandler,Default_Handler
385
386	.weak	EXTI15_10_IRQHandler
387	.thumb_set EXTI15_10_IRQHandler,Default_Handler
388
389	.weak	RTC_Alarm_IRQHandler
390	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
391
392	.weak	DFSDM1_FLT3_IRQHandler
393	.thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
394
395	.weak	TIM8_BRK_IRQHandler
396	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
397
398	.weak	TIM8_UP_IRQHandler
399	.thumb_set TIM8_UP_IRQHandler,Default_Handler
400
401	.weak	TIM8_TRG_COM_IRQHandler
402	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
403
404	.weak	TIM8_CC_IRQHandler
405	.thumb_set TIM8_CC_IRQHandler,Default_Handler
406
407	.weak	ADC3_IRQHandler
408	.thumb_set ADC3_IRQHandler,Default_Handler
409
410	.weak	FMC_IRQHandler
411	.thumb_set FMC_IRQHandler,Default_Handler
412
413	.weak	SDMMC1_IRQHandler
414	.thumb_set SDMMC1_IRQHandler,Default_Handler
415
416	.weak	TIM5_IRQHandler
417	.thumb_set TIM5_IRQHandler,Default_Handler
418
419	.weak	SPI3_IRQHandler
420	.thumb_set SPI3_IRQHandler,Default_Handler
421
422	.weak	UART4_IRQHandler
423	.thumb_set UART4_IRQHandler,Default_Handler
424
425	.weak	UART5_IRQHandler
426	.thumb_set UART5_IRQHandler,Default_Handler
427
428	.weak	TIM6_DAC_IRQHandler
429	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
430
431	.weak	TIM7_IRQHandler
432	.thumb_set TIM7_IRQHandler,Default_Handler
433
434	.weak	DMA2_Channel1_IRQHandler
435	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
436
437	.weak	DMA2_Channel2_IRQHandler
438	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
439
440	.weak	DMA2_Channel3_IRQHandler
441	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
442
443	.weak	DMA2_Channel4_IRQHandler
444	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
445
446	.weak	DMA2_Channel5_IRQHandler
447	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
448
449	.weak	DFSDM1_FLT0_IRQHandler
450	.thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
451
452	.weak	DFSDM1_FLT1_IRQHandler
453	.thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
454
455	.weak	DFSDM1_FLT2_IRQHandler
456	.thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
457
458	.weak	COMP_IRQHandler
459	.thumb_set COMP_IRQHandler,Default_Handler
460
461	.weak	LPTIM1_IRQHandler
462	.thumb_set LPTIM1_IRQHandler,Default_Handler
463
464	.weak	LPTIM2_IRQHandler
465	.thumb_set LPTIM2_IRQHandler,Default_Handler
466
467	.weak	OTG_FS_IRQHandler
468	.thumb_set OTG_FS_IRQHandler,Default_Handler
469
470	.weak	DMA2_Channel6_IRQHandler
471	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
472
473	.weak	DMA2_Channel7_IRQHandler
474	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
475
476	.weak	LPUART1_IRQHandler
477	.thumb_set LPUART1_IRQHandler,Default_Handler
478
479	.weak	QUADSPI_IRQHandler
480	.thumb_set QUADSPI_IRQHandler,Default_Handler
481
482	.weak	I2C3_EV_IRQHandler
483	.thumb_set I2C3_EV_IRQHandler,Default_Handler
484
485	.weak	I2C3_ER_IRQHandler
486	.thumb_set I2C3_ER_IRQHandler,Default_Handler
487
488	.weak	SAI1_IRQHandler
489	.thumb_set SAI1_IRQHandler,Default_Handler
490
491	.weak	SAI2_IRQHandler
492	.thumb_set SAI2_IRQHandler,Default_Handler
493
494	.weak	SWPMI1_IRQHandler
495	.thumb_set SWPMI1_IRQHandler,Default_Handler
496
497	.weak	TSC_IRQHandler
498	.thumb_set TSC_IRQHandler,Default_Handler
499
500	.weak	LCD_IRQHandler
501	.thumb_set LCD_IRQHandler,Default_Handler
502
503	.weak	RNG_IRQHandler
504	.thumb_set RNG_IRQHandler,Default_Handler
505
506	.weak	FPU_IRQHandler
507	.thumb_set FPU_IRQHandler,Default_Handler
508/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
509