1 /** 2 ****************************************************************************** 3 * @file stm32l0xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L0xx_HAL_TIM_EX_H 22 #define STM32L0xx_HAL_TIM_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l0xx_hal_def.h" 30 31 /** @addtogroup STM32L0xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup TIMEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 41 * @{ 42 */ 43 44 /** 45 * @} 46 */ 47 /* End of exported types -----------------------------------------------------*/ 48 49 /* Exported constants --------------------------------------------------------*/ 50 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 51 * @{ 52 */ 53 54 /** @defgroup TIMEx_Remap TIM Extended Remapping 55 * @{ 56 */ 57 #define TIM2_ETR_GPIO 0x00000000U /*!< TIM2 ETR input is connected to ORed GPIOs */ 58 #if defined(RCC_HSI48_SUPPORT) 59 #define TIM2_ETR_HSI48 TIM2_OR_ETR_RMP_2 /*!< TIM2 ETR input is connected to HSI48 clock */ 60 #endif /* RCC_HSI48_SUPPORT */ 61 #define TIM2_ETR_HSI16 (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0) /*!< TIM2 ETR input is connected to HSI16 clock */ 62 #define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0) /*!< TIM2 ETR input is connected to LSE clock */ 63 #if defined(COMP1) && defined(COMP2) 64 #define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1) /*!< TIM2 ETR input is connected to COMP2_OUT */ 65 #define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP /*!< TIM2 ETR input is connected to COMP1_OUT */ 66 #endif /* COMP1 && COMP2 */ 67 68 #define TIM2_TI4_GPIO 0x00000000U /*!< TIM2 TI4 input connected to ORed GPIOs */ 69 #if defined(COMP1) && defined(COMP2) 70 #define TIM2_TI4_COMP2 TIM2_OR_TI4_RMP_0 /*!< TIM2 TI4 input connected to COMP2_OUT */ 71 #define TIM2_TI4_COMP1 TIM2_OR_TI4_RMP_1 /*!< TIM2 TI4 input connected to COMP1_OUT */ 72 #endif /* COMP1 && COMP2 */ 73 74 #if defined(TIM3) 75 #if defined(USB) 76 #define TIM3_TI4_USB_NOE 0x00000000U /*!< USB_NOE selected selected for PC9 (AF2) remapping */ 77 #define TIM3_TI4_GPIOC9_AF2 TIM3_OR_TI4_RMP /*!< TIM3_CH4 selected for PC9 (AF2) remapping */ 78 #endif /* USB */ 79 80 #define TIM3_TI2_GPIO_DEF 0x00000000U /*!< TIM3_CH2 selected for PB5 (AF4) remapping */ 81 #define TIM3_TI2_GPIOB5_AF4 TIM3_OR_TI2_RMP /*!< TIM22_CH2 selected for PB5 (AF4) remapping */ 82 83 #if defined(USB) 84 #define TIM3_TI1_USB_SOF 0x00000000U /*!< TIM3 TI1 input connected to USB_SOF */ 85 #define TIM3_TI1_GPIO TIM3_OR_TI1_RMP /*!< TIM3 TI1 input connected to ORed GPIOs */ 86 #endif /* USB */ 87 88 #define TIM3_ETR_GPIO 0x00000000U /*!< TIM3 ETR input connected to ORed GPIOs */ 89 #define TIM3_ETR_HSI TIM3_OR_ETR_RMP_1 /*!< TIM3_ETR input is connected to HSI48 clock */ 90 #endif /* TIM3 */ 91 92 #define TIM21_ETR_GPIO 0x00000000U /*!< TIM21 ETR input connected to ORed GPIOs */ 93 #if defined(COMP1) && defined(COMP2) 94 #define TIM21_ETR_COMP2_OUT TIM21_OR_ETR_RMP_0 /*!< TIM21 ETR input connected to COMP2_OUT */ 95 #define TIM21_ETR_COMP1_OUT TIM21_OR_ETR_RMP_1 /*!< TIM21 ETR input connected to COMP1_OUT */ 96 #endif /* COMP1 && COMP2 */ 97 #define TIM21_ETR_LSE TIM21_OR_ETR_RMP /*!< TIM21 ETR input connected to LSE clock */ 98 99 #define TIM21_TI1_GPIO 0x00000000U /*!< TIM21 TI1 input connected to ORed GPIOs */ 100 #define TIM21_TI1_MCO TIM21_OR_TI1_RMP /*!< TIM21 TI1 input connected to MCO clock */ 101 #define TIM21_TI1_RTC_WKUT_IT TIM21_OR_TI1_RMP_0 /*!< TIM21 TI1 input connected to RTC WAKEUP interrupt */ 102 #define TIM21_TI1_HSE_RTC TIM21_OR_TI1_RMP_1 /*!< TIM21 TI1 input connected to HSE_RTC clock */ 103 #define TIM21_TI1_MSI (TIM21_OR_TI1_RMP_0 | TIM21_OR_TI1_RMP_1) /*!< TIM21 TI1 input connected to MSI clock */ 104 #define TIM21_TI1_LSE TIM21_OR_TI1_RMP_2 /*!< TIM21 TI1 input connected to LSE clock */ 105 #define TIM21_TI1_LSI (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0) /*!< TIM21 TI1 input connected to LSI clock */ 106 #if defined(COMP1) 107 #define TIM21_TI1_COMP1_OUT (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1) /*!< TIM21 TI1 input connected to COMP1_OUT */ 108 #endif /* COMP1 */ 109 110 #define TIM21_TI2_GPIO 0x00000000U /*!< TIM21 TI2 input connected to ORed GPIOs */ 111 #if defined(COMP2) 112 #define TIM21_TI2_COMP2_OUT TIM21_OR_TI2_RMP /*!< TIM21 TI2 input connected to COMP2_OUT */ 113 #endif /* COMP2 */ 114 115 #if defined(TIM22) 116 #define TIM22_ETR_GPIO 0x00000000U /*!< TIM22 ETR input is connected to ORed GPIOs */ 117 #if defined(COMP1) && defined(COMP2) 118 #define TIM22_ETR_COMP2_OUT TIM22_OR_ETR_RMP_0 /*!< TIM22 ETR input is connected to COMP2_OUT */ 119 #define TIM22_ETR_COMP1_OUT TIM22_OR_ETR_RMP_1 /*!< TIM22 ETR input is connected to COMP1_OUT */ 120 #endif /* COMP1 && COMP2 */ 121 #define TIM22_ETR_LSE TIM22_OR_ETR_RMP /*!< TIM22 ETR input is connected to LSE clock */ 122 123 #define TIM22_TI1_GPIO 0x00000000U /*!< TIM22 TI1 input is connected to ORed GPIOs */ 124 #if defined(COMP1) && defined(COMP2) 125 #define TIM22_TI1_COMP2_OUT TIM22_OR_TI1_RMP_0 /*!< TIM22 TI1 input is connected to COMP2_OUT */ 126 #define TIM22_TI1_COMP1_OUT TIM22_OR_TI1_RMP_1 /*!< TIM22 TI1 input is connected to COMP1_OUT */ 127 #endif /* COMP1 && COMP2 */ 128 #endif /* TIM22 */ 129 /** 130 * @} 131 */ 132 133 /** 134 * @} 135 */ 136 /* End of exported constants -------------------------------------------------*/ 137 138 /* Exported macro ------------------------------------------------------------*/ 139 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 140 * @{ 141 */ 142 143 /** 144 * @} 145 */ 146 /* End of exported macro -----------------------------------------------------*/ 147 148 /* Private macro -------------------------------------------------------------*/ 149 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 150 * @{ 151 */ 152 #if defined(TIM3) && defined(TIM22) 153 154 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \ 155 ((((__INSTANCE__) == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \ 156 (((__INSTANCE__) == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \ 157 (((__INSTANCE__) == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))) || \ 158 (((__INSTANCE__) == TIM3) && ((__TIM_REMAP__) <= (TIM3_OR_ETR_RMP | TIM3_OR_TI1_RMP | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP)))) 159 160 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \ 161 ((((__INSTANCE__) == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 162 ((__CHANNEL__) == TIM_CHANNEL_2) || \ 163 ((__CHANNEL__) == TIM_CHANNEL_3) || \ 164 ((__CHANNEL__) == TIM_CHANNEL_4))) || \ 165 (((__INSTANCE__) == TIM3) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 166 ((__CHANNEL__) == TIM_CHANNEL_2) || \ 167 ((__CHANNEL__) == TIM_CHANNEL_3) || \ 168 ((__CHANNEL__) == TIM_CHANNEL_4))) || \ 169 (((__INSTANCE__) == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 170 ((__CHANNEL__) == TIM_CHANNEL_2))) || \ 171 (((__INSTANCE__) == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 172 ((__CHANNEL__) == TIM_CHANNEL_2)))) 173 174 #elif defined(TIM22) 175 176 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \ 177 ((((__INSTANCE__) == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \ 178 (((__INSTANCE__) == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \ 179 (((__INSTANCE__) == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP)))) 180 181 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \ 182 ((((__INSTANCE__) == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 183 ((__CHANNEL__) == TIM_CHANNEL_2) || \ 184 ((__CHANNEL__) == TIM_CHANNEL_3) || \ 185 ((__CHANNEL__) == TIM_CHANNEL_4))) || \ 186 (((__INSTANCE__) == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 187 ((__CHANNEL__) == TIM_CHANNEL_2))) || \ 188 (((__INSTANCE__) == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 189 ((__CHANNEL__) == TIM_CHANNEL_2)))) 190 #else 191 192 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \ 193 ((((__INSTANCE__) == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \ 194 (((__INSTANCE__) == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP)))) 195 196 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \ 197 ((((__INSTANCE__) == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 198 ((__CHANNEL__) == TIM_CHANNEL_2) || \ 199 ((__CHANNEL__) == TIM_CHANNEL_3) || \ 200 ((__CHANNEL__) == TIM_CHANNEL_4))) || \ 201 (((__INSTANCE__) == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ 202 ((__CHANNEL__) == TIM_CHANNEL_2)))) 203 #endif /* TIM3 && TIM22 */ 204 205 /** 206 * @} 207 */ 208 /* End of private macro ------------------------------------------------------*/ 209 210 /* Exported functions --------------------------------------------------------*/ 211 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 212 * @{ 213 */ 214 215 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 216 * @brief Peripheral Control functions 217 * @{ 218 */ 219 /* Extended Control functions ************************************************/ 220 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig); 221 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 222 /** 223 * @} 224 */ 225 226 /** 227 * @} 228 */ 229 /* End of exported functions -------------------------------------------------*/ 230 231 /** 232 * @} 233 */ 234 235 /** 236 * @} 237 */ 238 239 #ifdef __cplusplus 240 } 241 #endif 242 243 244 #endif /* STM32L0xx_HAL_TIM_EX_H */ 245 246 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 247