1//===- subzero/src/IceClFlags.def - Cl Flags for translation ----*- C++ -*-===// 2// 3// The Subzero Code Generator 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// 10/// \file 11/// \brief Declares the command line flags used by Subzero. 12/// 13//===----------------------------------------------------------------------===// 14 15#ifndef SUBZERO_SRC_ICECLFLAGS_DEF 16#define SUBZERO_SRC_ICECLFLAGS_DEF 17 18namespace Ice { 19// cl_detail defines tags (i.e., structs) for specifying the type of a flag 20// (either single-, or multi-value), and whether or not the flag is available in 21// non-LLVM_CL build. 22namespace cl_detail { 23 24// Single-value flag, available in a non-LLVM_CL build. 25struct release_opt_flag {}; 26// Single-value flag, not available in a non-LLVM_CL build. 27struct dev_opt_flag {}; 28// Multi-value flag, not available in a non-LLVM_CL build. 29struct dev_list_flag {}; 30 31} // namespace cl_detail 32 33#define COMMAND_LINE_FLAGS \ 34 /* Name, Type, ClType, <<flag declaration ctor arguments>> */ \ 35 X(IRFilename, std::string, release_opt_flag, cl::Positional, \ 36 cl::desc("IR File"), cl::init("-")) \ 37 \ 38 X(NumTranslationThreads, uint32_t, release_opt_flag, "num_threads", \ 39 cl::desc("Number of translation threads (0 for purely sequential)"), \ 40 cl::init(2)) \ 41 \ 42 X(OptLevel, Ice::OptLevel, release_opt_flag, cl::desc("Optimization level"), \ 43 cl::init(Ice::Opt_m1), cl::value_desc("level"), \ 44 cl::values(clEnumValN(Ice::Opt_m1, "Om1", "-1"), \ 45 clEnumValN(Ice::Opt_m1, "O-1", "-1"), \ 46 clEnumValN(Ice::Opt_0, "O0", "0"), \ 47 clEnumValN(Ice::Opt_1, "O1", "1"), \ 48 clEnumValN(Ice::Opt_2, "O2", "2") CLENUMVALEND)) \ 49 \ 50 X(OutputFilename, std::string, release_opt_flag, "o", \ 51 cl::desc("Override output filename"), cl::init("-"), \ 52 cl::value_desc("filename")) \ 53 \ 54 X(TargetArch, Ice::TargetArch, release_opt_flag, "target", \ 55 cl::desc("Target architecture:"), cl::init(Ice::Target_X8632), \ 56 cl::values( \ 57 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), \ 58 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), \ 59 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), \ 60 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), \ 61 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), \ 62 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), \ 63 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), \ 64 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), \ 65 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), \ 66 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), \ 67 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)") \ 68 CLENUMVALEND)) \ 69 \ 70 /* The following are development flags, and ideally should not appear in a \ 71 * release build. */ \ 72 \ 73 X(AllowErrorRecovery, bool, dev_opt_flag, \ 74 "allow-pnacl-reader-error-recovery", \ 75 cl::desc("Allow error recovery when reading PNaCl bitcode."), \ 76 cl::init(false)) \ 77 \ 78 X(AllowExternDefinedSymbols, bool, dev_opt_flag, \ 79 "allow-externally-defined-symbols", \ 80 cl::desc( \ 81 "Allow global symbols to be externally defined (other than _start " \ 82 "and __pnacl_pso_root)."), \ 83 cl::init(false)) \ 84 \ 85 X(AllowIacaMarks, bool, dev_opt_flag, "allow-iaca-marks", \ 86 cl::desc("Allow IACA (Intel Architecture Code Analyzer) marks to be " \ 87 "inserted. These binaries are not executable."), \ 88 cl::init(false)) \ 89 \ 90 X(AllowUninitializedGlobals, bool, dev_opt_flag, \ 91 "allow-uninitialized-globals", \ 92 cl::desc("Allow global variables to be uninitialized")) \ 93 \ 94 X(AlwaysExitSuccess, bool, dev_opt_flag, "exit-success", \ 95 cl::desc("Exit with success status, even if errors found"), \ 96 cl::init(false)) \ 97 \ 98 X(AggressiveLea, bool, dev_opt_flag, "aggressive-lea", \ 99 cl::desc("Convert additions to lea when it reduces code size"), \ 100 cl::init(false)) \ 101 \ 102 X(BitcodeAsText, bool, dev_opt_flag, "bitcode-as-text", \ 103 cl::desc("Accept textual form of PNaCl bitcode " \ 104 "records (i.e. not .ll assembly)"), \ 105 cl::init(false)) \ 106 \ 107 X(BuildOnRead, bool, dev_opt_flag, "build-on-read", \ 108 cl::desc("Build ICE instructions when reading bitcode"), cl::init(true)) \ 109 \ 110 X(DataSections, bool, dev_opt_flag, "fdata-sections", \ 111 cl::desc("Emit (global) data into separate sections")) \ 112 \ 113 X(DecorateAsm, bool, dev_opt_flag, "asm-verbose", \ 114 cl::desc("Decorate textual asm output with register liveness info")) \ 115 \ 116 X(DefaultFunctionPrefix, std::string, dev_opt_flag, \ 117 "default-function-prefix", \ 118 cl::desc("Define default function prefix for naming unnamed functions"), \ 119 cl::init("Function")) \ 120 \ 121 X(DefaultGlobalPrefix, std::string, dev_opt_flag, "default-global-prefix", \ 122 cl::desc("Define default global prefix for naming unnamed globals"), \ 123 cl::init("Global")) \ 124 \ 125 X(DisableHybridAssembly, bool, dev_opt_flag, "no-hybrid-asm", \ 126 cl::desc("Disable hybrid assembly when -filetype=iasm"), cl::init(false)) \ 127 \ 128 X(DisableInternal, bool, dev_opt_flag, "externalize", \ 129 cl::desc("Externalize all symbols")) \ 130 \ 131 X(DisableTranslation, bool, dev_opt_flag, "notranslate", \ 132 cl::desc("Disable Subzero translation")) \ 133 \ 134 X(DumpStats, bool, dev_opt_flag, "szstats", \ 135 cl::desc("Print statistics after translating each function")) \ 136 \ 137 X(DumpStrings, bool, dev_opt_flag, "dump-strings", \ 138 cl::desc("Dump string pools during compilation"), cl::init(false)) \ 139 \ 140 X(EnableBlockProfile, bool, dev_opt_flag, "enable-block-profile", \ 141 cl::desc("Instrument basic blocks, and output profiling " \ 142 "information to stdout at the end of program execution."), \ 143 cl::init(false)) \ 144 \ 145 X(LocalCSE, Ice::LCSEOptions, dev_opt_flag, "lcse", \ 146 cl::desc("Local common subexpression elimination"), \ 147 cl::init(Ice::LCSE_EnabledSSA), \ 148 cl::values(clEnumValN(Ice::LCSE_Disabled, "0", "disabled"), \ 149 clEnumValN(Ice::LCSE_EnabledSSA, "enabled", "assume-ssa"), \ 150 clEnumValN(Ice::LCSE_EnabledNoSSA, "no-ssa", "no-assume-ssa") \ 151 CLENUMVALEND)) \ 152 \ 153 X(EmitRevision, bool, dev_opt_flag, "emit-revision", \ 154 cl::desc("Emit Subzero revision string into the output"), cl::init(true)) \ 155 \ 156 X(EnablePhiEdgeSplit, bool, dev_opt_flag, "phi-edge-split", \ 157 cl::desc("Enable edge splitting for Phi lowering"), cl::init(true)) \ 158 \ 159 X(EnableShortCircuit, bool, dev_opt_flag, "enable-sc", \ 160 cl::desc("Split Nodes for short circuit evaluation"), cl::init(false)) \ 161 \ 162 X(ExcludedRegisters, std::string, dev_list_flag, "reg-exclude", \ 163 cl::CommaSeparated, cl::desc("Don't use specified registers")) \ 164 \ 165 X(ForceMemIntrinOpt, bool, dev_opt_flag, "fmem-intrin-opt", \ 166 cl::desc("Force optimization of memory intrinsics.")) \ 167 \ 168 X(ForceO2String, std::string, dev_opt_flag, "force-O2", \ 169 cl::desc("Force -O2 for certain functions (assumes -Om1)"), cl::init("")) \ 170 \ 171 X(SplitInstString, std::string, dev_opt_flag, "split-inst", \ 172 cl::desc("Restrict local var splitting to specific insts"), cl::init(":")) \ 173 \ 174 X(FunctionSections, bool, dev_opt_flag, "ffunction-sections", \ 175 cl::desc("Emit functions into separate sections")) \ 176 \ 177 X(GenerateBuildAtts, bool, release_opt_flag, "build-atts", \ 178 cl::desc("Generate list of build attributes associated with " \ 179 "this executable."), \ 180 cl::init(false)) \ 181 \ 182 X(SplitGlobalVars, bool, dev_opt_flag, "split-global-vars", \ 183 cl::desc("Global live range splitting"), cl::init(false)) \ 184 \ 185 X(InputFileFormat, llvm::NaClFileFormat, dev_opt_flag, "bitcode-format", \ 186 cl::desc("Define format of input file:"), \ 187 cl::values(clEnumValN(llvm::LLVMFormat, "llvm", "LLVM file (default)"), \ 188 clEnumValN(llvm::PNaClFormat, "pnacl", "PNaCl bitcode file") \ 189 CLENUMVALEND), \ 190 cl::init(llvm::LLVMFormat)) \ 191 \ 192 X(KeepDeletedInsts, bool, dev_opt_flag, "keep-deleted-insts", \ 193 cl::desc("Retain deleted instructions in the Cfg"), \ 194 cl::init(Ice::BuildDefs::dump())) \ 195 \ 196 X(LLVMVerboseErrors, bool, dev_opt_flag, "verbose-llvm-parse-errors", \ 197 cl::desc("Print out more descriptive PNaCl bitcode parse errors when " \ 198 "building LLVM IR first"), \ 199 cl::init(false)) \ 200 \ 201 X(LocalCseMaxIterations, uint32_t, dev_opt_flag, "lcse-max-iters", \ 202 cl::desc("Number of times local-cse is run on a block"), cl::init(1)) \ 203 \ 204 X(LoopInvariantCodeMotion, bool, dev_opt_flag, "licm", \ 205 cl::desc("Hoist loop invariant arithmetic operations"), cl::init(false)) \ 206 \ 207 X(LogFilename, std::string, dev_opt_flag, "log", \ 208 cl::desc("Set log filename"), cl::init("-"), cl::value_desc("filename")) \ 209 \ 210 X(MaxNopsPerInstruction, int, dev_opt_flag, "max-nops-per-instruction", \ 211 cl::desc("Max number of nops to insert per instruction"), cl::init(1)) \ 212 \ 213 X(MockBoundsCheck, bool, dev_opt_flag, "mock-bounds-check", \ 214 cl::desc("Mock bounds checking on loads/stores")) \ 215 \ 216 X(NopProbabilityAsPercentage, int, dev_opt_flag, "nop-insertion-percentage", \ 217 cl::desc("Nop insertion probability as percentage"), cl::init(10)) \ 218 \ 219 X(OutFileType, Ice::FileType, dev_opt_flag, "filetype", \ 220 cl::desc("Output file type"), cl::init(Ice::FT_Iasm), \ 221 cl::values( \ 222 clEnumValN(Ice::FT_Elf, "obj", "Native ELF object ('.o') file"), \ 223 clEnumValN(Ice::FT_Asm, "asm", "Assembly ('.s') file"), \ 224 clEnumValN(Ice::FT_Iasm, "iasm", \ 225 "Low-level integrated assembly ('.s') file") CLENUMVALEND)) \ 226 \ 227 X(ParseParallel, bool, dev_opt_flag, "parse-parallel", \ 228 cl::desc("Parse function blocks in parallel"), cl::init(true)) \ 229 \ 230 X(SplitLocalVars, bool, dev_opt_flag, "split-local-vars", cl::init(true), \ 231 cl::desc("Block-local variable splitting (O2 only)")) \ 232 \ 233 X(RegAllocReserve, bool, dev_opt_flag, "reg-reserve", \ 234 cl::desc("Let register allocation use reserve registers"), \ 235 cl::init(false)) \ 236 \ 237 X(RepeatRegAlloc, bool, dev_opt_flag, "regalloc-repeat", \ 238 cl::desc("Repeat register allocation until convergence"), cl::init(true)) \ 239 \ 240 /* TODO(tlively): Generalize this to handle more sanitizers */ \ 241 X(SanitizeAddresses, bool, dev_opt_flag, "fsanitize-address", \ 242 cl::desc("Instrument compiled code with Address Sanitizer"), \ 243 cl::init(false)) \ 244 \ 245 X(SkipUnimplemented, bool, dev_opt_flag, "skip-unimplemented", \ 246 cl::desc("Skip through unimplemented lowering code instead of aborting."), \ 247 cl::init(false)) \ 248 \ 249 X(SubzeroTimingEnabled, bool, dev_opt_flag, "timing", \ 250 cl::desc("Enable breakdown timing of Subzero translation")) \ 251 \ 252 X(TargetInstructionSet, Ice::TargetInstructionSet, dev_opt_flag, "mattr", \ 253 cl::desc("Target architecture attributes"), \ 254 cl::init(Ice::BaseInstructionSet), \ 255 cl::values( \ 256 clEnumValN(Ice::BaseInstructionSet, "base", \ 257 "Target chooses baseline instruction set (default)"), \ 258 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", \ 259 "Enable X86 SSE2 instructions"), \ 260 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", \ 261 "Enable X86 SSE 4.1 instructions"), \ 262 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", \ 263 "Enable ARM Neon instructions"), \ 264 clEnumValN(Ice::ARM32InstructionSet_HWDivArm, "hwdiv-arm", \ 265 "Enable ARM integer divide instructions in ARM mode") \ 266 CLENUMVALEND)) \ 267 \ 268 X(TestPrefix, std::string, dev_opt_flag, "prefix", \ 269 cl::desc("Prepend a prefix to symbol names for testing"), cl::init(""), \ 270 cl::value_desc("prefix")) \ 271 \ 272 X(TestStackExtra, uint32_t, dev_opt_flag, "test-stack-extra", \ 273 cl::desc("Extra amount of stack to add to the " \ 274 "frame in bytes (for testing)."), \ 275 cl::init(0)) \ 276 \ 277 X(TestStatusString, std::string, dev_opt_flag, "test-status", \ 278 cl::desc("Testing flag for -verbose=status"), cl::init(":")) \ 279 \ 280 X(TimeEachFunction, bool, dev_opt_flag, "timing-funcs", \ 281 cl::desc("Print total translation time for each function")) \ 282 \ 283 X(TimingFocusOnString, std::string, dev_opt_flag, "timing-focus", \ 284 cl::desc("Break down timing for specific functions (use ':' for all)"), \ 285 cl::init("")) \ 286 \ 287 X(TranslateOnlyString, std::string, dev_opt_flag, "translate-only", \ 288 cl::desc("Translate only the given functions"), cl::init(":")) \ 289 \ 290 X(UseRestrictedRegisters, std::string, dev_list_flag, "reg-use", \ 291 cl::CommaSeparated, \ 292 cl::desc("Only use specified registers for corresponding register " \ 293 "classes")) \ 294 \ 295 X(Verbose, Ice::VerboseItem, dev_list_flag, "verbose", cl::CommaSeparated, \ 296 cl::desc("Verbose options (can be comma-separated):"), \ 297 cl::values( \ 298 clEnumValN(Ice::IceV_Instructions, "inst", \ 299 "Print basic instructions"), \ 300 clEnumValN(Ice::IceV_Deleted, "del", "Include deleted instructions"), \ 301 clEnumValN(Ice::IceV_InstNumbers, "instnum", \ 302 "Print instruction numbers"), \ 303 clEnumValN(Ice::IceV_Preds, "pred", "Show predecessors"), \ 304 clEnumValN(Ice::IceV_Succs, "succ", "Show successors"), \ 305 clEnumValN(Ice::IceV_Liveness, "live", "Liveness information"), \ 306 clEnumValN(Ice::IceV_RegOrigins, "orig", "Physical register origins"), \ 307 clEnumValN(Ice::IceV_LinearScan, "regalloc", "Linear scan details"), \ 308 clEnumValN(Ice::IceV_Frame, "frame", "Stack frame layout details"), \ 309 clEnumValN(Ice::IceV_AddrOpt, "addropt", "Address mode optimization"), \ 310 clEnumValN(Ice::IceV_Folding, "fold", "Instruction folding details"), \ 311 clEnumValN(Ice::IceV_RMW, "rmw", "ReadModifyWrite optimization"), \ 312 clEnumValN(Ice::IceV_Loop, "loop", "Loop nest depth analysis"), \ 313 clEnumValN(Ice::IceV_Mem, "mem", "Memory usage details"), \ 314 clEnumValN(Ice::IceV_ShufMat, "shufvec", \ 315 "Shufflevector rematerialization"), \ 316 clEnumValN(Ice::IceV_Status, "status", \ 317 "Print the name of the function being translated"), \ 318 clEnumValN(Ice::IceV_AvailableRegs, "registers", \ 319 "Show available registers for register allocation"), \ 320 clEnumValN(Ice::IceV_GlobalInit, "global_init", \ 321 "Global initializers"), \ 322 clEnumValN(Ice::IceV_ConstPoolStats, "cpool", \ 323 "Constant pool counters"), \ 324 clEnumValN(Ice::IceV_Wasm, "wasm", "WebAssembly builder"), \ 325 clEnumValN(Ice::IceV_All, "all", "Use all verbose options"), \ 326 clEnumValN(Ice::IceV_Most, "most", \ 327 "Use all verbose options except 'regalloc,global_init'"), \ 328 clEnumValN(Ice::IceV_None, "none", "No verbosity") CLENUMVALEND)) \ 329 \ 330 X(VerboseFocusOnString, std::string, dev_opt_flag, "verbose-focus", \ 331 cl::desc("Override with -verbose=none except for specified functions"), \ 332 cl::init(":")) \ 333 \ 334 X(WasmBoundsCheck, bool, dev_opt_flag, "wasm-bounds-check", \ 335 cl::desc("Add bounds checking code in WASM frontend"), cl::init(true)) 336 337//#define X(Name, Type, ClType, ...) 338 339} // end of namespace Ice 340 341#endif // SUBZERO_SRC_ICECLFLAGS_DEF 342